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x86: drop VecESize
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
c39e5b26
JB		 12018-03-28 Jan Beulich <jbeulich@suse.com>
2
3 * i386-gen.c (opcode_modifiers): Delete VecESize.
4 * i386-opc.h (VecESize): Delete.
5 (struct i386_opcode_modifier): Delete vecesize.
6 * i386-opc.tbl: Drop VecESize.
7 * i386-tlb.h: Re-generate.
8
8e6e0792
JB		 92018-03-28 Jan Beulich <jbeulich@suse.com>
10
11 * i386-opc.h (NO_BROADCAST, BROADCAST_1TO16, BROADCAST_1TO8,
12 BROADCAST_1TO4, BROADCAST_1TO2): Delete.
13 (struct i386_opcode_modifier): Shrink broadcast field to 1 bit.
14 * i386-opc.tbl: Replace Broadcast=<N> by Broadcast.
15 * i386-tlb.h: Re-generate.
16
9f123b91
JB		 172018-03-28 Jan Beulich <jbeulich@suse.com>
18
19 * i386-opc.tbl (vcvt*d2si, vcvt*d2usi, vcvt*s2si, vcvt*s2usi):
20 Fold AVX512 forms
21 * i386-tlb.h: Re-generate.
22
9646c87b
JB		 232018-03-28 Jan Beulich <jbeulich@suse.com>
24
25 * i386-dis.c (prefix_table): Drop Y for cvt*2si.
26 (vex_len_table): Drop Y for vcvt*2si.
27 (putop): Replace plain 'Y' handling by abort().
28
c8d59609
NC		 292018-03-28 Nick Clifton <nickc@redhat.com>
30
31 PR 22988
32 * aarch64-tbl.h (aarch64_opcode_table): Add entries for LDFF1xx
33 instructions with only a base address register.
34 * aarch64-opc.c (operand_general_constraint_met_p): Add code to
35 handle AARHC64_OPND_SVE_ADDR_R.
36 (aarch64_print_operand): Likewise.
37 * aarch64-asm-2.c: Regenerate.
38 * aarch64_dis-2.c: Regenerate.
39 * aarch64-opc-2.c: Regenerate.
40
b8c169f3
JB		 412018-03-22 Jan Beulich <jbeulich@suse.com>
42
43 * i386-opc.tbl: Drop VecESize from register only insn forms and
44 memory forms not allowing broadcast.
45 * i386-tlb.h: Re-generate.
46
96bc132a
JB		 472018-03-22 Jan Beulich <jbeulich@suse.com>
48
49 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
50 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
51 sha256*): Drop Disp<N>.
52
9f79e886
JB		 532018-03-22 Jan Beulich <jbeulich@suse.com>
54
55 * i386-dis.c (EbndS, bnd_swap_mode): New.
56 (prefix_table): Use EbndS.
57 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
58 * i386-opc.tbl (bndmov): Move misplaced Load.
59 * i386-tlb.h: Re-generate.
60
d6793fa1
JB		 612018-03-22 Jan Beulich <jbeulich@suse.com>
62
63 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
64 templates allowing memory operands and folded ones for register
65 only flavors.
66 * i386-tlb.h: Re-generate.
67
f7768225
JB		 682018-03-22 Jan Beulich <jbeulich@suse.com>
69
70 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
71 256-bit templates. Drop redundant leftover Disp<N>.
72 * i386-tlb.h: Re-generate.
73
0e35537d
JW		 742018-03-14 Kito Cheng <kito.cheng@gmail.com>
75
76 * riscv-opc.c (riscv_insn_types): New.
77
b4a3689a
NC		 782018-03-13 Nick Clifton <nickc@redhat.com>
79
80 * po/pt_BR.po: Updated Brazilian Portuguese translation.
81
d3d50934
L		 822018-03-08 H.J. Lu <hongjiu.lu@intel.com>
83
84 * i386-opc.tbl: Add Optimize to clr.
85 * i386-tbl.h: Regenerated.
86
bd5dea88
L		 872018-03-08 H.J. Lu <hongjiu.lu@intel.com>
88
89 * i386-gen.c (opcode_modifiers): Remove OldGcc.
90 * i386-opc.h (OldGcc): Removed.
91 (i386_opcode_modifier): Remove oldgcc.
92 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
93 instructions for old (<= 2.8.1) versions of gcc.
94 * i386-tbl.h: Regenerated.
95
e771e7c9
JB		 962018-03-08 Jan Beulich <jbeulich@suse.com>
97
98 * i386-opc.h (EVEXDYN): New.
99 * i386-opc.tbl: Fold various AVX512VL templates.
100 * i386-tlb.h: Re-generate.
101
ed438a93
JB		 1022018-03-08 Jan Beulich <jbeulich@suse.com>
103
104 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
105 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
106 vpexpandd, vpexpandq): Fold AFX512VF templates.
107 * i386-tlb.h: Re-generate.
108
454172a9
JB		 1092018-03-08 Jan Beulich <jbeulich@suse.com>
110
111 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
112 Fold 128- and 256-bit VEX-encoded templates.
113 * i386-tlb.h: Re-generate.
114
36824150
JB		 1152018-03-08 Jan Beulich <jbeulich@suse.com>
116
117 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
118 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
119 vpexpandd, vpexpandq): Fold AVX512F templates.
120 * i386-tlb.h: Re-generate.
121
e7f5c0a9
JB		 1222018-03-08 Jan Beulich <jbeulich@suse.com>
123
124 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
125 64-bit templates. Drop Disp<N>.
126 * i386-tlb.h: Re-generate.
127
25a4277f
JB		 1282018-03-08 Jan Beulich <jbeulich@suse.com>
129
130 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
131 and 256-bit templates.
132 * i386-tlb.h: Re-generate.
133
d2224064
JB		 1342018-03-08 Jan Beulich <jbeulich@suse.com>
135
136 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
137 * i386-tlb.h: Re-generate.
138
1b193f0b
JB		 1392018-03-08 Jan Beulich <jbeulich@suse.com>
140
141 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
142 Drop NoAVX.
143 * i386-tlb.h: Re-generate.
144
f2f6a710
JB		 1452018-03-08 Jan Beulich <jbeulich@suse.com>
146
147 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
148 * i386-tlb.h: Re-generate.
149
38e314eb
JB		 1502018-03-08 Jan Beulich <jbeulich@suse.com>
151
152 * i386-gen.c (opcode_modifiers): Delete FloatD.
153 * i386-opc.h (FloatD): Delete.
154 (struct i386_opcode_modifier): Delete floatd.
155 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
156 FloatD by D.
157 * i386-tlb.h: Re-generate.
158
d53e6b98
JB		 1592018-03-08 Jan Beulich <jbeulich@suse.com>
160
161 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
162
2907c2f5
JB		 1632018-03-08 Jan Beulich <jbeulich@suse.com>
164
165 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
166 * i386-tlb.h: Re-generate.
167
73053c1f
JB		 1682018-03-08 Jan Beulich <jbeulich@suse.com>
169
170 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
171 forms.
172 * i386-tlb.h: Re-generate.
173
52fe4420
AM		 1742018-03-07 Alan Modra <amodra@gmail.com>
175
176 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
177 bfd_arch_rs6000.
178 * disassemble.h (print_insn_rs6000): Delete.
179 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
180 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
181 (print_insn_rs6000): Delete.
182
a6743a54
AM		 1832018-03-03 Alan Modra <amodra@gmail.com>
184
185 * sysdep.h (opcodes_error_handler): Define.
186 (_bfd_error_handler): Declare.
187 * Makefile.am: Remove stray #.
188 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
189 EDIT" comment.
190 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
191 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
192 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
193 opcodes_error_handler to print errors. Standardize error messages.
194 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
195 and include opintl.h.
196 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
197 * i386-gen.c: Standardize error messages.
198 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
199 * Makefile.in: Regenerate.
200 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
201 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
202 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
203 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
204 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
205 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
206 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
207 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
208 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
209 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
210 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
211 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
212 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
213
8305403a
L		 2142018-03-01 H.J. Lu <hongjiu.lu@intel.com>
215
216 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
217 vpsub[bwdq] instructions.
218 * i386-tbl.h: Regenerated.
219
e184813f
AM		 2202018-03-01 Alan Modra <amodra@gmail.com>
221
222 * configure.ac (ALL_LINGUAS): Sort.
223 * configure: Regenerate.
224
5b616bef
TP		 2252018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
226
227 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
228 macro by assignements.
229
b6f8c7c4
L		 2302018-02-27 H.J. Lu <hongjiu.lu@intel.com>
231
232 PR gas/22871
233 * i386-gen.c (opcode_modifiers): Add Optimize.
234 * i386-opc.h (Optimize): New enum.
235 (i386_opcode_modifier): Add optimize.
236 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
237 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
238 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
239 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
240 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
241 vpxord and vpxorq.
242 * i386-tbl.h: Regenerated.
243
e95b887f
AM		 2442018-02-26 Alan Modra <amodra@gmail.com>
245
246 * crx-dis.c (getregliststring): Allocate a large enough buffer
247 to silence false positive gcc8 warning.
248
0bccfb29
JW		 2492018-02-22 Shea Levy <shea@shealevy.com>
250
251 * disassemble.c (ARCH_riscv): Define if ARCH_all.
252
6b6b6807
L		 2532018-02-22 H.J. Lu <hongjiu.lu@intel.com>
254
255 * i386-opc.tbl: Add {rex},
256 * i386-tbl.h: Regenerated.
257
75f31665
MR		 2582018-02-20 Maciej W. Rozycki <macro@mips.com>
259
260 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
261 (mips16_opcodes): Replace `M' with `m' for "restore".
262
e207bc53
TP		 2632018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
264
265 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
266
87993319
MR		 2672018-02-13 Maciej W. Rozycki <macro@mips.com>
268
269 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
270 variable to `function_index'.
271
68d20676
NC		 2722018-02-13 Nick Clifton <nickc@redhat.com>
273
274 PR 22823
275 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
276 about truncation of printing.
277
d2159fdc
HW		 2782018-02-12 Henry Wong <henry@stuffedcow.net>
279
280 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
281
f174ef9f
NC		 2822018-02-05 Nick Clifton <nickc@redhat.com>
283
284 * po/pt_BR.po: Updated Brazilian Portuguese translation.
285
be3a8dca
IT		 2862018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
287
288 * i386-dis.c (enum): Add pconfig.
289 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
290 (cpu_flags): Add CpuPCONFIG.
291 * i386-opc.h (enum): Add CpuPCONFIG.
292 (i386_cpu_flags): Add cpupconfig.
293 * i386-opc.tbl: Add PCONFIG instruction.
294 * i386-init.h: Regenerate.
295 * i386-tbl.h: Likewise.
296
3233d7d0
IT		 2972018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
298
299 * i386-dis.c (enum): Add PREFIX_0F09.
300 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
301 (cpu_flags): Add CpuWBNOINVD.
302 * i386-opc.h (enum): Add CpuWBNOINVD.
303 (i386_cpu_flags): Add cpuwbnoinvd.
304 * i386-opc.tbl: Add WBNOINVD instruction.
305 * i386-init.h: Regenerate.
306 * i386-tbl.h: Likewise.
307
e925c834
JW		 3082018-01-17 Jim Wilson <jimw@sifive.com>
309
310 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
311
d777820b
IT		 3122018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
313
314 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
315 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
316 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
317 (cpu_flags): Add CpuIBT, CpuSHSTK.
318 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
319 (i386_cpu_flags): Add cpuibt, cpushstk.
320 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
321 * i386-init.h: Regenerate.
322 * i386-tbl.h: Likewise.
323
f6efed01
NC		 3242018-01-16 Nick Clifton <nickc@redhat.com>
325
326 * po/pt_BR.po: Updated Brazilian Portugese translation.
327 * po/de.po: Updated German translation.
328
2721d702
JW		 3292018-01-15 Jim Wilson <jimw@sifive.com>
330
331 * riscv-opc.c (match_c_nop): New.
332 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
333
616dcb87
NC		 3342018-01-15 Nick Clifton <nickc@redhat.com>
335
336 * po/uk.po: Updated Ukranian translation.
337
3957a496
NC		 3382018-01-13 Nick Clifton <nickc@redhat.com>
339
340 * po/opcodes.pot: Regenerated.
341
769c7ea5
NC		 3422018-01-13 Nick Clifton <nickc@redhat.com>
343
344 * configure: Regenerate.
345
faf766e3
NC		 3462018-01-13 Nick Clifton <nickc@redhat.com>
347
348 2.30 branch created.
349
888a89da
IT		 3502018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
351
352 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
353 * i386-tbl.h: Regenerate.
354
cbda583a
JB		 3552018-01-10 Jan Beulich <jbeulich@suse.com>
356
357 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
358 * i386-tbl.h: Re-generate.
359
c9e92278
JB		 3602018-01-10 Jan Beulich <jbeulich@suse.com>
361
362 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
363 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
364 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
365 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
366 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
367 Disp8MemShift of AVX512VL forms.
368 * i386-tbl.h: Re-generate.
369
35fd2b2b
JW		 3702018-01-09 Jim Wilson <jimw@sifive.com>
371
372 * riscv-dis.c (maybe_print_address): If base_reg is zero,
373 then the hi_addr value is zero.
374
91d8b670
JG		 3752018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
376
377 * arm-dis.c (arm_opcodes): Add csdb.
378 (thumb32_opcodes): Add csdb.
379
be2e7d95
JG		 3802018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
381
382 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
383 * aarch64-asm-2.c: Regenerate.
384 * aarch64-dis-2.c: Regenerate.
385 * aarch64-opc-2.c: Regenerate.
386
704a705d
L		 3872018-01-08 H.J. Lu <hongjiu.lu@intel.com>
388
389 PR gas/22681
390 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
391 Remove AVX512 vmovd with 64-bit operands.
392 * i386-tbl.h: Regenerated.
393
35eeb78f
JW		 3942018-01-05 Jim Wilson <jimw@sifive.com>
395
396 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
397 jalr.
398
219d1afa
AM		 3992018-01-03 Alan Modra <amodra@gmail.com>
400
401 Update year range in copyright notice of all files.
402
1508bbf5
JB		 4032018-01-02 Jan Beulich <jbeulich@suse.com>
404
405 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
406 and OPERAND_TYPE_REGZMM entries.
407
1e563868 408For older changes see ChangeLog-2017
3499769a 409\f
1e563868 410Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
AM		 411
412Copying and distribution of this file, with or without modification,
413are permitted in any medium without royalty provided the copyright
414notice and this notice are preserved.
415
416Local Variables:
417mode: change-log
418left-margin: 8
419fill-column: 74
420version-control: never
421End:
GDB Binutils - Deliverables
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