Commit | Line | Data |
---|---|---|
3929df09 QN |
1 | 2011-08-02 Quentin Neill <quentin.neill@amd.com> |
2 | ||
3 | * i386-dis.c (xop_table): Remove spurious bextr insn. | |
4 | ||
d7921315 L |
5 | 2011-08-01 H.J. Lu <hongjiu.lu@intel.com> |
6 | ||
7 | PR ld/13048 | |
8 | * i386-dis.c (print_insn): Optimize info->mach check. | |
9 | ||
00f51a41 L |
10 | 2011-08-01 H.J. Lu <hongjiu.lu@intel.com> |
11 | ||
12 | PR gas/13046 | |
13 | * i386-opc.tbl: Add Disp32S to 64bit call. | |
14 | * i386-tbl.h: Regenerated. | |
15 | ||
df58fc94 RS |
16 | 2011-07-24 Chao-ying Fu <fu@mips.com> |
17 | Maciej W. Rozycki <macro@codesourcery.com> | |
18 | ||
19 | * micromips-opc.c: New file. | |
20 | * mips-dis.c (micromips_to_32_reg_b_map): New array. | |
21 | (micromips_to_32_reg_c_map, micromips_to_32_reg_d_map): Likewise. | |
22 | (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map): Likewise. | |
23 | (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map): Likewise. | |
24 | (micromips_to_32_reg_q_map): Likewise. | |
25 | (micromips_imm_b_map, micromips_imm_c_map): Likewise. | |
26 | (micromips_ase): New variable. | |
27 | (is_micromips): New function. | |
28 | (set_default_mips_dis_options): Handle microMIPS ASE. | |
29 | (print_insn_micromips): New function. | |
30 | (is_compressed_mode_p): Likewise. | |
31 | (_print_insn_mips): Handle microMIPS instructions. | |
32 | * Makefile.am (CFILES): Add micromips-opc.c. | |
33 | * configure.in (bfd_mips_arch): Add micromips-opc.lo. | |
34 | * Makefile.in: Regenerate. | |
35 | * configure: Regenerate. | |
36 | ||
37 | * mips-dis.c (micromips_to_32_reg_h_map): New variable. | |
38 | (micromips_to_32_reg_i_map): Likewise. | |
39 | (micromips_to_32_reg_m_map): Likewise. | |
40 | (micromips_to_32_reg_n_map): New macro. | |
41 | ||
bcd530a7 RS |
42 | 2011-07-24 Maciej W. Rozycki <macro@codesourcery.com> |
43 | ||
44 | * mips-opc.c (NODS): New macro. | |
45 | (TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT. | |
46 | (DSP_VOLA): Likewise. | |
47 | (mips_builtin_opcodes): Add NODS annotation to "deret" and | |
48 | "eret". Replace INSN_SYNC with NODS throughout. Use NODS in | |
49 | place of TRAP for "wait", "waiti" and "yield". | |
50 | * mips16-opc.c (NODS): New macro. | |
51 | (TRAP): Adjust for the rename of INSN_TRAP to INSN_NO_DELAY_SLOT. | |
52 | (mips16_opcodes): Use NODS in place of TRAP for "jalrc", "jrc", | |
53 | "restore" and "save". | |
54 | ||
7a9068fe L |
55 | 2011-07-22 H.J. Lu <hongjiu.lu@intel.com> |
56 | ||
57 | * configure.in: Handle bfd_k1om_arch. | |
58 | * configure: Regenerated. | |
59 | ||
60 | * disassemble.c (disassembler): Handle bfd_k1om_arch. | |
61 | ||
62 | * i386-dis.c (print_insn): Handle bfd_mach_k1om and | |
63 | bfd_mach_k1om_intel_syntax. | |
64 | ||
65 | * i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to | |
66 | ~(CpuL1OM|CpuK1OM). Add CPU_K1OM_FLAGS. | |
67 | (cpu_flags): Add CpuK1OM. | |
68 | ||
69 | * i386-opc.h (CpuK1OM): New. | |
70 | (i386_cpu_flags): Add cpuk1om. | |
71 | ||
72 | * i386-init.h: Regenerated. | |
73 | * i386-tbl.h: Likewise. | |
74 | ||
1b93226d NC |
75 | 2011-07-12 Nick Clifton <nickc@redhat.com> |
76 | ||
77 | * arm-dis.c (print_insn_arm): Revert previous, undocumented, | |
78 | accidental change. | |
79 | ||
5d73b1f1 NC |
80 | 2011-07-01 Nick Clifton <nickc@redhat.com> |
81 | ||
82 | PR binutils/12329 | |
83 | * avr-dis.c (avr_operand): Fix disassembly of ELPM, LPM and SPM | |
84 | insns using post-increment addressing. | |
85 | ||
182ae480 L |
86 | 2011-06-30 H.J. Lu <hongjiu.lu@intel.com> |
87 | ||
88 | * i386-dis.c (vex_len_table): Update rorxS. | |
89 | ||
4cb0953d L |
90 | 2011-06-30 H.J. Lu <hongjiu.lu@intel.com> |
91 | ||
92 | AVX Programming Reference (June, 2011) | |
93 | * i386-dis.c (vex_len_table): Correct rorxS. | |
94 | ||
95 | * i386-opc.tbl: Correct rorx. | |
96 | * i386-tbl.h: Regenerated. | |
97 | ||
906efcbc L |
98 | 2011-06-29 H.J. Lu <hongjiu.lu@intel.com> |
99 | ||
100 | * tilegx-opc.c (find_opcode): Replace "index" with "i". | |
101 | * tilepro-opc.c (find_opcode): Likewise. | |
102 | ||
ceb94aa5 RS |
103 | 2011-06-29 Richard Sandiford <rdsandiford@googlemail.com> |
104 | ||
105 | * mips16-opc.c (jalrc, jrc): Move earlier in file. | |
106 | ||
f7002f42 L |
107 | 2011-06-21 H.J. Lu <hongjiu.lu@intel.com> |
108 | ||
109 | * i386-dis.c (prefix_table): Re-indent PREFIX_VEX_0F388C and | |
110 | PREFIX_VEX_0F388E. | |
111 | ||
56300268 AS |
112 | 2011-06-17 Andreas Schwab <schwab@redhat.com> |
113 | ||
114 | * Makefile.am (MAINTAINERCLEANFILES): Move s390-opc.tab ... | |
115 | (MOSTLYCLEANFILES): ... here. | |
116 | * Makefile.in: Regenerate. | |
117 | ||
bcf2cf9f AM |
118 | 2011-06-14 Alan Modra <amodra@gmail.com> |
119 | ||
120 | * Makefile.in: Regenerate. | |
121 | ||
aa137e4d NC |
122 | 2011-06-13 Walter Lee <walt@tilera.com> |
123 | ||
124 | * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tilegx-dis.c, | |
125 | tilegx-opc.c, tilepro-dis.c, and tilepro-opc.c. | |
126 | * Makefile.in: Regenerate. | |
127 | * configure.in: Handle bfd_tilegx_arch and bfd_tilepro_arch. | |
128 | * configure: Regenerate. | |
129 | * disassemble.c (disassembler): Add ARCH_tilegx and ARCH_tilepro. | |
130 | * po/POTFILES.in: Regenerate. | |
131 | * tilegx-dis.c: New file. | |
132 | * tilegx-opc.c: New file. | |
133 | * tilepro-dis.c: New file. | |
134 | * tilepro-opc.c: New file. | |
135 | ||
6c30d220 L |
136 | 2011-06-10 H.J. Lu <hongjiu.lu@intel.com> |
137 | ||
138 | AVX Programming Reference (June, 2011) | |
139 | * i386-dis.c (XMGatherQ): New. | |
140 | * i386-dis.c (EXxmm_mb): New. | |
141 | (EXxmm_mb): Likewise. | |
142 | (EXxmm_mw): Likewise. | |
143 | (EXxmm_md): Likewise. | |
144 | (EXxmm_mq): Likewise. | |
145 | (EXxmmdw): Likewise. | |
146 | (EXxmmqd): Likewise. | |
147 | (VexGatherQ): Likewise. | |
148 | (MVexVSIBDWpX): Likewise. | |
149 | (MVexVSIBQWpX): Likewise. | |
150 | (xmm_mb_mode): Likewise. | |
151 | (xmm_mw_mode): Likewise. | |
152 | (xmm_md_mode): Likewise. | |
153 | (xmm_mq_mode): Likewise. | |
154 | (xmmdw_mode): Likewise. | |
155 | (xmmqd_mode): Likewise. | |
156 | (ymmxmm_mode): Likewise. | |
157 | (vex_vsib_d_w_dq_mode): Likewise. | |
158 | (vex_vsib_q_w_dq_mode): Likewise. | |
159 | (MOD_VEX_0F385A_PREFIX_2): Likewise. | |
160 | (MOD_VEX_0F388C_PREFIX_2): Likewise. | |
161 | (MOD_VEX_0F388E_PREFIX_2): Likewise. | |
162 | (PREFIX_0F3882): Likewise. | |
163 | (PREFIX_VEX_0F3816): Likewise. | |
164 | (PREFIX_VEX_0F3836): Likewise. | |
165 | (PREFIX_VEX_0F3845): Likewise. | |
166 | (PREFIX_VEX_0F3846): Likewise. | |
167 | (PREFIX_VEX_0F3847): Likewise. | |
168 | (PREFIX_VEX_0F3858): Likewise. | |
169 | (PREFIX_VEX_0F3859): Likewise. | |
170 | (PREFIX_VEX_0F385A): Likewise. | |
171 | (PREFIX_VEX_0F3878): Likewise. | |
172 | (PREFIX_VEX_0F3879): Likewise. | |
173 | (PREFIX_VEX_0F388C): Likewise. | |
174 | (PREFIX_VEX_0F388E): Likewise. | |
175 | (PREFIX_VEX_0F3890..PREFIX_VEX_0F3893): Likewise. | |
176 | (PREFIX_VEX_0F38F5): Likewise. | |
177 | (PREFIX_VEX_0F38F6): Likewise. | |
178 | (PREFIX_VEX_0F3A00): Likewise. | |
179 | (PREFIX_VEX_0F3A01): Likewise. | |
180 | (PREFIX_VEX_0F3A02): Likewise. | |
181 | (PREFIX_VEX_0F3A38): Likewise. | |
182 | (PREFIX_VEX_0F3A39): Likewise. | |
183 | (PREFIX_VEX_0F3A46): Likewise. | |
184 | (PREFIX_VEX_0F3AF0): Likewise. | |
185 | (VEX_LEN_0F3816_P_2): Likewise. | |
186 | (VEX_LEN_0F3819_P_2): Likewise. | |
187 | (VEX_LEN_0F3836_P_2): Likewise. | |
188 | (VEX_LEN_0F385A_P_2_M_0): Likewise. | |
189 | (VEX_LEN_0F38F5_P_0): Likewise. | |
190 | (VEX_LEN_0F38F5_P_1): Likewise. | |
191 | (VEX_LEN_0F38F5_P_3): Likewise. | |
192 | (VEX_LEN_0F38F6_P_3): Likewise. | |
193 | (VEX_LEN_0F38F7_P_1): Likewise. | |
194 | (VEX_LEN_0F38F7_P_2): Likewise. | |
195 | (VEX_LEN_0F38F7_P_3): Likewise. | |
196 | (VEX_LEN_0F3A00_P_2): Likewise. | |
197 | (VEX_LEN_0F3A01_P_2): Likewise. | |
198 | (VEX_LEN_0F3A38_P_2): Likewise. | |
199 | (VEX_LEN_0F3A39_P_2): Likewise. | |
200 | (VEX_LEN_0F3A46_P_2): Likewise. | |
201 | (VEX_LEN_0F3AF0_P_3): Likewise. | |
202 | (VEX_W_0F3816_P_2): Likewise. | |
203 | (VEX_W_0F3818_P_2): Likewise. | |
204 | (VEX_W_0F3819_P_2): Likewise. | |
205 | (VEX_W_0F3836_P_2): Likewise. | |
206 | (VEX_W_0F3846_P_2): Likewise. | |
207 | (VEX_W_0F3858_P_2): Likewise. | |
208 | (VEX_W_0F3859_P_2): Likewise. | |
209 | (VEX_W_0F385A_P_2_M_0): Likewise. | |
210 | (VEX_W_0F3878_P_2): Likewise. | |
211 | (VEX_W_0F3879_P_2): Likewise. | |
212 | (VEX_W_0F3A00_P_2): Likewise. | |
213 | (VEX_W_0F3A01_P_2): Likewise. | |
214 | (VEX_W_0F3A02_P_2): Likewise. | |
215 | (VEX_W_0F3A38_P_2): Likewise. | |
216 | (VEX_W_0F3A39_P_2): Likewise. | |
217 | (VEX_W_0F3A46_P_2): Likewise. | |
218 | (MOD_VEX_0F3818_PREFIX_2): Removed. | |
219 | (MOD_VEX_0F3819_PREFIX_2): Likewise. | |
220 | (VEX_LEN_0F60_P_2..VEX_LEN_0F6D_P_2): Likewise. | |
221 | (VEX_LEN_0F70_P_1..VEX_LEN_0F76_P_2): Likewise. | |
222 | (VEX_LEN_0FD1_P_2..VEX_LEN_0FD5_P_2): Likewise. | |
223 | (VEX_LEN_0FD7_P_2_M_1..VEX_LEN_0F3819_P_2_M_0): Likewise. | |
224 | (VEX_LEN_0F381C_P_2..VEX_LEN_0F3840_P_2): Likewise. | |
225 | (VEX_LEN_0F3A0E_P_2): Likewise. | |
226 | (VEX_LEN_0F3A0F_P_2): Likewise. | |
227 | (VEX_LEN_0F3A42_P_2): Likewise. | |
228 | (VEX_LEN_0F3A4C_P_2): Likewise. | |
229 | (VEX_W_0F3818_P_2_M_0): Likewise. | |
230 | (VEX_W_0F3819_P_2_M_0): Likewise. | |
231 | (prefix_table): Updated. | |
232 | (three_byte_table): Likewise. | |
233 | (vex_table): Likewise. | |
234 | (vex_len_table): Likewise. | |
235 | (vex_w_table): Likewise. | |
236 | (mod_table): Likewise. | |
237 | (putop): Handle "LW". | |
238 | (intel_operand_size): Handle xmm_mb_mode, xmm_mw_mode, | |
239 | xmm_md_mode, xmm_mq_mode, xmmdw_mode, xmmqd_mode, ymmxmm_mode, | |
240 | vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode. | |
241 | (OP_EX): Likewise. | |
242 | (OP_E_memory): Handle vex_vsib_d_w_dq_mode and | |
243 | vex_vsib_q_w_dq_mode. | |
244 | (OP_XMM): Handle vex_vsib_q_w_dq_mode. | |
245 | (OP_VEX): Likewise. | |
246 | ||
247 | * i386-gen.c (cpu_flag_init): Add CpuAVX2 to CPU_ANY_SSE_FLAGS | |
248 | and CPU_ANY_AVX_FLAGS. Add CPU_BMI2_FLAGS, CPU_LZCNT_FLAGS, | |
249 | CPU_INVPCID_FLAGS and CPU_AVX2_FLAGS. | |
250 | (cpu_flags): Add CpuAVX2, CpuBMI2, CpuLZCNT and CpuINVPCID. | |
251 | (opcode_modifiers): Add VecSIB. | |
252 | ||
253 | * i386-opc.h (CpuAVX2): New. | |
254 | (CpuBMI2): Likewise. | |
255 | (CpuLZCNT): Likewise. | |
256 | (CpuINVPCID): Likewise. | |
257 | (VecSIB128): Likewise. | |
258 | (VecSIB256): Likewise. | |
259 | (VecSIB): Likewise. | |
260 | (i386_cpu_flags): Add cpuavx2, cpubmi2, cpulzcnt and cpuinvpcid. | |
261 | (i386_opcode_modifier): Add vecsib. | |
262 | ||
263 | * i386-opc.tbl: Add invpcid, AVX2 and BMI2 instructions. | |
264 | * i386-init.h: Regenerated. | |
265 | * i386-tbl.h: Likewise. | |
266 | ||
d535accd QN |
267 | 2011-06-03 Quentin Neill <quentin.neill@amd.com> |
268 | ||
269 | * i386-gen.c (cpu_flag_init): Add CpuF16C to CPU_BDVER2_FLAGS. | |
270 | * i386-init.h: Regenerated. | |
271 | ||
f8b960bc NC |
272 | 2011-06-03 Nick Clifton <nickc@redhat.com> |
273 | ||
274 | PR binutils/12752 | |
275 | * arm-dis.c (print_insn_coprocessor): Use bfd_vma type for | |
276 | computing address offsets. | |
277 | (print_arm_address): Likewise. | |
278 | (print_insn_arm): Likewise. | |
279 | (print_insn_thumb16): Likewise. | |
280 | (print_insn_thumb32): Likewise. | |
281 | ||
26d97720 NS |
282 | 2011-06-02 Jie Zhang <jie@codesourcery.com> |
283 | Nathan Sidwell <nathan@codesourcery.com> | |
284 | Maciej Rozycki <macro@codesourcery.com> | |
285 | ||
286 | * arm-dis.c (print_insn_coprocessor): Explicitly print #-0 | |
287 | as address offset. | |
288 | (print_arm_address): Likewise. Elide positive #0 appropriately. | |
289 | (print_insn_arm): Likewise. | |
290 | ||
f8b960bc NC |
291 | 2011-06-02 Nick Clifton <nickc@redhat.com> |
292 | ||
293 | PR gas/12752 | |
294 | * arm-dis.c (print_insn_thumb32): Do not sign extend addresses | |
295 | passed to print_address_func. | |
296 | ||
cc643b88 NC |
297 | 2011-06-02 Nick Clifton <nickc@redhat.com> |
298 | ||
299 | * arm-dis.c: Fix spelling mistakes. | |
300 | * op/opcodes.pot: Regenerate. | |
301 | ||
c8fa16ed AK |
302 | 2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> |
303 | ||
304 | * s390-opc.c: Replace S390_OPERAND_REG_EVEN with | |
305 | S390_OPERAND_REG_PAIR. Fix INSTR_RRF_0UFEF instruction type. | |
306 | * s390-opc.txt: Fix cxr instruction type. | |
307 | ||
5e4b319c AK |
308 | 2011-05-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> |
309 | ||
310 | * s390-opc.c: Add new instruction types marking register pair | |
311 | operands. | |
312 | * s390-opc.txt: Match instructions having register pair operands | |
313 | to the new instruction types. | |
314 | ||
fda544a2 NC |
315 | 2011-05-19 Nick Clifton <nickc@redhat.com> |
316 | ||
317 | * v850-opc.c (cmpf.[sd]): Reverse the order of the reg1 and reg2 | |
318 | operands. | |
319 | ||
4cab4add QN |
320 | 2011-05-10 Quentin Neill <quentin.neill@amd.com> |
321 | ||
322 | * i386-gen.c (cpu_flag_init): Add new CPU_BDVER2_FLAGS. | |
323 | * i386-init.h: Regenerated. | |
324 | ||
b4e7b885 NC |
325 | 2011-04-27 Nick Clifton <nickc@redhat.com> |
326 | ||
327 | * po/da.po: Updated Danish translation. | |
328 | ||
2f7f7710 AM |
329 | 2011-04-26 Anton Blanchard <anton@samba.org> |
330 | ||
331 | * ppc-opc.c: (powerpc_opcodes): Enable icswx for POWER7. | |
332 | ||
9887672f DD |
333 | 2011-04-21 DJ Delorie <dj@redhat.com> |
334 | ||
335 | * rx-decode.opc (rx_decode_opcode): Set the syntax for multi-byte NOPs. | |
336 | * rx-decode.c: Regenerate. | |
337 | ||
3251b375 L |
338 | 2011-04-20 H.J. Lu <hongjiu.lu@intel.com> |
339 | ||
340 | * i386-init.h: Regenerated. | |
341 | ||
b13a3ca6 QN |
342 | 2011-04-19 Quentin Neill <quentin.neill@amd.com> |
343 | ||
344 | * i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa bits | |
345 | from bdver1 flags. | |
346 | ||
7d063384 NC |
347 | 2011-04-13 Nick Clifton <nickc@redhat.com> |
348 | ||
349 | * v850-dis.c (disassemble): Always print a closing square brace if | |
350 | an opening square brace was printed. | |
351 | ||
32a94698 NC |
352 | 2011-04-12 Nick Clifton <nickc@redhat.com> |
353 | ||
354 | PR binutils/12534 | |
355 | * arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn | |
356 | patterns. | |
357 | (print_insn_thumb32): Handle %L. | |
358 | ||
d2cd1205 JB |
359 | 2011-04-11 Julian Brown <julian@codesourcery.com> |
360 | ||
361 | * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX. | |
362 | (print_insn_thumb32): Add APSR bitmask support. | |
363 | ||
1fbaefec PB |
364 | 2011-04-07 Paul Carroll<pcarroll@codesourcery.com> |
365 | ||
366 | * arm-dis.c (print_insn): init vars moved into private_data structure. | |
367 | ||
67171547 MF |
368 | 2011-03-24 Mike Frysinger <vapier@gentoo.org> |
369 | ||
370 | * bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic. | |
371 | ||
8cc66334 EW |
372 | 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com> |
373 | ||
374 | * avr-dis.c (avr_operand): Add opcode_str parameter. Check for | |
375 | post-increment to support LPM Z+ instruction. Add support for 'E' | |
376 | constraint for DES instruction. | |
377 | (print_insn_avr): Adjust calls to avr_operand. Rename variable. | |
378 | ||
34e77a92 RS |
379 | 2011-03-14 Richard Sandiford <richard.sandiford@linaro.org> |
380 | ||
381 | * arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code. | |
382 | ||
35fc36a8 RS |
383 | 2011-03-14 Richard Sandiford <richard.sandiford@linaro.org> |
384 | ||
385 | * arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC. | |
386 | Use branch types instead. | |
387 | (print_insn): Likewise. | |
388 | ||
0067d8fc MR |
389 | 2011-02-28 Maciej W. Rozycki <macro@codesourcery.com> |
390 | ||
391 | * mips-opc.c (mips_builtin_opcodes): Correct register use | |
392 | annotation of "alnv.ps". | |
393 | ||
3eebd5eb MR |
394 | 2011-02-28 Maciej W. Rozycki <macro@codesourcery.com> |
395 | ||
396 | * mips-opc.c (mips_builtin_opcodes): Add "pref" macro. | |
397 | ||
500cccad MF |
398 | 2011-02-22 Mike Frysinger <vapier@gentoo.org> |
399 | ||
400 | * bfin-dis.c (OUTS): Remove p NULL check and txt NUL check. | |
401 | ||
f5caf9f4 MF |
402 | 2011-02-22 Mike Frysinger <vapier@gentoo.org> |
403 | ||
404 | * bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS. | |
405 | ||
e5bc4265 MF |
406 | 2011-02-19 Mike Frysinger <vapier@gentoo.org> |
407 | ||
408 | * bfin-dis.c (saved_state): Mark static. Change a[01]x to ax[] and | |
409 | a[01]w to aw[]. Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1, | |
410 | av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts, | |
411 | exception, end_of_registers, msize, memory, bfd_mach. | |
412 | (CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG, | |
413 | LB0REG, LC1REG, LT1REG, LB1REG): Delete | |
414 | (AXREG, AWREG, LCREG, LTREG, LBREG): Define. | |
415 | (get_allreg): Change to new defines. Fallback to abort(). | |
416 | ||
602427c4 MF |
417 | 2011-02-14 Mike Frysinger <vapier@gentoo.org> |
418 | ||
419 | * bfin-dis.c: Add whitespace/parenthesis where needed. | |
420 | ||
298c1ec2 MF |
421 | 2011-02-14 Mike Frysinger <vapier@gentoo.org> |
422 | ||
423 | * bfin-dis.c (decode_LoopSetup_0): Return when reg is greater | |
424 | than 7. | |
425 | ||
822ce8ee RW |
426 | 2011-02-13 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
427 | ||
428 | * configure: Regenerate. | |
429 | ||
13c02f06 MF |
430 | 2011-02-13 Mike Frysinger <vapier@gentoo.org> |
431 | ||
432 | * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg. | |
433 | ||
4db66394 MF |
434 | 2011-02-13 Mike Frysinger <vapier@gentoo.org> |
435 | ||
436 | * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1. Output | |
437 | dregs only when P is set, and dregs_lo otherwise. | |
438 | ||
36f44611 MF |
439 | 2011-02-13 Mike Frysinger <vapier@gentoo.org> |
440 | ||
441 | * bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code. | |
442 | ||
9805c0a5 MF |
443 | 2011-02-12 Mike Frysinger <vapier@gentoo.org> |
444 | ||
445 | * bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT. | |
446 | ||
43a6aa65 MF |
447 | 2011-02-12 Mike Frysinger <vapier@gentoo.org> |
448 | ||
449 | * bfin-dis.c (machine_registers): Delete REG_GP. | |
450 | (reg_names): Delete "GP". | |
451 | (decode_allregs): Change REG_GP to REG_LASTREG. | |
452 | ||
26bb3ddd MF |
453 | 2011-02-12 Mike Frysinger <vapier@gentoo.org> |
454 | ||
89c0d58c MR |
455 | * bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2, |
456 | M_IH, M_IU): Delete. | |
26bb3ddd | 457 | |
69b8ea4a MF |
458 | 2011-02-11 Mike Frysinger <vapier@gentoo.org> |
459 | ||
460 | * bfin-dis.c (reg_names): Add const. | |
461 | (decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte, | |
462 | decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs, | |
463 | decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits, | |
464 | decode_counters, decode_allregs): Likewise. | |
465 | ||
42d5f9c6 MS |
466 | 2011-02-09 Michael Snyder <msnyder@vmware.com> |
467 | ||
56300268 | 468 | * i386-dis.c (OP_J): Parenthesize expression to prevent |
42d5f9c6 MS |
469 | truncated addresses. |
470 | (print_insn): Fix indentation off-by-one. | |
471 | ||
4be0c941 NC |
472 | 2011-02-01 Nick Clifton <nickc@redhat.com> |
473 | ||
474 | * po/da.po: Updated Danish translation. | |
475 | ||
6b069ee7 AM |
476 | 2011-01-21 Dave Murphy <davem@devkitpro.org> |
477 | ||
478 | * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS. | |
479 | ||
e3949f17 L |
480 | 2011-01-18 H.J. Lu <hongjiu.lu@intel.com> |
481 | ||
482 | * i386-dis.c (sIbT): New. | |
483 | (b_T_mode): Likewise. | |
484 | (dis386): Replace sIb with sIbT on "pushT". | |
485 | (x86_64_table): Replace sIb with Ib on "aam" and "aad". | |
486 | (OP_sI): Handle b_T_mode. Properly sign-extend byte. | |
487 | ||
752573b2 JK |
488 | 2011-01-18 Jan Kratochvil <jan.kratochvil@redhat.com> |
489 | ||
490 | * i386-init.h: Regenerated. | |
491 | * i386-tbl.h: Regenerated | |
492 | ||
2a2a0f38 QN |
493 | 2011-01-17 Quentin Neill <quentin.neill@amd.com> |
494 | ||
495 | * i386-dis.c (REG_XOP_TBM_01): New. | |
496 | (REG_XOP_TBM_02): New. | |
497 | (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables. | |
498 | (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02 | |
499 | entries, and add bextr instruction. | |
500 | ||
501 | * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM. | |
502 | (cpu_flags): Add CpuTBM. | |
503 | ||
504 | * i386-opc.h (CpuTBM) New. | |
505 | (i386_cpu_flags): Add bit cputbm. | |
506 | ||
507 | * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk, | |
508 | blcs, blsfill, blsic, t1mskc, and tzmsk. | |
509 | ||
90d6ff62 DD |
510 | 2011-01-12 DJ Delorie <dj@redhat.com> |
511 | ||
512 | * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg. | |
513 | ||
c95354ed MX |
514 | 2011-01-11 Mingjie Xing <mingjie.xing@gmail.com> |
515 | ||
516 | * mips-dis.c (print_insn_args): Adjust the value to print the real | |
517 | offset for "+c" argument. | |
518 | ||
f7465604 NC |
519 | 2011-01-10 Nick Clifton <nickc@redhat.com> |
520 | ||
521 | * po/da.po: Updated Danish translation. | |
522 | ||
639e30d2 NS |
523 | 2011-01-05 Nathan Sidwell <nathan@codesourcery.com> |
524 | ||
525 | * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear. | |
526 | ||
f12dc422 L |
527 | 2011-01-04 H.J. Lu <hongjiu.lu@intel.com> |
528 | ||
529 | * i386-dis.c (REG_VEX_38F3): New. | |
530 | (PREFIX_0FBC): Likewise. | |
531 | (PREFIX_VEX_38F2): Likewise. | |
532 | (PREFIX_VEX_38F3_REG_1): Likewise. | |
533 | (PREFIX_VEX_38F3_REG_2): Likewise. | |
534 | (PREFIX_VEX_38F3_REG_3): Likewise. | |
535 | (PREFIX_VEX_38F7): Likewise. | |
536 | (VEX_LEN_38F2_P_0): Likewise. | |
537 | (VEX_LEN_38F3_R_1_P_0): Likewise. | |
538 | (VEX_LEN_38F3_R_2_P_0): Likewise. | |
539 | (VEX_LEN_38F3_R_3_P_0): Likewise. | |
540 | (VEX_LEN_38F7_P_0): Likewise. | |
541 | (dis386_twobyte): Use PREFIX_0FBC. | |
542 | (reg_table): Add REG_VEX_38F3. | |
543 | (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2, | |
544 | PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2, | |
545 | PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7. | |
546 | (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and | |
547 | PREFIX_VEX_38F7. | |
548 | (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0, | |
549 | VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and | |
550 | VEX_LEN_38F7_P_0. | |
551 | ||
552 | * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS. | |
553 | (cpu_flags): Add CpuBMI. | |
554 | ||
555 | * i386-opc.h (CpuBMI): New. | |
556 | (i386_cpu_flags): Add cpubmi. | |
557 | ||
558 | * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt. | |
559 | * i386-init.h: Regenerated. | |
560 | * i386-tbl.h: Likewise. | |
561 | ||
cb21baef L |
562 | 2011-01-04 H.J. Lu <hongjiu.lu@intel.com> |
563 | ||
564 | * i386-dis.c (VexGdq): New. | |
565 | (OP_VEX): Handle dq_mode. | |
566 | ||
0db46eb4 L |
567 | 2011-01-01 H.J. Lu <hongjiu.lu@intel.com> |
568 | ||
569 | * i386-gen.c (process_copyright): Update copyright to 2011. | |
570 | ||
9e9e0820 | 571 | For older changes see ChangeLog-2010 |
252b5132 RH |
572 | \f |
573 | Local Variables: | |
2f6d2f85 NC |
574 | mode: change-log |
575 | left-margin: 8 | |
576 | fill-column: 74 | |
252b5132 RH |
577 | version-control: never |
578 | End: |