2006-04-26 H.J. Lu <hongjiu.lu@intel.com>
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
f095b97b
JW
12006-04-28 James E Wilson <wilson@specifix.com>
2
3 * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
4 error message.
5
59c455b3
TS
62006-04-28 Thiemo Seufer <ths@mips.com>
7 David Ung <davidu@mips.com>
bdb09db1 8 Nigel Stephens <nigel@mips.com>
59c455b3
TS
9
10 * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
11 names.
12
cc0ca239 132006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1 14 Nigel Stephens <nigel@mips.com>
cc0ca239
TS
15 David Ung <davidu@mips.com>
16
17 * mips-dis.c (print_insn_args): Add mips_opcode argument.
18 (print_insn_mips): Adjust print_insn_args call.
19
0d09bfe6 202006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1 21 Nigel Stephens <nigel@mips.com>
0d09bfe6
TS
22
23 * mips-dis.c (print_insn_args): Print $fcc only for FP
24 instructions, use $cc elsewise.
25
654c225a 262006-04-28 Thiemo Seufer <ths@mips.com>
bdb09db1 27 Nigel Stephens <nigel@mips.com>
654c225a
TS
28
29 * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
30 Map MIPS16 registers to O32 names.
31 (print_mips16_insn_arg): Use mips16_reg_names.
32
0dbde4cf
JB
332006-04-26 Julian Brown <julian@codesourcery.com>
34
35 * arm-dis.c (print_insn_neon): Disassemble floating-point constant
36 VMOV.
37
16980d0b
JB
382006-04-26 Nathan Sidwell <nathan@codesourcery.com>
39 Julian Brown <julian@codesourcery.com>
40
41 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
42 %<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
43 Add unified load/store instruction names.
44 (neon_opcode_table): New.
45 (arm_opcodes): Expand meaning of %<bitfield>['`?].
46 (arm_decode_bitfield): New.
47 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
48 Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
49 (print_insn_neon): New.
50 (print_insn_arm): Adjust print_insn_coprocessor call. Call
51 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
52 (print_insn_thumb32): Likewise.
53
ec3fcc56
AM
542006-04-19 Alan Modra <amodra@bigpond.net.au>
55
56 * Makefile.am: Run "make dep-am".
57 * Makefile.in: Regenerate.
58
241a6c40
AM
592006-04-19 Alan Modra <amodra@bigpond.net.au>
60
7c6646cd
AM
61 * avr-dis.c (avr_operand): Warning fix.
62
241a6c40
AM
63 * configure: Regenerate.
64
e7403566
DJ
652006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
66
67 * po/POTFILES.in: Regenerated.
68
52f16a0e
NC
692006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
70
71 PR binutils/2454
72 * avr-dis.c (avr_operand): Arrange for a comment to appear before
73 the symolic form of an address, so that the output of objdump -d
74 can be reassembled.
75
e78efa90
DD
762006-04-10 DJ Delorie <dj@redhat.com>
77
78 * m32c-asm.c: Regenerate.
79
108a6f8e
CD
802006-04-06 Carlos O'Donell <carlos@codesourcery.com>
81
82 * Makefile.am: Add install-html target.
83 * Makefile.in: Regenerate.
84
a135cb2c
NC
852006-04-06 Nick Clifton <nickc@redhat.com>
86
87 * po/vi/po: Updated Vietnamese translation.
88
47426b41
AM
892006-03-31 Paul Koning <ni1d@arrl.net>
90
91 * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
92
331f1cbe
BS
932006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
94
95 * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
96 logic to identify halfword shifts.
97
c16d2bf0
PB
982006-03-16 Paul Brook <paul@codesourcery.com>
99
100 * arm-dis.c (arm_opcodes): Rename swi to svc.
101 (thumb_opcodes): Ditto.
102
5348b81e
DD
1032006-03-13 DJ Delorie <dj@redhat.com>
104
5398310a
DD
105 * m32c-asm.c: Regenerate.
106 * m32c-desc.c: Likewise.
107 * m32c-desc.h: Likewise.
108 * m32c-dis.c: Likewise.
109 * m32c-ibld.c: Likewise.
5348b81e
DD
110 * m32c-opc.c: Likewise.
111 * m32c-opc.h: Likewise.
112
253d272c
DD
1132006-03-10 DJ Delorie <dj@redhat.com>
114
115 * m32c-desc.c: Regenerate with mul.l, mulu.l.
116 * m32c-opc.c: Likewise.
117 * m32c-opc.h: Likewise.
118
119
f530741d
NC
1202006-03-09 Nick Clifton <nickc@redhat.com>
121
122 * po/sv.po: Updated Swedish translation.
123
35c52694
L
1242006-03-07 H.J. Lu <hongjiu.lu@intel.com>
125
126 PR binutils/2428
127 * i386-dis.c (REP_Fixup): New function.
128 (AL): Remove duplicate.
129 (Xbr): New.
130 (Xvr): Likewise.
131 (Ybr): Likewise.
132 (Yvr): Likewise.
133 (indirDXr): Likewise.
134 (ALr): Likewise.
135 (eAXr): Likewise.
136 (dis386): Updated entries of ins, outs, movs, lods and stos.
137
ed963e2d
NC
1382006-03-05 Nick Clifton <nickc@redhat.com>
139
140 * cgen-ibld.in (insert_normal): Cope with attempts to insert a
141 signed 32-bit value into an unsigned 32-bit field when the host is
142 a 64-bit machine.
143 * fr30-ibld.c: Regenerate.
144 * frv-ibld.c: Regenerate.
145 * ip2k-ibld.c: Regenerate.
146 * iq2000-asm.c: Regenerate.
147 * iq2000-ibld.c: Regenerate.
148 * m32c-ibld.c: Regenerate.
149 * m32r-ibld.c: Regenerate.
150 * openrisc-ibld.c: Regenerate.
151 * xc16x-ibld.c: Regenerate.
152 * xstormy16-ibld.c: Regenerate.
153
c7d41dc5
NC
1542006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
155
156 * xc16x-asm.c: Regenerate.
157 * xc16x-dis.c: Regenerate.
c7d41dc5 158
f7d9e5c3
CD
1592006-02-27 Carlos O'Donell <carlos@codesourcery.com>
160
161 * po/Make-in: Add html target.
162
331d2d0d
L
1632006-02-27 H.J. Lu <hongjiu.lu@intel.com>
164
165 * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
166 Intel Merom New Instructions.
167 (THREE_BYTE_0): Likewise.
168 (THREE_BYTE_1): Likewise.
169 (three_byte_table): Likewise.
170 (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
171 THREE_BYTE_1 for entry 0x3a.
172 (twobyte_has_modrm): Updated.
173 (twobyte_uses_SSE_prefix): Likewise.
174 (print_insn): Handle 3-byte opcodes used by Intel Merom New
175 Instructions.
176
ff3f9d5b
DM
1772006-02-24 David S. Miller <davem@sunset.davemloft.net>
178
179 * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
180 (v9_hpriv_reg_names): New table.
181 (print_insn_sparc): Allow values up to 16 for '?' and '!'.
182 New cases '$' and '%' for read/write hyperprivileged register.
183 * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
184 window handling and rdhpr/wrhpr instructions.
185
6772dd07
DD
1862006-02-24 DJ Delorie <dj@redhat.com>
187
188 * m32c-desc.c: Regenerate with linker relaxation attributes.
189 * m32c-desc.h: Likewise.
190 * m32c-dis.c: Likewise.
191 * m32c-opc.c: Likewise.
192
62b3e311
PB
1932006-02-24 Paul Brook <paul@codesourcery.com>
194
195 * arm-dis.c (arm_opcodes): Add V7 instructions.
196 (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
197 (print_arm_address): New function.
198 (print_insn_arm): Use it. Add 'P' and 'U' cases.
199 (psr_name): New function.
200 (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
201
59cf82fe
L
2022006-02-23 H.J. Lu <hongjiu.lu@intel.com>
203
204 * ia64-opc-i.c (bXc): New.
205 (mXc): Likewise.
206 (OpX2TaTbYaXcC): Likewise.
207 (TF). Likewise.
208 (TFCM). Likewise.
209 (ia64_opcodes_i): Add instructions for tf.
210
211 * ia64-opc.h (IMMU5b): New.
212
213 * ia64-asmtab.c: Regenerated.
214
19a7219f
L
2152006-02-23 H.J. Lu <hongjiu.lu@intel.com>
216
217 * ia64-gen.c: Update copyright years.
218 * ia64-opc-b.c: Likewise.
219
7f3dfb9c
L
2202006-02-22 H.J. Lu <hongjiu.lu@intel.com>
221
222 * ia64-gen.c (lookup_regindex): Handle ".vm".
223 (print_dependency_table): Handle '\"'.
224
225 * ia64-ic.tbl: Updated from SDM 2.2.
226 * ia64-raw.tbl: Likewise.
227 * ia64-waw.tbl: Likewise.
228 * ia64-asmtab.c: Regenerated.
229
230 * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
231
d70c5fc7
NC
2322006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
233 Anil Paranjape <anilp1@kpitcummins.com>
234 Shilin Shakti <shilins@kpitcummins.com>
235
236 * xc16x-desc.h: New file
237 * xc16x-desc.c: New file
238 * xc16x-opc.h: New file
239 * xc16x-opc.c: New file
240 * xc16x-ibld.c: New file
241 * xc16x-asm.c: New file
242 * xc16x-dis.c: New file
243 * Makefile.am: Entries for xc16x
244 * Makefile.in: Regenerate
245 * cofigure.in: Add xc16x target information.
246 * configure: Regenerate.
247 * disassemble.c: Add xc16x target information.
248
a1cfb73e
L
2492006-02-11 H.J. Lu <hongjiu.lu@intel.com>
250
251 * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
252 moves.
253
6dd5059a
L
2542006-02-11 H.J. Lu <hongjiu.lu@intel.com>
255
256 * i386-dis.c ('Z'): Add a new macro.
257 (dis386_twobyte): Use "movZ" for control register moves.
258
8536c657
NC
2592006-02-10 Nick Clifton <nickc@redhat.com>
260
261 * iq2000-asm.c: Regenerate.
262
266abb8f
NS
2632006-02-07 Nathan Sidwell <nathan@codesourcery.com>
264
265 * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
266
f1a64f49
DU
2672006-01-26 David Ung <davidu@mips.com>
268
269 * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
270 ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
271 floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
272 nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
273 rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
274
9e919b5f
AM
2752006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
276
277 * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
278 ld_d_r, pref_xd_cb): Use signed char to hold data to be
279 disassembled.
280 * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
281 buffer overflows when disassembling instructions like
282 ld (ix+123),0x23
283 * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
284 operand, if the offset is negative.
285
c9021189
AM
2862006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
287
288 * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
289 unsigned char to hold data to be disassembled.
290
d99b6465
AS
2912006-01-17 Andreas Schwab <schwab@suse.de>
292
293 PR binutils/1486
294 * disassemble.c (disassemble_init_for_target): Set
295 disassembler_needs_relocs for bfd_arch_arm.
296
c2fe9327
PB
2972006-01-16 Paul Brook <paul@codesourcery.com>
298
e88d958a 299 * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
c2fe9327
PB
300 f?add?, and f?sub? instructions.
301
32fba81d
NC
3022006-01-16 Nick Clifton <nickc@redhat.com>
303
304 * po/zh_CN.po: New Chinese (simplified) translation.
305 * configure.in (ALL_LINGUAS): Add "zh_CH".
306 * configure: Regenerate.
307
1b3a26b5
PB
3082006-01-05 Paul Brook <paul@codesourcery.com>
309
310 * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
311
db313fa6
DD
3122006-01-06 DJ Delorie <dj@redhat.com>
313
314 * m32c-desc.c: Regenerate.
315 * m32c-opc.c: Regenerate.
316 * m32c-opc.h: Regenerate.
317
54d46aca
DD
3182006-01-03 DJ Delorie <dj@redhat.com>
319
320 * cgen-ibld.in (extract_normal): Avoid memory range errors.
321 * m32c-ibld.c: Regenerated.
322
e88d958a 323For older changes see ChangeLog-2005
252b5132
RH
324\f
325Local Variables:
2f6d2f85
NC
326mode: change-log
327left-margin: 8
328fill-column: 74
252b5132
RH
329version-control: never
330End:
This page took 0.331103 seconds and 4 git commands to generate.