update many old style function definitions
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
e6c7cdec
TS
12016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
2
3 * alpha-dis.c: Regenerate.
4 * crx-dis.c: Likewise.
5 * disassemble.c: Likewise.
6 * epiphany-opc.c: Likewise.
7 * fr30-opc.c: Likewise.
8 * frv-opc.c: Likewise.
9 * ip2k-opc.c: Likewise.
10 * iq2000-opc.c: Likewise.
11 * lm32-opc.c: Likewise.
12 * lm32-opinst.c: Likewise.
13 * m32c-opc.c: Likewise.
14 * m32r-opc.c: Likewise.
15 * m32r-opinst.c: Likewise.
16 * mep-opc.c: Likewise.
17 * mt-opc.c: Likewise.
18 * or1k-opc.c: Likewise.
19 * or1k-opinst.c: Likewise.
20 * tic80-opc.c: Likewise.
21 * xc16x-opc.c: Likewise.
22 * xstormy16-opc.c: Likewise.
23
537aefaf
AB
242016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
25
26 * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
27 fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
28 calcsd, and calcxd instructions.
29 * arc-opc.c (insert_nps_bitop_size): Delete.
30 (extract_nps_bitop_size): Delete.
31 (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
32 (extract_nps_qcmp_m3): Define.
33 (extract_nps_qcmp_m2): Define.
34 (extract_nps_qcmp_m1): Define.
35 (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
36 (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
37 (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
38 NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
39 NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
40 NPS_QCMP_M3.
41
c8f785f2
AB
422016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
43
44 * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
45
6fd8e7c2
L
462016-04-15 H.J. Lu <hongjiu.lu@intel.com>
47
48 * Makefile.in: Regenerated with automake 1.11.6.
49 * aclocal.m4: Likewise.
50
4b0c052e
AB
512016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
52
53 * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
54 instructions.
55 * arc-opc.c (insert_nps_cmem_uimm16): New function.
56 (extract_nps_cmem_uimm16): New function.
57 (arc_operands): Add NPS_XLDST_UIMM16 operand.
58
cb040366
AB
592016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
60
61 * arc-dis.c (arc_insn_length): New function.
62 (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
63 (find_format): Change insnLen parameter to unsigned.
64
accc0180
NC
652016-04-13 Nick Clifton <nickc@redhat.com>
66
67 PR target/19937
68 * v850-opc.c (v850_opcodes): Correct masks for long versions of
69 the LD.B and LD.BU instructions.
70
f36e33da
CZ
712016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
72
73 * arc-dis.c (find_format): Check for extension flags.
74 (print_flags): New function.
75 (print_insn_arc): Update for .extCondCode, .extCoreRegister and
76 .extAuxRegister.
77 * arc-ext.c (arcExtMap_coreRegName): Use
78 LAST_EXTENSION_CORE_REGISTER.
79 (arcExtMap_coreReadWrite): Likewise.
80 (dump_ARC_extmap): Update printing.
81 * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
82 (arc_aux_regs): Add cpu field.
83 * arc-regs.h: Add cpu field, lower case name aux registers.
84
1c2e355e
CZ
852016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
86
87 * arc-tbl.h: Add rtsc, sleep with no arguments.
88
b99747ae
CZ
892016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
90
91 * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
92 Initialize.
93 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
94 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
95 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
96 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
97 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
98 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
99 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
100 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
101 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
102 (arc_opcode arc_opcodes): Null terminate the array.
103 (arc_num_opcodes): Remove.
104 * arc-ext.h (INSERT_XOP): Define.
105 (extInstruction_t): Likewise.
106 (arcExtMap_instName): Delete.
107 (arcExtMap_insn): New function.
108 (arcExtMap_genOpcode): Likewise.
109 * arc-ext.c (ExtInstruction): Remove.
110 (create_map): Zero initialize instruction fields.
111 (arcExtMap_instName): Remove.
112 (arcExtMap_insn): New function.
113 (dump_ARC_extmap): More info while debuging.
114 (arcExtMap_genOpcode): New function.
115 * arc-dis.c (find_format): New function.
116 (print_insn_arc): Use find_format.
117 (arc_get_disassembler): Enable dump_ARC_extmap only when
118 debugging.
119
92708cec
MR
1202016-04-11 Maciej W. Rozycki <macro@imgtec.com>
121
122 * mips-dis.c (print_mips16_insn_arg): Mask unused extended
123 instruction bits out.
124
a42a4f84
AB
1252016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
126
127 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
128 * arc-opc.c (arc_flag_operands): Add new flags.
129 (arc_flag_classes): Add new classes.
130
1328504b
AB
1312016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
132
133 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
134
820f03ff
AB
1352016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
136
137 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
138 encode1, rflt, crc16, and crc32 instructions.
139 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
140 (arc_flag_classes): Add C_NPS_R.
141 (insert_nps_bitop_size_2b): New function.
142 (extract_nps_bitop_size_2b): Likewise.
143 (insert_nps_bitop_uimm8): Likewise.
144 (extract_nps_bitop_uimm8): Likewise.
145 (arc_operands): Add new operand entries.
146
8ddf6b2a
CZ
1472016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
148
b99747ae
CZ
149 * arc-regs.h: Add a new subclass field. Add double assist
150 accumulator register values.
151 * arc-tbl.h: Use DPA subclass to mark the double assist
152 instructions. Use DPX/SPX subclas to mark the FPX instructions.
153 * arc-opc.c (RSP): Define instead of SP.
154 (arc_aux_regs): Add the subclass field.
8ddf6b2a 155
589a7d88
JW
1562016-04-05 Jiong Wang <jiong.wang@arm.com>
157
158 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
159
0a191de9 1602016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
2cce10e7
AB
161
162 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
163 NPS_R_SRC1.
164
0a106562
AB
1652016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
166
167 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
168 issues. No functional changes.
169
bd05ac5f
CZ
1702016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
171
b99747ae
CZ
172 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
173 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
174 (RTT): Remove duplicate.
175 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
176 (PCT_CONFIG*): Remove.
177 (D1L, D1H, D2H, D2L): Define.
bd05ac5f 178
9885948f
CZ
1792016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
180
b99747ae 181 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
9885948f 182
f2dd8838
CZ
1832016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
184
b99747ae
CZ
185 * arc-tbl.h (invld07): Remove.
186 * arc-ext-tbl.h: New file.
187 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
188 * arc-opc.c (arc_opcodes): Add ext-tbl include.
f2dd8838 189
0d2f91fe
JK
1902016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
191
192 Fix -Wstack-usage warnings.
193 * aarch64-dis.c (print_operands): Substitute size.
194 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
195
a6b71f42
JM
1962016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
197
198 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
199 to get a proper diagnostic when an invalid ASR register is used.
200
9780e045
NC
2012016-03-22 Nick Clifton <nickc@redhat.com>
202
203 * configure: Regenerate.
204
e23e8ebe
AB
2052016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
206
207 * arc-nps400-tbl.h: New file.
208 * arc-opc.c: Add top level comment.
209 (insert_nps_3bit_dst): New function.
210 (extract_nps_3bit_dst): New function.
211 (insert_nps_3bit_src2): New function.
212 (extract_nps_3bit_src2): New function.
213 (insert_nps_bitop_size): New function.
214 (extract_nps_bitop_size): New function.
215 (arc_flag_operands): Add nps400 entries.
216 (arc_flag_classes): Add nps400 entries.
217 (arc_operands): Add nps400 entries.
218 (arc_opcodes): Add nps400 include.
219
1ae8ab47
AB
2202016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
221
222 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
223 the new class enum values.
224
8699fc3e
AB
2252016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
226
227 * arc-dis.c (print_insn_arc): Handle nps400.
228
24740d83
AB
2292016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
230
231 * arc-opc.c (BASE): Delete.
232
8678914f
NC
2332016-03-18 Nick Clifton <nickc@redhat.com>
234
235 PR target/19721
236 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
237 of MOV insn that aliases an ORR insn.
238
cc933301
JW
2392016-03-16 Jiong Wang <jiong.wang@arm.com>
240
241 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
242
f86f5863
TS
2432016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
244
245 * mcore-opc.h: Add const qualifiers.
246 * microblaze-opc.h (struct op_code_struct): Likewise.
247 * sh-opc.h: Likewise.
248 * tic4x-dis.c (tic4x_print_indirect): Likewise.
249 (tic4x_print_op): Likewise.
250
62de1c63
AM
2512016-03-02 Alan Modra <amodra@gmail.com>
252
d11698cd 253 * or1k-desc.h: Regenerate.
62de1c63 254 * fr30-ibld.c: Regenerate.
c697cf0b 255 * rl78-decode.c: Regenerate.
62de1c63 256
020efce5
NC
2572016-03-01 Nick Clifton <nickc@redhat.com>
258
259 PR target/19747
260 * rl78-dis.c (print_insn_rl78_common): Fix typo.
261
b0c11777
RL
2622016-02-24 Renlin Li <renlin.li@arm.com>
263
264 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
265 (print_insn_coprocessor): Support fp16 instructions.
266
3e309328
RL
2672016-02-24 Renlin Li <renlin.li@arm.com>
268
269 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
270 vminnm, vrint(mpna).
271
8afc7bea
RL
2722016-02-24 Renlin Li <renlin.li@arm.com>
273
274 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
275 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
276
4fd7268a
L
2772016-02-15 H.J. Lu <hongjiu.lu@intel.com>
278
279 * i386-dis.c (print_insn): Parenthesize expression to prevent
280 truncated addresses.
281 (OP_J): Likewise.
282
4670103e
CZ
2832016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
284 Janek van Oirschot <jvanoirs@synopsys.com>
285
b99747ae
CZ
286 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
287 variable.
4670103e 288
c1d9289f
NC
2892016-02-04 Nick Clifton <nickc@redhat.com>
290
291 PR target/19561
292 * msp430-dis.c (print_insn_msp430): Add a special case for
293 decoding an RRC instruction with the ZC bit set in the extension
294 word.
295
a143b004
AB
2962016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
297
298 * cgen-ibld.in (insert_normal): Rework calculation of shift.
299 * epiphany-ibld.c: Regenerate.
300 * fr30-ibld.c: Regenerate.
301 * frv-ibld.c: Regenerate.
302 * ip2k-ibld.c: Regenerate.
303 * iq2000-ibld.c: Regenerate.
304 * lm32-ibld.c: Regenerate.
305 * m32c-ibld.c: Regenerate.
306 * m32r-ibld.c: Regenerate.
307 * mep-ibld.c: Regenerate.
308 * mt-ibld.c: Regenerate.
309 * or1k-ibld.c: Regenerate.
310 * xc16x-ibld.c: Regenerate.
311 * xstormy16-ibld.c: Regenerate.
312
b89807c6
AB
3132016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
314
315 * epiphany-dis.c: Regenerated from latest cpu files.
316
d8c823c8
MM
3172016-02-01 Michael McConville <mmcco@mykolab.com>
318
319 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
320 test bit.
321
5bc5ae88
RL
3222016-01-25 Renlin Li <renlin.li@arm.com>
323
324 * arm-dis.c (mapping_symbol_for_insn): New function.
325 (find_ifthen_state): Call mapping_symbol_for_insn().
326
0bff6e2d
MW
3272016-01-20 Matthew Wahab <matthew.wahab@arm.com>
328
329 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
330 of MSR UAO immediate operand.
331
100b4f2e
MR
3322016-01-18 Maciej W. Rozycki <macro@imgtec.com>
333
334 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
335 instruction support.
336
5c14705f
AM
3372016-01-17 Alan Modra <amodra@gmail.com>
338
339 * configure: Regenerate.
340
4d82fe66
NC
3412016-01-14 Nick Clifton <nickc@redhat.com>
342
343 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
344 instructions that can support stack pointer operations.
345 * rl78-decode.c: Regenerate.
346 * rl78-dis.c: Fix display of stack pointer in MOVW based
347 instructions.
348
651657fa
MW
3492016-01-14 Matthew Wahab <matthew.wahab@arm.com>
350
351 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
352 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
353 erxtatus_el1 and erxaddr_el1.
354
105bde57
MW
3552016-01-12 Matthew Wahab <matthew.wahab@arm.com>
356
357 * arm-dis.c (arm_opcodes): Add "esb".
358 (thumb_opcodes): Likewise.
359
afa8d405
PB
3602016-01-11 Peter Bergner <bergner@vnet.ibm.com>
361
362 * ppc-opc.c <xscmpnedp>: Delete.
363 <xvcmpnedp>: Likewise.
364 <xvcmpnedp.>: Likewise.
365 <xvcmpnesp>: Likewise.
366 <xvcmpnesp.>: Likewise.
367
83c3256e
AS
3682016-01-08 Andreas Schwab <schwab@linux-m68k.org>
369
370 PR gas/13050
371 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
372 addition to ISA_A.
373
6f2750fe
AM
3742016-01-01 Alan Modra <amodra@gmail.com>
375
376 Update year range in copyright notice of all files.
377
3499769a
AM
378For older changes see ChangeLog-2015
379\f
380Copyright (C) 2016 Free Software Foundation, Inc.
381
382Copying and distribution of this file, with or without modification,
383are permitted in any medium without royalty provided the copyright
384notice and this notice are preserved.
385
386Local Variables:
387mode: change-log
388left-margin: 8
389fill-column: 74
390version-control: never
391End:
This page took 0.067234 seconds and 4 git commands to generate.