Commit | Line | Data |
---|---|---|
b9d94d62 L |
1 | 2015-03-29 H.J. Lu <hongjiu.lu@intel.com> |
2 | ||
3 | * Makefile.in: Regenerated. | |
4 | ||
27c49e9a AB |
5 | 2015-03-25 Anton Blanchard <anton@samba.org> |
6 | ||
7 | * ppc-dis.c (disassemble_init_powerpc): Only initialise | |
8 | powerpc_opcd_indices and vle_opcd_indices once. | |
9 | ||
c4e676f1 AB |
10 | 2015-03-25 Anton Blanchard <anton@samba.org> |
11 | ||
12 | * ppc-opc.c (powerpc_opcodes): Add slbfee. | |
13 | ||
823d2571 TG |
14 | 2015-03-24 Terry Guo <terry.guo@arm.com> |
15 | ||
16 | * arm-dis.c (opcode32): Updated to use new arm feature struct. | |
17 | (opcode16): Likewise. | |
18 | (coprocessor_opcodes): Replace bit with feature struct. | |
19 | (neon_opcodes): Likewise. | |
20 | (arm_opcodes): Likewise. | |
21 | (thumb_opcodes): Likewise. | |
22 | (thumb32_opcodes): Likewise. | |
23 | (print_insn_coprocessor): Likewise. | |
24 | (print_insn_arm): Likewise. | |
25 | (select_arm_features): Follow new feature struct. | |
26 | ||
029f3522 GG |
27 | 2015-03-17 Ganesh Gopalasubramanian <Ganesh.Gopalasubramanian@amd.com> |
28 | ||
29 | * i386-dis.c (rm_table): Add clzero. | |
30 | * i386-gen.c (cpu_flag_init): Add new CPU_ZNVER1_FLAGS. | |
31 | Add CPU_CLZERO_FLAGS. | |
32 | (cpu_flags): Add CpuCLZERO. | |
33 | * i386-opc.h: Add CpuCLZERO. | |
34 | * i386-opc.tbl: Add clzero. | |
35 | * i386-init.h: Re-generated. | |
36 | * i386-tbl.h: Re-generated. | |
37 | ||
6914869a AB |
38 | 2015-03-13 Andrew Bennett <andrew.bennett@imgtec.com> |
39 | ||
40 | * mips-opc.c (decode_mips_operand): Fix constraint issues | |
41 | with u and y operands. | |
42 | ||
21e20815 AB |
43 | 2015-03-13 Andrew Bennett <andrew.bennett@imgtec.com> |
44 | ||
45 | * mips-opc.c (mips_builtin_opcodes): Add evp and dvp instructions. | |
46 | ||
6b1d7593 AK |
47 | 2015-03-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com> |
48 | ||
49 | * s390-opc.c: Add new IBM z13 instructions. | |
50 | * s390-opc.txt: Likewise. | |
51 | ||
c8f89a34 JW |
52 | 2015-03-10 Renlin Li <renlin.li@arm.com> |
53 | ||
54 | * aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb, | |
55 | stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and | |
56 | related alias. | |
57 | * aarch64-asm-2.c: Regenerate. | |
58 | * aarch64-dis-2.c: Likewise. | |
59 | * aarch64-opc-2.c: Likewise. | |
60 | ||
d8282f0e JW |
61 | 2015-03-03 Jiong Wang <jiong.wang@arm.com> |
62 | ||
63 | * arm-dis.c (arm_symbol_is_valid): Skip ARM private symbols. | |
64 | ||
ac994365 OE |
65 | 2015-02-25 Oleg Endo <olegendo@gcc.gnu.org> |
66 | ||
67 | * sh-opc.h (clrs, sets): Mark as arch_sh3_nommu_up instead of | |
68 | arch_sh_up. | |
69 | (pref): Mark as arch_sh2a_nofpu_or_sh3_nommu_up instead of | |
70 | arch_sh2a_nofpu_or_sh4_nommu_nofpu_up. | |
71 | ||
fd63f640 V |
72 | 2015-02-23 Vinay <Vinay.G@kpit.com> |
73 | ||
74 | * rl78-decode.opc (MOV): Added space between two operands for | |
75 | 'mov' instruction in index addressing mode. | |
76 | * rl78-decode.c: Regenerate. | |
77 | ||
f63c1776 PA |
78 | 2015-02-19 Pedro Alves <palves@redhat.com> |
79 | ||
80 | * microblaze-dis.h [__cplusplus]: Wrap in extern "C". | |
81 | ||
07774fcc PA |
82 | 2015-02-10 Pedro Alves <palves@redhat.com> |
83 | Tom Tromey <tromey@redhat.com> | |
84 | ||
85 | * microblaze-opcm.h (or, and, xor): Rename to microblaze_or, | |
86 | microblaze_and, microblaze_xor. | |
87 | * microblaze-opc.h (opcodes): Adjust. | |
88 | ||
3f8107ab AM |
89 | 2015-01-28 James Bowman <james.bowman@ftdichip.com> |
90 | ||
91 | * Makefile.am: Add FT32 files. | |
92 | * configure.ac: Handle FT32. | |
93 | * disassemble.c (disassembler): Call print_insn_ft32. | |
94 | * ft32-dis.c: New file. | |
95 | * ft32-opc.c: New file. | |
96 | * Makefile.in: Regenerate. | |
97 | * configure: Regenerate. | |
98 | * po/POTFILES.in: Regenerate. | |
99 | ||
e5fe4957 KLC |
100 | 2015-01-28 Kuan-Lin Chen <kuanlinchentw@gmail.com> |
101 | ||
102 | * nds32-asm.c (keyword_sr): Add new system registers. | |
103 | ||
1e2e8c52 AK |
104 | 2015-01-16 Andreas Krebbel <krebbel@linux.vnet.ibm.com> |
105 | ||
106 | * s390-dis.c (s390_extract_operand): Support vector register | |
107 | operands. | |
108 | (s390_print_insn_with_opcode): Support new operands types and add | |
109 | new handling of optional operands. | |
110 | * s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove | |
111 | and include opcode/s390.h instead. | |
112 | (struct op_struct): New field `flags'. | |
113 | (insertOpcode, insertExpandedMnemonic): New parameter `flags'. | |
114 | (dumpTable): Dump flags. | |
115 | (main): Parse flags from the s390-opc.txt file. Add z13 as cpu | |
116 | string. | |
117 | * s390-opc.c: Add new operands types, instruction formats, and | |
118 | instruction masks. | |
119 | (s390_opformats): Add new formats for .insn. | |
120 | * s390-opc.txt: Add new instructions. | |
121 | ||
b90efa5b | 122 | 2015-01-01 Alan Modra <amodra@gmail.com> |
bffb6004 | 123 | |
b90efa5b | 124 | Update year range in copyright notice of all files. |
bffb6004 | 125 | |
b90efa5b | 126 | For older changes see ChangeLog-2014 |
252b5132 | 127 | \f |
b90efa5b | 128 | Copyright (C) 2015 Free Software Foundation, Inc. |
752937aa NC |
129 | |
130 | Copying and distribution of this file, with or without modification, | |
131 | are permitted in any medium without royalty provided the copyright | |
132 | notice and this notice are preserved. | |
133 | ||
252b5132 | 134 | Local Variables: |
2f6d2f85 NC |
135 | mode: change-log |
136 | left-margin: 8 | |
137 | fill-column: 74 | |
252b5132 RH |
138 | version-control: never |
139 | End: |