[deliverable/binutils-gdb.git] / opcodes / ChangeLog

2006-03-31  Paul Koning  <ni1d@arrl.net>

	* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.

2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>

	* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
	logic to identify halfword shifts.

2006-03-16  Paul Brook  <paul@codesourcery.com>

	* arm-dis.c (arm_opcodes): Rename swi to svc.
	(thumb_opcodes): Ditto.

2006-03-13  DJ Delorie  <dj@redhat.com>

	* m32c-asm.c: Regenerate.
	* m32c-desc.c: Likewise.
	* m32c-desc.h: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-ibld.c: Likewise.
	* m32c-opc.c: Likewise.
	* m32c-opc.h: Likewise.

2006-03-10  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate with mul.l, mulu.l.
	* m32c-opc.c: Likewise.
	* m32c-opc.h: Likewise.


2006-03-09  Nick Clifton  <nickc@redhat.com>

	* po/sv.po: Updated Swedish translation.

2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>

	PR binutils/2428
	* i386-dis.c (REP_Fixup): New function.
	(AL): Remove duplicate.
	(Xbr): New.
	(Xvr): Likewise.
	(Ybr): Likewise.
	(Yvr): Likewise.
	(indirDXr): Likewise.
	(ALr): Likewise.
	(eAXr): Likewise.
	(dis386): Updated entries of ins, outs, movs, lods and stos.

2006-03-05  Nick Clifton  <nickc@redhat.com>

	* cgen-ibld.in (insert_normal): Cope with attempts to insert a
	signed 32-bit value into an unsigned 32-bit field when the host is
	a 64-bit machine.
	* fr30-ibld.c: Regenerate.
	* frv-ibld.c: Regenerate.
	* ip2k-ibld.c: Regenerate.
	* iq2000-asm.c: Regenerate.
	* iq2000-ibld.c: Regenerate.
	* m32c-ibld.c: Regenerate.
	* m32r-ibld.c: Regenerate.
	* openrisc-ibld.c: Regenerate.
	* xc16x-ibld.c: Regenerate.
	* xstormy16-ibld.c: Regenerate.

2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)

	* xc16x-asm.c: Regenerate.
	* xc16x-dis.c: Regenerate.

2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>

	* po/Make-in: Add html target.

2006-02-27  H.J. Lu <hongjiu.lu@intel.com>

	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	Intel Merom New Instructions.
	(THREE_BYTE_0): Likewise.
	(THREE_BYTE_1): Likewise.
	(three_byte_table): Likewise.
	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	THREE_BYTE_1 for entry 0x3a.
	(twobyte_has_modrm): Updated.
	(twobyte_uses_SSE_prefix): Likewise.
	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	Instructions.

2006-02-24  David S. Miller  <davem@sunset.davemloft.net>

	* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
	(v9_hpriv_reg_names): New table.
	(print_insn_sparc): Allow values up to 16 for '?' and '!'.
	New cases '$' and '%' for read/write hyperprivileged register.
	* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
	window handling and rdhpr/wrhpr instructions.
	
2006-02-24  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate with linker relaxation attributes.
	* m32c-desc.h: Likewise.
	* m32c-dis.c: Likewise.
	* m32c-opc.c: Likewise.

2006-02-24  Paul Brook  <paul@codesourcery.com>

	* arm-dis.c (arm_opcodes): Add V7 instructions.
	(thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
	(print_arm_address): New function.
	(print_insn_arm): Use it.  Add 'P' and 'U' cases.
	(psr_name): New function.
	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-opc-i.c (bXc): New.
	(mXc): Likewise.
	(OpX2TaTbYaXcC): Likewise.
	(TF). Likewise.
	(TFCM). Likewise.
	(ia64_opcodes_i): Add instructions for tf.

	* ia64-opc.h (IMMU5b): New.

	* ia64-asmtab.c: Regenerated.

2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c: Update copyright years.
	* ia64-opc-b.c: Likewise.

2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>

	* ia64-gen.c (lookup_regindex): Handle ".vm".
	(print_dependency_table): Handle '\"'.

	* ia64-ic.tbl: Updated from SDM 2.2.
	* ia64-raw.tbl: Likewise.
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.

	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.

2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
            Anil Paranjape   <anilp1@kpitcummins.com>
            Shilin Shakti    <shilins@kpitcummins.com>

	* xc16x-desc.h: New file
	* xc16x-desc.c: New file
	* xc16x-opc.h: New file	
	* xc16x-opc.c: New file
	* xc16x-ibld.c: New file
	* xc16x-asm.c: New file
	* xc16x-dis.c: New file
	* Makefile.am: Entries for xc16x 
	* Makefile.in: Regenerate 
	* cofigure.in: Add xc16x target information.
	* configure: Regenerate.
	* disassemble.c: Add xc16x target information.

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
	moves.

2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c ('Z'): Add a new macro.
	(dis386_twobyte): Use "movZ" for control register moves.

2006-02-10  Nick Clifton  <nickc@redhat.com>

	* iq2000-asm.c: Regenerate.

2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>

	* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.

2006-01-26  David Ung  <davidu@mips.com>

	* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
	ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
	floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
	nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
	rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.

2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>

	* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
	ld_d_r, pref_xd_cb): Use signed char to hold data to be
	disassembled.	
	* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
	buffer overflows when disassembling instructions like
	ld (ix+123),0x23
	* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
	operand, if the offset is negative.

2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>

	* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
	unsigned char to hold data to be disassembled.

2006-01-17  Andreas Schwab  <schwab@suse.de>

	PR binutils/1486
	* disassemble.c (disassemble_init_for_target): Set
	disassembler_needs_relocs for bfd_arch_arm.

2006-01-16  Paul Brook  <paul@codesourcery.com>

	* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
	f?add?, and f?sub? instructions.

2006-01-16  Nick Clifton  <nickc@redhat.com>

	* po/zh_CN.po: New Chinese (simplified) translation.
	* configure.in (ALL_LINGUAS): Add "zh_CH".
	* configure: Regenerate.

2006-01-05  Paul Brook  <paul@codesourcery.com>

	* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.

2006-01-06  DJ Delorie  <dj@redhat.com>

	* m32c-desc.c: Regenerate.
	* m32c-opc.c: Regenerate.
	* m32c-opc.h: Regenerate.

2006-01-03  DJ Delorie  <dj@redhat.com>

	* cgen-ibld.in (extract_normal): Avoid memory range errors.
	* m32c-ibld.c: Regenerated.

For older changes see ChangeLog-2005
\f
Local Variables:
mode: change-log
left-margin: 8
fill-column: 74
version-control: never
End:
Commit	Line	Data
47426b41 AM	1	2006-03-31 Paul Koning <ni1d@arrl.net>
	2
	3	* pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
	4
331f1cbe BS	5	2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
	6
	7	* bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
	8	logic to identify halfword shifts.
	9
c16d2bf0 PB	10	2006-03-16 Paul Brook <paul@codesourcery.com>
	11
	12	* arm-dis.c (arm_opcodes): Rename swi to svc.
	13	(thumb_opcodes): Ditto.
	14
5348b81e DD	15	2006-03-13 DJ Delorie <dj@redhat.com>
5348b81e DD	16
5398310a DD	17	* m32c-asm.c: Regenerate.
	18	* m32c-desc.c: Likewise.
	19	* m32c-desc.h: Likewise.
	20	* m32c-dis.c: Likewise.
	21	* m32c-ibld.c: Likewise.
5348b81e DD	22	* m32c-opc.c: Likewise.
	23	* m32c-opc.h: Likewise.
	24
253d272c DD	25	2006-03-10 DJ Delorie <dj@redhat.com>
	26
	27	* m32c-desc.c: Regenerate with mul.l, mulu.l.
	28	* m32c-opc.c: Likewise.
	29	* m32c-opc.h: Likewise.
	30
	31
f530741d NC	32	2006-03-09 Nick Clifton <nickc@redhat.com>
	33
	34	* po/sv.po: Updated Swedish translation.
	35
35c52694 L	36	2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
	37
	38	PR binutils/2428
	39	* i386-dis.c (REP_Fixup): New function.
	40	(AL): Remove duplicate.
	41	(Xbr): New.
	42	(Xvr): Likewise.
	43	(Ybr): Likewise.
	44	(Yvr): Likewise.
	45	(indirDXr): Likewise.
	46	(ALr): Likewise.
	47	(eAXr): Likewise.
	48	(dis386): Updated entries of ins, outs, movs, lods and stos.
	49
ed963e2d NC	50	2006-03-05 Nick Clifton <nickc@redhat.com>
	51
	52	* cgen-ibld.in (insert_normal): Cope with attempts to insert a
	53	signed 32-bit value into an unsigned 32-bit field when the host is
	54	a 64-bit machine.
	55	* fr30-ibld.c: Regenerate.
	56	* frv-ibld.c: Regenerate.
	57	* ip2k-ibld.c: Regenerate.
	58	* iq2000-asm.c: Regenerate.
	59	* iq2000-ibld.c: Regenerate.
	60	* m32c-ibld.c: Regenerate.
	61	* m32r-ibld.c: Regenerate.
	62	* openrisc-ibld.c: Regenerate.
	63	* xc16x-ibld.c: Regenerate.
	64	* xstormy16-ibld.c: Regenerate.
	65
c7d41dc5 NC	66	2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
	67
	68	* xc16x-asm.c: Regenerate.
	69	* xc16x-dis.c: Regenerate.
c7d41dc5	70
f7d9e5c3 CD	71	2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
	72
	73	* po/Make-in: Add html target.
	74
331d2d0d L	75	2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
	76
	77	* i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
	78	Intel Merom New Instructions.
	79	(THREE_BYTE_0): Likewise.
	80	(THREE_BYTE_1): Likewise.
	81	(three_byte_table): Likewise.
	82	(dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
	83	THREE_BYTE_1 for entry 0x3a.
	84	(twobyte_has_modrm): Updated.
	85	(twobyte_uses_SSE_prefix): Likewise.
	86	(print_insn): Handle 3-byte opcodes used by Intel Merom New
	87	Instructions.
	88
ff3f9d5b DM	89	2006-02-24 David S. Miller <davem@sunset.davemloft.net>
	90
	91	* sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
	92	(v9_hpriv_reg_names): New table.
	93	(print_insn_sparc): Allow values up to 16 for '?' and '!'.
	94	New cases '$' and '%' for read/write hyperprivileged register.
	95	* sparc-opc.c (sparc_opcodes): Add new entries for UA2005
	96	window handling and rdhpr/wrhpr instructions.
	97
6772dd07 DD	98	2006-02-24 DJ Delorie <dj@redhat.com>
	99
	100	* m32c-desc.c: Regenerate with linker relaxation attributes.
	101	* m32c-desc.h: Likewise.
	102	* m32c-dis.c: Likewise.
	103	* m32c-opc.c: Likewise.
	104
62b3e311 PB	105	2006-02-24 Paul Brook <paul@codesourcery.com>
	106
	107	* arm-dis.c (arm_opcodes): Add V7 instructions.
	108	(thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
	109	(print_arm_address): New function.
	110	(print_insn_arm): Use it. Add 'P' and 'U' cases.
	111	(psr_name): New function.
	112	(print_insn_thumb32): Add 'U', 'C' and 'D' cases.
	113
59cf82fe L	114	2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
	115
	116	* ia64-opc-i.c (bXc): New.
	117	(mXc): Likewise.
	118	(OpX2TaTbYaXcC): Likewise.
	119	(TF). Likewise.
	120	(TFCM). Likewise.
	121	(ia64_opcodes_i): Add instructions for tf.
	122
	123	* ia64-opc.h (IMMU5b): New.
	124
	125	* ia64-asmtab.c: Regenerated.
	126
19a7219f L	127	2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
	128
	129	* ia64-gen.c: Update copyright years.
	130	* ia64-opc-b.c: Likewise.
	131
7f3dfb9c L	132	2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
	133
	134	* ia64-gen.c (lookup_regindex): Handle ".vm".
	135	(print_dependency_table): Handle '\"'.
	136
	137	* ia64-ic.tbl: Updated from SDM 2.2.
	138	* ia64-raw.tbl: Likewise.
	139	* ia64-waw.tbl: Likewise.
	140	* ia64-asmtab.c: Regenerated.
	141
	142	* ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
	143
d70c5fc7 NC	144	2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
	145	Anil Paranjape <anilp1@kpitcummins.com>
	146	Shilin Shakti <shilins@kpitcummins.com>
	147
	148	* xc16x-desc.h: New file
	149	* xc16x-desc.c: New file
	150	* xc16x-opc.h: New file
	151	* xc16x-opc.c: New file
	152	* xc16x-ibld.c: New file
	153	* xc16x-asm.c: New file
	154	* xc16x-dis.c: New file
	155	* Makefile.am: Entries for xc16x
	156	* Makefile.in: Regenerate
	157	* cofigure.in: Add xc16x target information.
	158	* configure: Regenerate.
	159	* disassemble.c: Add xc16x target information.
	160
a1cfb73e L	161	2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
	162
	163	* i386-dis.c (dis386_twobyte): Use "movZ" for debug register
	164	moves.
	165
6dd5059a L	166	2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
	167
	168	* i386-dis.c ('Z'): Add a new macro.
	169	(dis386_twobyte): Use "movZ" for control register moves.
	170
8536c657 NC	171	2006-02-10 Nick Clifton <nickc@redhat.com>
	172
	173	* iq2000-asm.c: Regenerate.
	174
266abb8f NS	175	2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
	176
	177	* m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
	178
f1a64f49 DU	179	2006-01-26 David Ung <davidu@mips.com>
	180
	181	* mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
	182	ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
	183	floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
	184	nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
	185	rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
	186
9e919b5f AM	187	2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
	188
	189	* z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
	190	ld_d_r, pref_xd_cb): Use signed char to hold data to be
	191	disassembled.
	192	* z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
	193	buffer overflows when disassembling instructions like
	194	ld (ix+123),0x23
	195	* z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
	196	operand, if the offset is negative.
	197
c9021189 AM	198	2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
	199
	200	* z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
	201	unsigned char to hold data to be disassembled.
	202
d99b6465 AS	203	2006-01-17 Andreas Schwab <schwab@suse.de>
	204
	205	PR binutils/1486
	206	* disassemble.c (disassemble_init_for_target): Set
	207	disassembler_needs_relocs for bfd_arch_arm.
	208
c2fe9327 PB	209	2006-01-16 Paul Brook <paul@codesourcery.com>
c2fe9327 PB	210
e88d958a	211	* m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
c2fe9327 PB	212	f?add?, and f?sub? instructions.
c2fe9327 PB	213
32fba81d NC	214	2006-01-16 Nick Clifton <nickc@redhat.com>
	215
	216	* po/zh_CN.po: New Chinese (simplified) translation.
	217	* configure.in (ALL_LINGUAS): Add "zh_CH".
	218	* configure: Regenerate.
	219
1b3a26b5 PB	220	2006-01-05 Paul Brook <paul@codesourcery.com>
	221
	222	* m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
	223
db313fa6 DD	224	2006-01-06 DJ Delorie <dj@redhat.com>
	225
	226	* m32c-desc.c: Regenerate.
	227	* m32c-opc.c: Regenerate.
	228	* m32c-opc.h: Regenerate.
	229
54d46aca DD	230	2006-01-03 DJ Delorie <dj@redhat.com>
	231
	232	* cgen-ibld.in (extract_normal): Avoid memory range errors.
	233	* m32c-ibld.c: Regenerated.
	234
e88d958a	235	For older changes see ChangeLog-2005
252b5132 RH	236	\f
252b5132 RH	237	Local Variables:
2f6d2f85 NC	238	mode: change-log
	239	left-margin: 8
	240	fill-column: 74
252b5132 RH	241	version-control: never
252b5132 RH	242	End: