projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
* value.c (show_convenience): Tweak comment.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
35d0a169
MR		 12012-08-13 Maciej W. Rozycki <macro@codesourcery.com>
2
3 * micromips-opc.c (micromips_opcodes): Update comment.
4 * mips-opc.c (mips_builtin_opcodes): Likewise. Mark coprocessor
5 instructions for IOCT as appropriate.
6 * mips-dis.c (print_insn_mips): Replace OPCODE_IS_MEMBER with
7 opcode_is_member.
8 * configure.in: Substitute NO_WMISSING_FIELD_INITIALIZERS with
9 the result of a check for the -Wno-missing-field-initializers
10 GCC option.
11 * Makefile.am (NO_WMISSING_FIELD_INITIALIZERS): New variable.
12 (mips-opc.lo): Pass $(NO_WMISSING_FIELD_INITIALIZERS) to
13 compilation.
14 (mips16-opc.lo): Likewise.
15 (micromips-opc.lo): Likewise.
16 * aclocal.m4: Regenerate.
17 * configure: Regenerate.
18 * Makefile.in: Regenerate.
19
5c5acbbd
L		 202012-08-11 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
21
22 PR gas/14423
23 * i386-gen.c (cpu_flag_init): Add CpuFMA in CPU_BDVER2_FLAGS.
24 * i386-init.h: Regenerated.
25
3c892704
NC		 262012-08-09 Nick Clifton <nickc@redhat.com>
27
28 * po/vi.po: Updated Vietnamese translation.
29
d7189fa5
RM		 302012-08-07 Roland McGrath <mcgrathr@google.com>
31
32 * i386-dis.c (reg_table): Fill out REG_0F0D table with
33 AMD-reserved cases as "prefetch".
34 (MOD_0F18_REG_4, MOD_0F18_REG_5): New enum constants.
35 (MOD_0F18_REG_6, MOD_0F18_REG_7): Likewise.
36 (reg_table): Use those under REG_0F18.
37 (mod_table): Add those cases as "nop/reserved".
38
4c692bc7
JB		 392012-08-07 Jan Beulich <jbeulich@suse.com>
40
41 * i386-opc.tbl: Remove "FIXME" comments from SVME instructions.
42
de882298
RM		 432012-08-06 Roland McGrath <mcgrathr@google.com>
44
45 * i386-dis.c (print_insn): Print spaces between multiple excess
46 prefixes. Return actual number of excess prefixes consumed,
47 not always one.
48
49 * i386-dis.c (OP_REG): Ignore REX_B for segment register cases.
50
7bb15c6f
RM		 512012-08-06 Roland McGrath <mcgrathr@google.com>
52 Victor Khimenko <khim@google.com>
53 H.J. Lu <hongjiu.lu@intel.com>
54
55 * i386-dis.c (OP_sI): In b_T_mode and v_mode, REX_W trumps DFLAG.
56 (putop): For 'T', 'U', and 'V', treat REX_W like DFLAG.
57 (intel_operand_size): For stack_v_mode, treat REX_W like DFLAG.
58 (OP_E_register): Likewise.
59 (OP_REG): For low 8 whole registers, treat REX_W like DFLAG.
60
3843081d
JBG		 612012-08-02 Jan-Benedict Glaw <jbglaw@lug-owl.de>
62
63 * configure.in: Formatting.
64 * configure: Regenerate.
65
48891606
AM		 662012-08-01 Alan Modra <amodra@gmail.com>
67
68 * h8300-dis.c: Fix printf arg warnings.
69 * i960-dis.c: Likewise.
70 * mips-dis.c: Likewise.
71 * pdp11-dis.c: Likewise.
72 * sh-dis.c: Likewise.
73 * v850-dis.c: Likewise.
74 * configure.in: Formatting.
75 * configure: Regenerate.
76 * rl78-decode.c: Regenerate.
77 * po/POTFILES.in: Regenerate.
78
03f66e8a
MR		 792012-07-31 Chao-Ying Fu <fu@mips.com>
80 Catherine Moore <clm@codesourcery.com>
81 Maciej W. Rozycki <macro@codesourcery.com>
82
83 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
84 (DSP_VOLA): Likewise.
85 (D32, D33): Likewise.
86 (micromips_opcodes): Add DSP ASE instructions.
48891606 87 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
03f66e8a
MR		 88 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
89
94948e64
JB		 902012-07-31 Jan Beulich <jbeulich@suse.com>
91
92 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
93 instruction group. Mark as requiring AVX2.
94 * i386-tbl.h: Re-generate.
95
a6dc81d2
NC		 962012-07-30 Nick Clifton <nickc@redhat.com>
97
98 * po/opcodes.pot: Updated template.
99 * po/es.po: Updated Spanish translation.
100 * po/fi.po: Updated Finnish translation.
101
c4dd807e
MF		 1022012-07-27 Mike Frysinger <vapier@gentoo.org>
103
104 * configure.in (BFD_VERSION): Run bfd/configure --version and
105 parse the output of that.
106 * configure: Regenerate.
107
03edbe3b
JL		 1082012-07-25 James Lemke <jwlemke@codesourcery.com>
109
110 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
111
63d08c68
NC		 1122012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
113 Dr David Alan Gilbert <dave@treblig.org>
d908c8af
NC		 114
115 PR binutils/13135
116 * arm-dis.c: Add necessary casts for printing integer values.
117 Use %s when printing string values.
118 * hppa-dis.c: Likewise.
119 * m68k-dis.c: Likewise.
120 * microblaze-dis.c: Likewise.
121 * mips-dis.c: Likewise.
122 * sparc-dis.c: Likewise.
123
ff688e1f
L		 1242012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
125
126 PR binutils/14355
127 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
128 (VEX_LEN_0FXOP_08_CD): Likewise.
129 (VEX_LEN_0FXOP_08_CE): Likewise.
130 (VEX_LEN_0FXOP_08_CF): Likewise.
131 (VEX_LEN_0FXOP_08_EC): Likewise.
132 (VEX_LEN_0FXOP_08_ED): Likewise.
133 (VEX_LEN_0FXOP_08_EE): Likewise.
134 (VEX_LEN_0FXOP_08_EF): Likewise.
135 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
136 vpcomub, vpcomuw, vpcomud, vpcomuq.
137 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
138 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
139 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
140 VEX_LEN_0FXOP_08_EF.
141
e2e1fcde
L		 1422012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
143
144 * i386-dis.c (PREFIX_0F38F6): New.
145 (prefix_table): Add adcx, adox instructions.
146 (three_byte_table): Use PREFIX_0F38F6.
147 (mod_table): Add rdseed instruction.
148 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
149 (cpu_flags): Likewise.
150 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
151 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
152 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
153 prefetchw.
154 * i386-tbl.h: Regenerate.
155 * i386-init.h: Likewise.
156
8b99bf0b
TS		 1572012-07-05 Thomas Schwinge <thomas@codesourcery.com>
158
f4263ca2 159 * mips-dis.c: Remove gratuitous newline.
8b99bf0b 160
416cf80a
SK		 1612012-07-05 Sean Keys <skeys@ipdatasys.com>
162
163 * xgate-dis.c: Removed an IF statement that will
164 always be false due to overlapping operand masks.
165 * xgate-opc.c: Corrected 'com' opcode entry and
166 fixed spacing.
167
9fa0f14a
RM		 1682012-07-02 Roland McGrath <mcgrathr@google.com>
169
170 * i386-opc.tbl: Add RepPrefixOk to nop.
171 * i386-tbl.h: Regenerate.
172
4c6a93d3
NC		 1732012-06-28 Nick Clifton <nickc@redhat.com>
174
175 * po/vi.po: Updated Vietnamese translation.
176
29c048b6
RM		 1772012-06-22 Roland McGrath <mcgrathr@google.com>
178
fe13e45b
RM		 179 * i386-opc.tbl: Add RepPrefixOk to ret.
180 * i386-tbl.h: Regenerate.
181
29c048b6
RM		 182 * i386-opc.h (RepPrefixOk): New enum constant.
183 (i386_opcode_modifier): New bitfield 'repprefixok'.
184 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
185 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
186 instructions that have IsString.
187 * i386-tbl.h: Regenerate.
188
c7a8dbf9
AS		 1892012-06-11 Andreas Schwab <schwab@linux-m68k.org>
190
191 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
192 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
193 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
194 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
195 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
196 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
197 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
198 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
199 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
200
94caa966
AM		 2012012-05-19 Alan Modra <amodra@gmail.com>
202
203 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
204 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
205
5eb3690e
AM		 2062012-05-18 Alan Modra <amodra@gmail.com>
207
71fe7bab
AM		 208 * ia64-opc.c: Remove #include "ansidecl.h".
209 * z8kgen.c: Include sysdep.h first.
210
5eb3690e
AM		 211 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
212 * bfin-dis.c: Likewise.
213 * i860-dis.c: Likewise.
214 * ia64-dis.c: Likewise.
215 * ia64-gen.c: Likewise.
216 * m68hc11-dis.c: Likewise.
217 * mmix-dis.c: Likewise.
218 * msp430-dis.c: Likewise.
219 * or32-dis.c: Likewise.
220 * rl78-dis.c: Likewise.
221 * rx-dis.c: Likewise.
222 * tic4x-dis.c: Likewise.
223 * tilegx-opc.c: Likewise.
224 * tilepro-opc.c: Likewise.
225 * rx-decode.c: Regenerate.
226
a4ebc835
AM		 2272012-05-17 James Lemke <jwlemke@codesourcery.com>
228
229 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
230
98c76446
AM		 2312012-05-17 James Lemke <jwlemke@codesourcery.com>
232
233 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
234
df7b86aa
NC		 2352012-05-17 Daniel Richard G. <skunk@iskunk.org>
236 Nick Clifton <nickc@redhat.com>
237
238 PR 14072
239 * configure.in: Add check that sysdep.h has been included before
240 any system header files.
241 * configure: Regenerate.
242 * config.in: Regenerate.
243 * sysdep.h: Generate an error if included before config.h.
244 * alpha-opc.c: Include sysdep.h before any other header file.
245 * alpha-dis.c: Likewise.
246 * avr-dis.c: Likewise.
247 * cgen-opc.c: Likewise.
248 * cr16-dis.c: Likewise.
249 * cris-dis.c: Likewise.
250 * crx-dis.c: Likewise.
251 * d10v-dis.c: Likewise.
252 * d10v-opc.c: Likewise.
253 * d30v-dis.c: Likewise.
254 * d30v-opc.c: Likewise.
255 * h8500-dis.c: Likewise.
256 * i370-dis.c: Likewise.
257 * i370-opc.c: Likewise.
258 * m10200-dis.c: Likewise.
259 * m10300-dis.c: Likewise.
260 * micromips-opc.c: Likewise.
261 * mips-opc.c: Likewise.
262 * mips61-opc.c: Likewise.
263 * moxie-dis.c: Likewise.
264 * or32-opc.c: Likewise.
265 * pj-dis.c: Likewise.
266 * ppc-dis.c: Likewise.
267 * ppc-opc.c: Likewise.
268 * s390-dis.c: Likewise.
269 * sh-dis.c: Likewise.
270 * sh64-dis.c: Likewise.
271 * sparc-dis.c: Likewise.
272 * sparc-opc.c: Likewise.
273 * spu-dis.c: Likewise.
274 * tic30-dis.c: Likewise.
275 * tic54x-dis.c: Likewise.
276 * tic80-dis.c: Likewise.
277 * tic80-opc.c: Likewise.
278 * tilegx-dis.c: Likewise.
279 * tilepro-dis.c: Likewise.
280 * v850-dis.c: Likewise.
281 * v850-opc.c: Likewise.
282 * vax-dis.c: Likewise.
283 * w65-dis.c: Likewise.
284 * xgate-dis.c: Likewise.
285 * xtensa-dis.c: Likewise.
286 * rl78-decode.opc: Likewise.
287 * rl78-decode.c: Regenerate.
288 * rx-decode.opc: Likewise.
289 * rx-decode.c: Regenerate.
290
e1dad58d
AM		 2912012-05-17 Alan Modra <amodra@gmail.com>
292
293 * ppc_dis.c: Don't include elf/ppc.h.
294
101af531
NC		 2952012-05-16 Meador Inge <meadori@codesourcery.com>
296
297 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
298 to PUSH/POP {reg}.
299
6927f982
NC		 3002012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
301 Stephane Carrez <stcarrez@nerim.fr>
302
303 * configure.in: Add S12X and XGATE co-processor support to m68hc11
304 target.
305 * disassemble.c: Likewise.
306 * configure: Regenerate.
307 * m68hc11-dis.c: Make objdump output more consistent, use hex
308 instead of decimal and use 0x prefix for hex.
309 * m68hc11-opc.c: Add S12X and XGATE opcodes.
310
b9c361e0
JL		 3112012-05-14 James Lemke <jwlemke@codesourcery.com>
312
313 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
314 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
315 (vle_opcd_indices): New array.
316 (lookup_vle): New function.
317 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
318 (print_insn_powerpc): Likewise.
319 * ppc-opc.c: Likewise.
320
3212012-05-14 Catherine Moore <clm@codesourcery.com>
322 Maciej W. Rozycki <macro@codesourcery.com>
323 Rhonda Wittels <rhonda@codesourcery.com>
324 Nathan Froyd <froydnj@codesourcery.com>
325
326 * ppc-opc.c (insert_arx, extract_arx): New functions.
327 (insert_ary, extract_ary): New functions.
328 (insert_li20, extract_li20): New functions.
329 (insert_rx, extract_rx): New functions.
330 (insert_ry, extract_ry): New functions.
331 (insert_sci8, extract_sci8): New functions.
332 (insert_sci8n, extract_sci8n): New functions.
333 (insert_sd4h, extract_sd4h): New functions.
334 (insert_sd4w, extract_sd4w): New functions.
335 (insert_vlesi, extract_vlesi): New functions.
336 (insert_vlensi, extract_vlensi): New functions.
337 (insert_vleui, extract_vleui): New functions.
338 (insert_vleil, extract_vleil): New functions.
339 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
340 (BI16, BI32, BO32, B8): New.
341 (B15, B24, CRD32, CRS): New.
342 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
343 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
344 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
345 (SH6_MASK): Use PPC_OPSHIFT_INV.
346 (SI8, UI5, OIMM5, UI7, BO16): New.
347 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
348 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
349 (ALLOW8_SPRG): New.
350 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
351 (OPVUP, OPVUP_MASK OPVUP): New
352 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
353 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
354 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
355 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
356 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
357 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
358 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
359 (SE_IM5, SE_IM5_MASK): New.
360 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
361 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
362 (BO32DNZ, BO32DZ): New.
363 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
364 (PPCVLE): New.
365 (powerpc_opcodes): Add new VLE instructions. Update existing
366 instruction to include PPCVLE if supported.
367 * ppc-dis.c (ppc_opts): Add vle entry.
368 (get_powerpc_dialect): New function.
369 (powerpc_init_dialect): VLE support.
370 (print_insn_big_powerpc): Call get_powerpc_dialect.
371 (print_insn_little_powerpc): Likewise.
372 (operand_value_powerpc): Handle negative shift counts.
373 (print_insn_powerpc): Handle 2-byte instruction lengths.
374
208a4923
NC		 3752012-05-11 Daniel Richard G. <skunk@iskunk.org>
376
377 PR binutils/14028
378 * configure.in: Invoke ACX_HEADER_STRING.
379 * configure: Regenerate.
380 * config.in: Regenerate.
381 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
382 string.h and strings.h.
383
6750a3a7
NC		 3842012-05-11 Nick Clifton <nickc@redhat.com>
385
386 PR binutils/14006
387 * arm-dis.c (print_insn): Fix detection of instruction mode in
388 files containing multiple executable sections.
389
f6c1a2d5
NC		 3902012-05-03 Sean Keys <skeys@ipdatasys.com>
391
392 * Makefile.in, configure: regenerate
393 * disassemble.c (disassembler): Recognize ARCH_XGATE.
394 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
395 New functions.
396 * configure.in: Recognize xgate.
397 * xgate-dis.c, xgate-opc.c: New files for support of xgate
398 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
399 and opcode generation for xgate.
400
78e98aab
DD		 4012012-04-30 DJ Delorie <dj@redhat.com>
402
403 * rx-decode.opc (MOV): Do not sign-extend immediates which are
404 already the maximum bit size.
405 * rx-decode.c: Regenerate.
406
ec668d69
DM		 4072012-04-27 David S. Miller <davem@davemloft.net>
408
2e52845b
DM		 409 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
410 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
411
58004e23
DM		 412 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
413 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
414
698544e1
DM		 415 * sparc-opc.c (CBCOND): New define.
416 (CBCOND_XCC): Likewise.
417 (cbcond): New helper macro.
418 (sparc_opcodes): Add compare-and-branch instructions.
419
6cda1326
DM		 420 * sparc-dis.c (print_insn_sparc): Handle ')'.
421 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
422
ec668d69
DM		 423 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
424 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
425
2615994e
DM		 4262012-04-12 David S. Miller <davem@davemloft.net>
427
428 * sparc-dis.c (X_DISP10): Define.
429 (print_insn_sparc): Handle '='.
430
5de10af0
MF		 4312012-04-01 Mike Frysinger <vapier@gentoo.org>
432
433 * bfin-dis.c (fmtconst): Replace decimal handling with a single
434 sprintf call and the '*' field width.
435
55a36193
MK		 4362012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
437
438 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
439
d6688282
AM		 4402012-03-16 Alan Modra <amodra@gmail.com>
441
442 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
443 (powerpc_opcd_indices): Bump array size.
444 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
445 corresponding to unused opcodes to following entry.
446 (lookup_powerpc): New function, extracted and optimised from..
447 (print_insn_powerpc): ..here.
448
b240011a
AM		 4492012-03-15 Alan Modra <amodra@gmail.com>
450 James Lemke <jwlemke@codesourcery.com>
451
452 * disassemble.c (disassemble_init_for_target): Handle ppc init.
453 * ppc-dis.c (private): New var.
454 (powerpc_init_dialect): Don't return calloc failure, instead use
455 private.
456 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
457 (powerpc_opcd_indices): New array.
458 (disassemble_init_powerpc): New function.
459 (print_insn_big_powerpc): Don't init dialect here.
460 (print_insn_little_powerpc): Likewise.
461 (print_insn_powerpc): Start search using powerpc_opcd_indices.
462
aea77599
AM		 4632012-03-10 Edmar Wienskoski <edmar@freescale.com>
464
465 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
466 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
467 (PPCVEC2, PPCTMR, E6500): New short names.
468 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
469 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
470 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
471 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
472 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
473 optional operands on sync instruction for E6500 target.
474
5333187a
AK		 4752012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
476
477 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
478
a597d2d3
AM		 4792012-02-27 Alan Modra <amodra@gmail.com>
480
481 * mt-dis.c: Regenerate.
482
3f26eb3a
AM		 4832012-02-27 Alan Modra <amodra@gmail.com>
484
485 * v850-opc.c (extract_v8): Rearrange to make it obvious this
486 is the inverse of corresponding insert function.
487 (extract_d22, extract_u9, extract_r4): Likewise.
488 (extract_d9): Correct sign extension.
489 (extract_d16_15): Don't assume "long" is 32 bits, and don't
490 rely on implementation defined behaviour for shift right of
491 signed types.
492 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
493 (extract_d23): Likewise, and correct mask.
494
1f42f8b3
AM		 4952012-02-27 Alan Modra <amodra@gmail.com>
496
497 * crx-dis.c (print_arg): Mask constant to 32 bits.
498 * crx-opc.c (cst4_map): Use int array.
499
cdb06235
AM		 5002012-02-27 Alan Modra <amodra@gmail.com>
501
502 * arc-dis.c (BITS): Don't use shifts to mask off bits.
503 (FIELDD): Sign extend with xor,sub.
504
6f7be959
WL		 5052012-02-25 Walter Lee <walt@tilera.com>
506
507 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
508 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
509 TILEPRO_OPC_LW_TLS_SN.
510
82c2def5
L		 5112012-02-21 H.J. Lu <hongjiu.lu@intel.com>
512
513 * i386-opc.h (HLEPrefixNone): New.
514 (HLEPrefixLock): Likewise.
515 (HLEPrefixAny): Likewise.
516 (HLEPrefixRelease): Likewise.
517
42164a71
L		 5182012-02-08 H.J. Lu <hongjiu.lu@intel.com>
519
520 * i386-dis.c (HLE_Fixup1): New.
521 (HLE_Fixup2): Likewise.
522 (HLE_Fixup3): Likewise.
523 (Ebh1): Likewise.
524 (Evh1): Likewise.
525 (Ebh2): Likewise.
526 (Evh2): Likewise.
527 (Ebh3): Likewise.
528 (Evh3): Likewise.
529 (MOD_C6_REG_7): Likewise.
530 (MOD_C7_REG_7): Likewise.
531 (RM_C6_REG_7): Likewise.
532 (RM_C7_REG_7): Likewise.
533 (XACQUIRE_PREFIX): Likewise.
534 (XRELEASE_PREFIX): Likewise.
535 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
536 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
537 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
538 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
539 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
540 MOD_C6_REG_7 and MOD_C7_REG_7.
541 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
542 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
543 xtest.
544 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
545 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
546
547 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
548 CPU_RTM_FLAGS.
549 (cpu_flags): Add CpuHLE and CpuRTM.
550 (opcode_modifiers): Add HLEPrefixOk.
551
552 * i386-opc.h (CpuHLE): New.
553 (CpuRTM): Likewise.
554 (HLEPrefixOk): Likewise.
555 (i386_cpu_flags): Add cpuhle and cpurtm.
556 (i386_opcode_modifier): Add hleprefixok.
557
558 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
559 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
560 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
561 operand. Add xacquire, xrelease, xabort, xbegin, xend and
562 xtest.
563 * i386-init.h: Regenerated.
564 * i386-tbl.h: Likewise.
565
21abe33a
DD		 5662012-01-24 DJ Delorie <dj@redhat.com>
567
568 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
569 * rl78-decode.c: Regenerate.
570
e20cc039
AM		 5712012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
572
573 PR binutils/10173
574 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
575
e143d25c
AS		 5762012-01-17 Andreas Schwab <schwab@linux-m68k.org>
577
578 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
579 register and move them after pmove with PSR/PCSR register.
580
8729a6f6
L		 5812012-01-13 H.J. Lu <hongjiu.lu@intel.com>
582
583 * i386-dis.c (mod_table): Add vmfunc.
584
585 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
586 (cpu_flags): CpuVMFUNC.
587
588 * i386-opc.h (CpuVMFUNC): New.
589 (i386_cpu_flags): Add cpuvmfunc.
590
591 * i386-opc.tbl: Add vmfunc.
592 * i386-init.h: Regenerated.
593 * i386-tbl.h: Likewise.
5011093d 594
23e1d329 595For older changes see ChangeLog-2011
252b5132
RH		 596\f
597Local Variables:
2f6d2f85
NC		 598mode: change-log
599left-margin: 8
600fill-column: 74
252b5132
RH		 601version-control: never
602End:
GDB Binutils - Deliverables
This page took 0.598092 seconds and 4 git commands to generate.