gas: sparc: allow ASR registers in the 0..31 range in V9 and later
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
a6b71f42
JM
12016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
2
3 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
4 to get a proper diagnostic when an invalid ASR register is used.
5
9780e045
NC
62016-03-22 Nick Clifton <nickc@redhat.com>
7
8 * configure: Regenerate.
9
e23e8ebe
AB
102016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
11
12 * arc-nps400-tbl.h: New file.
13 * arc-opc.c: Add top level comment.
14 (insert_nps_3bit_dst): New function.
15 (extract_nps_3bit_dst): New function.
16 (insert_nps_3bit_src2): New function.
17 (extract_nps_3bit_src2): New function.
18 (insert_nps_bitop_size): New function.
19 (extract_nps_bitop_size): New function.
20 (arc_flag_operands): Add nps400 entries.
21 (arc_flag_classes): Add nps400 entries.
22 (arc_operands): Add nps400 entries.
23 (arc_opcodes): Add nps400 include.
24
1ae8ab47
AB
252016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
26
27 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
28 the new class enum values.
29
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302016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
31
32 * arc-dis.c (print_insn_arc): Handle nps400.
33
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342016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
35
36 * arc-opc.c (BASE): Delete.
37
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382016-03-18 Nick Clifton <nickc@redhat.com>
39
40 PR target/19721
41 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
42 of MOV insn that aliases an ORR insn.
43
cc933301
JW
442016-03-16 Jiong Wang <jiong.wang@arm.com>
45
46 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
47
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TS
482016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
49
50 * mcore-opc.h: Add const qualifiers.
51 * microblaze-opc.h (struct op_code_struct): Likewise.
52 * sh-opc.h: Likewise.
53 * tic4x-dis.c (tic4x_print_indirect): Likewise.
54 (tic4x_print_op): Likewise.
55
62de1c63
AM
562016-03-02 Alan Modra <amodra@gmail.com>
57
d11698cd 58 * or1k-desc.h: Regenerate.
62de1c63 59 * fr30-ibld.c: Regenerate.
c697cf0b 60 * rl78-decode.c: Regenerate.
62de1c63 61
020efce5
NC
622016-03-01 Nick Clifton <nickc@redhat.com>
63
64 PR target/19747
65 * rl78-dis.c (print_insn_rl78_common): Fix typo.
66
b0c11777
RL
672016-02-24 Renlin Li <renlin.li@arm.com>
68
69 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
70 (print_insn_coprocessor): Support fp16 instructions.
71
3e309328
RL
722016-02-24 Renlin Li <renlin.li@arm.com>
73
74 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
75 vminnm, vrint(mpna).
76
8afc7bea
RL
772016-02-24 Renlin Li <renlin.li@arm.com>
78
79 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
80 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
81
4fd7268a
L
822016-02-15 H.J. Lu <hongjiu.lu@intel.com>
83
84 * i386-dis.c (print_insn): Parenthesize expression to prevent
85 truncated addresses.
86 (OP_J): Likewise.
87
4670103e
CZ
882016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
89 Janek van Oirschot <jvanoirs@synopsys.com>
90
91 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
92 variable.
93
c1d9289f
NC
942016-02-04 Nick Clifton <nickc@redhat.com>
95
96 PR target/19561
97 * msp430-dis.c (print_insn_msp430): Add a special case for
98 decoding an RRC instruction with the ZC bit set in the extension
99 word.
100
a143b004
AB
1012016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
102
103 * cgen-ibld.in (insert_normal): Rework calculation of shift.
104 * epiphany-ibld.c: Regenerate.
105 * fr30-ibld.c: Regenerate.
106 * frv-ibld.c: Regenerate.
107 * ip2k-ibld.c: Regenerate.
108 * iq2000-ibld.c: Regenerate.
109 * lm32-ibld.c: Regenerate.
110 * m32c-ibld.c: Regenerate.
111 * m32r-ibld.c: Regenerate.
112 * mep-ibld.c: Regenerate.
113 * mt-ibld.c: Regenerate.
114 * or1k-ibld.c: Regenerate.
115 * xc16x-ibld.c: Regenerate.
116 * xstormy16-ibld.c: Regenerate.
117
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1182016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
119
120 * epiphany-dis.c: Regenerated from latest cpu files.
121
d8c823c8
MM
1222016-02-01 Michael McConville <mmcco@mykolab.com>
123
124 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
125 test bit.
126
5bc5ae88
RL
1272016-01-25 Renlin Li <renlin.li@arm.com>
128
129 * arm-dis.c (mapping_symbol_for_insn): New function.
130 (find_ifthen_state): Call mapping_symbol_for_insn().
131
0bff6e2d
MW
1322016-01-20 Matthew Wahab <matthew.wahab@arm.com>
133
134 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
135 of MSR UAO immediate operand.
136
100b4f2e
MR
1372016-01-18 Maciej W. Rozycki <macro@imgtec.com>
138
139 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
140 instruction support.
141
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AM
1422016-01-17 Alan Modra <amodra@gmail.com>
143
144 * configure: Regenerate.
145
4d82fe66
NC
1462016-01-14 Nick Clifton <nickc@redhat.com>
147
148 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
149 instructions that can support stack pointer operations.
150 * rl78-decode.c: Regenerate.
151 * rl78-dis.c: Fix display of stack pointer in MOVW based
152 instructions.
153
651657fa
MW
1542016-01-14 Matthew Wahab <matthew.wahab@arm.com>
155
156 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
157 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
158 erxtatus_el1 and erxaddr_el1.
159
105bde57
MW
1602016-01-12 Matthew Wahab <matthew.wahab@arm.com>
161
162 * arm-dis.c (arm_opcodes): Add "esb".
163 (thumb_opcodes): Likewise.
164
afa8d405
PB
1652016-01-11 Peter Bergner <bergner@vnet.ibm.com>
166
167 * ppc-opc.c <xscmpnedp>: Delete.
168 <xvcmpnedp>: Likewise.
169 <xvcmpnedp.>: Likewise.
170 <xvcmpnesp>: Likewise.
171 <xvcmpnesp.>: Likewise.
172
83c3256e
AS
1732016-01-08 Andreas Schwab <schwab@linux-m68k.org>
174
175 PR gas/13050
176 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
177 addition to ISA_A.
178
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AM
1792016-01-01 Alan Modra <amodra@gmail.com>
180
181 Update year range in copyright notice of all files.
182
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183For older changes see ChangeLog-2015
184\f
185Copyright (C) 2016 Free Software Foundation, Inc.
186
187Copying and distribution of this file, with or without modification,
188are permitted in any medium without royalty provided the copyright
189notice and this notice are preserved.
190
191Local Variables:
192mode: change-log
193left-margin: 8
194fill-column: 74
195version-control: never
196End:
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