projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| f6690563 MR |
1 | 2010-09-14 Maciej W. Rozycki <macro@codesourcery.com> |
| 2 | ||
| 3 | * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire", | |
| 4 | "sync_mb", "sync_release", "sync_rmb" and "sync_wmb". | |
| 5 | ||
| 8901a3cd PM |
6 | 2010-09-10 Pierre Muller <muller@ics.u-strasbg.fr> |
| 7 | ||
| 8 | * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for | |
| 9 | dlx_insn_type array. | |
| 10 | ||
| d9e3625e L |
11 | 2010-08-31 H.J. Lu <hongjiu.lu@intel.com> |
| 12 | ||
| 13 | PR binutils/11960 | |
| 14 | * i386-dis.c (sIv): New. | |
| 15 | (dis386): Replace Iq with sIv on "pushT". | |
| 16 | (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT. | |
| 17 | (x86_64_table): Replace {T|}/{P|} with P. | |
| 18 | (putop): Add 'w' to 'T'/'P' if needed for Intel syntax. | |
| 19 | (OP_sI): Update v_mode. Remove w_mode. | |
| 20 | ||
| f383de66 NF |
21 | 2010-08-27 Nathan Froyd <froydnj@codesourcery.com> |
| 22 | ||
| 23 | * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate | |
| 24 | on E500 and E500MC. | |
| 25 | ||
| 1ab03f4b L |
26 | 2010-08-17 H.J. Lu <hongjiu.lu@intel.com> |
| 27 | ||
| 28 | * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and | |
| 29 | prefetchw. | |
| 30 | ||
| 22109423 L |
31 | 2010-08-06 Quentin Neill <quentin.neill@amd.com> |
| 32 | ||
| 33 | * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add | |
| 34 | to processor flags for PENTIUMPRO processors and later. | |
| 35 | * i386-opc.h (enum): Add CpuNop. | |
| 36 | (i386_cpu_flags): Add cpunop bit. | |
| 37 | * i386-opc.tbl: Change nop cpu_flags. | |
| 38 | * i386-init.h: Regenerated. | |
| 39 | * i386-tbl.h: Likewise. | |
| 40 | ||
| b49dfb4a L |
41 | 2010-08-06 Quentin Neill <quentin.neill@amd.com> |
| 42 | ||
| 43 | * i386-opc.h (enum): Fix typos in comments. | |
| 44 | ||
| 6ca4eb77 AM |
45 | 2010-08-06 Alan Modra <amodra@gmail.com> |
| 46 | ||
| 47 | * disassemble.c: Formatting. | |
| 48 | (disassemble_init_for_target <ARCH_m32c>): Comment on endian. | |
| 49 | ||
| 92d4d42e L |
50 | 2010-08-05 H.J. Lu <hongjiu.lu@intel.com> |
| 51 | ||
| 52 | * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b. | |
| 53 | * i386-tbl.h: Regenerated. | |
| 54 | ||
| b414985b L |
55 | 2010-08-05 H.J. Lu <hongjiu.lu@intel.com> |
| 56 | ||
| 57 | * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1. | |
| 58 | ||
| 59 | * i386-opc.tbl: Add ud1. Remove Cpu686 from ud2/ud2a/ud2b. | |
| 60 | * i386-tbl.h: Regenerated. | |
| 61 | ||
| f9c7014e DD |
62 | 2010-07-29 DJ Delorie <dj@redhat.com> |
| 63 | ||
| 64 | * rx-decode.opc (SRR): New. | |
| 65 | (rx_decode_opcode): Use it for movbi and movbir. Decode NOP2 (mov | |
| 66 | r0,r0) and NOP3 (max r0,r0) special cases. | |
| 67 | * rx-decode.c: Regenerate. | |
| 6ca4eb77 | 68 | |
| 592a252b L |
69 | 2010-07-28 H.J. Lu <hongjiu.lu@intel.com> |
| 70 | ||
| 71 | * i386-dis.c: Add 0F to VEX opcode enums. | |
| 72 | ||
| 3cf79a01 DD |
73 | 2010-07-27 DJ Delorie <dj@redhat.com> |
| 74 | ||
| 75 | * rx-decode.opc (store_flags): Remove, replace with F_* macros. | |
| 76 | (rx_decode_opcode): Likewise. | |
| 77 | * rx-decode.c: Regenerate. | |
| 78 | ||
| 1cd986c5 NC |
79 | 2010-07-23 Naveen.H.S <naveen.S@kpitcummins.com> |
| 80 | Ina Pandit <ina.pandit@kpitcummins.com> | |
| 81 | ||
| 82 | * v850-dis.c (v850_sreg_names): Updated structure for system | |
| 83 | registers. | |
| 84 | (float_cc_names): new structure for condition codes. | |
| 85 | (print_value): Update the function that prints value. | |
| 86 | (get_operand_value): New function to get the operand value. | |
| 87 | (disassemble): Updated to handle the disassembly of instructions. | |
| 88 | (print_insn_v850): Updated function to print instruction for different | |
| 89 | families. | |
| 90 | * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1, | |
| 91 | extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3, | |
| 92 | extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6, | |
| 93 | insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop, | |
| 94 | extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16, | |
| 95 | extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22, | |
| 96 | extract_d22, insert_d23, extract_d23, insert_i9, extract_i9, | |
| 97 | insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New. | |
| 98 | (insert_d8_7, insert_d5_4, insert_i5div): Remove. | |
| 99 | (v850_operands): Update with the relocation name. Also update | |
| 100 | the instructions with specific set of processors. | |
| 101 | ||
| 52e7f43d RE |
102 | 2010-07-08 Tejas Belagod <tejas.belagod@arm.com> |
| 103 | ||
| 104 | * arm-dis.c (print_insn_arm): Add cases for printing more | |
| 105 | symbolic operands. | |
| 106 | (print_insn_thumb32): Likewise. | |
| 107 | ||
| c680e7f6 MR |
108 | 2010-07-06 Maciej W. Rozycki <macro@codesourcery.com> |
| 109 | ||
| 110 | * mips-dis.c (print_insn_mips): Correct branch instruction type | |
| 111 | determination. | |
| 112 | ||
| 9a2c7088 MR |
113 | 2010-07-06 Maciej W. Rozycki <macro@codesourcery.com> |
| 114 | ||
| 115 | * mips-dis.c (print_mips16_insn_arg): Remove branch instruction | |
| 116 | type and delay slot determination. | |
| 117 | (print_insn_mips16): Extend branch instruction type and delay | |
| 118 | slot determination to cover all instructions. | |
| 119 | * mips16-opc.c (BR): Remove macro. | |
| 120 | (UBR, CBR): New macros. | |
| 121 | (mips16_opcodes): Update branch annotation for "b", "beqz", | |
| 122 | "bnez", "bteqz" and "btnez". Add branch annotation for "jalrc" | |
| 123 | and "jrc". | |
| 124 | ||
| d7d9a9f8 L |
125 | 2010-07-05 H.J. Lu <hongjiu.lu@intel.com> |
| 126 | ||
| 127 | AVX Programming Reference (June, 2010) | |
| 128 | * i386-dis.c (mod_table): Replace rdrnd with rdrand. | |
| 129 | * i386-opc.tbl: Likewise. | |
| 130 | * i386-tbl.h: Regenerated. | |
| 131 | ||
| 77321f53 L |
132 | 2010-07-05 H.J. Lu <hongjiu.lu@intel.com> |
| 133 | ||
| 134 | * i386-opc.h (CpuFSGSBase): Fix a typo in comments. | |
| 135 | ||
| 7102e95e AS |
136 | 2010-07-03 Andreas Schwab <schwab@linux-m68k.org> |
| 137 | ||
| 138 | * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to | |
| 139 | ppc_cpu_t before inverting. | |
| 3a5530ea AS |
140 | (ppc_parse_cpu): Likewise. |
| 141 | (print_insn_powerpc): Likewise. | |
| 7102e95e | 142 | |
| bdc70b4a AM |
143 | 2010-07-03 Alan Modra <amodra@gmail.com> |
| 144 | ||
| 145 | * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags. | |
| 146 | * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete. | |
| 147 | (PPC64, MFDEC2): Update. | |
| 148 | (NON32, NO371): Define. | |
| 149 | (powerpc_opcode): Update to not use old opcode flags, and avoid | |
| 150 | -m601 duplicates. | |
| 151 | ||
| 21375995 DD |
152 | 2010-07-03 DJ Delorie <dj@delorie.com> |
| 153 | ||
| 154 | * m32c-ibld.c: Regenerate. | |
| 155 | ||
| 81a0b7e2 AM |
156 | 2010-07-03 Alan Modra <amodra@gmail.com> |
| 157 | ||
| 158 | * ppc-opc.c (PWR2COM): Define. | |
| 159 | (PPCPWR2): Add PPC_OPCODE_COMMON. | |
| 160 | (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.", | |
| 161 | "fcirz", "fcirz." to -mcom opcodes. Remove "mfsri", "dclst", | |
| 162 | "rac" from -mcom. | |
| 163 | ||
| c7b8aa3a L |
164 | 2010-07-01 H.J. Lu <hongjiu.lu@intel.com> |
| 165 | ||
| 166 | AVX Programming Reference (June, 2010) | |
| 167 | * i386-dis.c (PREFIX_0FAE_REG_0): New. | |
| 168 | (PREFIX_0FAE_REG_1): Likewise. | |
| 169 | (PREFIX_0FAE_REG_2): Likewise. | |
| 170 | (PREFIX_0FAE_REG_3): Likewise. | |
| 171 | (PREFIX_VEX_3813): Likewise. | |
| 172 | (PREFIX_VEX_3A1D): Likewise. | |
| 173 | (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1, | |
| 174 | PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and | |
| 175 | PREFIX_VEX_3A1D. | |
| 176 | (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D. | |
| 177 | (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1, | |
| 178 | PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd. | |
| 179 | ||
| 180 | * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS, | |
| 181 | CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS. | |
| 182 | (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C. | |
| 183 | ||
| 184 | * i386-opc.h (CpuXsaveopt): New. | |
| 77321f53 | 185 | (CpuFSGSBase): Likewise. |
| c7b8aa3a L |
186 | (CpuRdRnd): Likewise. |
| 187 | (CpuF16C): Likewise. | |
| 188 | (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and | |
| 189 | cpuf16c. | |
| 190 | ||
| 191 | * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd, | |
| 192 | wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph. | |
| a00eb5e8 L |
193 | * i386-init.h: Regenerated. |
| 194 | * i386-tbl.h: Likewise. | |
| c7b8aa3a | 195 | |
| 09a8ad8d AM |
196 | 2010-07-01 Sebastian Andrzej Siewior <bigeasy@linutronix.de> |
| 197 | ||
| 198 | * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf | |
| 199 | and mtocrf on EFS. | |
| 200 | ||
| 360cfc9c AM |
201 | 2010-06-29 Alan Modra <amodra@gmail.com> |
| 202 | ||
| 203 | * maxq-dis.c: Delete file. | |
| 204 | * Makefile.am: Remove references to maxq. | |
| 205 | * configure.in: Likewise. | |
| 206 | * disassemble.c: Likewise. | |
| 207 | * Makefile.in: Regenerate. | |
| 208 | * configure: Regenerate. | |
| 209 | * po/POTFILES.in: Regenerate. | |
| 210 | ||
| dc898d5e AM |
211 | 2010-06-29 Alan Modra <amodra@gmail.com> |
| 212 | ||
| 213 | * mep-dis.c: Regenerate. | |
| 214 | ||
| 8e560766 MGD |
215 | 2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> |
| 216 | ||
| 217 | * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax. | |
| 218 | ||
| c7e2358a AM |
219 | 2010-06-27 Alan Modra <amodra@gmail.com> |
| 220 | ||
| 221 | * arc-dis.c (arc_sprintf): Delete set but unused variables. | |
| 222 | (decodeInstr): Likewise. | |
| 223 | * dlx-dis.c (print_insn_dlx): Likewise. | |
| 224 | * h8300-dis.c (bfd_h8_disassemble_init): Likewise. | |
| 225 | * maxq-dis.c (check_move, print_insn): Likewise. | |
| 226 | * mep-dis.c (mep_examine_ivc2_insns): Likewise. | |
| 227 | * msp430-dis.c (msp430_branchinstr): Likewise. | |
| 228 | * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning. | |
| 229 | * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise. | |
| 230 | * sparc-dis.c (print_insn_sparc): Likewise. | |
| 231 | * fr30-asm.c: Regenerate. | |
| 232 | * frv-asm.c: Regenerate. | |
| 233 | * ip2k-asm.c: Regenerate. | |
| 234 | * iq2000-asm.c: Regenerate. | |
| 235 | * lm32-asm.c: Regenerate. | |
| 236 | * m32c-asm.c: Regenerate. | |
| 237 | * m32r-asm.c: Regenerate. | |
| 238 | * mep-asm.c: Regenerate. | |
| 239 | * mt-asm.c: Regenerate. | |
| 240 | * openrisc-asm.c: Regenerate. | |
| 241 | * xc16x-asm.c: Regenerate. | |
| 242 | * xstormy16-asm.c: Regenerate. | |
| 243 | ||
| 6ffe3d99 NC |
244 | 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr> |
| 245 | ||
| 246 | PR gas/11673 | |
| 247 | * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later. | |
| 248 | ||
| 09ec0d17 NC |
249 | 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr> |
| 250 | ||
| 251 | PR binutils/11676 | |
| 252 | * m68k-dis.c (print_insn_arg): Prefix float constants with #0e. | |
| 253 | ||
| e01d869a AM |
254 | 2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de> |
| 255 | ||
| 256 | * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and | |
| 257 | e500x2. Add PPC_OPCODE_E500 to e500 and e500x2 | |
| 258 | * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which | |
| 259 | touch floating point regs and are enabled by COM, PPC or PPCCOM. | |
| 260 | Treat sync as msync on e500. Treat eieio as mbar 1 on e500. | |
| 261 | Treat lwsync as msync on e500. | |
| 262 | ||
| 1f4e4950 MGD |
263 | 2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> |
| 264 | ||
| 265 | * arm-dis.c (thumb-opcodes): Add disassembly for movs. | |
| 266 | ||
| 9d82ec38 MGD |
267 | 2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> |
| 268 | ||
| e01d869a | 269 | * arm-dis.c (print_insn_neon): Ensure disassembly of Neon |
| 9d82ec38 MGD |
270 | constants is the same on 32-bit and 64-bit hosts. |
| 271 | ||
| c3a6ea62 | 272 | 2010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com> |
| d8b24b95 NC |
273 | |
| 274 | * m68k-dis.c (print_insn_m68k): Emit undefined instructions as | |
| 275 | .short directives so that they can be reassembled. | |
| 276 | ||
| 9db8dccb CM |
277 | 2010-05-26 Catherine Moore <clm@codesourcery.com> |
| 278 | David Ung <davidu@mips.com> | |
| 279 | ||
| 280 | * mips-opc.c: Change membership to I1 for instructions ssnop and | |
| 281 | ehb. | |
| 282 | ||
| dfc8cf43 L |
283 | 2010-05-26 H.J. Lu <hongjiu.lu@intel.com> |
| 284 | ||
| 285 | * i386-dis.c (sib): New. | |
| 286 | (get_sib): Likewise. | |
| 287 | (print_insn): Call get_sib. | |
| 288 | OP_E_memory): Use sib. | |
| 289 | ||
| f79e2745 CM |
290 | 2010-05-26 Catherine Moore <clm@codesoourcery.com> |
| 291 | ||
| 292 | * mips-dis.c (mips_arch): Remove INSN_MIPS16. | |
| 293 | * mips-opc.c (I16): Remove. | |
| 294 | (mips_builtin_op): Reclassify jalx. | |
| 295 | ||
| 51b5d4a8 AM |
296 | 2010-05-19 Alan Modra <amodra@gmail.com> |
| 297 | ||
| 298 | * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde, | |
| 299 | divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx. | |
| 300 | ||
| 85d4ac0b AM |
301 | 2010-05-13 Alan Modra <amodra@gmail.com> |
| 302 | ||
| 303 | * ppc-opc.c (powerpc_opcodes): Correct wclr encoding. | |
| 304 | ||
| 4547cb56 NC |
305 | 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> |
| 306 | ||
| 307 | * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W | |
| 308 | format. | |
| 309 | (print_insn_thumb16): Add support for new %W format. | |
| 310 | ||
| 6540b386 TG |
311 | 2010-05-07 Tristan Gingold <gingold@adacore.com> |
| 312 | ||
| 313 | * Makefile.in: Regenerate with automake 1.11.1. | |
| 314 | * aclocal.m4: Ditto. | |
| 315 | ||
| 3e01a7fd NC |
316 | 2010-05-05 Nick Clifton <nickc@redhat.com> |
| 317 | ||
| 318 | * po/es.po: Updated Spanish translation. | |
| 319 | ||
| 9c9c98a5 NC |
320 | 2010-04-22 Nick Clifton <nickc@redhat.com> |
| 321 | ||
| 322 | * po/opcodes.pot: Updated by the Translation project. | |
| 323 | * po/vi.po: Updated Vietnamese translation. | |
| 324 | ||
| f07af43e L |
325 | 2010-04-16 H.J. Lu <hongjiu.lu@intel.com> |
| 326 | ||
| 327 | * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown | |
| 328 | bits in opcode. | |
| 329 | ||
| 3d540e93 NC |
330 | 2010-04-09 Nick Clifton <nickc@redhat.com> |
| 331 | ||
| 332 | * i386-dis.c (print_insn): Remove unused variable op. | |
| 333 | (OP_sI): Remove unused variable mask. | |
| 334 | ||
| 397841b5 AM |
335 | 2010-04-07 Alan Modra <amodra@gmail.com> |
| 336 | ||
| 337 | * configure: Regenerate. | |
| 338 | ||
| cee62821 PB |
339 | 2010-04-06 Peter Bergner <bergner@vnet.ibm.com> |
| 340 | ||
| 341 | * ppc-opc.c (RBOPT): New define. | |
| 342 | ("dccci"): Enable for PPCA2. Make operands optional. | |
| 343 | ("iccci"): Likewise. Do not deprecate for PPC476. | |
| 344 | ||
| accf4463 NC |
345 | 2010-04-02 Masaki Muranaka <monaka@monami-software.com> |
| 346 | ||
| 347 | * cr16-opc.c (cr16_instruction): Fix typo in comment. | |
| 348 | ||
| 40b36596 JM |
349 | 2010-03-25 Joseph Myers <joseph@codesourcery.com> |
| 350 | ||
| 351 | * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c. | |
| 352 | * Makefile.in: Regenerate. | |
| 353 | * configure.in (bfd_tic6x_arch): New. | |
| 354 | * configure: Regenerate. | |
| 355 | * disassemble.c (ARCH_tic6x): Define if ARCH_all. | |
| 356 | (disassembler): Handle TI C6X. | |
| 357 | * tic6x-dis.c: New. | |
| 358 | ||
| 1985c81c MF |
359 | 2010-03-24 Mike Frysinger <vapier@gentoo.org> |
| 360 | ||
| 361 | * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2. | |
| 362 | ||
| f66187fd JM |
363 | 2010-03-23 Joseph Myers <joseph@codesourcery.com> |
| 364 | ||
| 365 | * dis-buf.c (buffer_read_memory): Give error for reading just | |
| 366 | before the start of memory. | |
| 367 | ||
| ce7d077e SP |
368 | 2010-03-22 Sebastian Pop <sebastian.pop@amd.com> |
| 369 | Quentin Neill <quentin.neill@amd.com> | |
| 370 | ||
| 371 | * i386-dis.c (OP_LWP_I): Removed. | |
| 372 | (reg_table): Do not use OP_LWP_I, use Iq. | |
| 373 | (OP_LWPCB_E): Remove use of names16. | |
| 374 | (OP_LWP_E): Same. | |
| 375 | * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns | |
| 376 | should not set the Vex.length bit. | |
| 377 | * i386-tbl.h: Regenerated. | |
| 378 | ||
| 63d0fa4e AM |
379 | 2010-02-25 Edmar Wienskoski <edmar@freescale.com> |
| 380 | ||
| 381 | * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64". | |
| 382 | ||
| c060226a NC |
383 | 2010-02-24 Nick Clifton <nickc@redhat.com> |
| 384 | ||
| 385 | PR binutils/6773 | |
| 386 | * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with | |
| 387 | <prefix>asx. Replace <prefix>subaddx with <prefix>sax. | |
| 388 | (thumb32_opcodes): Likewise. | |
| 389 | ||
| ab7875de NC |
390 | 2010-02-15 Nick Clifton <nickc@redhat.com> |
| 391 | ||
| 392 | * po/vi.po: Updated Vietnamese translation. | |
| 393 | ||
| fee1d3e8 DE |
394 | 2010-02-12 Doug Evans <dje@sebabeach.org> |
| 395 | ||
| 396 | * lm32-opinst.c: Regenerate. | |
| 397 | ||
| 37ec9240 DE |
398 | 2010-02-11 Doug Evans <dje@sebabeach.org> |
| 399 | ||
| 9468ae89 DE |
400 | * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL. |
| 401 | (print_address): Delete CGEN_PRINT_ADDRESS. | |
| 402 | * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c, | |
| 403 | * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h, | |
| 404 | * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c, | |
| 405 | * xc16x-dis.c, * xstormy16-dis.c: Regenerate. | |
| 406 | ||
| 37ec9240 DE |
407 | * fr30-desc.c, * fr30-desc.h, * fr30-opc.c, |
| 408 | * frv-desc.c, * frv-desc.h, * frv-opc.c, | |
| 409 | * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c, | |
| 410 | * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c, | |
| 411 | * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c, | |
| 412 | * m32c-desc.c, * m32c-desc.h, * m32c-opc.c, | |
| 413 | * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c, | |
| 414 | * mep-desc.c, * mep-desc.h, * mep-opc.c, | |
| 415 | * mt-desc.c, * mt-desc.h, * mt-opc.c, | |
| 416 | * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c, | |
| 417 | * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c, | |
| 418 | * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate. | |
| 419 | ||
| c75ef631 L |
420 | 2010-02-11 H.J. Lu <hongjiu.lu@intel.com> |
| 421 | ||
| 422 | * i386-dis.c: Update copyright. | |
| 423 | * i386-gen.c: Likewise. | |
| 424 | * i386-opc.h: Likewise. | |
| 425 | * i386-opc.tbl: Likewise. | |
| 426 | ||
| a683cc34 SP |
427 | 2010-02-10 Quentin Neill <quentin.neill@amd.com> |
| 428 | Sebastian Pop <sebastian.pop@amd.com> | |
| 429 | ||
| 430 | * i386-dis.c (OP_EX_VexImmW): Reintroduced | |
| 431 | function to handle 5th imm8 operand. | |
| 432 | (PREFIX_VEX_3A48): Added. | |
| 433 | (PREFIX_VEX_3A49): Added. | |
| 434 | (VEX_W_3A48_P_2): Added. | |
| 435 | (VEX_W_3A49_P_2): Added. | |
| 436 | (prefix table): Added entries for PREFIX_VEX_3A48 | |
| 437 | and PREFIX_VEX_3A49. | |
| 438 | (vex table): Added entries for VEX_W_3A48_P_2 and | |
| 439 | and VEX_W_3A49_P_2. | |
| 440 | * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4 | |
| 441 | for Vec_Imm4 operands. | |
| 442 | * i386-opc.h (enum): Added Vec_Imm4. | |
| 443 | (i386_operand_type): Added vec_imm4. | |
| 444 | * i386-opc.tbl: Add entries for vpermilp[ds]. | |
| 445 | * i386-init.h: Regenerated. | |
| 446 | * i386-tbl.h: Regenerated. | |
| 447 | ||
| cdc51b07 RS |
448 | 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com> |
| 449 | ||
| 450 | * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6" | |
| 451 | and "pwr7". Move "a2" into alphabetical order. | |
| 452 | ||
| ce3d2015 AM |
453 | 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
| 454 | ||
| 455 | * ppc-dis.c (ppc_opts): Add titan entry. | |
| 456 | * ppc-opc.c (TITAN, MULHW): Define. | |
| 457 | (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx). | |
| 458 | ||
| 68339fdf SP |
459 | 2010-02-03 Quentin Neill <quentin.neill@amd.com> |
| 460 | ||
| 461 | * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS | |
| 462 | to CPU_BDVER1_FLAGS | |
| 463 | * i386-init.h: Regenerated. | |
| 464 | ||
| f3d55a94 AG |
465 | 2010-02-03 Anthony Green <green@moxielogic.com> |
| 466 | ||
| 467 | * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to | |
| 468 | 0x0f, and make 0x00 an illegal instruction. | |
| 469 | ||
| b0e28b39 DJ |
470 | 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com> |
| 471 | ||
| 472 | * opcodes/arm-dis.c (struct arm_private_data): New. | |
| 473 | (print_insn_coprocessor, print_insn_arm): Update to use struct | |
| 474 | arm_private_data. | |
| 475 | (is_mapping_symbol, get_map_sym_type): New functions. | |
| 476 | (get_sym_code_type): Check the symbol's section. Do not check | |
| 477 | mapping symbols. | |
| 478 | (print_insn): Default to disassembling ARM mode code. Check | |
| 479 | for mapping symbols separately from other symbols. Use | |
| 480 | struct arm_private_data. | |
| 481 | ||
| 1c480963 L |
482 | 2010-01-28 H.J. Lu <hongjiu.lu@intel.com> |
| 483 | ||
| 484 | * i386-dis.c (EXVexWdqScalar): New. | |
| 485 | (vex_scalar_w_dq_mode): Likewise. | |
| 486 | (prefix_table): Update entries for PREFIX_VEX_3899, | |
| 487 | PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F, | |
| 488 | PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD, | |
| 489 | PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB, | |
| 490 | PREFIX_VEX_38BD and PREFIX_VEX_38BF. | |
| 491 | (intel_operand_size): Handle vex_scalar_w_dq_mode. | |
| 492 | (OP_EX): Likewise. | |
| 493 | ||
| 539f890d L |
494 | 2010-01-27 H.J. Lu <hongjiu.lu@intel.com> |
| 495 | ||
| 496 | * i386-dis.c (XMScalar): New. | |
| 497 | (EXdScalar): Likewise. | |
| 498 | (EXqScalar): Likewise. | |
| 499 | (EXqScalarS): Likewise. | |
| 500 | (VexScalar): Likewise. | |
| 501 | (EXdVexScalarS): Likewise. | |
| 502 | (EXqVexScalarS): Likewise. | |
| 503 | (XMVexScalar): Likewise. | |
| 504 | (scalar_mode): Likewise. | |
| 505 | (d_scalar_mode): Likewise. | |
| 506 | (d_scalar_swap_mode): Likewise. | |
| 507 | (q_scalar_mode): Likewise. | |
| 508 | (q_scalar_swap_mode): Likewise. | |
| 509 | (vex_scalar_mode): Likewise. | |
| 510 | (vex_len_table): Duplcate entries for VEX_LEN_10_P_1, | |
| 511 | VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1, | |
| 512 | VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0, | |
| 513 | VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3, | |
| 514 | VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3, | |
| 515 | VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1, | |
| 516 | VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1, | |
| 517 | VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2, | |
| 518 | VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1, | |
| 519 | VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2. | |
| 520 | (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3, | |
| 521 | VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2, | |
| 522 | VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3, | |
| 523 | VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3, | |
| 524 | VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3, | |
| 525 | VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3, | |
| 526 | VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3, | |
| 527 | VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3, | |
| 528 | VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2. | |
| 529 | (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode, | |
| 530 | q_scalar_mode, q_scalar_swap_mode. | |
| 531 | (OP_XMM): Handle scalar_mode. | |
| 532 | (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode | |
| 533 | and q_scalar_swap_mode. | |
| 534 | (OP_VEX): Handle vex_scalar_mode. | |
| 535 | ||
| 208b4d78 L |
536 | 2010-01-24 H.J. Lu <hongjiu.lu@intel.com> |
| 537 | ||
| 538 | * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }. | |
| 539 | ||
| 448b213a L |
540 | 2010-01-24 H.J. Lu <hongjiu.lu@intel.com> |
| 541 | ||
| 542 | * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }. | |
| 543 | ||
| 47cf8fa0 L |
544 | 2010-01-24 H.J. Lu <hongjiu.lu@intel.com> |
| 545 | ||
| 546 | * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }. | |
| 547 | ||
| 592d1631 L |
548 | 2010-01-24 H.J. Lu <hongjiu.lu@intel.com> |
| 549 | ||
| 550 | * i386-dis.c (Bad_Opcode): New. | |
| 551 | (bad_opcode): Likewise. | |
| 552 | (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }. | |
| 553 | (dis386_twobyte): Likewise. | |
| 554 | (reg_table): Likewise. | |
| 555 | (prefix_table): Likewise. | |
| 556 | (x86_64_table): Likewise. | |
| 557 | (vex_len_table): Likewise. | |
| 558 | (vex_w_table): Likewise. | |
| 559 | (mod_table): Likewise. | |
| 560 | (rm_table): Likewise. | |
| 561 | (float_reg): Likewise. | |
| 562 | (reg_table): Remove trailing "(bad)" entries. | |
| 563 | (prefix_table): Likewise. | |
| 564 | (x86_64_table): Likewise. | |
| 565 | (vex_len_table): Likewise. | |
| 566 | (vex_w_table): Likewise. | |
| 567 | (mod_table): Likewise. | |
| 568 | (rm_table): Likewise. | |
| 569 | (get_valid_dis386): Handle bytemode 0. | |
| 570 | ||
| 712366da L |
571 | 2010-01-23 H.J. Lu <hongjiu.lu@intel.com> |
| 572 | ||
| 573 | * i386-opc.h (VEXScalar): New. | |
| 574 | ||
| 575 | * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar | |
| 576 | instructions. | |
| 577 | * i386-tbl.h: Regenerated. | |
| 578 | ||
| 706e8205 | 579 | 2010-01-21 H.J. Lu <hongjiu.lu@intel.com> |
| 73bb6729 L |
580 | |
| 581 | * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor. | |
| 582 | ||
| 583 | * i386-opc.tbl: Add xsave64 and xrstor64. | |
| 584 | * i386-tbl.h: Regenerated. | |
| 585 | ||
| 99ea83aa NC |
586 | 2010-01-20 Nick Clifton <nickc@redhat.com> |
| 587 | ||
| 588 | PR 11170 | |
| 589 | * arm-dis.c (print_arm_address): Do not ignore negative bit in PC | |
| 590 | based post-indexed addressing. | |
| 591 | ||
| a6461c02 SP |
592 | 2010-01-15 Sebastian Pop <sebastian.pop@amd.com> |
| 593 | ||
| 594 | * i386-opc.tbl: Support all the possible aliases for VPCOM* insns. | |
| 595 | * i386-tbl.h: Regenerated. | |
| 596 | ||
| a2a7d12c L |
597 | 2010-01-14 H.J. Lu <hongjiu.lu@intel.com> |
| 598 | ||
| 599 | * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in | |
| 600 | comments. | |
| 601 | ||
| b9733481 L |
602 | 2010-01-14 H.J. Lu <hongjiu.lu@intel.com> |
| 603 | ||
| 604 | * i386-dis.c (names_mm): New. | |
| 605 | (intel_names_mm): Likewise. | |
| 606 | (att_names_mm): Likewise. | |
| 607 | (names_xmm): Likewise. | |
| 608 | (intel_names_xmm): Likewise. | |
| 609 | (att_names_xmm): Likewise. | |
| 610 | (names_ymm): Likewise. | |
| 611 | (intel_names_ymm): Likewise. | |
| 612 | (att_names_ymm): Likewise. | |
| 613 | (print_insn): Set names_mm, names_xmm and names_ymm. | |
| 614 | (OP_MMX): Use names_mm, names_xmm and names_ymm. | |
| 615 | (OP_XMM): Likewise. | |
| 616 | (OP_EM): Likewise. | |
| 617 | (OP_EMC): Likewise. | |
| 618 | (OP_MXC): Likewise. | |
| 619 | (OP_EX): Likewise. | |
| 620 | (XMM_Fixup): Likewise. | |
| 621 | (OP_VEX): Likewise. | |
| 622 | (OP_EX_VexReg): Likewise. | |
| 623 | (OP_Vex_2src): Likewise. | |
| 624 | (OP_Vex_2src_1): Likewise. | |
| 625 | (OP_Vex_2src_2): Likewise. | |
| 626 | (OP_REG_VexI4): Likewise. | |
| 627 | ||
| 5e6718e4 L |
628 | 2010-01-13 H.J. Lu <hongjiu.lu@intel.com> |
| 629 | ||
| 630 | * i386-dis.c (print_insn): Update comments. | |
| 631 | ||
| d869730d L |
632 | 2010-01-12 H.J. Lu <hongjiu.lu@intel.com> |
| 633 | ||
| 634 | * i386-dis.c (rex_original): Removed. | |
| 635 | (ckprefix): Remove rex_original. | |
| 636 | (print_insn): Update comments. | |
| 637 | ||
| 3725885a RW |
638 | 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
| 639 | ||
| 640 | * Makefile.in: Regenerate. | |
| 641 | * configure: Regenerate. | |
| 642 | ||
| b7cd1872 DE |
643 | 2010-01-07 Doug Evans <dje@sebabeach.org> |
| 644 | ||
| 645 | * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup. | |
| 646 | * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c, | |
| 647 | * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c, | |
| 648 | * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c, | |
| 649 | * xstormy16-ibld.c: Regenerate. | |
| 650 | ||
| 69dd9865 SP |
651 | 2010-01-06 Quentin Neill <quentin.neill@amd.com> |
| 652 | ||
| 653 | * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS. | |
| 654 | * i386-init.h: Regenerated. | |
| 655 | ||
| e3e535bc NC |
656 | 2010-01-06 Daniel Gutson <dgutson@codesourcery.com> |
| 657 | ||
| 658 | * arm-dis.c (print_insn): Fixed search for next symbol and data | |
| 659 | dumping condition, and the initial mapping symbol state. | |
| 660 | ||
| fe8afbc4 DE |
661 | 2010-01-05 Doug Evans <dje@sebabeach.org> |
| 662 | ||
| 663 | * cgen-ibld.in: #include "cgen/basic-modes.h". | |
| 664 | * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c, | |
| 665 | * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c, | |
| 666 | * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c, | |
| 667 | * xstormy16-ibld.c: Regenerate. | |
| 668 | ||
| 2edcd244 NC |
669 | 2010-01-04 Nick Clifton <nickc@redhat.com> |
| 670 | ||
| 671 | PR 11123 | |
| 672 | * arm-dis.c (print_insn_coprocessor): Initialise value. | |
| 673 | ||
| 0dc93057 AM |
674 | 2010-01-04 Edmar Wienskoski <edmar@freescale.com> |
| 675 | ||
| 676 | * ppc-dis.c (ppc_opts): Add entry for "e500mc64". | |
| 677 | ||
| 05994f45 DE |
678 | 2010-01-02 Doug Evans <dje@sebabeach.org> |
| 679 | ||
| 680 | * cgen-asm.in: Update copyright year. | |
| 681 | * cgen-dis.in: Update copyright year. | |
| 682 | * cgen-ibld.in: Update copyright year. | |
| 683 | * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c, | |
| 684 | * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c, | |
| 685 | * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h, | |
| 686 | * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c, | |
| 687 | * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c, | |
| 688 | * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c, | |
| 689 | * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c, | |
| 690 | * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h, | |
| 691 | * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h, | |
| 692 | * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c, | |
| 693 | * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c, | |
| 694 | * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c, | |
| 695 | * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h, | |
| 696 | * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c, | |
| 697 | * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c, | |
| 698 | * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c, | |
| 699 | * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c, | |
| 700 | * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c, | |
| 701 | * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c, | |
| 702 | * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c, | |
| 703 | * xstormy16-opc.c, * xstormy16-opc.h: Regenerate. | |
| 2426c15f | 704 | |
| 43ecc30f | 705 | For older changes see ChangeLog-2009 |
| 252b5132 RH |
706 | \f |
| 707 | Local Variables: | |
| 2f6d2f85 NC |
708 | mode: change-log |
| 709 | left-margin: 8 | |
| 710 | fill-column: 74 | |
| 252b5132 RH |
711 | version-control: never |
| 712 | End: |