gdb/testsuite:
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
CommitLineData
4c6a93d3
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12012-06-28 Nick Clifton <nickc@redhat.com>
2
3 * po/vi.po: Updated Vietnamese translation.
4
29c048b6
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52012-06-22 Roland McGrath <mcgrathr@google.com>
6
fe13e45b
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7 * i386-opc.tbl: Add RepPrefixOk to ret.
8 * i386-tbl.h: Regenerate.
9
29c048b6
RM
10 * i386-opc.h (RepPrefixOk): New enum constant.
11 (i386_opcode_modifier): New bitfield 'repprefixok'.
12 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
13 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
14 instructions that have IsString.
15 * i386-tbl.h: Regenerate.
16
c7a8dbf9
AS
172012-06-11 Andreas Schwab <schwab@linux-m68k.org>
18
19 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
20 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
21 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
22 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
23 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
24 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
25 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
26 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
27 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
28
94caa966
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292012-05-19 Alan Modra <amodra@gmail.com>
30
31 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
32 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
33
5eb3690e
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342012-05-18 Alan Modra <amodra@gmail.com>
35
71fe7bab
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36 * ia64-opc.c: Remove #include "ansidecl.h".
37 * z8kgen.c: Include sysdep.h first.
38
5eb3690e
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39 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
40 * bfin-dis.c: Likewise.
41 * i860-dis.c: Likewise.
42 * ia64-dis.c: Likewise.
43 * ia64-gen.c: Likewise.
44 * m68hc11-dis.c: Likewise.
45 * mmix-dis.c: Likewise.
46 * msp430-dis.c: Likewise.
47 * or32-dis.c: Likewise.
48 * rl78-dis.c: Likewise.
49 * rx-dis.c: Likewise.
50 * tic4x-dis.c: Likewise.
51 * tilegx-opc.c: Likewise.
52 * tilepro-opc.c: Likewise.
53 * rx-decode.c: Regenerate.
54
a4ebc835
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552012-05-17 James Lemke <jwlemke@codesourcery.com>
56
57 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
58
98c76446
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592012-05-17 James Lemke <jwlemke@codesourcery.com>
60
61 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
62
df7b86aa
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632012-05-17 Daniel Richard G. <skunk@iskunk.org>
64 Nick Clifton <nickc@redhat.com>
65
66 PR 14072
67 * configure.in: Add check that sysdep.h has been included before
68 any system header files.
69 * configure: Regenerate.
70 * config.in: Regenerate.
71 * sysdep.h: Generate an error if included before config.h.
72 * alpha-opc.c: Include sysdep.h before any other header file.
73 * alpha-dis.c: Likewise.
74 * avr-dis.c: Likewise.
75 * cgen-opc.c: Likewise.
76 * cr16-dis.c: Likewise.
77 * cris-dis.c: Likewise.
78 * crx-dis.c: Likewise.
79 * d10v-dis.c: Likewise.
80 * d10v-opc.c: Likewise.
81 * d30v-dis.c: Likewise.
82 * d30v-opc.c: Likewise.
83 * h8500-dis.c: Likewise.
84 * i370-dis.c: Likewise.
85 * i370-opc.c: Likewise.
86 * m10200-dis.c: Likewise.
87 * m10300-dis.c: Likewise.
88 * micromips-opc.c: Likewise.
89 * mips-opc.c: Likewise.
90 * mips61-opc.c: Likewise.
91 * moxie-dis.c: Likewise.
92 * or32-opc.c: Likewise.
93 * pj-dis.c: Likewise.
94 * ppc-dis.c: Likewise.
95 * ppc-opc.c: Likewise.
96 * s390-dis.c: Likewise.
97 * sh-dis.c: Likewise.
98 * sh64-dis.c: Likewise.
99 * sparc-dis.c: Likewise.
100 * sparc-opc.c: Likewise.
101 * spu-dis.c: Likewise.
102 * tic30-dis.c: Likewise.
103 * tic54x-dis.c: Likewise.
104 * tic80-dis.c: Likewise.
105 * tic80-opc.c: Likewise.
106 * tilegx-dis.c: Likewise.
107 * tilepro-dis.c: Likewise.
108 * v850-dis.c: Likewise.
109 * v850-opc.c: Likewise.
110 * vax-dis.c: Likewise.
111 * w65-dis.c: Likewise.
112 * xgate-dis.c: Likewise.
113 * xtensa-dis.c: Likewise.
114 * rl78-decode.opc: Likewise.
115 * rl78-decode.c: Regenerate.
116 * rx-decode.opc: Likewise.
117 * rx-decode.c: Regenerate.
118
e1dad58d
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1192012-05-17 Alan Modra <amodra@gmail.com>
120
121 * ppc_dis.c: Don't include elf/ppc.h.
122
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1232012-05-16 Meador Inge <meadori@codesourcery.com>
124
125 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
126 to PUSH/POP {reg}.
127
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1282012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
129 Stephane Carrez <stcarrez@nerim.fr>
130
131 * configure.in: Add S12X and XGATE co-processor support to m68hc11
132 target.
133 * disassemble.c: Likewise.
134 * configure: Regenerate.
135 * m68hc11-dis.c: Make objdump output more consistent, use hex
136 instead of decimal and use 0x prefix for hex.
137 * m68hc11-opc.c: Add S12X and XGATE opcodes.
138
b9c361e0
JL
1392012-05-14 James Lemke <jwlemke@codesourcery.com>
140
141 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
142 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
143 (vle_opcd_indices): New array.
144 (lookup_vle): New function.
145 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
146 (print_insn_powerpc): Likewise.
147 * ppc-opc.c: Likewise.
148
1492012-05-14 Catherine Moore <clm@codesourcery.com>
150 Maciej W. Rozycki <macro@codesourcery.com>
151 Rhonda Wittels <rhonda@codesourcery.com>
152 Nathan Froyd <froydnj@codesourcery.com>
153
154 * ppc-opc.c (insert_arx, extract_arx): New functions.
155 (insert_ary, extract_ary): New functions.
156 (insert_li20, extract_li20): New functions.
157 (insert_rx, extract_rx): New functions.
158 (insert_ry, extract_ry): New functions.
159 (insert_sci8, extract_sci8): New functions.
160 (insert_sci8n, extract_sci8n): New functions.
161 (insert_sd4h, extract_sd4h): New functions.
162 (insert_sd4w, extract_sd4w): New functions.
163 (insert_vlesi, extract_vlesi): New functions.
164 (insert_vlensi, extract_vlensi): New functions.
165 (insert_vleui, extract_vleui): New functions.
166 (insert_vleil, extract_vleil): New functions.
167 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
168 (BI16, BI32, BO32, B8): New.
169 (B15, B24, CRD32, CRS): New.
170 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
171 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
172 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
173 (SH6_MASK): Use PPC_OPSHIFT_INV.
174 (SI8, UI5, OIMM5, UI7, BO16): New.
175 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
176 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
177 (ALLOW8_SPRG): New.
178 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
179 (OPVUP, OPVUP_MASK OPVUP): New
180 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
181 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
182 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
183 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
184 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
185 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
186 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
187 (SE_IM5, SE_IM5_MASK): New.
188 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
189 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
190 (BO32DNZ, BO32DZ): New.
191 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
192 (PPCVLE): New.
193 (powerpc_opcodes): Add new VLE instructions. Update existing
194 instruction to include PPCVLE if supported.
195 * ppc-dis.c (ppc_opts): Add vle entry.
196 (get_powerpc_dialect): New function.
197 (powerpc_init_dialect): VLE support.
198 (print_insn_big_powerpc): Call get_powerpc_dialect.
199 (print_insn_little_powerpc): Likewise.
200 (operand_value_powerpc): Handle negative shift counts.
201 (print_insn_powerpc): Handle 2-byte instruction lengths.
202
208a4923
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2032012-05-11 Daniel Richard G. <skunk@iskunk.org>
204
205 PR binutils/14028
206 * configure.in: Invoke ACX_HEADER_STRING.
207 * configure: Regenerate.
208 * config.in: Regenerate.
209 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
210 string.h and strings.h.
211
6750a3a7
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2122012-05-11 Nick Clifton <nickc@redhat.com>
213
214 PR binutils/14006
215 * arm-dis.c (print_insn): Fix detection of instruction mode in
216 files containing multiple executable sections.
217
f6c1a2d5
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2182012-05-03 Sean Keys <skeys@ipdatasys.com>
219
220 * Makefile.in, configure: regenerate
221 * disassemble.c (disassembler): Recognize ARCH_XGATE.
222 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
223 New functions.
224 * configure.in: Recognize xgate.
225 * xgate-dis.c, xgate-opc.c: New files for support of xgate
226 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
227 and opcode generation for xgate.
228
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DD
2292012-04-30 DJ Delorie <dj@redhat.com>
230
231 * rx-decode.opc (MOV): Do not sign-extend immediates which are
232 already the maximum bit size.
233 * rx-decode.c: Regenerate.
234
ec668d69
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2352012-04-27 David S. Miller <davem@davemloft.net>
236
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237 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
238 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
239
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240 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
241 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
242
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243 * sparc-opc.c (CBCOND): New define.
244 (CBCOND_XCC): Likewise.
245 (cbcond): New helper macro.
246 (sparc_opcodes): Add compare-and-branch instructions.
247
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248 * sparc-dis.c (print_insn_sparc): Handle ')'.
249 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
250
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251 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
252 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
253
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2542012-04-12 David S. Miller <davem@davemloft.net>
255
256 * sparc-dis.c (X_DISP10): Define.
257 (print_insn_sparc): Handle '='.
258
5de10af0
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2592012-04-01 Mike Frysinger <vapier@gentoo.org>
260
261 * bfin-dis.c (fmtconst): Replace decimal handling with a single
262 sprintf call and the '*' field width.
263
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2642012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
265
266 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
267
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2682012-03-16 Alan Modra <amodra@gmail.com>
269
270 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
271 (powerpc_opcd_indices): Bump array size.
272 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
273 corresponding to unused opcodes to following entry.
274 (lookup_powerpc): New function, extracted and optimised from..
275 (print_insn_powerpc): ..here.
276
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2772012-03-15 Alan Modra <amodra@gmail.com>
278 James Lemke <jwlemke@codesourcery.com>
279
280 * disassemble.c (disassemble_init_for_target): Handle ppc init.
281 * ppc-dis.c (private): New var.
282 (powerpc_init_dialect): Don't return calloc failure, instead use
283 private.
284 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
285 (powerpc_opcd_indices): New array.
286 (disassemble_init_powerpc): New function.
287 (print_insn_big_powerpc): Don't init dialect here.
288 (print_insn_little_powerpc): Likewise.
289 (print_insn_powerpc): Start search using powerpc_opcd_indices.
290
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2912012-03-10 Edmar Wienskoski <edmar@freescale.com>
292
293 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
294 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
295 (PPCVEC2, PPCTMR, E6500): New short names.
296 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
297 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
298 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
299 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
300 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
301 optional operands on sync instruction for E6500 target.
302
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3032012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
304
305 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
306
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3072012-02-27 Alan Modra <amodra@gmail.com>
308
309 * mt-dis.c: Regenerate.
310
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3112012-02-27 Alan Modra <amodra@gmail.com>
312
313 * v850-opc.c (extract_v8): Rearrange to make it obvious this
314 is the inverse of corresponding insert function.
315 (extract_d22, extract_u9, extract_r4): Likewise.
316 (extract_d9): Correct sign extension.
317 (extract_d16_15): Don't assume "long" is 32 bits, and don't
318 rely on implementation defined behaviour for shift right of
319 signed types.
320 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
321 (extract_d23): Likewise, and correct mask.
322
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3232012-02-27 Alan Modra <amodra@gmail.com>
324
325 * crx-dis.c (print_arg): Mask constant to 32 bits.
326 * crx-opc.c (cst4_map): Use int array.
327
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3282012-02-27 Alan Modra <amodra@gmail.com>
329
330 * arc-dis.c (BITS): Don't use shifts to mask off bits.
331 (FIELDD): Sign extend with xor,sub.
332
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WL
3332012-02-25 Walter Lee <walt@tilera.com>
334
335 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
336 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
337 TILEPRO_OPC_LW_TLS_SN.
338
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3392012-02-21 H.J. Lu <hongjiu.lu@intel.com>
340
341 * i386-opc.h (HLEPrefixNone): New.
342 (HLEPrefixLock): Likewise.
343 (HLEPrefixAny): Likewise.
344 (HLEPrefixRelease): Likewise.
345
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3462012-02-08 H.J. Lu <hongjiu.lu@intel.com>
347
348 * i386-dis.c (HLE_Fixup1): New.
349 (HLE_Fixup2): Likewise.
350 (HLE_Fixup3): Likewise.
351 (Ebh1): Likewise.
352 (Evh1): Likewise.
353 (Ebh2): Likewise.
354 (Evh2): Likewise.
355 (Ebh3): Likewise.
356 (Evh3): Likewise.
357 (MOD_C6_REG_7): Likewise.
358 (MOD_C7_REG_7): Likewise.
359 (RM_C6_REG_7): Likewise.
360 (RM_C7_REG_7): Likewise.
361 (XACQUIRE_PREFIX): Likewise.
362 (XRELEASE_PREFIX): Likewise.
363 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
364 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
365 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
366 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
367 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
368 MOD_C6_REG_7 and MOD_C7_REG_7.
369 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
370 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
371 xtest.
372 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
373 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
374
375 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
376 CPU_RTM_FLAGS.
377 (cpu_flags): Add CpuHLE and CpuRTM.
378 (opcode_modifiers): Add HLEPrefixOk.
379
380 * i386-opc.h (CpuHLE): New.
381 (CpuRTM): Likewise.
382 (HLEPrefixOk): Likewise.
383 (i386_cpu_flags): Add cpuhle and cpurtm.
384 (i386_opcode_modifier): Add hleprefixok.
385
386 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
387 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
388 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
389 operand. Add xacquire, xrelease, xabort, xbegin, xend and
390 xtest.
391 * i386-init.h: Regenerated.
392 * i386-tbl.h: Likewise.
393
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3942012-01-24 DJ Delorie <dj@redhat.com>
395
396 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
397 * rl78-decode.c: Regenerate.
398
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3992012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
400
401 PR binutils/10173
402 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
403
e143d25c
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4042012-01-17 Andreas Schwab <schwab@linux-m68k.org>
405
406 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
407 register and move them after pmove with PSR/PCSR register.
408
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4092012-01-13 H.J. Lu <hongjiu.lu@intel.com>
410
411 * i386-dis.c (mod_table): Add vmfunc.
412
413 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
414 (cpu_flags): CpuVMFUNC.
415
416 * i386-opc.h (CpuVMFUNC): New.
417 (i386_cpu_flags): Add cpuvmfunc.
418
419 * i386-opc.tbl: Add vmfunc.
420 * i386-init.h: Regenerated.
421 * i386-tbl.h: Likewise.
5011093d 422
23e1d329 423For older changes see ChangeLog-2011
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424\f
425Local Variables:
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426mode: change-log
427left-margin: 8
428fill-column: 74
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429version-control: never
430End:
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