Mark the linker's -Bsymbolic-functions test as an expected failure for MIPS targets.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog-2005
CommitLineData
e88d958a
AM
12005-12-27 Alan Modra <amodra@bigpond.net.au>
2
3 * Makefile.am: Run "make dep-am".
4 * Makefile.in: Regenerate.
5 * po/POTFILES.in: Regenerate.
6
72005-12-22 Laurent Menten <laurent.menten@teledisnet.be>
8
9 * pj-opc.c (jsr, ret, getstatic, putstatic, getfield, putfield,
10 invokevirtual, invokespecial, invokestatic, invokeinterface,
11 goto_w, jsr_w, ldc_quick, ldc_w_quick, ldc2_w_quick,
12 getfield_quick, putfield_quick, getfield2_quick, putfield2_quick,
13 getstatic_quick, putstatic_quick, getstatic2_quick,
14 putstatic2_quick, invokevirtual_quick, invokenonvirtual_quick,
15 invokesuper_quick, invokestatic_quick, invokeinterface_quick,
16 aastore_quick, new_quick, anewarray_quick, multianewarray_quick,
17 checkcast_quick, instanceof_quick, invokevirtiual_quick_w,
18 getfield_quick_w, putfield_quick_w, nonnull_quick,
19 agetfield_quick, aputfield_quick, agetstatic_quick,
20 aputstatic_quick, aldc_quick, aldc_w_quick, exit_sync_method): Fix
21 opcodes.
22
232005-12-16 Nathan Sidwell <nathan@codesourcery.com>
24
25 Second part of ms1 to mt renaming.
26 * Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
27 (stamp-mt): Adjust rule.
28 (mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
29 adjust.
30 * Makefile.in: Rebuilt.
31 * configure: Rebuilt.
32 * configure.in (bfd_mt_arch): Rename & adjust.
33 * disassemble.c (ARCH_mt): Renamed.
34 (disassembler): Adjust.
35 * mt-asm.c: Renamed, rebuilt.
36 * mt-desc.c: Renamed, rebuilt.
37 * mt-desc.h: Renamed, rebuilt.
38 * mt-dis.c: Renamed, rebuilt.
39 * mt-ibld.c: Renamed, rebuilt.
40 * mt-opc.c: Renamed, rebuilt.
41 * mt-opc.h: Renamed, rebuilt.
42
432005-12-13 DJ Delorie <dj@redhat.com>
44
45 * m32c-desc.c: Regenerate.
46 * m32c-opc.c: Regenerate.
47 * m32c-opc.h: Regenerate.
48
492005-12-12 Nathan Sidwell <nathan@codesourcery.com>
50
51 * Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1 with mt.
52 * Makefile.in: Rebuilt.
53 * configure.in: Replace ms1 files with mt files.
54 * configure: Rebuilt.
55
562005-12-08 Jan Beulich <jbeulich@novell.com>
57
58 * i386-dis.c (MAXLEN): Reduce to architectural limit.
59 (fetch_data): Check for sufficient buffer size.
60
612005-12-08 Jan Beulich <jbeulich@novell.com>
62
63 * i386-dis.c (OP_ST): Remove prefix in Intel mode.
64
652005-12-08 Daniel Jacobowitz <dan@codesourcery.com>
66
67 * i386-dis.c (dofloat): Handle %rip-relative floating point addressing.
68
692005-12-07 Hans-Peter Nilsson <hp@axis.com>
70
71 * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using
72 MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
73
742005-12-06 H.J. Lu <hongjiu.lu@intel.com>
75
76 PR gas/1874
77 * i386-dis.c (address_mode): New enum type.
78 (address_mode): New variable.
79 (mode_64bit): Removed.
80 (ckprefix): Updated to check address_mode instead of mode_64bit.
81 (prefix_name): Likewise.
82 (print_insn): Likewise.
83 (putop): Likewise.
84 (print_operand_value): Likewise.
85 (intel_operand_size): Likewise.
86 (OP_E): Likewise.
87 (OP_G): Likewise.
88 (set_op): Likewise.
89 (OP_REG): Likewise.
90 (OP_I): Likewise.
91 (OP_I64): Likewise.
92 (OP_OFF): Likewise.
93 (OP_OFF64): Likewise.
94 (ptr_reg): Likewise.
95 (OP_C): Likewise.
96 (SVME_Fixup): Likewise.
97 (print_insn): Set address_mode.
98 (PNI_Fixup): Add 64bit and address size override support for
99 monitor and mwait.
100
1012005-12-06 Hans-Peter Nilsson <hp@axis.com>
102
103 * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
104 (print_with_operands): Check for prefix when [PC+] is seen.
105
1062005-12-02 Dave Brolley <brolley@redhat.com>
107
108 * configure.in (cgen_files): Add cgen-bitset.lo.
109 (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
110 * Makefile.am (CFILES): Add cgen-bitset.c.
111 (ALL_MACHINES): Add cgen-bitset.lo.
112 (cgen-bitset.lo): New target.
113 * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
114 (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
115 (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
116 (cgen_bitset_union): Moved from here ...
117 * cgen-bitset.c: ... to here. New file.
118 * Makefile.in: Regenerated.
119 * configure: Regenerated.
120
1212005-11-22 James E Wilson <wilson@specifix.com>
122
123 * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
124 opcode_fprintf_vma): New.
125 (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
126
1272005-11-16 Alan Modra <amodra@bigpond.net.au>
128
129 * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct
130 frsqrtes.
131
1322005-11-14 David Ung <davidu@mips.com>
133
134 * mips16-opc.c: Add MIPS16e save/restore opcodes.
135 * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
136 codes for save/restore.
137
1382005-11-10 Andreas Schwab <schwab@suse.de>
139
140 * m68k-dis.c (print_insn_m68k): Only match FPU insns with
141 coprocessor ID 1.
142
1432005-11-08 H.J. Lu <hongjiu.lu@intel.com>
144
145 * m32c-desc.c: Regenerated.
146
1472005-11-08 Nathan Sidwell <nathan@codesourcery.com>
148
149 Add ms2.
150 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
151 ms1-opc.c, ms1-opc.h: Regenerated.
152
1532005-11-07 Steve Ellcey <sje@cup.hp.com>
154
155 * configure: Regenerate after modifying bfd/warning.m4.
156
1572005-11-07 Alan Modra <amodra@bigpond.net.au>
158
159 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
160 ignored rex prefixes here.
161 (print_insn): Instead, handle them similarly to fwait followed
162 by non-fp insns.
163
1642005-11-02 H.J. Lu <hongjiu.lu@intel.com>
165
166 * iq2000-desc.c: Regenerated.
167 * iq2000-desc.h: Likewise.
168 * iq2000-dis.c: Likewise.
169 * iq2000-opc.c: Likewise.
170
1712005-11-02 Paul Brook <paul@codesourcery.com>
172
173 * arm-dis.c (print_insn_thumb32): Word align blx target address.
174
1752005-10-31 Alan Modra <amodra@bigpond.net.au>
176
177 * arm-dis.c (print_insn): Warning fix.
178
1792005-10-30 H.J. Lu <hongjiu.lu@intel.com>
180
181 * Makefile.am: Run "make dep-am".
182 * Makefile.in: Regenerated.
183
184 * dep-in.sed: Replace " ./" with " ".
185
1862005-10-28 Dave Brolley <brolley@redhat.com>
187
188 * All CGEN-generated sources: Regenerate.
189
190 Contribute the following changes:
191 2005-09-19 Dave Brolley <brolley@redhat.com>
192
193 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
194 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
195 bfd_arch_m32c case.
196
197 2005-02-16 Dave Brolley <brolley@redhat.com>
198
199 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
200 cgen_isa_mask_* to cgen_bitset_*.
201 * cgen-opc.c: Likewise.
202
203 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
204
205 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
206 * *-dis.c: Regenerate.
207
208 2003-06-05 DJ Delorie <dj@redhat.com>
209
210 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
211 it, as it may point to a reused buffer. Set prev_isas when we
212 change cpus.
213
214 2002-12-13 Dave Brolley <brolley@redhat.com>
215
216 * cgen-opc.c (cgen_isa_mask_create): New support function for
217 CGEN_ISA_MASK.
218 (cgen_isa_mask_init): Ditto.
219 (cgen_isa_mask_clear): Ditto.
220 (cgen_isa_mask_add): Ditto.
221 (cgen_isa_mask_set): Ditto.
222 (cgen_isa_supported): Ditto.
223 (cgen_isa_mask_compare): Ditto.
224 (cgen_isa_mask_intersection): Ditto.
225 (cgen_isa_mask_copy): Ditto.
226 (cgen_isa_mask_combine): Ditto.
227 * cgen-dis.in (libiberty.h): #include it.
228 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
229 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
230 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
231 * Makefile.in: Regenerated.
232
2332005-10-27 DJ Delorie <dj@redhat.com>
234
235 * m32c-asm.c: Regenerate.
236 * m32c-desc.c: Regenerate.
237 * m32c-desc.h: Regenerate.
238 * m32c-dis.c: Regenerate.
239 * m32c-ibld.c: Regenerate.
240 * m32c-opc.c: Regenerate.
241 * m32c-opc.h: Regenerate.
242
2432005-10-26 DJ Delorie <dj@redhat.com>
244
245 * m32c-asm.c: Regenerate.
246 * m32c-desc.c: Regenerate.
247 * m32c-desc.h: Regenerate.
248 * m32c-dis.c: Regenerate.
249 * m32c-ibld.c: Regenerate.
250 * m32c-opc.c: Regenerate.
251 * m32c-opc.h: Regenerate.
252
2532005-10-26 Paul Brook <paul@codesourcery.com>
254
255 * arm-dis.c (arm_opcodes): Correct "sel" entry.
256
2572005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
258
259 * m32r-asm.c: Regenerate.
260
2612005-10-25 DJ Delorie <dj@redhat.com>
262
263 * m32c-asm.c: Regenerate.
264 * m32c-desc.c: Regenerate.
265 * m32c-desc.h: Regenerate.
266 * m32c-dis.c: Regenerate.
267 * m32c-ibld.c: Regenerate.
268 * m32c-opc.c: Regenerate.
269 * m32c-opc.h: Regenerate.
270
2712005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
272
273 * configure.in: Add target architecture bfd_arch_z80.
274 * configure: Regenerated.
275 * disassemble.c (disassembler)<ARCH_z80>: Add case
276 bfd_arch_z80.
277 * z80-dis.c: New file.
278
2792005-10-25 Alan Modra <amodra@bigpond.net.au>
280
281 * po/POTFILES.in: Regenerate.
282 * po/opcodes.pot: Regenerate.
283
2842005-10-24 Jan Beulich <jbeulich@novell.com>
285
286 * ia64-asmtab.c: Regenerate.
287
2882005-10-21 DJ Delorie <dj@redhat.com>
289
290 * m32c-asm.c: Regenerate.
291 * m32c-desc.c: Regenerate.
292 * m32c-desc.h: Regenerate.
293 * m32c-dis.c: Regenerate.
294 * m32c-ibld.c: Regenerate.
295 * m32c-opc.c: Regenerate.
296 * m32c-opc.h: Regenerate.
297
2982005-10-21 Nick Clifton <nickc@redhat.com>
299
300 * bfin-dis.c: Tidy up code, removing redundant constructs.
301
3022005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
303
304 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
305 instructions.
306
3072005-10-18 Nick Clifton <nickc@redhat.com>
308
309 * m32r-asm.c: Regenerate after updating m32r.opc.
310
3112005-10-18 Jie Zhang <jie.zhang@analog.com>
312
313 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
314 reading instruction from memory.
315
3162005-10-18 Nick Clifton <nickc@redhat.com>
317
318 * m32r-asm.c: Regenerate after updating m32r.opc.
319
3202005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
321
322 * m32r-asm.c: Regenerate after updating m32r.opc.
323
3242005-10-08 James Lemke <jim@wasabisystems.com>
325
326 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
327 operations.
328
3292005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
330
331 * ppc-dis.c (struct dis_private): Remove.
332 (powerpc_dialect): Avoid aliasing warnings.
333 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
334
3352005-09-30 Nick Clifton <nickc@redhat.com>
336
337 * po/ga.po: New Irish translation.
338 * configure.in (ALL_LINGUAS): Add "ga".
339 * configure: Regenerate.
340
3412005-09-30 H.J. Lu <hongjiu.lu@intel.com>
342
343 * Makefile.am: Run "make dep-am".
344 * Makefile.in: Regenerated.
345 * aclocal.m4: Likewise.
346 * configure: Likewise.
347
3482005-09-30 Catherine Moore <clm@cm00re.com>
349
350 * Makefile.am: Bfin support.
351 * Makefile.in: Regenerated.
352 * aclocal.m4: Regenerated.
353 * bfin-dis.c: New file.
354 * configure.in: Bfin support.
355 * configure: Regenerated.
356 * disassemble.c (ARCH_bfin): Define.
357 (disassembler): Add case for bfd_arch_bfin.
358
3592005-09-28 Jan Beulich <jbeulich@novell.com>
360
361 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
362 (indirEv): Use it.
363 (stackEv): New.
364 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
365 (dis386): Document and use new 'V' meta character. Use it for
366 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
367 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
368 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
369 data prefix as used whenever DFLAG was examined. Handle 'V'.
370 (intel_operand_size): Use stack_v_mode.
371 (OP_E): Use stack_v_mode, but handle only the special case of
372 64-bit mode without operand size override here; fall through to
373 v_mode case otherwise.
374 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
375 and no operand size override is present.
376 (OP_J): Use get32s for obtaining the displacement also when rex64
377 is present.
378
3792005-09-08 Paul Brook <paul@codesourcery.com>
380
381 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
382
3832005-09-06 Chao-ying Fu <fu@mips.com>
384
385 * mips-opc.c (MT32): New define.
386 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
387 bottom to avoid opcode collision with "mftr" and "mttr".
388 Add MT instructions.
389 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
390 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
391 formats.
392
3932005-09-02 Paul Brook <paul@codesourcery.com>
394
395 * arm-dis.c (coprocessor_opcodes): Add null terminator.
396
3972005-09-02 Paul Brook <paul@codesourcery.com>
398
399 * arm-dis.c (coprocessor_opcodes): New.
400 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
401 (print_insn_coprocessor): New function.
402 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
403 format characters.
404 (print_insn_thumb32): Use print_insn_coprocessor.
405
4062005-08-30 Paul Brook <paul@codesourcery.com>
407
408 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
409
4102005-08-26 Jan Beulich <jbeulich@novell.com>
411
412 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
413 re-use.
414 (OP_E): Call intel_operand_size, move call site out of mode
415 dependent code.
416 (OP_OFF): Call intel_operand_size if suffix_always. Remove
417 ATTRIBUTE_UNUSED from parameters.
418 (OP_OFF64): Likewise.
419 (OP_ESreg): Call intel_operand_size.
420 (OP_DSreg): Likewise.
421 (OP_DIR): Use colon rather than semicolon as separator of far
422 jump/call operands.
423
4242005-08-25 Chao-ying Fu <fu@mips.com>
425
426 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
427 (mips_builtin_opcodes): Add DSP instructions.
428 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
429 mips64, mips64r2.
430 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
431 operand formats.
432
4332005-08-23 David Ung <davidu@mips.com>
434
435 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
436 instructions to the table.
437
4382005-08-18 Alan Modra <amodra@bigpond.net.au>
439
440 * a29k-dis.c: Delete.
441 * Makefile.am: Remove a29k support.
442 * configure.in: Likewise.
443 * disassemble.c: Likewise.
444 * Makefile.in: Regenerate.
445 * configure: Regenerate.
446 * po/POTFILES.in: Regenerate.
447
4482005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
449
450 * ppc-dis.c (powerpc_dialect): Handle e300.
451 (print_ppc_disassembler_options): Likewise.
452 * ppc-opc.c (PPCE300): Define.
453 (powerpc_opcodes): Mark icbt as available for the e300.
454
4552005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
456
457 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
458 Use "rp" instead of "%r2" in "b,l" insns.
459
4602005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
461
462 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
463 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
464 (main): Likewise.
465 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
466 and 4 bit optional masks.
467 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
468 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
469 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
470 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
471 (s390_opformats): Likewise.
472 * s390-opc.txt: Add new instructions for cpu type z9-109.
473
4742005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
475
476 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
477
4782005-07-29 Paul Brook <paul@codesourcery.com>
479
480 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
481
4822005-07-29 Paul Brook <paul@codesourcery.com>
483
484 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
485 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
486
4872005-07-25 DJ Delorie <dj@redhat.com>
488
489 * m32c-asm.c Regenerate.
490 * m32c-dis.c Regenerate.
491
4922005-07-20 DJ Delorie <dj@redhat.com>
493
494 * disassemble.c (disassemble_init_for_target): M32C ISAs are
495 enums, so convert them to bit masks, which attributes are.
496
4972005-07-18 Nick Clifton <nickc@redhat.com>
498
499 * configure.in: Restore alpha ordering to list of arches.
500 * configure: Regenerate.
501 * disassemble.c: Restore alpha ordering to list of arches.
502
5032005-07-18 Nick Clifton <nickc@redhat.com>
504
505 * m32c-asm.c: Regenerate.
506 * m32c-desc.c: Regenerate.
507 * m32c-desc.h: Regenerate.
508 * m32c-dis.c: Regenerate.
509 * m32c-ibld.h: Regenerate.
510 * m32c-opc.c: Regenerate.
511 * m32c-opc.h: Regenerate.
512
5132005-07-18 H.J. Lu <hongjiu.lu@intel.com>
514
515 * i386-dis.c (PNI_Fixup): Update comment.
516 (VMX_Fixup): Properly handle the suffix check.
517
5182005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
519
520 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
521 mfctl disassembly.
522
5232005-07-16 Alan Modra <amodra@bigpond.net.au>
524
525 * Makefile.am: Run "make dep-am".
526 (stamp-m32c): Fix cpu dependencies.
527 * Makefile.in: Regenerate.
528 * ip2k-dis.c: Regenerate.
529
5302007-07-15 H.J. Lu <hongjiu.lu@intel.com>
531
532 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
533 (VMX_Fixup): New. Fix up Intel VMX Instructions.
534 (Em): New.
535 (Gm): New.
536 (VM): New.
537 (dis386_twobyte): Updated entries 0x78 and 0x79.
538 (twobyte_has_modrm): Likewise.
539 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
540 (OP_G): Handle m_mode.
541
5422005-07-14 Jim Blandy <jimb@redhat.com>
543
544 Add support for the Renesas M32C and M16C.
545 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
546 * m32c-desc.h, m32c-opc.h: New.
547 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
548 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
549 m32c-opc.c.
550 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
551 m32c-ibld.lo, m32c-opc.lo.
552 (CLEANFILES): List stamp-m32c.
553 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
554 (CGEN_CPUS): Add m32c.
555 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
556 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
557 (m32c_opc_h): New variable.
558 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
559 (m32c-opc.lo): New rules.
560 * Makefile.in: Regenerated.
561 * configure.in: Add case for bfd_m32c_arch.
562 * configure: Regenerated.
563 * disassemble.c (ARCH_m32c): New.
564 [ARCH_m32c]: #include "m32c-desc.h".
565 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
566 (disassemble_init_for_target) [ARCH_m32c]: Same.
567
568 * cgen-ops.h, cgen-types.h: New files.
569 * Makefile.am (HFILES): List them.
570 * Makefile.in: Regenerated.
571
5722005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
573
574 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
575 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
576 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
577 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
578 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
579 v850-dis.c: Fix format bugs.
580 * ia64-gen.c (fail, warn): Add format attribute.
581 * or32-opc.c (debug): Likewise.
582
5832005-07-07 Khem Raj <kraj@mvista.com>
584
585 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
586 disassembly pattern.
587
5882005-07-06 Alan Modra <amodra@bigpond.net.au>
589
590 * Makefile.am (stamp-m32r): Fix path to cpu files.
591 (stamp-m32r, stamp-iq2000): Likewise.
592 * Makefile.in: Regenerate.
593 * m32r-asm.c: Regenerate.
594 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
595 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
596
5972005-07-05 Nick Clifton <nickc@redhat.com>
598
599 * iq2000-asm.c: Regenerate.
600 * ms1-asm.c: Regenerate.
601
6022005-07-05 Jan Beulich <jbeulich@novell.com>
603
604 * i386-dis.c (SVME_Fixup): New.
605 (grps): Use it for the lidt entry.
606 (PNI_Fixup): Call OP_M rather than OP_E.
607 (INVLPG_Fixup): Likewise.
608
6092005-07-04 H.J. Lu <hongjiu.lu@intel.com>
610
611 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
612
6132005-07-01 Nick Clifton <nickc@redhat.com>
614
615 * a29k-dis.c: Update to ISO C90 style function declarations and
616 fix formatting.
617 * alpha-opc.c: Likewise.
618 * arc-dis.c: Likewise.
619 * arc-opc.c: Likewise.
620 * avr-dis.c: Likewise.
621 * cgen-asm.in: Likewise.
622 * cgen-dis.in: Likewise.
623 * cgen-ibld.in: Likewise.
624 * cgen-opc.c: Likewise.
625 * cris-dis.c: Likewise.
626 * d10v-dis.c: Likewise.
627 * d30v-dis.c: Likewise.
628 * d30v-opc.c: Likewise.
629 * dis-buf.c: Likewise.
630 * dlx-dis.c: Likewise.
631 * h8300-dis.c: Likewise.
632 * h8500-dis.c: Likewise.
633 * hppa-dis.c: Likewise.
634 * i370-dis.c: Likewise.
635 * i370-opc.c: Likewise.
636 * m10200-dis.c: Likewise.
637 * m10300-dis.c: Likewise.
638 * m68k-dis.c: Likewise.
639 * m88k-dis.c: Likewise.
640 * mips-dis.c: Likewise.
641 * mmix-dis.c: Likewise.
642 * msp430-dis.c: Likewise.
643 * ns32k-dis.c: Likewise.
644 * or32-dis.c: Likewise.
645 * or32-opc.c: Likewise.
646 * pdp11-dis.c: Likewise.
647 * pj-dis.c: Likewise.
648 * s390-dis.c: Likewise.
649 * sh-dis.c: Likewise.
650 * sh64-dis.c: Likewise.
651 * sparc-dis.c: Likewise.
652 * sparc-opc.c: Likewise.
653 * sysdep.h: Likewise.
654 * tic30-dis.c: Likewise.
655 * tic4x-dis.c: Likewise.
656 * tic80-dis.c: Likewise.
657 * v850-dis.c: Likewise.
658 * v850-opc.c: Likewise.
659 * vax-dis.c: Likewise.
660 * w65-dis.c: Likewise.
661 * z8kgen.c: Likewise.
662
663 * fr30-*: Regenerate.
664 * frv-*: Regenerate.
665 * ip2k-*: Regenerate.
666 * iq2000-*: Regenerate.
667 * m32r-*: Regenerate.
668 * ms1-*: Regenerate.
669 * openrisc-*: Regenerate.
670 * xstormy16-*: Regenerate.
671
6722005-06-23 Ben Elliston <bje@gnu.org>
673
674 * m68k-dis.c: Use ISC C90.
675 * m68k-opc.c: Formatting fixes.
676
6772005-06-16 David Ung <davidu@mips.com>
678
679 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
680 instructions to the table; seb/seh/sew/zeb/zeh/zew.
681
6822005-06-15 Dave Brolley <brolley@redhat.com>
683
684 Contribute Morpho ms1 on behalf of Red Hat
685 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
686 ms1-opc.h: New files, Morpho ms1 target.
687
688 2004-05-14 Stan Cox <scox@redhat.com>
689
690 * disassemble.c (ARCH_ms1): Define.
691 (disassembler): Handle bfd_arch_ms1
692
693 2004-05-13 Michael Snyder <msnyder@redhat.com>
694
695 * Makefile.am, Makefile.in: Add ms1 target.
696 * configure.in: Ditto.
697
6982005-06-08 Zack Weinberg <zack@codesourcery.com>
699
700 * arm-opc.h: Delete; fold contents into ...
701 * arm-dis.c: ... here. Move includes of internal COFF headers
702 next to includes of internal ELF headers.
703 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
704 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
705 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
706 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
707 (iwmmxt_wwnames, iwmmxt_wwssnames):
708 Make const.
709 (regnames): Remove iWMMXt coprocessor register sets.
710 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
711 (get_arm_regnames): Adjust fourth argument to match above changes.
712 (set_iwmmxt_regnames): Delete.
713 (print_insn_arm): Constify 'c'. Use ISO syntax for function
714 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
715 and iwmmxt_cregnames, not set_iwmmxt_regnames.
716 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
717 ISO syntax for function pointer calls.
718
7192005-06-07 Zack Weinberg <zack@codesourcery.com>
720
721 * arm-dis.c: Split up the comments describing the format codes, so
722 that the ARM and 16-bit Thumb opcode tables each have comments
723 preceding them that describe all the codes, and only the codes,
724 valid in those tables. (32-bit Thumb table is already like this.)
725 Reorder the lists in all three comments to match the order in
726 which the codes are implemented.
727 Remove all forward declarations of static functions. Convert all
728 function definitions to ISO C format.
729 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
730 Return nothing.
731 (print_insn_thumb16): Remove unused case 'I'.
732 (print_insn): Update for changed calling convention of subroutines.
733
7342005-05-25 Jan Beulich <jbeulich@novell.com>
735
736 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
737 hex (but retain it being displayed as signed). Remove redundant
738 checks. Add handling of displacements for 16-bit addressing in Intel
739 mode.
740
7412005-05-25 Jan Beulich <jbeulich@novell.com>
742
743 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
744 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
745 masking of 'rm' in 16-bit memory address handling.
746
7472005-05-19 Anton Blanchard <anton@samba.org>
748
749 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
750 (print_ppc_disassembler_options): Document it.
751 * ppc-opc.c (SVC_LEV): Define.
752 (LEV): Allow optional operand.
753 (POWER5): Define.
754 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
755 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
756
7572005-05-19 Kelley Cook <kcook@gcc.gnu.org>
758
759 * Makefile.in: Regenerate.
760
7612005-05-17 Zack Weinberg <zack@codesourcery.com>
762
763 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
764 instructions. Adjust disassembly of some opcodes to match
765 unified syntax.
766 (thumb32_opcodes): New table.
767 (print_insn_thumb): Rename print_insn_thumb16; don't handle
768 two-halfword branches here.
769 (print_insn_thumb32): New function.
770 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
771 and print_insn_thumb32. Be consistent about order of
772 halfwords when printing 32-bit instructions.
773
7742005-05-07 H.J. Lu <hongjiu.lu@intel.com>
775
776 PR 843
777 * i386-dis.c (branch_v_mode): New.
778 (indirEv): Use branch_v_mode instead of v_mode.
779 (OP_E): Handle branch_v_mode.
780
7812005-05-07 H.J. Lu <hongjiu.lu@intel.com>
782
783 * d10v-dis.c (dis_2_short): Support 64bit host.
784
7852005-05-07 Nick Clifton <nickc@redhat.com>
786
787 * po/nl.po: Updated translation.
788
7892005-05-07 Nick Clifton <nickc@redhat.com>
790
791 * Update the address and phone number of the FSF organization in
792 the GPL notices in the following files:
793 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
794 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
795 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
796 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
797 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
798 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
799 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
800 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
801 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
802 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
803 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
804 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
805 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
806 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
807 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
808 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
809 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
810 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
811 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
812 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
813 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
814 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
815 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
816 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
817 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
818 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
819 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
820 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
821 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
822 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
823 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
824 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
825 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
826
8272005-05-05 James E Wilson <wilson@specifixinc.com>
828
829 * ia64-opc.c: Include sysdep.h before libiberty.h.
830
8312005-05-05 Nick Clifton <nickc@redhat.com>
832
833 * configure.in (ALL_LINGUAS): Add vi.
834 * configure: Regenerate.
835 * po/vi.po: New.
836
8372005-04-26 Jerome Guitton <guitton@gnat.com>
838
839 * configure.in: Fix the check for basename declaration.
840 * configure: Regenerate.
841
8422005-04-19 Alan Modra <amodra@bigpond.net.au>
843
844 * ppc-opc.c (RTO): Define.
845 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
846 entries to suit PPC440.
847
8482005-04-18 Mark Kettenis <kettenis@gnu.org>
849
850 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
851 Add xcrypt-ctr.
852
8532005-04-14 Nick Clifton <nickc@redhat.com>
854
855 * po/fi.po: New translation: Finnish.
856 * configure.in (ALL_LINGUAS): Add fi.
857 * configure: Regenerate.
858
8592005-04-14 Alan Modra <amodra@bigpond.net.au>
860
861 * Makefile.am (NO_WERROR): Define.
862 * configure.in: Invoke AM_BINUTILS_WARNINGS.
863 * Makefile.in: Regenerate.
864 * aclocal.m4: Regenerate.
865 * configure: Regenerate.
866
8672005-04-04 Nick Clifton <nickc@redhat.com>
868
869 * fr30-asm.c: Regenerate.
870 * frv-asm.c: Regenerate.
871 * iq2000-asm.c: Regenerate.
872 * m32r-asm.c: Regenerate.
873 * openrisc-asm.c: Regenerate.
874
8752005-04-01 Jan Beulich <jbeulich@novell.com>
876
877 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
878 visible operands in Intel mode. The first operand of monitor is
879 %rax in 64-bit mode.
880
8812005-04-01 Jan Beulich <jbeulich@novell.com>
882
883 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
884 easier future additions.
885
8862005-03-31 Jerome Guitton <guitton@gnat.com>
887
888 * configure.in: Check for basename.
889 * configure: Regenerate.
890 * config.in: Ditto.
891
8922005-03-29 H.J. Lu <hongjiu.lu@intel.com>
893
894 * i386-dis.c (SEG_Fixup): New.
895 (Sv): New.
896 (dis386): Use "Sv" for 0x8c and 0x8e.
897
8982005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
899 Nick Clifton <nickc@redhat.com>
900
901 * vax-dis.c: (entry_addr): New varible: An array of user supplied
902 function entry mask addresses.
903 (entry_addr_occupied_slots): New variable: The number of occupied
904 elements in entry_addr.
905 (entry_addr_total_slots): New variable: The total number of
906 elements in entry_addr.
907 (parse_disassembler_options): New function. Fills in the entry_addr
908 array.
909 (free_entry_array): New function. Release the memory used by the
910 entry addr array. Suppressed because there is no way to call it.
911 (is_function_entry): Check if a given address is a function's
912 start address by looking at supplied entry mask addresses and
913 symbol information, if available.
914 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
915
9162005-03-23 H.J. Lu <hongjiu.lu@intel.com>
917
918 * cris-dis.c (print_with_operands): Use ~31L for long instead
919 of ~31.
920
9212005-03-20 H.J. Lu <hongjiu.lu@intel.com>
922
923 * mmix-opc.c (O): Revert the last change.
924 (Z): Likewise.
925
9262005-03-19 H.J. Lu <hongjiu.lu@intel.com>
927
928 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
929 (Z): Likewise.
930
9312005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
932
933 * mmix-opc.c (O, Z): Force expression as unsigned long.
934
9352005-03-18 Nick Clifton <nickc@redhat.com>
936
937 * ip2k-asm.c: Regenerate.
938 * op/opcodes.pot: Regenerate.
939
9402005-03-16 Nick Clifton <nickc@redhat.com>
941 Ben Elliston <bje@au.ibm.com>
942
943 * configure.in (werror): New switch: Add -Werror to the
944 compiler command line. Enabled by default. Disable via
945 --disable-werror.
946 * configure: Regenerate.
947
9482005-03-16 Alan Modra <amodra@bigpond.net.au>
949
950 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
951 BOOKE.
952
9532005-03-15 Alan Modra <amodra@bigpond.net.au>
954
955 * po/es.po: Commit new Spanish translation.
956
957 * po/fr.po: Commit new French translation.
958
9592005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
960
961 * vax-dis.c: Fix spelling error
962 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
963 of just "Entry mask: < r1 ... >"
964
9652005-03-12 Zack Weinberg <zack@codesourcery.com>
966
967 * arm-dis.c (arm_opcodes): Document %E and %V.
968 Add entries for v6T2 ARM instructions:
969 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
970 (print_insn_arm): Add support for %E and %V.
971 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
972
9732005-03-10 Jeff Baker <jbaker@qnx.com>
974 Alan Modra <amodra@bigpond.net.au>
975
976 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
977 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
978 (SPRG_MASK): Delete.
979 (XSPRG_MASK): Mask off extra bits now part of sprg field.
980 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
981 mfsprg4..7 after msprg and consolidate.
982
9832005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
984
985 * vax-dis.c (entry_mask_bit): New array.
986 (print_insn_vax): Decode function entry mask.
987
9882005-03-07 Aldy Hernandez <aldyh@redhat.com>
989
990 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
991
9922005-03-05 Alan Modra <amodra@bigpond.net.au>
993
994 * po/opcodes.pot: Regenerate.
995
9962005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
997
998 * arc-dis.c (a4_decoding_class): New enum.
999 (dsmOneArcInst): Use the enum values for the decoding class.
1000 Remove redundant case in the switch for decodingClass value 11.
1001
10022005-03-02 Jan Beulich <jbeulich@novell.com>
1003
1004 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
1005 accesses.
1006 (OP_C): Consider lock prefix in non-64-bit modes.
1007
10082005-02-24 Alan Modra <amodra@bigpond.net.au>
1009
1010 * cris-dis.c (format_hex): Remove ineffective warning fix.
1011 * crx-dis.c (make_instruction): Warning fix.
1012 * frv-asm.c: Regenerate.
1013
10142005-02-23 Nick Clifton <nickc@redhat.com>
1015
1016 * cgen-dis.in: Use bfd_byte for buffers that are passed to
1017 read_memory.
1018
1019 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
1020
1021 * crx-dis.c (make_instruction): Move argument structure into inner
1022 scope and ensure that all of its fields are initialised before
1023 they are used.
1024
1025 * fr30-asm.c: Regenerate.
1026 * fr30-dis.c: Regenerate.
1027 * frv-asm.c: Regenerate.
1028 * frv-dis.c: Regenerate.
1029 * ip2k-asm.c: Regenerate.
1030 * ip2k-dis.c: Regenerate.
1031 * iq2000-asm.c: Regenerate.
1032 * iq2000-dis.c: Regenerate.
1033 * m32r-asm.c: Regenerate.
1034 * m32r-dis.c: Regenerate.
1035 * openrisc-asm.c: Regenerate.
1036 * openrisc-dis.c: Regenerate.
1037 * xstormy16-asm.c: Regenerate.
1038 * xstormy16-dis.c: Regenerate.
1039
10402005-02-22 Alan Modra <amodra@bigpond.net.au>
1041
1042 * arc-ext.c: Warning fixes.
1043 * arc-ext.h: Likewise.
1044 * cgen-opc.c: Likewise.
1045 * ia64-gen.c: Likewise.
1046 * maxq-dis.c: Likewise.
1047 * ns32k-dis.c: Likewise.
1048 * w65-dis.c: Likewise.
1049 * ia64-asmtab.c: Regenerate.
1050
10512005-02-22 Alan Modra <amodra@bigpond.net.au>
1052
1053 * fr30-desc.c: Regenerate.
1054 * fr30-desc.h: Regenerate.
1055 * fr30-opc.c: Regenerate.
1056 * fr30-opc.h: Regenerate.
1057 * frv-desc.c: Regenerate.
1058 * frv-desc.h: Regenerate.
1059 * frv-opc.c: Regenerate.
1060 * frv-opc.h: Regenerate.
1061 * ip2k-desc.c: Regenerate.
1062 * ip2k-desc.h: Regenerate.
1063 * ip2k-opc.c: Regenerate.
1064 * ip2k-opc.h: Regenerate.
1065 * iq2000-desc.c: Regenerate.
1066 * iq2000-desc.h: Regenerate.
1067 * iq2000-opc.c: Regenerate.
1068 * iq2000-opc.h: Regenerate.
1069 * m32r-desc.c: Regenerate.
1070 * m32r-desc.h: Regenerate.
1071 * m32r-opc.c: Regenerate.
1072 * m32r-opc.h: Regenerate.
1073 * m32r-opinst.c: Regenerate.
1074 * openrisc-desc.c: Regenerate.
1075 * openrisc-desc.h: Regenerate.
1076 * openrisc-opc.c: Regenerate.
1077 * openrisc-opc.h: Regenerate.
1078 * xstormy16-desc.c: Regenerate.
1079 * xstormy16-desc.h: Regenerate.
1080 * xstormy16-opc.c: Regenerate.
1081 * xstormy16-opc.h: Regenerate.
1082
10832005-02-21 Alan Modra <amodra@bigpond.net.au>
1084
1085 * Makefile.am: Run "make dep-am"
1086 * Makefile.in: Regenerate.
1087
10882005-02-15 Nick Clifton <nickc@redhat.com>
1089
1090 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
1091 compile time warnings.
1092 (print_keyword): Likewise.
1093 (default_print_insn): Likewise.
1094
1095 * fr30-desc.c: Regenerated.
1096 * fr30-desc.h: Regenerated.
1097 * fr30-dis.c: Regenerated.
1098 * fr30-opc.c: Regenerated.
1099 * fr30-opc.h: Regenerated.
1100 * frv-desc.c: Regenerated.
1101 * frv-dis.c: Regenerated.
1102 * frv-opc.c: Regenerated.
1103 * ip2k-asm.c: Regenerated.
1104 * ip2k-desc.c: Regenerated.
1105 * ip2k-desc.h: Regenerated.
1106 * ip2k-dis.c: Regenerated.
1107 * ip2k-opc.c: Regenerated.
1108 * ip2k-opc.h: Regenerated.
1109 * iq2000-desc.c: Regenerated.
1110 * iq2000-dis.c: Regenerated.
1111 * iq2000-opc.c: Regenerated.
1112 * m32r-asm.c: Regenerated.
1113 * m32r-desc.c: Regenerated.
1114 * m32r-desc.h: Regenerated.
1115 * m32r-dis.c: Regenerated.
1116 * m32r-opc.c: Regenerated.
1117 * m32r-opc.h: Regenerated.
1118 * m32r-opinst.c: Regenerated.
1119 * openrisc-desc.c: Regenerated.
1120 * openrisc-desc.h: Regenerated.
1121 * openrisc-dis.c: Regenerated.
1122 * openrisc-opc.c: Regenerated.
1123 * openrisc-opc.h: Regenerated.
1124 * xstormy16-desc.c: Regenerated.
1125 * xstormy16-desc.h: Regenerated.
1126 * xstormy16-dis.c: Regenerated.
1127 * xstormy16-opc.c: Regenerated.
1128 * xstormy16-opc.h: Regenerated.
1129
11302005-02-14 H.J. Lu <hongjiu.lu@intel.com>
1131
1132 * dis-buf.c (perror_memory): Use sprintf_vma to print out
1133 address.
1134
11352005-02-11 Nick Clifton <nickc@redhat.com>
1136
1137 * iq2000-asm.c: Regenerate.
1138
1139 * frv-dis.c: Regenerate.
1140
11412005-02-07 Jim Blandy <jimb@redhat.com>
1142
1143 * Makefile.am (CGEN): Load guile.scm before calling the main
1144 application script.
1145 * Makefile.in: Regenerated.
1146 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1147 Simply pass the cgen-opc.scm path to ${cgen} as its first
1148 argument; ${cgen} itself now contains the '-s', or whatever is
1149 appropriate for the Scheme being used.
1150
11512005-01-31 Andrew Cagney <cagney@gnu.org>
1152
1153 * configure: Regenerate to track ../gettext.m4.
1154
11552005-01-31 Jan Beulich <jbeulich@novell.com>
1156
1157 * ia64-gen.c (NELEMS): Define.
1158 (shrink): Generate alias with missing second predicate register when
1159 opcode has two outputs and these are both predicates.
1160 * ia64-opc-i.c (FULL17): Define.
1161 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1162 here to generate output template.
1163 (TBITCM, TNATCM): Undefine after use.
1164 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1165 first input. Add ld16 aliases without ar.csd as second output. Add
1166 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1167 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1168 ar.ccv as third/fourth inputs. Consolidate through...
1169 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1170 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1171 * ia64-asmtab.c: Regenerate.
1172
11732005-01-27 Andrew Cagney <cagney@gnu.org>
1174
1175 * configure: Regenerate to track ../gettext.m4 change.
1176
11772005-01-25 Alexandre Oliva <aoliva@redhat.com>
1178
1179 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1180 * frv-asm.c: Rebuilt.
1181 * frv-desc.c: Rebuilt.
1182 * frv-desc.h: Rebuilt.
1183 * frv-dis.c: Rebuilt.
1184 * frv-ibld.c: Rebuilt.
1185 * frv-opc.c: Rebuilt.
1186 * frv-opc.h: Rebuilt.
1187
11882005-01-24 Andrew Cagney <cagney@gnu.org>
1189
1190 * configure: Regenerate, ../gettext.m4 was updated.
1191
11922005-01-21 Fred Fish <fnf@specifixinc.com>
1193
1194 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1195 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1196 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1197 * mips-dis.c: Ditto.
1198
11992005-01-20 Alan Modra <amodra@bigpond.net.au>
1200
1201 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1202
12032005-01-19 Fred Fish <fnf@specifixinc.com>
1204
1205 * mips-dis.c (no_aliases): New disassembly option flag.
1206 (set_default_mips_dis_options): Init no_aliases to zero.
1207 (parse_mips_dis_option): Handle no-aliases option.
1208 (print_insn_mips): Ignore table entries that are aliases
1209 if no_aliases is set.
1210 (print_insn_mips16): Ditto.
1211 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1212 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1213 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1214 * mips16-opc.c (mips16_opcodes): Ditto.
1215
12162005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1217
1218 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1219 (inheritance diagram): Add missing edge.
1220 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1221 easier for the testsuite.
1222 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1223 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1224 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1225 arch_sh2a_or_sh4_up child.
1226 (sh_table): Do renaming as above.
1227 Correct comment for ldc.l for gas testsuite to read.
1228 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1229 Correct comments for movy.w and movy.l for gas testsuite to read.
1230 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1231
12322005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1233
1234 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1235
12362005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1237
1238 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1239
12402005-01-10 Andreas Schwab <schwab@suse.de>
1241
1242 * disassemble.c (disassemble_init_for_target) <case
1243 bfd_arch_ia64>: Set skip_zeroes to 16.
1244 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1245
1246For older changes see ChangeLog-2004
1247\f
752937aa
NC
1248Copyright (C) 2005 Free Software Foundation, Inc.
1249
1250Copying and distribution of this file, with or without modification,
1251are permitted in any medium without royalty provided the copyright
1252notice and this notice are preserved.
1253
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1254Local Variables:
1255mode: change-log
1256left-margin: 8
1257fill-column: 74
1258version-control: never
1259End:
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