Fix problems with finishing a dummy function call on simulators.
[deliverable/binutils-gdb.git] / opcodes / aarch64-asm-2.c
CommitLineData
a06ea964 1/* This file is automatically generated by aarch64-gen. Do not edit! */
b90efa5b 2/* Copyright (C) 2012-2015 Free Software Foundation, Inc.
a06ea964
NC
3 Contributed by ARM Ltd.
4
5 This file is part of the GNU opcodes library.
6
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
11
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; see the file COPYING3. If not,
19 see <http://www.gnu.org/licenses/>. */
20
21#include "sysdep.h"
22#include "aarch64-asm.h"
23
24
25const aarch64_opcode *
26aarch64_find_real_opcode (const aarch64_opcode *opcode)
27{
28 /* Use the index as the key to locate the real opcode. */
29 int key = opcode - aarch64_opcode_table;
30 int value;
31 switch (key)
32 {
33 case 3: /* ngc */
34 value = 2; /* --> sbc. */
35 break;
36 case 5: /* ngcs */
37 value = 4; /* --> sbcs. */
38 break;
39 case 8: /* cmn */
40 value = 7; /* --> adds. */
41 break;
42 case 11: /* cmp */
43 value = 10; /* --> subs. */
44 break;
45 case 13: /* mov */
46 value = 12; /* --> add. */
47 break;
48 case 15: /* cmn */
49 value = 14; /* --> adds. */
50 break;
51 case 18: /* cmp */
52 value = 17; /* --> subs. */
53 break;
54 case 21: /* cmn */
55 value = 20; /* --> adds. */
56 break;
57 case 23: /* neg */
58 value = 22; /* --> sub. */
59 break;
60 case 26: /* negs */
61 case 25: /* cmp */
62 value = 24; /* --> subs. */
63 break;
a06ea964 64 case 141: /* mov */
9e1f0fa7 65 value = 140; /* --> umov. */
a06ea964
NC
66 break;
67 case 143: /* mov */
68 value = 142; /* --> ins. */
69 break;
9e1f0fa7
MW
70 case 145: /* mov */
71 value = 144; /* --> ins. */
72 break;
73 case 206: /* mvn */
74 value = 205; /* --> not. */
a06ea964 75 break;
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76 case 261: /* mov */
77 value = 260; /* --> orr. */
a06ea964 78 break;
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79 case 318: /* sxtl */
80 value = 317; /* --> sshll. */
a06ea964 81 break;
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82 case 320: /* sxtl2 */
83 value = 319; /* --> sshll2. */
a06ea964 84 break;
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85 case 340: /* uxtl */
86 value = 339; /* --> ushll. */
a06ea964 87 break;
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88 case 342: /* uxtl2 */
89 value = 341; /* --> ushll2. */
a06ea964 90 break;
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91 case 437: /* mov */
92 value = 436; /* --> dup. */
a06ea964 93 break;
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94 case 506: /* sxtw */
95 case 505: /* sxth */
96 case 504: /* sxtb */
97 case 507: /* asr */
98 case 503: /* sbfx */
99 case 502: /* sbfiz */
100 value = 501; /* --> sbfm. */
a06ea964 101 break;
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102 case 510: /* bfxil */
103 case 509: /* bfi */
104 value = 508; /* --> bfm. */
a06ea964 105 break;
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106 case 515: /* uxth */
107 case 514: /* uxtb */
108 case 517: /* lsr */
109 case 516: /* lsl */
110 case 513: /* ubfx */
111 case 512: /* ubfiz */
112 value = 511; /* --> ubfm. */
a06ea964 113 break;
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114 case 535: /* cset */
115 case 534: /* cinc */
116 value = 533; /* --> csinc. */
a06ea964 117 break;
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118 case 538: /* csetm */
119 case 537: /* cinv */
120 value = 536; /* --> csinv. */
a06ea964 121 break;
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122 case 540: /* cneg */
123 value = 539; /* --> csneg. */
a06ea964 124 break;
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125 case 565: /* lsl */
126 value = 564; /* --> lslv. */
a06ea964 127 break;
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128 case 567: /* lsr */
129 value = 566; /* --> lsrv. */
a06ea964 130 break;
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131 case 569: /* asr */
132 value = 568; /* --> asrv. */
a06ea964 133 break;
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134 case 571: /* ror */
135 value = 570; /* --> rorv. */
a06ea964 136 break;
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137 case 581: /* mul */
138 value = 580; /* --> madd. */
a06ea964 139 break;
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140 case 583: /* mneg */
141 value = 582; /* --> msub. */
a06ea964 142 break;
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143 case 585: /* smull */
144 value = 584; /* --> smaddl. */
a06ea964 145 break;
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146 case 587: /* smnegl */
147 value = 586; /* --> smsubl. */
a06ea964 148 break;
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149 case 590: /* umull */
150 value = 589; /* --> umaddl. */
a06ea964 151 break;
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152 case 592: /* umnegl */
153 value = 591; /* --> umsubl. */
a06ea964 154 break;
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155 case 603: /* ror */
156 value = 602; /* --> extr. */
a06ea964 157 break;
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158 case 760: /* bic */
159 value = 759; /* --> and. */
a06ea964 160 break;
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161 case 762: /* mov */
162 value = 761; /* --> orr. */
a06ea964 163 break;
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164 case 765: /* tst */
165 value = 764; /* --> ands. */
a06ea964 166 break;
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167 case 770: /* uxtw */
168 case 769: /* mov */
169 value = 768; /* --> orr. */
a06ea964 170 break;
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171 case 772: /* mvn */
172 value = 771; /* --> orn. */
a06ea964 173 break;
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174 case 776: /* tst */
175 value = 775; /* --> ands. */
a06ea964 176 break;
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177 case 902: /* staddb */
178 value = 806; /* --> ldaddb. */
a06ea964 179 break;
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180 case 903: /* staddh */
181 value = 807; /* --> ldaddh. */
a06ea964 182 break;
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183 case 904: /* stadd */
184 value = 808; /* --> ldadd. */
a06ea964 185 break;
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186 case 905: /* staddlb */
187 value = 810; /* --> ldaddlb. */
a06ea964 188 break;
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189 case 906: /* staddlh */
190 value = 813; /* --> ldaddlh. */
a06ea964 191 break;
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192 case 907: /* staddl */
193 value = 816; /* --> ldaddl. */
a06ea964 194 break;
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195 case 908: /* stclrb */
196 value = 818; /* --> ldclrb. */
a06ea964 197 break;
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198 case 909: /* stclrh */
199 value = 819; /* --> ldclrh. */
a06ea964 200 break;
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201 case 910: /* stclr */
202 value = 820; /* --> ldclr. */
a06ea964 203 break;
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204 case 911: /* stclrlb */
205 value = 822; /* --> ldclrlb. */
a06ea964 206 break;
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207 case 912: /* stclrlh */
208 value = 825; /* --> ldclrlh. */
a06ea964 209 break;
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210 case 913: /* stclrl */
211 value = 828; /* --> ldclrl. */
e30181a5 212 break;
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213 case 914: /* steorb */
214 value = 830; /* --> ldeorb. */
ee804238 215 break;
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216 case 915: /* steorh */
217 value = 831; /* --> ldeorh. */
ee804238 218 break;
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219 case 916: /* steor */
220 value = 832; /* --> ldeor. */
ee804238 221 break;
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222 case 917: /* steorlb */
223 value = 834; /* --> ldeorlb. */
ee804238 224 break;
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225 case 918: /* steorlh */
226 value = 837; /* --> ldeorlh. */
ee804238 227 break;
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228 case 919: /* steorl */
229 value = 840; /* --> ldeorl. */
ee804238 230 break;
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231 case 920: /* stsetb */
232 value = 842; /* --> ldsetb. */
ee804238 233 break;
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234 case 921: /* stseth */
235 value = 843; /* --> ldseth. */
ee804238 236 break;
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237 case 922: /* stset */
238 value = 844; /* --> ldset. */
ee804238 239 break;
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240 case 923: /* stsetlb */
241 value = 846; /* --> ldsetlb. */
ee804238 242 break;
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243 case 924: /* stsetlh */
244 value = 849; /* --> ldsetlh. */
ee804238 245 break;
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246 case 925: /* stsetl */
247 value = 852; /* --> ldsetl. */
ee804238 248 break;
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249 case 926: /* stsmaxb */
250 value = 854; /* --> ldsmaxb. */
ee804238 251 break;
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252 case 927: /* stsmaxh */
253 value = 855; /* --> ldsmaxh. */
ee804238 254 break;
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255 case 928: /* stsmax */
256 value = 856; /* --> ldsmax. */
ee804238 257 break;
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258 case 929: /* stsmaxlb */
259 value = 858; /* --> ldsmaxlb. */
ee804238 260 break;
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261 case 930: /* stsmaxlh */
262 value = 861; /* --> ldsmaxlh. */
ee804238 263 break;
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264 case 931: /* stsmaxl */
265 value = 864; /* --> ldsmaxl. */
ee804238 266 break;
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267 case 932: /* stsminb */
268 value = 866; /* --> ldsminb. */
ee804238 269 break;
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270 case 933: /* stsminh */
271 value = 867; /* --> ldsminh. */
ee804238 272 break;
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273 case 934: /* stsmin */
274 value = 868; /* --> ldsmin. */
ee804238 275 break;
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276 case 935: /* stsminlb */
277 value = 870; /* --> ldsminlb. */
ee804238 278 break;
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279 case 936: /* stsminlh */
280 value = 873; /* --> ldsminlh. */
ee804238 281 break;
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282 case 937: /* stsminl */
283 value = 876; /* --> ldsminl. */
ee804238 284 break;
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285 case 938: /* stumaxb */
286 value = 878; /* --> ldumaxb. */
ee804238 287 break;
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288 case 939: /* stumaxh */
289 value = 879; /* --> ldumaxh. */
ee804238 290 break;
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291 case 940: /* stumax */
292 value = 880; /* --> ldumax. */
ee804238 293 break;
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294 case 941: /* stumaxlb */
295 value = 882; /* --> ldumaxlb. */
ee804238 296 break;
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297 case 942: /* stumaxlh */
298 value = 885; /* --> ldumaxlh. */
ee804238 299 break;
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300 case 943: /* stumaxl */
301 value = 888; /* --> ldumaxl. */
ee804238 302 break;
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303 case 944: /* stuminb */
304 value = 890; /* --> lduminb. */
ee804238 305 break;
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306 case 945: /* stuminh */
307 value = 891; /* --> lduminh. */
ee804238 308 break;
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309 case 946: /* stumin */
310 value = 892; /* --> ldumin. */
ee804238 311 break;
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312 case 947: /* stuminlb */
313 value = 894; /* --> lduminlb. */
ee804238 314 break;
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315 case 948: /* stuminlh */
316 value = 897; /* --> lduminlh. */
ee804238 317 break;
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318 case 949: /* stuminl */
319 value = 900; /* --> lduminl. */
ee804238 320 break;
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321 case 951: /* mov */
322 value = 950; /* --> movn. */
ee804238 323 break;
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324 case 953: /* mov */
325 value = 952; /* --> movz. */
ee804238 326 break;
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327 case 964: /* sevl */
328 case 963: /* sev */
329 case 962: /* wfi */
330 case 961: /* wfe */
331 case 960: /* yield */
332 case 959: /* nop */
333 value = 958; /* --> hint. */
ee804238 334 break;
9e1f0fa7
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335 case 973: /* tlbi */
336 case 972: /* ic */
337 case 971: /* dc */
338 case 970: /* at */
339 value = 969; /* --> sys. */
a06ea964
NC
340 break;
341 default: return NULL;
342 }
343
344 return aarch64_opcode_table + value;
345}
346
347const char*
348aarch64_insert_operand (const aarch64_operand *self,
349 const aarch64_opnd_info *info,
350 aarch64_insn *code, const aarch64_inst *inst)
351{
352 /* Use the index as the key. */
353 int key = self - aarch64_operands;
354 switch (key)
355 {
356 case 1:
357 case 2:
358 case 3:
359 case 4:
360 case 5:
361 case 6:
362 case 7:
363 case 8:
364 case 9:
365 case 10:
a06ea964
NC
366 case 14:
367 case 15:
368 case 16:
ee804238 369 case 17:
a06ea964
NC
370 case 19:
371 case 20:
372 case 21:
373 case 22:
374 case 23:
375 case 24:
376 case 25:
377 case 26:
ee804238 378 case 27:
a06ea964 379 case 35:
ee804238 380 case 36:
a06ea964 381 return aarch64_ins_regno (self, info, code, inst);
a06ea964 382 case 12:
ee804238
JW
383 return aarch64_ins_reg_extended (self, info, code, inst);
384 case 13:
a06ea964 385 return aarch64_ins_reg_shifted (self, info, code, inst);
ee804238 386 case 18:
a06ea964 387 return aarch64_ins_ft (self, info, code, inst);
a06ea964
NC
388 case 28:
389 case 29:
a06ea964 390 case 30:
ee804238 391 return aarch64_ins_reglane (self, info, code, inst);
a06ea964 392 case 31:
ee804238 393 return aarch64_ins_reglist (self, info, code, inst);
a06ea964 394 case 32:
ee804238 395 return aarch64_ins_ldst_reglist (self, info, code, inst);
a06ea964 396 case 33:
ee804238
JW
397 return aarch64_ins_ldst_reglist_r (self, info, code, inst);
398 case 34:
a06ea964 399 return aarch64_ins_ldst_elemlist (self, info, code, inst);
ee804238 400 case 37:
a06ea964
NC
401 case 46:
402 case 47:
403 case 48:
404 case 49:
405 case 50:
406 case 51:
407 case 52:
408 case 53:
409 case 54:
410 case 55:
411 case 56:
412 case 57:
ee804238 413 case 58:
a06ea964
NC
414 case 67:
415 case 68:
68a64283 416 case 69:
ee804238 417 case 70:
a06ea964 418 return aarch64_ins_imm (self, info, code, inst);
a06ea964 419 case 38:
a06ea964 420 case 39:
ee804238 421 return aarch64_ins_advsimd_imm_shift (self, info, code, inst);
a06ea964
NC
422 case 40:
423 case 41:
ee804238 424 case 42:
a06ea964 425 return aarch64_ins_advsimd_imm_modified (self, info, code, inst);
a06ea964 426 case 59:
ee804238 427 return aarch64_ins_limm (self, info, code, inst);
a06ea964 428 case 60:
ee804238 429 return aarch64_ins_aimm (self, info, code, inst);
a06ea964 430 case 61:
ee804238
JW
431 return aarch64_ins_imm_half (self, info, code, inst);
432 case 62:
a06ea964 433 return aarch64_ins_fbits (self, info, code, inst);
68a64283 434 case 64:
ee804238 435 case 65:
a06ea964 436 return aarch64_ins_cond (self, info, code, inst);
a06ea964 437 case 71:
ee804238
JW
438 case 77:
439 return aarch64_ins_addr_simple (self, info, code, inst);
a06ea964 440 case 72:
ee804238 441 return aarch64_ins_addr_regoff (self, info, code, inst);
a06ea964 442 case 73:
a06ea964 443 case 74:
68a64283 444 case 75:
ee804238
JW
445 return aarch64_ins_addr_simm (self, info, code, inst);
446 case 76:
a06ea964 447 return aarch64_ins_addr_uimm12 (self, info, code, inst);
a06ea964 448 case 78:
ee804238 449 return aarch64_ins_simd_addr_post (self, info, code, inst);
a06ea964 450 case 79:
ee804238 451 return aarch64_ins_sysreg (self, info, code, inst);
a06ea964 452 case 80:
ee804238 453 return aarch64_ins_pstatefield (self, info, code, inst);
a06ea964
NC
454 case 81:
455 case 82:
a06ea964
NC
456 case 83:
457 case 84:
ee804238 458 return aarch64_ins_sysins_op (self, info, code, inst);
a06ea964 459 case 85:
68a64283 460 case 86:
ee804238
JW
461 return aarch64_ins_barrier (self, info, code, inst);
462 case 87:
a06ea964
NC
463 return aarch64_ins_prfop (self, info, code, inst);
464 default: assert (0); abort ();
465 }
466}
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