projects / deliverable / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| a06ea964 | 1 | /* aarch64-asm.h -- Header file for aarch64-asm.c and aarch64-asm-2.c. |
| b90efa5b | 2 | Copyright (C) 2012-2015 Free Software Foundation, Inc. |
| a06ea964 NC |
3 | Contributed by ARM Ltd. |
| 4 | ||
| 5 | This file is part of the GNU opcodes library. | |
| 6 | ||
| 7 | This library is free software; you can redistribute it and/or modify | |
| 8 | it under the terms of the GNU General Public License as published by | |
| 9 | the Free Software Foundation; either version 3, or (at your option) | |
| 10 | any later version. | |
| 11 | ||
| 12 | It is distributed in the hope that it will be useful, but WITHOUT | |
| 13 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
| 14 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
| 15 | License for more details. | |
| 16 | ||
| 17 | You should have received a copy of the GNU General Public License | |
| 18 | along with this program; see the file COPYING3. If not, | |
| 19 | see <http://www.gnu.org/licenses/>. */ | |
| 20 | ||
| 21 | #ifndef OPCODES_AARCH64_ASM_H | |
| 22 | #define OPCODES_AARCH64_ASM_H | |
| 23 | ||
| 24 | #include "aarch64-opc.h" | |
| 25 | ||
| 26 | /* Given OPCODE, return the opcode entry that OPCODE aliases to, e.g. | |
| 27 | given LSL, return UBFM. */ | |
| 28 | ||
| 29 | const aarch64_opcode* aarch64_find_real_opcode (const aarch64_opcode *); | |
| 30 | ||
| 31 | /* Switch-table-based high-level operand inserter. */ | |
| 32 | ||
| 33 | const char* aarch64_insert_operand (const aarch64_operand *, | |
| 34 | const aarch64_opnd_info *, aarch64_insn *, | |
| 35 | const aarch64_inst *); | |
| 36 | ||
| 37 | /* Operand inserters. */ | |
| 38 | ||
| 39 | #define AARCH64_DECL_OPD_INSERTER(x) \ | |
| 40 | const char* aarch64_##x (const aarch64_operand *, const aarch64_opnd_info *, \ | |
| 41 | aarch64_insn *, const aarch64_inst *) | |
| 42 | ||
| 43 | AARCH64_DECL_OPD_INSERTER (ins_regno); | |
| 44 | AARCH64_DECL_OPD_INSERTER (ins_reglane); | |
| 45 | AARCH64_DECL_OPD_INSERTER (ins_reglist); | |
| 46 | AARCH64_DECL_OPD_INSERTER (ins_ldst_reglist); | |
| 47 | AARCH64_DECL_OPD_INSERTER (ins_ldst_reglist_r); | |
| 48 | AARCH64_DECL_OPD_INSERTER (ins_ldst_elemlist); | |
| 49 | AARCH64_DECL_OPD_INSERTER (ins_advsimd_imm_shift); | |
| 50 | AARCH64_DECL_OPD_INSERTER (ins_imm); | |
| 51 | AARCH64_DECL_OPD_INSERTER (ins_imm_half); | |
| 52 | AARCH64_DECL_OPD_INSERTER (ins_advsimd_imm_modified); | |
| 53 | AARCH64_DECL_OPD_INSERTER (ins_fbits); | |
| 54 | AARCH64_DECL_OPD_INSERTER (ins_aimm); | |
| 55 | AARCH64_DECL_OPD_INSERTER (ins_limm); | |
| 56 | AARCH64_DECL_OPD_INSERTER (ins_ft); | |
| 57 | AARCH64_DECL_OPD_INSERTER (ins_addr_simple); | |
| 58 | AARCH64_DECL_OPD_INSERTER (ins_addr_regoff); | |
| 59 | AARCH64_DECL_OPD_INSERTER (ins_addr_simm); | |
| 60 | AARCH64_DECL_OPD_INSERTER (ins_addr_uimm12); | |
| 61 | AARCH64_DECL_OPD_INSERTER (ins_simd_addr_post); | |
| 62 | AARCH64_DECL_OPD_INSERTER (ins_cond); | |
| 63 | AARCH64_DECL_OPD_INSERTER (ins_sysreg); | |
| 64 | AARCH64_DECL_OPD_INSERTER (ins_pstatefield); | |
| 65 | AARCH64_DECL_OPD_INSERTER (ins_sysins_op); | |
| 66 | AARCH64_DECL_OPD_INSERTER (ins_barrier); | |
| 67 | AARCH64_DECL_OPD_INSERTER (ins_prfop); | |
| 68 | AARCH64_DECL_OPD_INSERTER (ins_reg_extended); | |
| 69 | AARCH64_DECL_OPD_INSERTER (ins_reg_shifted); | |
| 70 | ||
| 71 | #undef AARCH64_DECL_OPD_INSERTER | |
| 72 | ||
| 73 | #endif /* OPCODES_AARCH64_ASM_H */ |