Commit | Line | Data |
---|---|---|
adde6300 | 1 | /* Disassemble AVR instructions. |
47b0e7ad | 2 | Copyright 1999, 2000, 2002, 2004, 2005 Free Software Foundation, Inc. |
adde6300 AM |
3 | |
4 | Contributed by Denis Chertykov <denisc@overta.ru> | |
5 | ||
47b0e7ad NC |
6 | This program is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
adde6300 | 10 | |
47b0e7ad NC |
11 | This program is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
adde6300 | 15 | |
47b0e7ad NC |
16 | You should have received a copy of the GNU General Public License |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ | |
adde6300 | 19 | |
bab84c47 | 20 | #include <assert.h> |
0d8dfecf | 21 | #include "sysdep.h" |
adde6300 AM |
22 | #include "dis-asm.h" |
23 | #include "opintl.h" | |
11041102 | 24 | #include "libiberty.h" |
3c504221 | 25 | |
bab84c47 | 26 | struct avr_opcodes_s |
adde6300 | 27 | { |
bab84c47 DC |
28 | char *name; |
29 | char *constraints; | |
30 | char *opcode; | |
47b0e7ad | 31 | int insn_size; /* In words. */ |
bab84c47 DC |
32 | int isa; |
33 | unsigned int bin_opcode; | |
bab84c47 | 34 | }; |
adde6300 | 35 | |
bab84c47 | 36 | #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \ |
11041102 | 37 | {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN}, |
adde6300 | 38 | |
11041102 | 39 | const struct avr_opcodes_s avr_opcodes[] = |
adde6300 | 40 | { |
bab84c47 | 41 | #include "opcode/avr.h" |
11041102 | 42 | {NULL, NULL, NULL, 0, 0, 0} |
bab84c47 | 43 | }; |
adde6300 | 44 | |
463f102c | 45 | static int |
246f4c05 SS |
46 | avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint, |
47 | char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr) | |
adde6300 | 48 | { |
463f102c | 49 | int ok = 1; |
246f4c05 | 50 | *sym = 0; |
463f102c | 51 | |
bab84c47 DC |
52 | switch (constraint) |
53 | { | |
54 | /* Any register operand. */ | |
55 | case 'r': | |
56 | if (regs) | |
47b0e7ad | 57 | insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* Source register. */ |
bab84c47 | 58 | else |
47b0e7ad | 59 | insn = (insn & 0x01f0) >> 4; /* Destination register. */ |
bab84c47 DC |
60 | |
61 | sprintf (buf, "r%d", insn); | |
62 | break; | |
63 | ||
64 | case 'd': | |
65 | if (regs) | |
66 | sprintf (buf, "r%d", 16 + (insn & 0xf)); | |
67 | else | |
68 | sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4)); | |
69 | break; | |
70 | ||
71 | case 'w': | |
72 | sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3)); | |
73 | break; | |
74 | ||
75 | case 'a': | |
76 | if (regs) | |
77 | sprintf (buf, "r%d", 16 + (insn & 7)); | |
78 | else | |
79 | sprintf (buf, "r%d", 16 + ((insn >> 4) & 7)); | |
80 | break; | |
adde6300 | 81 | |
bab84c47 DC |
82 | case 'v': |
83 | if (regs) | |
84 | sprintf (buf, "r%d", (insn & 0xf) * 2); | |
85 | else | |
86 | sprintf (buf, "r%d", ((insn & 0xf0) >> 3)); | |
87 | break; | |
88 | ||
89 | case 'e': | |
463f102c DC |
90 | { |
91 | char *xyz; | |
92 | ||
93 | switch (insn & 0x100f) | |
94 | { | |
95 | case 0x0000: xyz = "Z"; break; | |
96 | case 0x1001: xyz = "Z+"; break; | |
97 | case 0x1002: xyz = "-Z"; break; | |
98 | case 0x0008: xyz = "Y"; break; | |
99 | case 0x1009: xyz = "Y+"; break; | |
100 | case 0x100a: xyz = "-Y"; break; | |
101 | case 0x100c: xyz = "X"; break; | |
102 | case 0x100d: xyz = "X+"; break; | |
103 | case 0x100e: xyz = "-X"; break; | |
104 | default: xyz = "??"; ok = 0; | |
105 | } | |
106 | sprintf (buf, xyz); | |
107 | ||
108 | if (AVR_UNDEF_P (insn)) | |
109 | sprintf (comment, _("undefined")); | |
110 | } | |
bab84c47 DC |
111 | break; |
112 | ||
113 | case 'z': | |
114 | *buf++ = 'Z'; | |
115 | if (insn & 0x1) | |
116 | *buf++ = '+'; | |
117 | *buf = '\0'; | |
463f102c DC |
118 | if (AVR_UNDEF_P (insn)) |
119 | sprintf (comment, _("undefined")); | |
bab84c47 DC |
120 | break; |
121 | ||
122 | case 'b': | |
123 | { | |
463f102c | 124 | unsigned int x; |
bab84c47 DC |
125 | |
126 | x = (insn & 7); | |
127 | x |= (insn >> 7) & (3 << 3); | |
128 | x |= (insn >> 8) & (1 << 5); | |
129 | ||
130 | if (insn & 0x8) | |
131 | *buf++ = 'Y'; | |
132 | else | |
133 | *buf++ = 'Z'; | |
134 | sprintf (buf, "+%d", x); | |
135 | sprintf (comment, "0x%02x", x); | |
136 | } | |
137 | break; | |
138 | ||
139 | case 'h': | |
246f4c05 SS |
140 | *sym = 1; |
141 | *sym_addr = ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2; | |
52f16a0e NC |
142 | /* See PR binutils/2545. Ideally we would like to display the hex |
143 | value of the address only once, but this would mean recoding | |
144 | objdump_print_address() which would affect many targets. */ | |
145 | sprintf (buf, "%#lx", * sym_addr); | |
146 | sprintf (comment, "0x"); | |
147 | ||
bab84c47 DC |
148 | break; |
149 | ||
150 | case 'L': | |
151 | { | |
152 | int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2; | |
153 | sprintf (buf, ".%+-8d", rel_addr); | |
246f4c05 SS |
154 | *sym = 1; |
155 | *sym_addr = pc + 2 + rel_addr; | |
156 | sprintf (comment, "0x"); | |
bab84c47 DC |
157 | } |
158 | break; | |
159 | ||
160 | case 'l': | |
161 | { | |
162 | int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2; | |
163 | sprintf (buf, ".%+-8d", rel_addr); | |
246f4c05 SS |
164 | *sym = 1; |
165 | *sym_addr = pc + 2 + rel_addr; | |
166 | sprintf (comment, "0x"); | |
bab84c47 DC |
167 | } |
168 | break; | |
169 | ||
170 | case 'i': | |
171 | sprintf (buf, "0x%04X", insn2); | |
172 | break; | |
173 | ||
174 | case 'M': | |
175 | sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf)); | |
176 | sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf)); | |
177 | break; | |
178 | ||
179 | case 'n': | |
463f102c DC |
180 | sprintf (buf, "??"); |
181 | fprintf (stderr, _("Internal disassembler error")); | |
182 | ok = 0; | |
bab84c47 DC |
183 | break; |
184 | ||
185 | case 'K': | |
463f102c DC |
186 | { |
187 | unsigned int x; | |
188 | ||
189 | x = (insn & 0xf) | ((insn >> 2) & 0x30); | |
190 | sprintf (buf, "0x%02x", x); | |
191 | sprintf (comment, "%d", x); | |
192 | } | |
bab84c47 DC |
193 | break; |
194 | ||
195 | case 's': | |
196 | sprintf (buf, "%d", insn & 7); | |
197 | break; | |
198 | ||
199 | case 'S': | |
200 | sprintf (buf, "%d", (insn >> 4) & 7); | |
201 | break; | |
202 | ||
203 | case 'P': | |
204 | { | |
205 | unsigned int x; | |
47b0e7ad | 206 | |
bab84c47 DC |
207 | x = (insn & 0xf); |
208 | x |= (insn >> 5) & 0x30; | |
209 | sprintf (buf, "0x%02x", x); | |
210 | sprintf (comment, "%d", x); | |
211 | } | |
212 | break; | |
213 | ||
214 | case 'p': | |
215 | { | |
216 | unsigned int x; | |
217 | ||
218 | x = (insn >> 3) & 0x1f; | |
219 | sprintf (buf, "0x%02x", x); | |
220 | sprintf (comment, "%d", x); | |
221 | } | |
222 | break; | |
223 | ||
224 | case '?': | |
225 | *buf = '\0'; | |
226 | break; | |
227 | ||
228 | default: | |
463f102c DC |
229 | sprintf (buf, "??"); |
230 | fprintf (stderr, _("unknown constraint `%c'"), constraint); | |
231 | ok = 0; | |
bab84c47 | 232 | } |
463f102c DC |
233 | |
234 | return ok; | |
adde6300 AM |
235 | } |
236 | ||
bab84c47 | 237 | static unsigned short |
47b0e7ad | 238 | avrdis_opcode (bfd_vma addr, disassemble_info *info) |
adde6300 AM |
239 | { |
240 | bfd_byte buffer[2]; | |
241 | int status; | |
47b0e7ad NC |
242 | |
243 | status = info->read_memory_func (addr, buffer, 2, info); | |
244 | ||
245 | if (status == 0) | |
246 | return bfd_getl16 (buffer); | |
247 | ||
248 | info->memory_error_func (status, addr, info); | |
249 | return -1; | |
adde6300 AM |
250 | } |
251 | ||
252 | ||
253 | int | |
47b0e7ad | 254 | print_insn_avr (bfd_vma addr, disassemble_info *info) |
adde6300 | 255 | { |
bab84c47 | 256 | unsigned int insn, insn2; |
11041102 KD |
257 | const struct avr_opcodes_s *opcode; |
258 | static unsigned int *maskptr; | |
adde6300 AM |
259 | void *stream = info->stream; |
260 | fprintf_ftype prin = info->fprintf_func; | |
11041102 | 261 | static unsigned int *avr_bin_masks; |
bab84c47 | 262 | static int initialized; |
adde6300 | 263 | int cmd_len = 2; |
463f102c DC |
264 | int ok = 0; |
265 | char op1[20], op2[20], comment1[40], comment2[40]; | |
246f4c05 SS |
266 | int sym_op1 = 0, sym_op2 = 0; |
267 | bfd_vma sym_addr1, sym_addr2; | |
adde6300 | 268 | |
bab84c47 DC |
269 | if (!initialized) |
270 | { | |
11041102 KD |
271 | unsigned int nopcodes; |
272 | ||
273 | nopcodes = sizeof (avr_opcodes) / sizeof (struct avr_opcodes_s); | |
bab84c47 | 274 | |
47b0e7ad | 275 | avr_bin_masks = xmalloc (nopcodes * sizeof (unsigned int)); |
11041102 KD |
276 | |
277 | for (opcode = avr_opcodes, maskptr = avr_bin_masks; | |
278 | opcode->name; | |
279 | opcode++, maskptr++) | |
bab84c47 DC |
280 | { |
281 | char * s; | |
282 | unsigned int bin = 0; | |
283 | unsigned int mask = 0; | |
284 | ||
285 | for (s = opcode->opcode; *s; ++s) | |
286 | { | |
287 | bin <<= 1; | |
288 | mask <<= 1; | |
289 | bin |= (*s == '1'); | |
290 | mask |= (*s == '1' || *s == '0'); | |
291 | } | |
292 | assert (s - opcode->opcode == 16); | |
293 | assert (opcode->bin_opcode == bin); | |
11041102 | 294 | *maskptr = mask; |
bab84c47 | 295 | } |
11041102 KD |
296 | |
297 | initialized = 1; | |
bab84c47 | 298 | } |
adde6300 | 299 | |
bab84c47 DC |
300 | insn = avrdis_opcode (addr, info); |
301 | ||
11041102 KD |
302 | for (opcode = avr_opcodes, maskptr = avr_bin_masks; |
303 | opcode->name; | |
304 | opcode++, maskptr++) | |
47b0e7ad NC |
305 | if ((insn & *maskptr) == opcode->bin_opcode) |
306 | break; | |
bab84c47 | 307 | |
463f102c DC |
308 | /* Special case: disassemble `ldd r,b+0' as `ld r,b', and |
309 | `std b+0,r' as `st b,r' (next entry in the table). */ | |
310 | ||
311 | if (AVR_DISP0_P (insn)) | |
312 | opcode++; | |
313 | ||
314 | op1[0] = 0; | |
315 | op2[0] = 0; | |
316 | comment1[0] = 0; | |
317 | comment2[0] = 0; | |
318 | ||
bab84c47 | 319 | if (opcode->name) |
adde6300 | 320 | { |
bab84c47 DC |
321 | char *op = opcode->constraints; |
322 | ||
00d2865b | 323 | insn2 = 0; |
463f102c | 324 | ok = 1; |
bab84c47 DC |
325 | |
326 | if (opcode->insn_size > 1) | |
327 | { | |
328 | insn2 = avrdis_opcode (addr + 2, info); | |
329 | cmd_len = 4; | |
330 | } | |
331 | ||
332 | if (*op && *op != '?') | |
333 | { | |
334 | int regs = REGISTER_P (*op); | |
335 | ||
246f4c05 | 336 | ok = avr_operand (insn, insn2, addr, *op, op1, comment1, 0, &sym_op1, &sym_addr1); |
bab84c47 | 337 | |
463f102c DC |
338 | if (ok && *(++op) == ',') |
339 | ok = avr_operand (insn, insn2, addr, *(++op), op2, | |
246f4c05 | 340 | *comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2); |
bab84c47 | 341 | } |
463f102c | 342 | } |
bab84c47 | 343 | |
463f102c DC |
344 | if (!ok) |
345 | { | |
346 | /* Unknown opcode, or invalid combination of operands. */ | |
347 | sprintf (op1, "0x%04x", insn); | |
348 | op2[0] = 0; | |
349 | sprintf (comment1, "????"); | |
350 | comment2[0] = 0; | |
351 | } | |
bab84c47 | 352 | |
463f102c | 353 | (*prin) (stream, "%s", ok ? opcode->name : ".word"); |
bab84c47 | 354 | |
463f102c | 355 | if (*op1) |
246f4c05 | 356 | (*prin) (stream, "\t%s", op1); |
bab84c47 | 357 | |
463f102c DC |
358 | if (*op2) |
359 | (*prin) (stream, ", %s", op2); | |
360 | ||
361 | if (*comment1) | |
362 | (*prin) (stream, "\t; %s", comment1); | |
363 | ||
246f4c05 | 364 | if (sym_op1) |
73f643e9 | 365 | info->print_address_func (sym_addr1, info); |
246f4c05 | 366 | |
463f102c DC |
367 | if (*comment2) |
368 | (*prin) (stream, " %s", comment2); | |
bab84c47 | 369 | |
246f4c05 | 370 | if (sym_op2) |
73f643e9 | 371 | info->print_address_func (sym_addr2, info); |
246f4c05 | 372 | |
adde6300 AM |
373 | return cmd_len; |
374 | } |