Commit | Line | Data |
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4b7f6baa | 1 | /* Disassemble ADI Blackfin Instructions. |
9b201bb5 | 2 | Copyright 2005, 2007 Free Software Foundation, Inc. |
4b7f6baa | 3 | |
9b201bb5 NC |
4 | This file is part of libopcodes. |
5 | ||
6 | This library is free software; you can redistribute it and/or modify | |
4b7f6baa | 7 | it under the terms of the GNU General Public License as published by |
9b201bb5 NC |
8 | the Free Software Foundation; either version 3, or (at your option) |
9 | any later version. | |
4b7f6baa | 10 | |
9b201bb5 NC |
11 | It is distributed in the hope that it will be useful, but WITHOUT |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
13 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
14 | License for more details. | |
4b7f6baa CM |
15 | |
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, | |
19 | MA 02110-1301, USA. */ | |
20 | ||
21 | #include <stdio.h> | |
22 | #include <stdlib.h> | |
23 | #include <string.h> | |
24 | ||
25 | #include "opcode/bfin.h" | |
26 | ||
27 | #define M_S2RND 1 | |
28 | #define M_T 2 | |
29 | #define M_W32 3 | |
30 | #define M_FU 4 | |
31 | #define M_TFU 6 | |
32 | #define M_IS 8 | |
33 | #define M_ISS2 9 | |
34 | #define M_IH 11 | |
35 | #define M_IU 12 | |
36 | ||
37 | #ifndef PRINTF | |
38 | #define PRINTF printf | |
39 | #endif | |
40 | ||
41 | #ifndef EXIT | |
42 | #define EXIT exit | |
43 | #endif | |
44 | ||
45 | typedef long TIword; | |
46 | ||
b7d48530 NC |
47 | #define HOST_LONG_WORD_SIZE (sizeof (long) * 8) |
48 | #define XFIELD(w,p,s) (((w) & ((1 << (s)) - 1) << (p)) >> (p)) | |
49 | #define SIGNEXTEND(v, n) ((v << (HOST_LONG_WORD_SIZE - (n))) >> (HOST_LONG_WORD_SIZE - (n))) | |
50 | #define MASKBITS(val, bits) (val & ((1 << bits) - 1)) | |
4b7f6baa CM |
51 | |
52 | #include "dis-asm.h" | |
b7d48530 | 53 | |
b21c9cb4 BS |
54 | typedef unsigned int bu32; |
55 | ||
4b7f6baa CM |
56 | typedef enum |
57 | { | |
58 | c_0, c_1, c_4, c_2, c_uimm2, c_uimm3, c_imm3, c_pcrel4, | |
59 | c_imm4, c_uimm4s4, c_uimm4, c_uimm4s2, c_negimm5s4, c_imm5, c_uimm5, c_imm6, | |
60 | c_imm7, c_imm8, c_uimm8, c_pcrel8, c_uimm8s4, c_pcrel8s4, c_lppcrel10, c_pcrel10, | |
61 | c_pcrel12, c_imm16s4, c_luimm16, c_imm16, c_huimm16, c_rimm16, c_imm16s2, c_uimm16s4, | |
b21c9cb4 | 62 | c_uimm16, c_pcrel24, c_uimm32, c_huimm32, |
4b7f6baa CM |
63 | } const_forms_t; |
64 | ||
65 | static struct | |
66 | { | |
67 | char *name; | |
68 | int nbits; | |
69 | char reloc; | |
70 | char issigned; | |
71 | char pcrel; | |
72 | char scale; | |
73 | char offset; | |
74 | char negative; | |
75 | char positive; | |
76 | } constant_formats[] = | |
77 | { | |
78 | { "0", 0, 0, 1, 0, 0, 0, 0, 0}, | |
79 | { "1", 0, 0, 1, 0, 0, 0, 0, 0}, | |
80 | { "4", 0, 0, 1, 0, 0, 0, 0, 0}, | |
81 | { "2", 0, 0, 1, 0, 0, 0, 0, 0}, | |
82 | { "uimm2", 2, 0, 0, 0, 0, 0, 0, 0}, | |
83 | { "uimm3", 3, 0, 0, 0, 0, 0, 0, 0}, | |
84 | { "imm3", 3, 0, 1, 0, 0, 0, 0, 0}, | |
85 | { "pcrel4", 4, 1, 0, 1, 1, 0, 0, 0}, | |
86 | { "imm4", 4, 0, 1, 0, 0, 0, 0, 0}, | |
87 | { "uimm4s4", 4, 0, 0, 0, 2, 0, 0, 1}, | |
88 | { "uimm4", 4, 0, 0, 0, 0, 0, 0, 0}, | |
89 | { "uimm4s2", 4, 0, 0, 0, 1, 0, 0, 1}, | |
90 | { "negimm5s4", 5, 0, 1, 0, 2, 0, 1, 0}, | |
91 | { "imm5", 5, 0, 1, 0, 0, 0, 0, 0}, | |
92 | { "uimm5", 5, 0, 0, 0, 0, 0, 0, 0}, | |
93 | { "imm6", 6, 0, 1, 0, 0, 0, 0, 0}, | |
94 | { "imm7", 7, 0, 1, 0, 0, 0, 0, 0}, | |
95 | { "imm8", 8, 0, 1, 0, 0, 0, 0, 0}, | |
96 | { "uimm8", 8, 0, 0, 0, 0, 0, 0, 0}, | |
97 | { "pcrel8", 8, 1, 0, 1, 1, 0, 0, 0}, | |
98 | { "uimm8s4", 8, 0, 0, 0, 2, 0, 0, 0}, | |
99 | { "pcrel8s4", 8, 1, 1, 1, 2, 0, 0, 0}, | |
100 | { "lppcrel10", 10, 1, 0, 1, 1, 0, 0, 0}, | |
101 | { "pcrel10", 10, 1, 1, 1, 1, 0, 0, 0}, | |
102 | { "pcrel12", 12, 1, 1, 1, 1, 0, 0, 0}, | |
103 | { "imm16s4", 16, 0, 1, 0, 2, 0, 0, 0}, | |
104 | { "luimm16", 16, 1, 0, 0, 0, 0, 0, 0}, | |
105 | { "imm16", 16, 0, 1, 0, 0, 0, 0, 0}, | |
106 | { "huimm16", 16, 1, 0, 0, 0, 0, 0, 0}, | |
107 | { "rimm16", 16, 1, 1, 0, 0, 0, 0, 0}, | |
108 | { "imm16s2", 16, 0, 1, 0, 1, 0, 0, 0}, | |
109 | { "uimm16s4", 16, 0, 0, 0, 2, 0, 0, 0}, | |
110 | { "uimm16", 16, 0, 0, 0, 0, 0, 0, 0}, | |
b21c9cb4 BS |
111 | { "pcrel24", 24, 1, 1, 1, 1, 0, 0, 0}, |
112 | { "uimm32", 32, 0, 0, 0, 0, 0, 0, 0}, | |
113 | { "huimm16", 32, 1, 0, 0, 0, 0, 0, 0} | |
4b7f6baa CM |
114 | }; |
115 | ||
116 | int _print_insn_bfin (bfd_vma pc, disassemble_info * outf); | |
117 | int print_insn_bfin (bfd_vma pc, disassemble_info * outf); | |
118 | ||
119 | static char * | |
120 | fmtconst (const_forms_t cf, TIword x, bfd_vma pc, disassemble_info * outf) | |
121 | { | |
122 | static char buf[60]; | |
123 | ||
124 | if (constant_formats[cf].reloc) | |
125 | { | |
126 | bfd_vma ea = (((constant_formats[cf].pcrel ? SIGNEXTEND (x, constant_formats[cf].nbits) | |
127 | : x) + constant_formats[cf].offset) << constant_formats[cf].scale); | |
128 | if (constant_formats[cf].pcrel) | |
129 | ea += pc; | |
130 | ||
131 | outf->print_address_func (ea, outf); | |
132 | return ""; | |
133 | } | |
134 | ||
135 | /* Negative constants have an implied sign bit. */ | |
136 | if (constant_formats[cf].negative) | |
137 | { | |
138 | int nb = constant_formats[cf].nbits + 1; | |
b7d48530 | 139 | |
4b7f6baa CM |
140 | x = x | (1 << constant_formats[cf].nbits); |
141 | x = SIGNEXTEND (x, nb); | |
142 | } | |
143 | else | |
144 | x = constant_formats[cf].issigned ? SIGNEXTEND (x, constant_formats[cf].nbits) : x; | |
145 | ||
146 | if (constant_formats[cf].offset) | |
147 | x += constant_formats[cf].offset; | |
148 | ||
149 | if (constant_formats[cf].scale) | |
150 | x <<= constant_formats[cf].scale; | |
151 | ||
152 | if (constant_formats[cf].issigned && x < 0) | |
153 | sprintf (buf, "%ld", x); | |
154 | else | |
155 | sprintf (buf, "0x%lx", x); | |
156 | ||
157 | return buf; | |
158 | } | |
159 | ||
b21c9cb4 BS |
160 | static bu32 |
161 | fmtconst_val (const_forms_t cf, unsigned int x, unsigned int pc) | |
162 | { | |
163 | if (0 && constant_formats[cf].reloc) | |
164 | { | |
165 | bu32 ea = (((constant_formats[cf].pcrel | |
166 | ? SIGNEXTEND (x, constant_formats[cf].nbits) | |
167 | : x) + constant_formats[cf].offset) | |
168 | << constant_formats[cf].scale); | |
169 | if (constant_formats[cf].pcrel) | |
170 | ea += pc; | |
171 | ||
172 | return ea; | |
173 | } | |
174 | ||
175 | /* Negative constants have an implied sign bit. */ | |
176 | if (constant_formats[cf].negative) | |
177 | { | |
178 | int nb = constant_formats[cf].nbits + 1; | |
179 | x = x | (1 << constant_formats[cf].nbits); | |
180 | x = SIGNEXTEND (x, nb); | |
181 | } | |
182 | else if (constant_formats[cf].issigned) | |
183 | x = SIGNEXTEND (x, constant_formats[cf].nbits); | |
184 | ||
185 | x += constant_formats[cf].offset; | |
186 | x <<= constant_formats[cf].scale; | |
187 | ||
188 | return x; | |
189 | } | |
190 | ||
4b7f6baa CM |
191 | enum machine_registers |
192 | { | |
193 | REG_RL0, REG_RL1, REG_RL2, REG_RL3, REG_RL4, REG_RL5, REG_RL6, REG_RL7, | |
194 | REG_RH0, REG_RH1, REG_RH2, REG_RH3, REG_RH4, REG_RH5, REG_RH6, REG_RH7, | |
195 | REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, | |
196 | REG_R1_0, REG_R3_2, REG_R5_4, REG_R7_6, REG_P0, REG_P1, REG_P2, REG_P3, | |
197 | REG_P4, REG_P5, REG_SP, REG_FP, REG_A0x, REG_A1x, REG_A0w, REG_A1w, | |
198 | REG_A0, REG_A1, REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, | |
199 | REG_M2, REG_M3, REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, | |
200 | REG_L2, REG_L3, | |
201 | REG_AZ, REG_AN, REG_AC0, REG_AC1, REG_AV0, REG_AV1, REG_AV0S, REG_AV1S, | |
202 | REG_AQ, REG_V, REG_VS, | |
203 | REG_sftreset, REG_omode, REG_excause, REG_emucause, REG_idle_req, REG_hwerrcause, REG_CC, REG_LC0, | |
204 | REG_LC1, REG_GP, REG_ASTAT, REG_RETS, REG_LT0, REG_LB0, REG_LT1, REG_LB1, | |
205 | REG_CYCLES, REG_CYCLES2, REG_USP, REG_SEQSTAT, REG_SYSCFG, REG_RETI, REG_RETX, REG_RETN, | |
206 | REG_RETE, REG_EMUDAT, REG_BR0, REG_BR1, REG_BR2, REG_BR3, REG_BR4, REG_BR5, REG_BR6, | |
207 | REG_BR7, REG_PL0, REG_PL1, REG_PL2, REG_PL3, REG_PL4, REG_PL5, REG_SLP, REG_FLP, | |
208 | REG_PH0, REG_PH1, REG_PH2, REG_PH3, REG_PH4, REG_PH5, REG_SHP, REG_FHP, | |
209 | REG_IL0, REG_IL1, REG_IL2, REG_IL3, REG_ML0, REG_ML1, REG_ML2, REG_ML3, | |
210 | REG_BL0, REG_BL1, REG_BL2, REG_BL3, REG_LL0, REG_LL1, REG_LL2, REG_LL3, | |
211 | REG_IH0, REG_IH1, REG_IH2, REG_IH3, REG_MH0, REG_MH1, REG_MH2, REG_MH3, | |
212 | REG_BH0, REG_BH1, REG_BH2, REG_BH3, REG_LH0, REG_LH1, REG_LH2, REG_LH3, | |
213 | REG_LASTREG, | |
214 | }; | |
215 | ||
216 | enum reg_class | |
217 | { | |
218 | rc_dregs_lo, rc_dregs_hi, rc_dregs, rc_dregs_pair, rc_pregs, rc_spfp, rc_dregs_hilo, rc_accum_ext, | |
219 | rc_accum_word, rc_accum, rc_iregs, rc_mregs, rc_bregs, rc_lregs, rc_dpregs, rc_gregs, | |
220 | rc_regs, rc_statbits, rc_ignore_bits, rc_ccstat, rc_counters, rc_dregs2_sysregs1, rc_open, rc_sysregs2, | |
221 | rc_sysregs3, rc_allregs, | |
222 | LIM_REG_CLASSES | |
223 | }; | |
224 | ||
225 | static char *reg_names[] = | |
226 | { | |
227 | "R0.L", "R1.L", "R2.L", "R3.L", "R4.L", "R5.L", "R6.L", "R7.L", | |
228 | "R0.H", "R1.H", "R2.H", "R3.H", "R4.H", "R5.H", "R6.H", "R7.H", | |
229 | "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", | |
230 | "R1:0", "R3:2", "R5:4", "R7:6", "P0", "P1", "P2", "P3", | |
231 | "P4", "P5", "SP", "FP", "A0.x", "A1.x", "A0.w", "A1.w", | |
232 | "A0", "A1", "I0", "I1", "I2", "I3", "M0", "M1", | |
233 | "M2", "M3", "B0", "B1", "B2", "B3", "L0", "L1", | |
234 | "L2", "L3", | |
235 | "AZ", "AN", "AC0", "AC1", "AV0", "AV1", "AV0S", "AV1S", | |
236 | "AQ", "V", "VS", | |
237 | "sftreset", "omode", "excause", "emucause", "idle_req", "hwerrcause", "CC", "LC0", | |
238 | "LC1", "GP", "ASTAT", "RETS", "LT0", "LB0", "LT1", "LB1", | |
239 | "CYCLES", "CYCLES2", "USP", "SEQSTAT", "SYSCFG", "RETI", "RETX", "RETN", | |
240 | "RETE", "EMUDAT", | |
241 | "R0.B", "R1.B", "R2.B", "R3.B", "R4.B", "R5.B", "R6.B", "R7.B", | |
242 | "P0.L", "P1.L", "P2.L", "P3.L", "P4.L", "P5.L", "SP.L", "FP.L", | |
243 | "P0.H", "P1.H", "P2.H", "P3.H", "P4.H", "P5.H", "SP.H", "FP.H", | |
244 | "I0.L", "I1.L", "I2.L", "I3.L", "M0.L", "M1.L", "M2.L", "M3.L", | |
245 | "B0.L", "B1.L", "B2.L", "B3.L", "L0.L", "L1.L", "L2.L", "L3.L", | |
246 | "I0.H", "I1.H", "I2.H", "I3.H", "M0.H", "M1.H", "M2.H", "M3.H", | |
247 | "B0.H", "B1.H", "B2.H", "B3.H", "L0.H", "L1.H", "L2.H", "L3.H", | |
248 | "LASTREG", | |
249 | 0 | |
250 | }; | |
251 | ||
252 | #define REGNAME(x) ((x) < REG_LASTREG ? (reg_names[x]) : "...... Illegal register .......") | |
253 | ||
254 | /* RL(0..7). */ | |
255 | static enum machine_registers decode_dregs_lo[] = | |
256 | { | |
257 | REG_RL0, REG_RL1, REG_RL2, REG_RL3, REG_RL4, REG_RL5, REG_RL6, REG_RL7, | |
258 | }; | |
259 | ||
b7d48530 | 260 | #define dregs_lo(x) REGNAME (decode_dregs_lo[(x) & 7]) |
4b7f6baa CM |
261 | |
262 | /* RH(0..7). */ | |
263 | static enum machine_registers decode_dregs_hi[] = | |
264 | { | |
265 | REG_RH0, REG_RH1, REG_RH2, REG_RH3, REG_RH4, REG_RH5, REG_RH6, REG_RH7, | |
266 | }; | |
267 | ||
b7d48530 | 268 | #define dregs_hi(x) REGNAME (decode_dregs_hi[(x) & 7]) |
4b7f6baa CM |
269 | |
270 | /* R(0..7). */ | |
271 | static enum machine_registers decode_dregs[] = | |
272 | { | |
273 | REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, | |
274 | }; | |
275 | ||
b7d48530 | 276 | #define dregs(x) REGNAME (decode_dregs[(x) & 7]) |
4b7f6baa CM |
277 | |
278 | /* R BYTE(0..7). */ | |
279 | static enum machine_registers decode_dregs_byte[] = | |
280 | { | |
281 | REG_BR0, REG_BR1, REG_BR2, REG_BR3, REG_BR4, REG_BR5, REG_BR6, REG_BR7, | |
282 | }; | |
283 | ||
b7d48530 NC |
284 | #define dregs_byte(x) REGNAME (decode_dregs_byte[(x) & 7]) |
285 | #define dregs_pair(x) REGNAME (decode_dregs_pair[(x) & 7]) | |
4b7f6baa CM |
286 | |
287 | /* P(0..5) SP FP. */ | |
288 | static enum machine_registers decode_pregs[] = | |
289 | { | |
290 | REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, | |
291 | }; | |
292 | ||
b7d48530 NC |
293 | #define pregs(x) REGNAME (decode_pregs[(x) & 7]) |
294 | #define spfp(x) REGNAME (decode_spfp[(x) & 1]) | |
295 | #define dregs_hilo(x,i) REGNAME (decode_dregs_hilo[((i) << 3)|x]) | |
296 | #define accum_ext(x) REGNAME (decode_accum_ext[(x) & 1]) | |
297 | #define accum_word(x) REGNAME (decode_accum_word[(x) & 1]) | |
298 | #define accum(x) REGNAME (decode_accum[(x) & 1]) | |
4b7f6baa CM |
299 | |
300 | /* I(0..3). */ | |
301 | static enum machine_registers decode_iregs[] = | |
302 | { | |
303 | REG_I0, REG_I1, REG_I2, REG_I3, | |
304 | }; | |
305 | ||
b7d48530 | 306 | #define iregs(x) REGNAME (decode_iregs[(x) & 3]) |
4b7f6baa CM |
307 | |
308 | /* M(0..3). */ | |
309 | static enum machine_registers decode_mregs[] = | |
310 | { | |
311 | REG_M0, REG_M1, REG_M2, REG_M3, | |
312 | }; | |
313 | ||
b7d48530 NC |
314 | #define mregs(x) REGNAME (decode_mregs[(x) & 3]) |
315 | #define bregs(x) REGNAME (decode_bregs[(x) & 3]) | |
316 | #define lregs(x) REGNAME (decode_lregs[(x) & 3]) | |
4b7f6baa CM |
317 | |
318 | /* dregs pregs. */ | |
319 | static enum machine_registers decode_dpregs[] = | |
320 | { | |
321 | REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, | |
322 | REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, | |
323 | }; | |
324 | ||
b7d48530 | 325 | #define dpregs(x) REGNAME (decode_dpregs[(x) & 15]) |
4b7f6baa CM |
326 | |
327 | /* [dregs pregs]. */ | |
328 | static enum machine_registers decode_gregs[] = | |
329 | { | |
330 | REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, | |
331 | REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, | |
332 | }; | |
333 | ||
b7d48530 | 334 | #define gregs(x,i) REGNAME (decode_gregs[((i) << 3)|x]) |
4b7f6baa CM |
335 | |
336 | /* [dregs pregs (iregs mregs) (bregs lregs)]. */ | |
337 | static enum machine_registers decode_regs[] = | |
338 | { | |
339 | REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, | |
340 | REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, | |
341 | REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, REG_M2, REG_M3, | |
342 | REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3, | |
343 | }; | |
344 | ||
b7d48530 | 345 | #define regs(x,i) REGNAME (decode_regs[((i) << 3)|x]) |
4b7f6baa CM |
346 | |
347 | /* [dregs pregs (iregs mregs) (bregs lregs) Low Half]. */ | |
348 | static enum machine_registers decode_regs_lo[] = | |
349 | { | |
350 | REG_RL0, REG_RL1, REG_RL2, REG_RL3, REG_RL4, REG_RL5, REG_RL6, REG_RL7, | |
351 | REG_PL0, REG_PL1, REG_PL2, REG_PL3, REG_PL4, REG_PL5, REG_SLP, REG_FLP, | |
352 | REG_IL0, REG_IL1, REG_IL2, REG_IL3, REG_ML0, REG_ML1, REG_ML2, REG_ML3, | |
353 | REG_BL0, REG_BL1, REG_BL2, REG_BL3, REG_LL0, REG_LL1, REG_LL2, REG_LL3, | |
354 | }; | |
355 | ||
b7d48530 | 356 | #define regs_lo(x,i) REGNAME (decode_regs_lo[((i) << 3)|x]) |
4b7f6baa CM |
357 | /* [dregs pregs (iregs mregs) (bregs lregs) High Half]. */ |
358 | static enum machine_registers decode_regs_hi[] = | |
359 | { | |
360 | REG_RH0, REG_RH1, REG_RH2, REG_RH3, REG_RH4, REG_RH5, REG_RH6, REG_RH7, | |
361 | REG_PH0, REG_PH1, REG_PH2, REG_PH3, REG_PH4, REG_PH5, REG_SHP, REG_FHP, | |
362 | REG_IH0, REG_IH1, REG_IH2, REG_IH3, REG_MH0, REG_MH1, REG_LH2, REG_MH3, | |
363 | REG_BH0, REG_BH1, REG_BH2, REG_BH3, REG_LH0, REG_LH1, REG_LH2, REG_LH3, | |
364 | }; | |
365 | ||
b7d48530 | 366 | #define regs_hi(x,i) REGNAME (decode_regs_hi[((i) << 3)|x]) |
4b7f6baa CM |
367 | |
368 | static enum machine_registers decode_statbits[] = | |
369 | { | |
370 | REG_AZ, REG_AN, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_AQ, REG_LASTREG, | |
371 | REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_AC0, REG_AC1, REG_LASTREG, REG_LASTREG, | |
372 | REG_AV0, REG_AV0S, REG_AV1, REG_AV1S, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, | |
373 | REG_V, REG_VS, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, | |
374 | }; | |
375 | ||
b7d48530 NC |
376 | #define statbits(x) REGNAME (decode_statbits[(x) & 31]) |
377 | #define ignore_bits(x) REGNAME (decode_ignore_bits[(x) & 7]) | |
378 | #define ccstat(x) REGNAME (decode_ccstat[(x) & 0]) | |
4b7f6baa CM |
379 | |
380 | /* LC0 LC1. */ | |
381 | static enum machine_registers decode_counters[] = | |
382 | { | |
383 | REG_LC0, REG_LC1, | |
384 | }; | |
385 | ||
b7d48530 NC |
386 | #define counters(x) REGNAME (decode_counters[(x) & 1]) |
387 | #define dregs2_sysregs1(x) REGNAME (decode_dregs2_sysregs1[(x) & 7]) | |
4b7f6baa CM |
388 | |
389 | /* [dregs pregs (iregs mregs) (bregs lregs) | |
390 | dregs2_sysregs1 open sysregs2 sysregs3]. */ | |
391 | static enum machine_registers decode_allregs[] = | |
392 | { | |
393 | REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, | |
394 | REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, | |
395 | REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, REG_M2, REG_M3, | |
396 | REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3, | |
397 | REG_A0x, REG_A0w, REG_A1x, REG_A1w, REG_GP, REG_LASTREG, REG_ASTAT, REG_RETS, | |
398 | REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, REG_LASTREG, | |
399 | REG_LC0, REG_LT0, REG_LB0, REG_LC1, REG_LT1, REG_LB1, REG_CYCLES, REG_CYCLES2, | |
400 | REG_USP, REG_SEQSTAT, REG_SYSCFG, REG_RETI, REG_RETX, REG_RETN, REG_RETE, REG_EMUDAT, REG_LASTREG, | |
401 | }; | |
402 | ||
b7d48530 NC |
403 | #define allregs(x,i) REGNAME (decode_allregs[((i) << 3) | x]) |
404 | #define uimm16s4(x) fmtconst (c_uimm16s4, x, 0, outf) | |
405 | #define pcrel4(x) fmtconst (c_pcrel4, x, pc, outf) | |
406 | #define pcrel8(x) fmtconst (c_pcrel8, x, pc, outf) | |
407 | #define pcrel8s4(x) fmtconst (c_pcrel8s4, x, pc, outf) | |
408 | #define pcrel10(x) fmtconst (c_pcrel10, x, pc, outf) | |
409 | #define pcrel12(x) fmtconst (c_pcrel12, x, pc, outf) | |
410 | #define negimm5s4(x) fmtconst (c_negimm5s4, x, 0, outf) | |
411 | #define rimm16(x) fmtconst (c_rimm16, x, 0, outf) | |
412 | #define huimm16(x) fmtconst (c_huimm16, x, 0, outf) | |
413 | #define imm16(x) fmtconst (c_imm16, x, 0, outf) | |
414 | #define uimm2(x) fmtconst (c_uimm2, x, 0, outf) | |
415 | #define uimm3(x) fmtconst (c_uimm3, x, 0, outf) | |
416 | #define luimm16(x) fmtconst (c_luimm16, x, 0, outf) | |
417 | #define uimm4(x) fmtconst (c_uimm4, x, 0, outf) | |
418 | #define uimm5(x) fmtconst (c_uimm5, x, 0, outf) | |
419 | #define imm16s2(x) fmtconst (c_imm16s2, x, 0, outf) | |
420 | #define uimm8(x) fmtconst (c_uimm8, x, 0, outf) | |
421 | #define imm16s4(x) fmtconst (c_imm16s4, x, 0, outf) | |
422 | #define uimm4s2(x) fmtconst (c_uimm4s2, x, 0, outf) | |
423 | #define uimm4s4(x) fmtconst (c_uimm4s4, x, 0, outf) | |
424 | #define lppcrel10(x) fmtconst (c_lppcrel10, x, pc, outf) | |
425 | #define imm3(x) fmtconst (c_imm3, x, 0, outf) | |
426 | #define imm4(x) fmtconst (c_imm4, x, 0, outf) | |
427 | #define uimm8s4(x) fmtconst (c_uimm8s4, x, 0, outf) | |
428 | #define imm5(x) fmtconst (c_imm5, x, 0, outf) | |
429 | #define imm6(x) fmtconst (c_imm6, x, 0, outf) | |
430 | #define imm7(x) fmtconst (c_imm7, x, 0, outf) | |
431 | #define imm8(x) fmtconst (c_imm8, x, 0, outf) | |
432 | #define pcrel24(x) fmtconst (c_pcrel24, x, pc, outf) | |
433 | #define uimm16(x) fmtconst (c_uimm16, x, 0, outf) | |
b21c9cb4 BS |
434 | #define uimm32(x) fmtconst (c_uimm32, x, 0, outf) |
435 | #define huimm32(x) fmtconst (c_huimm32, x, 0, outf) | |
436 | #define imm16_val(x) fmtconst_val (c_uimm16, x, 0) | |
437 | #define luimm16_val(x) fmtconst_val (c_luimm16, x, 0) | |
4b7f6baa CM |
438 | |
439 | /* (arch.pm)arch_disassembler_functions. */ | |
4b7f6baa | 440 | #ifndef OUTS |
b7d48530 | 441 | #define OUTS(p, txt) ((p) ? (((txt)[0]) ? (p->fprintf_func)(p->stream, txt) :0) :0) |
4b7f6baa CM |
442 | #endif |
443 | ||
4b7f6baa CM |
444 | static void |
445 | amod0 (int s0, int x0, disassemble_info *outf) | |
446 | { | |
b7d48530 NC |
447 | if (s0 == 1 && x0 == 0) |
448 | OUTS (outf, "(S)"); | |
4b7f6baa | 449 | else if (s0 == 0 && x0 == 1) |
b7d48530 | 450 | OUTS (outf, "(CO)"); |
4b7f6baa | 451 | else if (s0 == 1 && x0 == 1) |
b7d48530 | 452 | OUTS (outf, "(SCO)"); |
4b7f6baa CM |
453 | } |
454 | ||
455 | static void | |
456 | amod1 (int s0, int x0, disassemble_info *outf) | |
457 | { | |
458 | if (s0 == 0 && x0 == 0) | |
b7d48530 | 459 | OUTS (outf, "(NS)"); |
4b7f6baa | 460 | else if (s0 == 1 && x0 == 0) |
b7d48530 | 461 | OUTS (outf, "(S)"); |
4b7f6baa CM |
462 | } |
463 | ||
464 | static void | |
465 | amod0amod2 (int s0, int x0, int aop0, disassemble_info *outf) | |
466 | { | |
b7d48530 NC |
467 | if (s0 == 1 && x0 == 0 && aop0 == 0) |
468 | OUTS (outf, "(S)"); | |
4b7f6baa | 469 | else if (s0 == 0 && x0 == 1 && aop0 == 0) |
b7d48530 | 470 | OUTS (outf, "(CO)"); |
4b7f6baa | 471 | else if (s0 == 1 && x0 == 1 && aop0 == 0) |
b7d48530 | 472 | OUTS (outf, "(SCO)"); |
4b7f6baa | 473 | else if (s0 == 0 && x0 == 0 && aop0 == 2) |
b7d48530 | 474 | OUTS (outf, "(ASR)"); |
4b7f6baa | 475 | else if (s0 == 1 && x0 == 0 && aop0 == 2) |
b7d48530 | 476 | OUTS (outf, "(S,ASR)"); |
4b7f6baa | 477 | else if (s0 == 0 && x0 == 1 && aop0 == 2) |
b7d48530 | 478 | OUTS (outf, "(CO,ASR)"); |
4b7f6baa | 479 | else if (s0 == 1 && x0 == 1 && aop0 == 2) |
b7d48530 | 480 | OUTS (outf, "(SCO,ASR)"); |
4b7f6baa | 481 | else if (s0 == 0 && x0 == 0 && aop0 == 3) |
b7d48530 | 482 | OUTS (outf, "(ASL)"); |
4b7f6baa | 483 | else if (s0 == 1 && x0 == 0 && aop0 == 3) |
b7d48530 | 484 | OUTS (outf, "(S,ASL)"); |
4b7f6baa | 485 | else if (s0 == 0 && x0 == 1 && aop0 == 3) |
b7d48530 | 486 | OUTS (outf, "(CO,ASL)"); |
4b7f6baa | 487 | else if (s0 == 1 && x0 == 1 && aop0 == 3) |
b7d48530 | 488 | OUTS (outf, "(SCO,ASL)"); |
4b7f6baa CM |
489 | } |
490 | ||
491 | static void | |
492 | searchmod (int r0, disassemble_info *outf) | |
493 | { | |
b7d48530 NC |
494 | if (r0 == 0) |
495 | OUTS (outf, "GT"); | |
496 | else if (r0 == 1) | |
497 | OUTS (outf, "GE"); | |
498 | else if (r0 == 2) | |
499 | OUTS (outf, "LT"); | |
500 | else if (r0 == 3) | |
501 | OUTS (outf, "LE"); | |
4b7f6baa CM |
502 | } |
503 | ||
504 | static void | |
505 | aligndir (int r0, disassemble_info *outf) | |
506 | { | |
b7d48530 NC |
507 | if (r0 == 1) |
508 | OUTS (outf, "(R)"); | |
4b7f6baa CM |
509 | } |
510 | ||
511 | static int | |
512 | decode_multfunc (int h0, int h1, int src0, int src1, disassemble_info * outf) | |
513 | { | |
514 | char *s0, *s1; | |
515 | ||
516 | if (h0) | |
517 | s0 = dregs_hi (src0); | |
518 | else | |
519 | s0 = dregs_lo (src0); | |
520 | ||
521 | if (h1) | |
522 | s1 = dregs_hi (src1); | |
523 | else | |
524 | s1 = dregs_lo (src1); | |
525 | ||
526 | OUTS (outf, s0); | |
527 | OUTS (outf, " * "); | |
528 | OUTS (outf, s1); | |
529 | return 0; | |
530 | } | |
531 | ||
532 | static int | |
533 | decode_macfunc (int which, int op, int h0, int h1, int src0, int src1, disassemble_info * outf) | |
534 | { | |
535 | char *a; | |
536 | char *sop = "<unknown op>"; | |
537 | ||
538 | if (which) | |
539 | a = "a1"; | |
540 | else | |
541 | a = "a0"; | |
542 | ||
543 | if (op == 3) | |
544 | { | |
545 | OUTS (outf, a); | |
546 | return 0; | |
547 | } | |
548 | ||
549 | switch (op) | |
550 | { | |
b7d48530 NC |
551 | case 0: sop = "="; break; |
552 | case 1: sop = "+="; break; | |
553 | case 2: sop = "-="; break; | |
554 | default: break; | |
4b7f6baa CM |
555 | } |
556 | ||
557 | OUTS (outf, a); | |
558 | OUTS (outf, " "); | |
559 | OUTS (outf, sop); | |
560 | OUTS (outf, " "); | |
561 | decode_multfunc (h0, h1, src0, src1, outf); | |
562 | ||
563 | return 0; | |
564 | } | |
565 | ||
566 | static void | |
567 | decode_optmode (int mod, int MM, disassemble_info *outf) | |
568 | { | |
569 | if (mod == 0 && MM == 0) | |
570 | return; | |
571 | ||
572 | OUTS (outf, " ("); | |
573 | ||
574 | if (MM && !mod) | |
575 | { | |
576 | OUTS (outf, "M)"); | |
577 | return; | |
578 | } | |
579 | ||
580 | if (MM) | |
581 | OUTS (outf, "M, "); | |
b7d48530 | 582 | |
4b7f6baa CM |
583 | if (mod == M_S2RND) |
584 | OUTS (outf, "S2RND"); | |
585 | else if (mod == M_T) | |
586 | OUTS (outf, "T"); | |
587 | else if (mod == M_W32) | |
588 | OUTS (outf, "W32"); | |
589 | else if (mod == M_FU) | |
590 | OUTS (outf, "FU"); | |
591 | else if (mod == M_TFU) | |
592 | OUTS (outf, "TFU"); | |
593 | else if (mod == M_IS) | |
594 | OUTS (outf, "IS"); | |
595 | else if (mod == M_ISS2) | |
596 | OUTS (outf, "ISS2"); | |
597 | else if (mod == M_IH) | |
598 | OUTS (outf, "IH"); | |
599 | else if (mod == M_IU) | |
600 | OUTS (outf, "IU"); | |
601 | else | |
602 | abort (); | |
603 | ||
604 | OUTS (outf, ")"); | |
605 | } | |
b7d48530 | 606 | |
b21c9cb4 BS |
607 | struct saved_state |
608 | { | |
609 | bu32 dpregs[16], iregs[4], mregs[4], bregs[4], lregs[4]; | |
610 | bu32 a0x, a0w, a1x, a1w; | |
611 | bu32 lt[2], lc[2], lb[2]; | |
612 | int ac0, ac0_copy, ac1, an, aq; | |
613 | int av0, av0s, av1, av1s, az, cc, v, v_copy, vs; | |
614 | int rnd_mod; | |
615 | int v_internal; | |
616 | bu32 pc, rets; | |
617 | ||
618 | int ticks; | |
619 | int insts; | |
620 | ||
621 | int exception; | |
622 | ||
623 | int end_of_registers; | |
624 | ||
625 | int msize; | |
626 | unsigned char *memory; | |
627 | unsigned long bfd_mach; | |
628 | } saved_state; | |
629 | ||
630 | #define DREG(x) (saved_state.dpregs[x]) | |
631 | #define GREG(x,i) DPREG ((x) | (i << 3)) | |
632 | #define DPREG(x) (saved_state.dpregs[x]) | |
633 | #define DREG(x) (saved_state.dpregs[x]) | |
634 | #define PREG(x) (saved_state.dpregs[x + 8]) | |
635 | #define SPREG PREG (6) | |
636 | #define FPREG PREG (7) | |
637 | #define IREG(x) (saved_state.iregs[x]) | |
638 | #define MREG(x) (saved_state.mregs[x]) | |
639 | #define BREG(x) (saved_state.bregs[x]) | |
640 | #define LREG(x) (saved_state.lregs[x]) | |
641 | #define A0XREG (saved_state.a0x) | |
642 | #define A0WREG (saved_state.a0w) | |
643 | #define A1XREG (saved_state.a1x) | |
644 | #define A1WREG (saved_state.a1w) | |
645 | #define CCREG (saved_state.cc) | |
646 | #define LC0REG (saved_state.lc[0]) | |
647 | #define LT0REG (saved_state.lt[0]) | |
648 | #define LB0REG (saved_state.lb[0]) | |
649 | #define LC1REG (saved_state.lc[1]) | |
650 | #define LT1REG (saved_state.lt[1]) | |
651 | #define LB1REG (saved_state.lb[1]) | |
652 | #define RETSREG (saved_state.rets) | |
653 | #define PCREG (saved_state.pc) | |
654 | ||
655 | static bu32 * | |
656 | get_allreg (int grp, int reg) | |
657 | { | |
658 | int fullreg = (grp << 3) | reg; | |
659 | /* REG_R0, REG_R1, REG_R2, REG_R3, REG_R4, REG_R5, REG_R6, REG_R7, | |
660 | REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, | |
661 | REG_I0, REG_I1, REG_I2, REG_I3, REG_M0, REG_M1, REG_M2, REG_M3, | |
662 | REG_B0, REG_B1, REG_B2, REG_B3, REG_L0, REG_L1, REG_L2, REG_L3, | |
663 | REG_A0x, REG_A0w, REG_A1x, REG_A1w, , , REG_ASTAT, REG_RETS, | |
664 | , , , , , , , , | |
665 | REG_LC0, REG_LT0, REG_LB0, REG_LC1, REG_LT1, REG_LB1, REG_CYCLES, | |
666 | REG_CYCLES2, | |
667 | REG_USP, REG_SEQSTAT, REG_SYSCFG, REG_RETI, REG_RETX, REG_RETN, REG_RETE, | |
668 | REG_LASTREG */ | |
669 | switch (fullreg >> 2) | |
670 | { | |
671 | case 0: case 1: return &DREG (reg); break; | |
672 | case 2: case 3: return &PREG (reg); break; | |
673 | case 4: return &IREG (reg & 3); break; | |
674 | case 5: return &MREG (reg & 3); break; | |
675 | case 6: return &BREG (reg & 3); break; | |
676 | case 7: return &LREG (reg & 3); break; | |
677 | default: | |
678 | switch (fullreg) | |
679 | { | |
680 | case 32: return &saved_state.a0x; | |
681 | case 33: return &saved_state.a0w; | |
682 | case 34: return &saved_state.a1x; | |
683 | case 35: return &saved_state.a1w; | |
684 | case 39: return &saved_state.rets; | |
685 | case 48: return &LC0REG; | |
686 | case 49: return <0REG; | |
687 | case 50: return &LB0REG; | |
688 | case 51: return &LC1REG; | |
689 | case 52: return <1REG; | |
690 | case 53: return &LB1REG; | |
691 | } | |
692 | return 0; | |
693 | } | |
694 | } | |
695 | ||
4b7f6baa CM |
696 | static int |
697 | decode_ProgCtrl_0 (TIword iw0, disassemble_info *outf) | |
698 | { | |
b7d48530 NC |
699 | /* ProgCtrl |
700 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
701 | | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.prgfunc.......|.poprnd........| | |
702 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
703 | int poprnd = ((iw0 >> ProgCtrl_poprnd_bits) & ProgCtrl_poprnd_mask); |
704 | int prgfunc = ((iw0 >> ProgCtrl_prgfunc_bits) & ProgCtrl_prgfunc_mask); | |
705 | ||
706 | if (prgfunc == 0 && poprnd == 0) | |
b7d48530 | 707 | OUTS (outf, "NOP"); |
4b7f6baa | 708 | else if (prgfunc == 1 && poprnd == 0) |
b7d48530 | 709 | OUTS (outf, "RTS"); |
4b7f6baa | 710 | else if (prgfunc == 1 && poprnd == 1) |
b7d48530 | 711 | OUTS (outf, "RTI"); |
4b7f6baa | 712 | else if (prgfunc == 1 && poprnd == 2) |
b7d48530 | 713 | OUTS (outf, "RTX"); |
4b7f6baa | 714 | else if (prgfunc == 1 && poprnd == 3) |
b7d48530 | 715 | OUTS (outf, "RTN"); |
4b7f6baa | 716 | else if (prgfunc == 1 && poprnd == 4) |
b7d48530 | 717 | OUTS (outf, "RTE"); |
4b7f6baa | 718 | else if (prgfunc == 2 && poprnd == 0) |
b7d48530 | 719 | OUTS (outf, "IDLE"); |
4b7f6baa | 720 | else if (prgfunc == 2 && poprnd == 3) |
b7d48530 | 721 | OUTS (outf, "CSYNC"); |
4b7f6baa | 722 | else if (prgfunc == 2 && poprnd == 4) |
b7d48530 | 723 | OUTS (outf, "SSYNC"); |
4b7f6baa | 724 | else if (prgfunc == 2 && poprnd == 5) |
b7d48530 | 725 | OUTS (outf, "EMUEXCPT"); |
4b7f6baa CM |
726 | else if (prgfunc == 3) |
727 | { | |
4b7f6baa CM |
728 | OUTS (outf, "CLI "); |
729 | OUTS (outf, dregs (poprnd)); | |
4b7f6baa CM |
730 | } |
731 | else if (prgfunc == 4) | |
732 | { | |
4b7f6baa CM |
733 | OUTS (outf, "STI "); |
734 | OUTS (outf, dregs (poprnd)); | |
4b7f6baa CM |
735 | } |
736 | else if (prgfunc == 5) | |
737 | { | |
4b7f6baa CM |
738 | OUTS (outf, "JUMP ("); |
739 | OUTS (outf, pregs (poprnd)); | |
740 | OUTS (outf, ")"); | |
4b7f6baa CM |
741 | } |
742 | else if (prgfunc == 6) | |
743 | { | |
4b7f6baa CM |
744 | OUTS (outf, "CALL ("); |
745 | OUTS (outf, pregs (poprnd)); | |
746 | OUTS (outf, ")"); | |
4b7f6baa CM |
747 | } |
748 | else if (prgfunc == 7) | |
749 | { | |
4b7f6baa CM |
750 | OUTS (outf, "CALL (PC+"); |
751 | OUTS (outf, pregs (poprnd)); | |
752 | OUTS (outf, ")"); | |
4b7f6baa CM |
753 | } |
754 | else if (prgfunc == 8) | |
755 | { | |
4b7f6baa CM |
756 | OUTS (outf, "JUMP (PC+"); |
757 | OUTS (outf, pregs (poprnd)); | |
758 | OUTS (outf, ")"); | |
4b7f6baa CM |
759 | } |
760 | else if (prgfunc == 9) | |
761 | { | |
4b7f6baa CM |
762 | OUTS (outf, "RAISE "); |
763 | OUTS (outf, uimm4 (poprnd)); | |
4b7f6baa CM |
764 | } |
765 | else if (prgfunc == 10) | |
766 | { | |
4b7f6baa CM |
767 | OUTS (outf, "EXCPT "); |
768 | OUTS (outf, uimm4 (poprnd)); | |
4b7f6baa CM |
769 | } |
770 | else if (prgfunc == 11) | |
771 | { | |
4b7f6baa CM |
772 | OUTS (outf, "TESTSET ("); |
773 | OUTS (outf, pregs (poprnd)); | |
774 | OUTS (outf, ")"); | |
4b7f6baa CM |
775 | } |
776 | else | |
b7d48530 NC |
777 | return 0; |
778 | return 2; | |
4b7f6baa CM |
779 | } |
780 | ||
781 | static int | |
782 | decode_CaCTRL_0 (TIword iw0, disassemble_info *outf) | |
783 | { | |
b7d48530 NC |
784 | /* CaCTRL |
785 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
786 | | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |.a.|.op....|.reg.......| | |
787 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
788 | int a = ((iw0 >> CaCTRL_a_bits) & CaCTRL_a_mask); |
789 | int op = ((iw0 >> CaCTRL_op_bits) & CaCTRL_op_mask); | |
790 | int reg = ((iw0 >> CaCTRL_reg_bits) & CaCTRL_reg_mask); | |
791 | ||
792 | if (a == 0 && op == 0) | |
793 | { | |
4b7f6baa CM |
794 | OUTS (outf, "PREFETCH["); |
795 | OUTS (outf, pregs (reg)); | |
796 | OUTS (outf, "]"); | |
4b7f6baa CM |
797 | } |
798 | else if (a == 0 && op == 1) | |
799 | { | |
4b7f6baa CM |
800 | OUTS (outf, "FLUSHINV["); |
801 | OUTS (outf, pregs (reg)); | |
802 | OUTS (outf, "]"); | |
4b7f6baa CM |
803 | } |
804 | else if (a == 0 && op == 2) | |
805 | { | |
4b7f6baa CM |
806 | OUTS (outf, "FLUSH["); |
807 | OUTS (outf, pregs (reg)); | |
808 | OUTS (outf, "]"); | |
4b7f6baa CM |
809 | } |
810 | else if (a == 0 && op == 3) | |
811 | { | |
4b7f6baa CM |
812 | OUTS (outf, "IFLUSH["); |
813 | OUTS (outf, pregs (reg)); | |
814 | OUTS (outf, "]"); | |
4b7f6baa CM |
815 | } |
816 | else if (a == 1 && op == 0) | |
817 | { | |
4b7f6baa CM |
818 | OUTS (outf, "PREFETCH["); |
819 | OUTS (outf, pregs (reg)); | |
820 | OUTS (outf, "++]"); | |
4b7f6baa CM |
821 | } |
822 | else if (a == 1 && op == 1) | |
823 | { | |
4b7f6baa CM |
824 | OUTS (outf, "FLUSHINV["); |
825 | OUTS (outf, pregs (reg)); | |
826 | OUTS (outf, "++]"); | |
4b7f6baa CM |
827 | } |
828 | else if (a == 1 && op == 2) | |
829 | { | |
4b7f6baa CM |
830 | OUTS (outf, "FLUSH["); |
831 | OUTS (outf, pregs (reg)); | |
832 | OUTS (outf, "++]"); | |
4b7f6baa CM |
833 | } |
834 | else if (a == 1 && op == 3) | |
835 | { | |
4b7f6baa CM |
836 | OUTS (outf, "IFLUSH["); |
837 | OUTS (outf, pregs (reg)); | |
838 | OUTS (outf, "++]"); | |
4b7f6baa CM |
839 | } |
840 | else | |
b7d48530 NC |
841 | return 0; |
842 | return 2; | |
4b7f6baa CM |
843 | } |
844 | ||
845 | static int | |
846 | decode_PushPopReg_0 (TIword iw0, disassemble_info *outf) | |
847 | { | |
b7d48530 NC |
848 | /* PushPopReg |
849 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
850 | | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.W.|.grp.......|.reg.......| | |
851 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
852 | int W = ((iw0 >> PushPopReg_W_bits) & PushPopReg_W_mask); |
853 | int grp = ((iw0 >> PushPopReg_grp_bits) & PushPopReg_grp_mask); | |
854 | int reg = ((iw0 >> PushPopReg_reg_bits) & PushPopReg_reg_mask); | |
855 | ||
856 | if (W == 0) | |
857 | { | |
4b7f6baa CM |
858 | OUTS (outf, allregs (reg, grp)); |
859 | OUTS (outf, " = [SP++]"); | |
4b7f6baa CM |
860 | } |
861 | else if (W == 1) | |
862 | { | |
4b7f6baa CM |
863 | OUTS (outf, "[--SP] = "); |
864 | OUTS (outf, allregs (reg, grp)); | |
4b7f6baa CM |
865 | } |
866 | else | |
b7d48530 NC |
867 | return 0; |
868 | return 2; | |
4b7f6baa CM |
869 | } |
870 | ||
871 | static int | |
872 | decode_PushPopMultiple_0 (TIword iw0, disassemble_info *outf) | |
873 | { | |
b7d48530 NC |
874 | /* PushPopMultiple |
875 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
876 | | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.d.|.p.|.W.|.dr........|.pr........| | |
877 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
878 | int p = ((iw0 >> PushPopMultiple_p_bits) & PushPopMultiple_p_mask); |
879 | int d = ((iw0 >> PushPopMultiple_d_bits) & PushPopMultiple_d_mask); | |
880 | int W = ((iw0 >> PushPopMultiple_W_bits) & PushPopMultiple_W_mask); | |
881 | int dr = ((iw0 >> PushPopMultiple_dr_bits) & PushPopMultiple_dr_mask); | |
882 | int pr = ((iw0 >> PushPopMultiple_pr_bits) & PushPopMultiple_pr_mask); | |
4b7f6baa | 883 | char ps[5], ds[5]; |
b7d48530 | 884 | |
4b7f6baa CM |
885 | sprintf (ps, "%d", pr); |
886 | sprintf (ds, "%d", dr); | |
887 | ||
888 | if (W == 1 && d == 1 && p == 1) | |
889 | { | |
4b7f6baa CM |
890 | OUTS (outf, "[--SP] = (R7:"); |
891 | OUTS (outf, ds); | |
892 | OUTS (outf, ", P5:"); | |
893 | OUTS (outf, ps); | |
894 | OUTS (outf, ")"); | |
4b7f6baa CM |
895 | } |
896 | else if (W == 1 && d == 1 && p == 0) | |
897 | { | |
4b7f6baa CM |
898 | OUTS (outf, "[--SP] = (R7:"); |
899 | OUTS (outf, ds); | |
900 | OUTS (outf, ")"); | |
4b7f6baa CM |
901 | } |
902 | else if (W == 1 && d == 0 && p == 1) | |
903 | { | |
4b7f6baa CM |
904 | OUTS (outf, "[--SP] = (P5:"); |
905 | OUTS (outf, ps); | |
906 | OUTS (outf, ")"); | |
4b7f6baa CM |
907 | } |
908 | else if (W == 0 && d == 1 && p == 1) | |
909 | { | |
4b7f6baa CM |
910 | OUTS (outf, "(R7:"); |
911 | OUTS (outf, ds); | |
912 | OUTS (outf, ", P5:"); | |
913 | OUTS (outf, ps); | |
914 | OUTS (outf, ") = [SP++]"); | |
4b7f6baa CM |
915 | } |
916 | else if (W == 0 && d == 1 && p == 0) | |
917 | { | |
4b7f6baa CM |
918 | OUTS (outf, "(R7:"); |
919 | OUTS (outf, ds); | |
920 | OUTS (outf, ") = [SP++]"); | |
4b7f6baa CM |
921 | } |
922 | else if (W == 0 && d == 0 && p == 1) | |
923 | { | |
4b7f6baa CM |
924 | OUTS (outf, "(P5:"); |
925 | OUTS (outf, ps); | |
926 | OUTS (outf, ") = [SP++]"); | |
4b7f6baa CM |
927 | } |
928 | else | |
b7d48530 NC |
929 | return 0; |
930 | return 2; | |
4b7f6baa CM |
931 | } |
932 | ||
933 | static int | |
934 | decode_ccMV_0 (TIword iw0, disassemble_info *outf) | |
935 | { | |
b7d48530 NC |
936 | /* ccMV |
937 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
938 | | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.T.|.d.|.s.|.dst.......|.src.......| | |
939 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
940 | int s = ((iw0 >> CCmv_s_bits) & CCmv_s_mask); |
941 | int d = ((iw0 >> CCmv_d_bits) & CCmv_d_mask); | |
942 | int T = ((iw0 >> CCmv_T_bits) & CCmv_T_mask); | |
943 | int src = ((iw0 >> CCmv_src_bits) & CCmv_src_mask); | |
944 | int dst = ((iw0 >> CCmv_dst_bits) & CCmv_dst_mask); | |
945 | ||
946 | if (T == 1) | |
947 | { | |
4b7f6baa CM |
948 | OUTS (outf, "IF CC "); |
949 | OUTS (outf, gregs (dst, d)); | |
950 | OUTS (outf, " = "); | |
951 | OUTS (outf, gregs (src, s)); | |
4b7f6baa CM |
952 | } |
953 | else if (T == 0) | |
954 | { | |
4b7f6baa CM |
955 | OUTS (outf, "IF ! CC "); |
956 | OUTS (outf, gregs (dst, d)); | |
957 | OUTS (outf, " = "); | |
958 | OUTS (outf, gregs (src, s)); | |
4b7f6baa CM |
959 | } |
960 | else | |
b7d48530 NC |
961 | return 0; |
962 | return 2; | |
4b7f6baa CM |
963 | } |
964 | ||
965 | static int | |
966 | decode_CCflag_0 (TIword iw0, disassemble_info *outf) | |
967 | { | |
b7d48530 NC |
968 | /* CCflag |
969 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
970 | | 0 | 0 | 0 | 0 | 1 |.I.|.opc.......|.G.|.y.........|.x.........| | |
971 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
972 | int x = ((iw0 >> CCflag_x_bits) & CCflag_x_mask); |
973 | int y = ((iw0 >> CCflag_y_bits) & CCflag_y_mask); | |
974 | int I = ((iw0 >> CCflag_I_bits) & CCflag_I_mask); | |
975 | int G = ((iw0 >> CCflag_G_bits) & CCflag_G_mask); | |
976 | int opc = ((iw0 >> CCflag_opc_bits) & CCflag_opc_mask); | |
977 | ||
978 | if (opc == 0 && I == 0 && G == 0) | |
979 | { | |
4b7f6baa CM |
980 | OUTS (outf, "CC="); |
981 | OUTS (outf, dregs (x)); | |
982 | OUTS (outf, "=="); | |
983 | OUTS (outf, dregs (y)); | |
4b7f6baa CM |
984 | } |
985 | else if (opc == 1 && I == 0 && G == 0) | |
986 | { | |
4b7f6baa CM |
987 | OUTS (outf, "CC="); |
988 | OUTS (outf, dregs (x)); | |
989 | OUTS (outf, "<"); | |
990 | OUTS (outf, dregs (y)); | |
4b7f6baa CM |
991 | } |
992 | else if (opc == 2 && I == 0 && G == 0) | |
993 | { | |
4b7f6baa CM |
994 | OUTS (outf, "CC="); |
995 | OUTS (outf, dregs (x)); | |
996 | OUTS (outf, "<="); | |
997 | OUTS (outf, dregs (y)); | |
4b7f6baa CM |
998 | } |
999 | else if (opc == 3 && I == 0 && G == 0) | |
1000 | { | |
4b7f6baa CM |
1001 | OUTS (outf, "CC="); |
1002 | OUTS (outf, dregs (x)); | |
1003 | OUTS (outf, "<"); | |
1004 | OUTS (outf, dregs (y)); | |
1005 | OUTS (outf, "(IU)"); | |
4b7f6baa CM |
1006 | } |
1007 | else if (opc == 4 && I == 0 && G == 0) | |
1008 | { | |
4b7f6baa CM |
1009 | OUTS (outf, "CC="); |
1010 | OUTS (outf, dregs (x)); | |
1011 | OUTS (outf, "<="); | |
1012 | OUTS (outf, dregs (y)); | |
1013 | OUTS (outf, "(IU)"); | |
4b7f6baa CM |
1014 | } |
1015 | else if (opc == 0 && I == 1 && G == 0) | |
1016 | { | |
4b7f6baa CM |
1017 | OUTS (outf, "CC="); |
1018 | OUTS (outf, dregs (x)); | |
1019 | OUTS (outf, "=="); | |
1020 | OUTS (outf, imm3 (y)); | |
4b7f6baa CM |
1021 | } |
1022 | else if (opc == 1 && I == 1 && G == 0) | |
1023 | { | |
4b7f6baa CM |
1024 | OUTS (outf, "CC="); |
1025 | OUTS (outf, dregs (x)); | |
1026 | OUTS (outf, "<"); | |
1027 | OUTS (outf, imm3 (y)); | |
4b7f6baa CM |
1028 | } |
1029 | else if (opc == 2 && I == 1 && G == 0) | |
1030 | { | |
4b7f6baa CM |
1031 | OUTS (outf, "CC="); |
1032 | OUTS (outf, dregs (x)); | |
1033 | OUTS (outf, "<="); | |
1034 | OUTS (outf, imm3 (y)); | |
4b7f6baa CM |
1035 | } |
1036 | else if (opc == 3 && I == 1 && G == 0) | |
1037 | { | |
4b7f6baa CM |
1038 | OUTS (outf, "CC="); |
1039 | OUTS (outf, dregs (x)); | |
1040 | OUTS (outf, "<"); | |
1041 | OUTS (outf, uimm3 (y)); | |
1042 | OUTS (outf, "(IU)"); | |
4b7f6baa CM |
1043 | } |
1044 | else if (opc == 4 && I == 1 && G == 0) | |
1045 | { | |
4b7f6baa CM |
1046 | OUTS (outf, "CC="); |
1047 | OUTS (outf, dregs (x)); | |
1048 | OUTS (outf, "<="); | |
1049 | OUTS (outf, uimm3 (y)); | |
1050 | OUTS (outf, "(IU)"); | |
4b7f6baa CM |
1051 | } |
1052 | else if (opc == 0 && I == 0 && G == 1) | |
1053 | { | |
4b7f6baa CM |
1054 | OUTS (outf, "CC="); |
1055 | OUTS (outf, pregs (x)); | |
1056 | OUTS (outf, "=="); | |
1057 | OUTS (outf, pregs (y)); | |
4b7f6baa CM |
1058 | } |
1059 | else if (opc == 1 && I == 0 && G == 1) | |
1060 | { | |
4b7f6baa CM |
1061 | OUTS (outf, "CC="); |
1062 | OUTS (outf, pregs (x)); | |
1063 | OUTS (outf, "<"); | |
1064 | OUTS (outf, pregs (y)); | |
4b7f6baa CM |
1065 | } |
1066 | else if (opc == 2 && I == 0 && G == 1) | |
1067 | { | |
4b7f6baa CM |
1068 | OUTS (outf, "CC="); |
1069 | OUTS (outf, pregs (x)); | |
1070 | OUTS (outf, "<="); | |
1071 | OUTS (outf, pregs (y)); | |
4b7f6baa CM |
1072 | } |
1073 | else if (opc == 3 && I == 0 && G == 1) | |
1074 | { | |
4b7f6baa CM |
1075 | OUTS (outf, "CC="); |
1076 | OUTS (outf, pregs (x)); | |
1077 | OUTS (outf, "<"); | |
1078 | OUTS (outf, pregs (y)); | |
1079 | OUTS (outf, "(IU)"); | |
4b7f6baa CM |
1080 | } |
1081 | else if (opc == 4 && I == 0 && G == 1) | |
1082 | { | |
4b7f6baa CM |
1083 | OUTS (outf, "CC="); |
1084 | OUTS (outf, pregs (x)); | |
1085 | OUTS (outf, "<="); | |
1086 | OUTS (outf, pregs (y)); | |
1087 | OUTS (outf, "(IU)"); | |
4b7f6baa CM |
1088 | } |
1089 | else if (opc == 0 && I == 1 && G == 1) | |
1090 | { | |
4b7f6baa CM |
1091 | OUTS (outf, "CC="); |
1092 | OUTS (outf, pregs (x)); | |
1093 | OUTS (outf, "=="); | |
1094 | OUTS (outf, imm3 (y)); | |
4b7f6baa CM |
1095 | } |
1096 | else if (opc == 1 && I == 1 && G == 1) | |
1097 | { | |
4b7f6baa CM |
1098 | OUTS (outf, "CC="); |
1099 | OUTS (outf, pregs (x)); | |
1100 | OUTS (outf, "<"); | |
1101 | OUTS (outf, imm3 (y)); | |
4b7f6baa CM |
1102 | } |
1103 | else if (opc == 2 && I == 1 && G == 1) | |
1104 | { | |
4b7f6baa CM |
1105 | OUTS (outf, "CC="); |
1106 | OUTS (outf, pregs (x)); | |
1107 | OUTS (outf, "<="); | |
1108 | OUTS (outf, imm3 (y)); | |
4b7f6baa CM |
1109 | } |
1110 | else if (opc == 3 && I == 1 && G == 1) | |
1111 | { | |
4b7f6baa CM |
1112 | OUTS (outf, "CC="); |
1113 | OUTS (outf, pregs (x)); | |
1114 | OUTS (outf, "<"); | |
1115 | OUTS (outf, uimm3 (y)); | |
1116 | OUTS (outf, "(IU)"); | |
4b7f6baa CM |
1117 | } |
1118 | else if (opc == 4 && I == 1 && G == 1) | |
1119 | { | |
4b7f6baa CM |
1120 | OUTS (outf, "CC="); |
1121 | OUTS (outf, pregs (x)); | |
1122 | OUTS (outf, "<="); | |
1123 | OUTS (outf, uimm3 (y)); | |
1124 | OUTS (outf, "(IU)"); | |
4b7f6baa CM |
1125 | } |
1126 | else if (opc == 5 && I == 0 && G == 0) | |
b7d48530 NC |
1127 | OUTS (outf, "CC=A0==A1"); |
1128 | ||
4b7f6baa | 1129 | else if (opc == 6 && I == 0 && G == 0) |
b7d48530 NC |
1130 | OUTS (outf, "CC=A0<A1"); |
1131 | ||
4b7f6baa | 1132 | else if (opc == 7 && I == 0 && G == 0) |
b7d48530 NC |
1133 | OUTS (outf, "CC=A0<=A1"); |
1134 | ||
4b7f6baa | 1135 | else |
b7d48530 NC |
1136 | return 0; |
1137 | return 2; | |
4b7f6baa CM |
1138 | } |
1139 | ||
1140 | static int | |
1141 | decode_CC2dreg_0 (TIword iw0, disassemble_info *outf) | |
1142 | { | |
b7d48530 NC |
1143 | /* CC2dreg |
1144 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1145 | | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |.op....|.reg.......| | |
1146 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1147 | int op = ((iw0 >> CC2dreg_op_bits) & CC2dreg_op_mask); |
1148 | int reg = ((iw0 >> CC2dreg_reg_bits) & CC2dreg_reg_mask); | |
1149 | ||
1150 | if (op == 0) | |
1151 | { | |
4b7f6baa CM |
1152 | OUTS (outf, dregs (reg)); |
1153 | OUTS (outf, "=CC"); | |
4b7f6baa CM |
1154 | } |
1155 | else if (op == 1) | |
1156 | { | |
4b7f6baa CM |
1157 | OUTS (outf, "CC="); |
1158 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
1159 | } |
1160 | else if (op == 3) | |
b7d48530 | 1161 | OUTS (outf, "CC=!CC"); |
4b7f6baa | 1162 | else |
b7d48530 NC |
1163 | return 0; |
1164 | ||
1165 | return 2; | |
4b7f6baa CM |
1166 | } |
1167 | ||
1168 | static int | |
1169 | decode_CC2stat_0 (TIword iw0, disassemble_info *outf) | |
1170 | { | |
b7d48530 NC |
1171 | /* CC2stat |
1172 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1173 | | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.D.|.op....|.cbit..............| | |
1174 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1175 | int D = ((iw0 >> CC2stat_D_bits) & CC2stat_D_mask); |
1176 | int op = ((iw0 >> CC2stat_op_bits) & CC2stat_op_mask); | |
1177 | int cbit = ((iw0 >> CC2stat_cbit_bits) & CC2stat_cbit_mask); | |
1178 | ||
1179 | if (op == 0 && D == 0) | |
1180 | { | |
4b7f6baa CM |
1181 | OUTS (outf, "CC = "); |
1182 | OUTS (outf, statbits (cbit)); | |
4b7f6baa CM |
1183 | } |
1184 | else if (op == 1 && D == 0) | |
1185 | { | |
4b7f6baa CM |
1186 | OUTS (outf, "CC|="); |
1187 | OUTS (outf, statbits (cbit)); | |
4b7f6baa CM |
1188 | } |
1189 | else if (op == 2 && D == 0) | |
1190 | { | |
4b7f6baa CM |
1191 | OUTS (outf, "CC&="); |
1192 | OUTS (outf, statbits (cbit)); | |
4b7f6baa CM |
1193 | } |
1194 | else if (op == 3 && D == 0) | |
1195 | { | |
4b7f6baa CM |
1196 | OUTS (outf, "CC^="); |
1197 | OUTS (outf, statbits (cbit)); | |
4b7f6baa CM |
1198 | } |
1199 | else if (op == 0 && D == 1) | |
1200 | { | |
4b7f6baa CM |
1201 | OUTS (outf, statbits (cbit)); |
1202 | OUTS (outf, "=CC"); | |
4b7f6baa CM |
1203 | } |
1204 | else if (op == 1 && D == 1) | |
1205 | { | |
4b7f6baa CM |
1206 | OUTS (outf, statbits (cbit)); |
1207 | OUTS (outf, "|=CC"); | |
4b7f6baa CM |
1208 | } |
1209 | else if (op == 2 && D == 1) | |
1210 | { | |
4b7f6baa CM |
1211 | OUTS (outf, statbits (cbit)); |
1212 | OUTS (outf, "&=CC"); | |
4b7f6baa CM |
1213 | } |
1214 | else if (op == 3 && D == 1) | |
1215 | { | |
4b7f6baa CM |
1216 | OUTS (outf, statbits (cbit)); |
1217 | OUTS (outf, "^=CC"); | |
4b7f6baa CM |
1218 | } |
1219 | else | |
b7d48530 NC |
1220 | return 0; |
1221 | ||
1222 | return 2; | |
4b7f6baa CM |
1223 | } |
1224 | ||
1225 | static int | |
1226 | decode_BRCC_0 (TIword iw0, bfd_vma pc, disassemble_info *outf) | |
1227 | { | |
b7d48530 NC |
1228 | /* BRCC |
1229 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1230 | | 0 | 0 | 0 | 1 |.T.|.B.|.offset................................| | |
1231 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1232 | int B = ((iw0 >> BRCC_B_bits) & BRCC_B_mask); |
1233 | int T = ((iw0 >> BRCC_T_bits) & BRCC_T_mask); | |
1234 | int offset = ((iw0 >> BRCC_offset_bits) & BRCC_offset_mask); | |
1235 | ||
1236 | if (T == 1 && B == 1) | |
1237 | { | |
4b7f6baa CM |
1238 | OUTS (outf, "IF CC JUMP "); |
1239 | OUTS (outf, pcrel10 (offset)); | |
1240 | OUTS (outf, "(BP)"); | |
4b7f6baa CM |
1241 | } |
1242 | else if (T == 0 && B == 1) | |
1243 | { | |
4b7f6baa CM |
1244 | OUTS (outf, "IF ! CC JUMP "); |
1245 | OUTS (outf, pcrel10 (offset)); | |
1246 | OUTS (outf, "(BP)"); | |
4b7f6baa CM |
1247 | } |
1248 | else if (T == 1) | |
1249 | { | |
4b7f6baa CM |
1250 | OUTS (outf, "IF CC JUMP "); |
1251 | OUTS (outf, pcrel10 (offset)); | |
4b7f6baa CM |
1252 | } |
1253 | else if (T == 0) | |
1254 | { | |
4b7f6baa CM |
1255 | OUTS (outf, "IF ! CC JUMP "); |
1256 | OUTS (outf, pcrel10 (offset)); | |
4b7f6baa CM |
1257 | } |
1258 | else | |
b7d48530 NC |
1259 | return 0; |
1260 | ||
1261 | return 2; | |
4b7f6baa CM |
1262 | } |
1263 | ||
1264 | static int | |
1265 | decode_UJUMP_0 (TIword iw0, bfd_vma pc, disassemble_info *outf) | |
1266 | { | |
b7d48530 NC |
1267 | /* UJUMP |
1268 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1269 | | 0 | 0 | 1 | 0 |.offset........................................| | |
1270 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1271 | int offset = ((iw0 >> UJump_offset_bits) & UJump_offset_mask); |
1272 | ||
4b7f6baa CM |
1273 | OUTS (outf, "JUMP.S "); |
1274 | OUTS (outf, pcrel12 (offset)); | |
b7d48530 | 1275 | return 2; |
4b7f6baa CM |
1276 | } |
1277 | ||
1278 | static int | |
1279 | decode_REGMV_0 (TIword iw0, disassemble_info *outf) | |
1280 | { | |
b7d48530 NC |
1281 | /* REGMV |
1282 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1283 | | 0 | 0 | 1 | 1 |.gd........|.gs........|.dst.......|.src.......| | |
1284 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1285 | int gs = ((iw0 >> RegMv_gs_bits) & RegMv_gs_mask); |
1286 | int gd = ((iw0 >> RegMv_gd_bits) & RegMv_gd_mask); | |
1287 | int src = ((iw0 >> RegMv_src_bits) & RegMv_src_mask); | |
1288 | int dst = ((iw0 >> RegMv_dst_bits) & RegMv_dst_mask); | |
1289 | ||
4b7f6baa CM |
1290 | OUTS (outf, allregs (dst, gd)); |
1291 | OUTS (outf, "="); | |
1292 | OUTS (outf, allregs (src, gs)); | |
b7d48530 | 1293 | return 2; |
4b7f6baa CM |
1294 | } |
1295 | ||
1296 | static int | |
1297 | decode_ALU2op_0 (TIword iw0, disassemble_info *outf) | |
1298 | { | |
b7d48530 NC |
1299 | /* ALU2op |
1300 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1301 | | 0 | 1 | 0 | 0 | 0 | 0 |.opc...........|.src.......|.dst.......| | |
1302 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1303 | int src = ((iw0 >> ALU2op_src_bits) & ALU2op_src_mask); |
1304 | int opc = ((iw0 >> ALU2op_opc_bits) & ALU2op_opc_mask); | |
1305 | int dst = ((iw0 >> ALU2op_dst_bits) & ALU2op_dst_mask); | |
1306 | ||
1307 | if (opc == 0) | |
1308 | { | |
4b7f6baa CM |
1309 | OUTS (outf, dregs (dst)); |
1310 | OUTS (outf, ">>>="); | |
1311 | OUTS (outf, dregs (src)); | |
4b7f6baa CM |
1312 | } |
1313 | else if (opc == 1) | |
1314 | { | |
4b7f6baa CM |
1315 | OUTS (outf, dregs (dst)); |
1316 | OUTS (outf, ">>="); | |
1317 | OUTS (outf, dregs (src)); | |
4b7f6baa CM |
1318 | } |
1319 | else if (opc == 2) | |
1320 | { | |
4b7f6baa CM |
1321 | OUTS (outf, dregs (dst)); |
1322 | OUTS (outf, "<<="); | |
1323 | OUTS (outf, dregs (src)); | |
4b7f6baa CM |
1324 | } |
1325 | else if (opc == 3) | |
1326 | { | |
4b7f6baa CM |
1327 | OUTS (outf, dregs (dst)); |
1328 | OUTS (outf, "*="); | |
1329 | OUTS (outf, dregs (src)); | |
4b7f6baa CM |
1330 | } |
1331 | else if (opc == 4) | |
1332 | { | |
4b7f6baa CM |
1333 | OUTS (outf, dregs (dst)); |
1334 | OUTS (outf, "=("); | |
1335 | OUTS (outf, dregs (dst)); | |
1336 | OUTS (outf, "+"); | |
1337 | OUTS (outf, dregs (src)); | |
1338 | OUTS (outf, ")<<1"); | |
4b7f6baa CM |
1339 | } |
1340 | else if (opc == 5) | |
1341 | { | |
4b7f6baa CM |
1342 | OUTS (outf, dregs (dst)); |
1343 | OUTS (outf, "=("); | |
1344 | OUTS (outf, dregs (dst)); | |
1345 | OUTS (outf, "+"); | |
1346 | OUTS (outf, dregs (src)); | |
1347 | OUTS (outf, ")<<2"); | |
4b7f6baa CM |
1348 | } |
1349 | else if (opc == 8) | |
1350 | { | |
4b7f6baa CM |
1351 | OUTS (outf, "DIVQ("); |
1352 | OUTS (outf, dregs (dst)); | |
1353 | OUTS (outf, ","); | |
1354 | OUTS (outf, dregs (src)); | |
1355 | OUTS (outf, ")"); | |
4b7f6baa CM |
1356 | } |
1357 | else if (opc == 9) | |
1358 | { | |
4b7f6baa CM |
1359 | OUTS (outf, "DIVS("); |
1360 | OUTS (outf, dregs (dst)); | |
1361 | OUTS (outf, ","); | |
1362 | OUTS (outf, dregs (src)); | |
1363 | OUTS (outf, ")"); | |
4b7f6baa CM |
1364 | } |
1365 | else if (opc == 10) | |
1366 | { | |
4b7f6baa CM |
1367 | OUTS (outf, dregs (dst)); |
1368 | OUTS (outf, "="); | |
1369 | OUTS (outf, dregs_lo (src)); | |
1370 | OUTS (outf, "(X)"); | |
4b7f6baa CM |
1371 | } |
1372 | else if (opc == 11) | |
1373 | { | |
4b7f6baa CM |
1374 | OUTS (outf, dregs (dst)); |
1375 | OUTS (outf, "="); | |
1376 | OUTS (outf, dregs_lo (src)); | |
1377 | OUTS (outf, "(Z)"); | |
4b7f6baa CM |
1378 | } |
1379 | else if (opc == 12) | |
1380 | { | |
4b7f6baa CM |
1381 | OUTS (outf, dregs (dst)); |
1382 | OUTS (outf, "="); | |
1383 | OUTS (outf, dregs_byte (src)); | |
1384 | OUTS (outf, "(X)"); | |
4b7f6baa CM |
1385 | } |
1386 | else if (opc == 13) | |
1387 | { | |
4b7f6baa CM |
1388 | OUTS (outf, dregs (dst)); |
1389 | OUTS (outf, "="); | |
1390 | OUTS (outf, dregs_byte (src)); | |
1391 | OUTS (outf, "(Z)"); | |
4b7f6baa CM |
1392 | } |
1393 | else if (opc == 14) | |
1394 | { | |
4b7f6baa CM |
1395 | OUTS (outf, dregs (dst)); |
1396 | OUTS (outf, "=-"); | |
1397 | OUTS (outf, dregs (src)); | |
4b7f6baa CM |
1398 | } |
1399 | else if (opc == 15) | |
1400 | { | |
4b7f6baa CM |
1401 | OUTS (outf, dregs (dst)); |
1402 | OUTS (outf, "=~"); | |
1403 | OUTS (outf, dregs (src)); | |
4b7f6baa CM |
1404 | } |
1405 | else | |
b7d48530 NC |
1406 | return 0; |
1407 | ||
1408 | return 2; | |
4b7f6baa CM |
1409 | } |
1410 | ||
1411 | static int | |
1412 | decode_PTR2op_0 (TIword iw0, disassemble_info *outf) | |
1413 | { | |
b7d48530 NC |
1414 | /* PTR2op |
1415 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1416 | | 0 | 1 | 0 | 0 | 0 | 1 | 0 |.opc.......|.src.......|.dst.......| | |
1417 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1418 | int src = ((iw0 >> PTR2op_src_bits) & PTR2op_dst_mask); |
1419 | int opc = ((iw0 >> PTR2op_opc_bits) & PTR2op_opc_mask); | |
1420 | int dst = ((iw0 >> PTR2op_dst_bits) & PTR2op_dst_mask); | |
1421 | ||
1422 | if (opc == 0) | |
1423 | { | |
4b7f6baa CM |
1424 | OUTS (outf, pregs (dst)); |
1425 | OUTS (outf, "-="); | |
1426 | OUTS (outf, pregs (src)); | |
4b7f6baa CM |
1427 | } |
1428 | else if (opc == 1) | |
1429 | { | |
4b7f6baa CM |
1430 | OUTS (outf, pregs (dst)); |
1431 | OUTS (outf, "="); | |
1432 | OUTS (outf, pregs (src)); | |
1433 | OUTS (outf, "<<2"); | |
4b7f6baa CM |
1434 | } |
1435 | else if (opc == 3) | |
1436 | { | |
4b7f6baa CM |
1437 | OUTS (outf, pregs (dst)); |
1438 | OUTS (outf, "="); | |
1439 | OUTS (outf, pregs (src)); | |
1440 | OUTS (outf, ">>2"); | |
4b7f6baa CM |
1441 | } |
1442 | else if (opc == 4) | |
1443 | { | |
4b7f6baa CM |
1444 | OUTS (outf, pregs (dst)); |
1445 | OUTS (outf, "="); | |
1446 | OUTS (outf, pregs (src)); | |
1447 | OUTS (outf, ">>1"); | |
4b7f6baa CM |
1448 | } |
1449 | else if (opc == 5) | |
1450 | { | |
4b7f6baa CM |
1451 | OUTS (outf, pregs (dst)); |
1452 | OUTS (outf, "+="); | |
1453 | OUTS (outf, pregs (src)); | |
1454 | OUTS (outf, "(BREV)"); | |
4b7f6baa CM |
1455 | } |
1456 | else if (opc == 6) | |
1457 | { | |
4b7f6baa CM |
1458 | OUTS (outf, pregs (dst)); |
1459 | OUTS (outf, "=("); | |
1460 | OUTS (outf, pregs (dst)); | |
1461 | OUTS (outf, "+"); | |
1462 | OUTS (outf, pregs (src)); | |
1463 | OUTS (outf, ")<<1"); | |
4b7f6baa CM |
1464 | } |
1465 | else if (opc == 7) | |
1466 | { | |
4b7f6baa CM |
1467 | OUTS (outf, pregs (dst)); |
1468 | OUTS (outf, "=("); | |
1469 | OUTS (outf, pregs (dst)); | |
1470 | OUTS (outf, "+"); | |
1471 | OUTS (outf, pregs (src)); | |
1472 | OUTS (outf, ")<<2"); | |
4b7f6baa CM |
1473 | } |
1474 | else | |
b7d48530 NC |
1475 | return 0; |
1476 | ||
1477 | return 2; | |
4b7f6baa CM |
1478 | } |
1479 | ||
1480 | static int | |
1481 | decode_LOGI2op_0 (TIword iw0, disassemble_info *outf) | |
1482 | { | |
b7d48530 NC |
1483 | /* LOGI2op |
1484 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1485 | | 0 | 1 | 0 | 0 | 1 |.opc.......|.src...............|.dst.......| | |
1486 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1487 | int src = ((iw0 >> LOGI2op_src_bits) & LOGI2op_src_mask); |
1488 | int opc = ((iw0 >> LOGI2op_opc_bits) & LOGI2op_opc_mask); | |
1489 | int dst = ((iw0 >> LOGI2op_dst_bits) & LOGI2op_dst_mask); | |
1490 | ||
1491 | if (opc == 0) | |
1492 | { | |
4b7f6baa CM |
1493 | OUTS (outf, "CC = ! BITTST ("); |
1494 | OUTS (outf, dregs (dst)); | |
1495 | OUTS (outf, ","); | |
1496 | OUTS (outf, uimm5 (src)); | |
1497 | OUTS (outf, ")"); | |
4b7f6baa CM |
1498 | } |
1499 | else if (opc == 1) | |
1500 | { | |
4b7f6baa CM |
1501 | OUTS (outf, "CC = BITTST ("); |
1502 | OUTS (outf, dregs (dst)); | |
1503 | OUTS (outf, ","); | |
1504 | OUTS (outf, uimm5 (src)); | |
1505 | OUTS (outf, ")"); | |
4b7f6baa CM |
1506 | } |
1507 | else if (opc == 2) | |
1508 | { | |
4b7f6baa CM |
1509 | OUTS (outf, "BITSET ("); |
1510 | OUTS (outf, dregs (dst)); | |
1511 | OUTS (outf, ","); | |
1512 | OUTS (outf, uimm5 (src)); | |
1513 | OUTS (outf, ")"); | |
4b7f6baa CM |
1514 | } |
1515 | else if (opc == 3) | |
1516 | { | |
4b7f6baa CM |
1517 | OUTS (outf, "BITTGL ("); |
1518 | OUTS (outf, dregs (dst)); | |
1519 | OUTS (outf, ","); | |
1520 | OUTS (outf, uimm5 (src)); | |
1521 | OUTS (outf, ")"); | |
4b7f6baa CM |
1522 | } |
1523 | else if (opc == 4) | |
1524 | { | |
4b7f6baa CM |
1525 | OUTS (outf, "BITCLR ("); |
1526 | OUTS (outf, dregs (dst)); | |
1527 | OUTS (outf, ","); | |
1528 | OUTS (outf, uimm5 (src)); | |
1529 | OUTS (outf, ")"); | |
4b7f6baa CM |
1530 | } |
1531 | else if (opc == 5) | |
1532 | { | |
4b7f6baa CM |
1533 | OUTS (outf, dregs (dst)); |
1534 | OUTS (outf, ">>>="); | |
1535 | OUTS (outf, uimm5 (src)); | |
4b7f6baa CM |
1536 | } |
1537 | else if (opc == 6) | |
1538 | { | |
4b7f6baa CM |
1539 | OUTS (outf, dregs (dst)); |
1540 | OUTS (outf, ">>="); | |
1541 | OUTS (outf, uimm5 (src)); | |
4b7f6baa CM |
1542 | } |
1543 | else if (opc == 7) | |
1544 | { | |
4b7f6baa CM |
1545 | OUTS (outf, dregs (dst)); |
1546 | OUTS (outf, "<<="); | |
1547 | OUTS (outf, uimm5 (src)); | |
4b7f6baa CM |
1548 | } |
1549 | else | |
b7d48530 NC |
1550 | return 0; |
1551 | ||
1552 | return 2; | |
4b7f6baa CM |
1553 | } |
1554 | ||
1555 | static int | |
1556 | decode_COMP3op_0 (TIword iw0, disassemble_info *outf) | |
1557 | { | |
b7d48530 NC |
1558 | /* COMP3op |
1559 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1560 | | 0 | 1 | 0 | 1 |.opc.......|.dst.......|.src1......|.src0......| | |
1561 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1562 | int opc = ((iw0 >> COMP3op_opc_bits) & COMP3op_opc_mask); |
1563 | int dst = ((iw0 >> COMP3op_dst_bits) & COMP3op_dst_mask); | |
1564 | int src0 = ((iw0 >> COMP3op_src0_bits) & COMP3op_src0_mask); | |
1565 | int src1 = ((iw0 >> COMP3op_src1_bits) & COMP3op_src1_mask); | |
1566 | ||
1567 | if (opc == 5 && src1 == src0) | |
1568 | { | |
4b7f6baa CM |
1569 | OUTS (outf, pregs (dst)); |
1570 | OUTS (outf, "="); | |
1571 | OUTS (outf, pregs (src0)); | |
1572 | OUTS (outf, "<<1"); | |
4b7f6baa CM |
1573 | } |
1574 | else if (opc == 1) | |
1575 | { | |
4b7f6baa CM |
1576 | OUTS (outf, dregs (dst)); |
1577 | OUTS (outf, "="); | |
1578 | OUTS (outf, dregs (src0)); | |
1579 | OUTS (outf, "-"); | |
1580 | OUTS (outf, dregs (src1)); | |
4b7f6baa CM |
1581 | } |
1582 | else if (opc == 2) | |
1583 | { | |
4b7f6baa CM |
1584 | OUTS (outf, dregs (dst)); |
1585 | OUTS (outf, "="); | |
1586 | OUTS (outf, dregs (src0)); | |
1587 | OUTS (outf, "&"); | |
1588 | OUTS (outf, dregs (src1)); | |
4b7f6baa CM |
1589 | } |
1590 | else if (opc == 3) | |
1591 | { | |
4b7f6baa CM |
1592 | OUTS (outf, dregs (dst)); |
1593 | OUTS (outf, "="); | |
1594 | OUTS (outf, dregs (src0)); | |
1595 | OUTS (outf, "|"); | |
1596 | OUTS (outf, dregs (src1)); | |
4b7f6baa CM |
1597 | } |
1598 | else if (opc == 4) | |
1599 | { | |
4b7f6baa CM |
1600 | OUTS (outf, dregs (dst)); |
1601 | OUTS (outf, "="); | |
1602 | OUTS (outf, dregs (src0)); | |
1603 | OUTS (outf, "^"); | |
1604 | OUTS (outf, dregs (src1)); | |
4b7f6baa CM |
1605 | } |
1606 | else if (opc == 5) | |
1607 | { | |
4b7f6baa CM |
1608 | OUTS (outf, pregs (dst)); |
1609 | OUTS (outf, "="); | |
1610 | OUTS (outf, pregs (src0)); | |
1611 | OUTS (outf, "+"); | |
1612 | OUTS (outf, pregs (src1)); | |
4b7f6baa CM |
1613 | } |
1614 | else if (opc == 6) | |
1615 | { | |
4b7f6baa CM |
1616 | OUTS (outf, pregs (dst)); |
1617 | OUTS (outf, "="); | |
1618 | OUTS (outf, pregs (src0)); | |
1619 | OUTS (outf, "+("); | |
1620 | OUTS (outf, pregs (src1)); | |
1621 | OUTS (outf, "<<1)"); | |
4b7f6baa CM |
1622 | } |
1623 | else if (opc == 7) | |
1624 | { | |
4b7f6baa CM |
1625 | OUTS (outf, pregs (dst)); |
1626 | OUTS (outf, "="); | |
1627 | OUTS (outf, pregs (src0)); | |
1628 | OUTS (outf, "+("); | |
1629 | OUTS (outf, pregs (src1)); | |
1630 | OUTS (outf, "<<2)"); | |
4b7f6baa CM |
1631 | } |
1632 | else if (opc == 0) | |
1633 | { | |
4b7f6baa CM |
1634 | OUTS (outf, dregs (dst)); |
1635 | OUTS (outf, "="); | |
1636 | OUTS (outf, dregs (src0)); | |
1637 | OUTS (outf, "+"); | |
1638 | OUTS (outf, dregs (src1)); | |
4b7f6baa CM |
1639 | } |
1640 | else | |
b7d48530 NC |
1641 | return 0; |
1642 | ||
1643 | return 2; | |
4b7f6baa CM |
1644 | } |
1645 | ||
1646 | static int | |
1647 | decode_COMPI2opD_0 (TIword iw0, disassemble_info *outf) | |
1648 | { | |
b7d48530 NC |
1649 | /* COMPI2opD |
1650 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1651 | | 0 | 1 | 1 | 0 | 0 |.op|..src......................|.dst.......| | |
1652 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1653 | int op = ((iw0 >> COMPI2opD_op_bits) & COMPI2opD_op_mask); |
1654 | int dst = ((iw0 >> COMPI2opD_dst_bits) & COMPI2opD_dst_mask); | |
1655 | int src = ((iw0 >> COMPI2opD_src_bits) & COMPI2opD_src_mask); | |
1656 | ||
1657 | if (op == 0) | |
1658 | { | |
4b7f6baa CM |
1659 | OUTS (outf, dregs (dst)); |
1660 | OUTS (outf, "="); | |
1661 | OUTS (outf, imm7 (src)); | |
1662 | OUTS (outf, "(x)"); | |
4b7f6baa CM |
1663 | } |
1664 | else if (op == 1) | |
1665 | { | |
4b7f6baa CM |
1666 | OUTS (outf, dregs (dst)); |
1667 | OUTS (outf, "+="); | |
1668 | OUTS (outf, imm7 (src)); | |
4b7f6baa CM |
1669 | } |
1670 | else | |
b7d48530 NC |
1671 | return 0; |
1672 | ||
1673 | return 2; | |
4b7f6baa CM |
1674 | } |
1675 | ||
1676 | static int | |
1677 | decode_COMPI2opP_0 (TIword iw0, disassemble_info *outf) | |
1678 | { | |
b7d48530 NC |
1679 | /* COMPI2opP |
1680 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1681 | | 0 | 1 | 1 | 0 | 1 |.op|.src.......................|.dst.......| | |
1682 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1683 | int op = ((iw0 >> COMPI2opP_op_bits) & COMPI2opP_op_mask); |
1684 | int src = ((iw0 >> COMPI2opP_src_bits) & COMPI2opP_src_mask); | |
1685 | int dst = ((iw0 >> COMPI2opP_dst_bits) & COMPI2opP_dst_mask); | |
1686 | ||
1687 | if (op == 0) | |
1688 | { | |
4b7f6baa CM |
1689 | OUTS (outf, pregs (dst)); |
1690 | OUTS (outf, "="); | |
1691 | OUTS (outf, imm7 (src)); | |
4b7f6baa CM |
1692 | } |
1693 | else if (op == 1) | |
1694 | { | |
4b7f6baa CM |
1695 | OUTS (outf, pregs (dst)); |
1696 | OUTS (outf, "+="); | |
1697 | OUTS (outf, imm7 (src)); | |
4b7f6baa CM |
1698 | } |
1699 | else | |
b7d48530 NC |
1700 | return 0; |
1701 | ||
1702 | return 2; | |
4b7f6baa CM |
1703 | } |
1704 | ||
1705 | static int | |
1706 | decode_LDSTpmod_0 (TIword iw0, disassemble_info *outf) | |
1707 | { | |
b7d48530 NC |
1708 | /* LDSTpmod |
1709 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1710 | | 1 | 0 | 0 | 0 |.W.|.aop...|.reg.......|.idx.......|.ptr.......| | |
1711 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1712 | int W = ((iw0 >> LDSTpmod_W_bits) & LDSTpmod_W_mask); |
1713 | int aop = ((iw0 >> LDSTpmod_aop_bits) & LDSTpmod_aop_mask); | |
1714 | int idx = ((iw0 >> LDSTpmod_idx_bits) & LDSTpmod_idx_mask); | |
1715 | int ptr = ((iw0 >> LDSTpmod_ptr_bits) & LDSTpmod_ptr_mask); | |
1716 | int reg = ((iw0 >> LDSTpmod_reg_bits) & LDSTpmod_reg_mask); | |
1717 | ||
1718 | if (aop == 1 && W == 0 && idx == ptr) | |
1719 | { | |
4b7f6baa CM |
1720 | OUTS (outf, dregs_lo (reg)); |
1721 | OUTS (outf, "=W["); | |
1722 | OUTS (outf, pregs (ptr)); | |
1723 | OUTS (outf, "]"); | |
4b7f6baa CM |
1724 | } |
1725 | else if (aop == 2 && W == 0 && idx == ptr) | |
1726 | { | |
4b7f6baa CM |
1727 | OUTS (outf, dregs_hi (reg)); |
1728 | OUTS (outf, "=W["); | |
1729 | OUTS (outf, pregs (ptr)); | |
1730 | OUTS (outf, "]"); | |
4b7f6baa CM |
1731 | } |
1732 | else if (aop == 1 && W == 1 && idx == ptr) | |
1733 | { | |
4b7f6baa CM |
1734 | OUTS (outf, "W["); |
1735 | OUTS (outf, pregs (ptr)); | |
1736 | OUTS (outf, "]="); | |
1737 | OUTS (outf, dregs_lo (reg)); | |
4b7f6baa CM |
1738 | } |
1739 | else if (aop == 2 && W == 1 && idx == ptr) | |
1740 | { | |
4b7f6baa CM |
1741 | OUTS (outf, "W["); |
1742 | OUTS (outf, pregs (ptr)); | |
1743 | OUTS (outf, "]="); | |
1744 | OUTS (outf, dregs_hi (reg)); | |
4b7f6baa CM |
1745 | } |
1746 | else if (aop == 0 && W == 0) | |
1747 | { | |
4b7f6baa CM |
1748 | OUTS (outf, dregs (reg)); |
1749 | OUTS (outf, "=["); | |
1750 | OUTS (outf, pregs (ptr)); | |
1751 | OUTS (outf, "++"); | |
1752 | OUTS (outf, pregs (idx)); | |
1753 | OUTS (outf, "]"); | |
4b7f6baa CM |
1754 | } |
1755 | else if (aop == 1 && W == 0) | |
1756 | { | |
4b7f6baa CM |
1757 | OUTS (outf, dregs_lo (reg)); |
1758 | OUTS (outf, "=W["); | |
1759 | OUTS (outf, pregs (ptr)); | |
1760 | OUTS (outf, "++"); | |
1761 | OUTS (outf, pregs (idx)); | |
1762 | OUTS (outf, "]"); | |
4b7f6baa CM |
1763 | } |
1764 | else if (aop == 2 && W == 0) | |
1765 | { | |
4b7f6baa CM |
1766 | OUTS (outf, dregs_hi (reg)); |
1767 | OUTS (outf, "=W["); | |
1768 | OUTS (outf, pregs (ptr)); | |
1769 | OUTS (outf, "++"); | |
1770 | OUTS (outf, pregs (idx)); | |
1771 | OUTS (outf, "]"); | |
4b7f6baa CM |
1772 | } |
1773 | else if (aop == 3 && W == 0) | |
1774 | { | |
4b7f6baa CM |
1775 | OUTS (outf, dregs (reg)); |
1776 | OUTS (outf, "=W["); | |
1777 | OUTS (outf, pregs (ptr)); | |
1778 | OUTS (outf, "++"); | |
1779 | OUTS (outf, pregs (idx)); | |
1780 | OUTS (outf, "] (Z)"); | |
4b7f6baa CM |
1781 | } |
1782 | else if (aop == 3 && W == 1) | |
1783 | { | |
4b7f6baa CM |
1784 | OUTS (outf, dregs (reg)); |
1785 | OUTS (outf, "=W["); | |
1786 | OUTS (outf, pregs (ptr)); | |
1787 | OUTS (outf, "++"); | |
1788 | OUTS (outf, pregs (idx)); | |
1789 | OUTS (outf, "](X)"); | |
4b7f6baa CM |
1790 | } |
1791 | else if (aop == 0 && W == 1) | |
1792 | { | |
4b7f6baa CM |
1793 | OUTS (outf, "["); |
1794 | OUTS (outf, pregs (ptr)); | |
1795 | OUTS (outf, "++"); | |
1796 | OUTS (outf, pregs (idx)); | |
1797 | OUTS (outf, "]="); | |
1798 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
1799 | } |
1800 | else if (aop == 1 && W == 1) | |
1801 | { | |
4b7f6baa CM |
1802 | OUTS (outf, "W["); |
1803 | OUTS (outf, pregs (ptr)); | |
1804 | OUTS (outf, "++"); | |
1805 | OUTS (outf, pregs (idx)); | |
1806 | OUTS (outf, "]="); | |
1807 | OUTS (outf, dregs_lo (reg)); | |
4b7f6baa CM |
1808 | } |
1809 | else if (aop == 2 && W == 1) | |
1810 | { | |
4b7f6baa CM |
1811 | OUTS (outf, "W["); |
1812 | OUTS (outf, pregs (ptr)); | |
1813 | OUTS (outf, "++"); | |
1814 | OUTS (outf, pregs (idx)); | |
1815 | OUTS (outf, "]="); | |
1816 | OUTS (outf, dregs_hi (reg)); | |
4b7f6baa CM |
1817 | } |
1818 | else | |
b7d48530 NC |
1819 | return 0; |
1820 | ||
1821 | return 2; | |
4b7f6baa CM |
1822 | } |
1823 | ||
1824 | static int | |
1825 | decode_dagMODim_0 (TIword iw0, disassemble_info *outf) | |
1826 | { | |
b7d48530 NC |
1827 | /* dagMODim |
1828 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1829 | | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |.br| 1 | 1 |.op|.m.....|.i.....| | |
1830 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1831 | int i = ((iw0 >> DagMODim_i_bits) & DagMODim_i_mask); |
1832 | int m = ((iw0 >> DagMODim_m_bits) & DagMODim_m_mask); | |
1833 | int br = ((iw0 >> DagMODim_br_bits) & DagMODim_br_mask); | |
1834 | int op = ((iw0 >> DagMODim_op_bits) & DagMODim_op_mask); | |
1835 | ||
1836 | if (op == 0 && br == 1) | |
1837 | { | |
4b7f6baa CM |
1838 | OUTS (outf, iregs (i)); |
1839 | OUTS (outf, "+="); | |
1840 | OUTS (outf, mregs (m)); | |
1841 | OUTS (outf, "(BREV)"); | |
4b7f6baa CM |
1842 | } |
1843 | else if (op == 0) | |
1844 | { | |
4b7f6baa CM |
1845 | OUTS (outf, iregs (i)); |
1846 | OUTS (outf, "+="); | |
1847 | OUTS (outf, mregs (m)); | |
4b7f6baa CM |
1848 | } |
1849 | else if (op == 1) | |
1850 | { | |
4b7f6baa CM |
1851 | OUTS (outf, iregs (i)); |
1852 | OUTS (outf, "-="); | |
1853 | OUTS (outf, mregs (m)); | |
4b7f6baa CM |
1854 | } |
1855 | else | |
b7d48530 NC |
1856 | return 0; |
1857 | ||
1858 | return 2; | |
4b7f6baa CM |
1859 | } |
1860 | ||
1861 | static int | |
1862 | decode_dagMODik_0 (TIword iw0, disassemble_info *outf) | |
1863 | { | |
b7d48530 NC |
1864 | /* dagMODik |
1865 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1866 | | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |.op....|.i.....| | |
1867 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1868 | int i = ((iw0 >> DagMODik_i_bits) & DagMODik_i_mask); |
1869 | int op = ((iw0 >> DagMODik_op_bits) & DagMODik_op_mask); | |
1870 | ||
1871 | if (op == 0) | |
1872 | { | |
4b7f6baa CM |
1873 | OUTS (outf, iregs (i)); |
1874 | OUTS (outf, "+=2"); | |
4b7f6baa CM |
1875 | } |
1876 | else if (op == 1) | |
1877 | { | |
4b7f6baa CM |
1878 | OUTS (outf, iregs (i)); |
1879 | OUTS (outf, "-=2"); | |
4b7f6baa CM |
1880 | } |
1881 | else if (op == 2) | |
1882 | { | |
4b7f6baa CM |
1883 | OUTS (outf, iregs (i)); |
1884 | OUTS (outf, "+=4"); | |
4b7f6baa CM |
1885 | } |
1886 | else if (op == 3) | |
1887 | { | |
4b7f6baa CM |
1888 | OUTS (outf, iregs (i)); |
1889 | OUTS (outf, "-=4"); | |
4b7f6baa CM |
1890 | } |
1891 | else | |
b7d48530 NC |
1892 | return 0; |
1893 | ||
1894 | return 2; | |
4b7f6baa CM |
1895 | } |
1896 | ||
1897 | static int | |
1898 | decode_dspLDST_0 (TIword iw0, disassemble_info *outf) | |
1899 | { | |
b7d48530 NC |
1900 | /* dspLDST |
1901 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
1902 | | 1 | 0 | 0 | 1 | 1 | 1 |.W.|.aop...|.m.....|.i.....|.reg.......| | |
1903 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
1904 | int i = ((iw0 >> DspLDST_i_bits) & DspLDST_i_mask); |
1905 | int m = ((iw0 >> DspLDST_m_bits) & DspLDST_m_mask); | |
1906 | int W = ((iw0 >> DspLDST_W_bits) & DspLDST_W_mask); | |
1907 | int aop = ((iw0 >> DspLDST_aop_bits) & DspLDST_aop_mask); | |
1908 | int reg = ((iw0 >> DspLDST_reg_bits) & DspLDST_reg_mask); | |
1909 | ||
1910 | if (aop == 0 && W == 0 && m == 0) | |
1911 | { | |
4b7f6baa CM |
1912 | OUTS (outf, dregs (reg)); |
1913 | OUTS (outf, "=["); | |
1914 | OUTS (outf, iregs (i)); | |
1915 | OUTS (outf, "++]"); | |
4b7f6baa CM |
1916 | } |
1917 | else if (aop == 0 && W == 0 && m == 1) | |
1918 | { | |
4b7f6baa CM |
1919 | OUTS (outf, dregs_lo (reg)); |
1920 | OUTS (outf, "=W["); | |
1921 | OUTS (outf, iregs (i)); | |
1922 | OUTS (outf, "++]"); | |
4b7f6baa CM |
1923 | } |
1924 | else if (aop == 0 && W == 0 && m == 2) | |
1925 | { | |
4b7f6baa CM |
1926 | OUTS (outf, dregs_hi (reg)); |
1927 | OUTS (outf, "=W["); | |
1928 | OUTS (outf, iregs (i)); | |
1929 | OUTS (outf, "++]"); | |
4b7f6baa CM |
1930 | } |
1931 | else if (aop == 1 && W == 0 && m == 0) | |
1932 | { | |
4b7f6baa CM |
1933 | OUTS (outf, dregs (reg)); |
1934 | OUTS (outf, "=["); | |
1935 | OUTS (outf, iregs (i)); | |
1936 | OUTS (outf, "--]"); | |
4b7f6baa CM |
1937 | } |
1938 | else if (aop == 1 && W == 0 && m == 1) | |
1939 | { | |
4b7f6baa CM |
1940 | OUTS (outf, dregs_lo (reg)); |
1941 | OUTS (outf, "=W["); | |
1942 | OUTS (outf, iregs (i)); | |
1943 | OUTS (outf, "--]"); | |
4b7f6baa CM |
1944 | } |
1945 | else if (aop == 1 && W == 0 && m == 2) | |
1946 | { | |
4b7f6baa CM |
1947 | OUTS (outf, dregs_hi (reg)); |
1948 | OUTS (outf, "=W["); | |
1949 | OUTS (outf, iregs (i)); | |
1950 | OUTS (outf, "--]"); | |
4b7f6baa CM |
1951 | } |
1952 | else if (aop == 2 && W == 0 && m == 0) | |
1953 | { | |
4b7f6baa CM |
1954 | OUTS (outf, dregs (reg)); |
1955 | OUTS (outf, "=["); | |
1956 | OUTS (outf, iregs (i)); | |
1957 | OUTS (outf, "]"); | |
4b7f6baa CM |
1958 | } |
1959 | else if (aop == 2 && W == 0 && m == 1) | |
1960 | { | |
4b7f6baa CM |
1961 | OUTS (outf, dregs_lo (reg)); |
1962 | OUTS (outf, "=W["); | |
1963 | OUTS (outf, iregs (i)); | |
1964 | OUTS (outf, "]"); | |
4b7f6baa CM |
1965 | } |
1966 | else if (aop == 2 && W == 0 && m == 2) | |
1967 | { | |
4b7f6baa CM |
1968 | OUTS (outf, dregs_hi (reg)); |
1969 | OUTS (outf, "=W["); | |
1970 | OUTS (outf, iregs (i)); | |
1971 | OUTS (outf, "]"); | |
4b7f6baa CM |
1972 | } |
1973 | else if (aop == 0 && W == 1 && m == 0) | |
1974 | { | |
4b7f6baa CM |
1975 | OUTS (outf, "["); |
1976 | OUTS (outf, iregs (i)); | |
1977 | OUTS (outf, "++]="); | |
1978 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
1979 | } |
1980 | else if (aop == 0 && W == 1 && m == 1) | |
1981 | { | |
4b7f6baa CM |
1982 | OUTS (outf, "W["); |
1983 | OUTS (outf, iregs (i)); | |
1984 | OUTS (outf, "++]="); | |
1985 | OUTS (outf, dregs_lo (reg)); | |
4b7f6baa CM |
1986 | } |
1987 | else if (aop == 0 && W == 1 && m == 2) | |
1988 | { | |
4b7f6baa CM |
1989 | OUTS (outf, "W["); |
1990 | OUTS (outf, iregs (i)); | |
1991 | OUTS (outf, "++]="); | |
1992 | OUTS (outf, dregs_hi (reg)); | |
4b7f6baa CM |
1993 | } |
1994 | else if (aop == 1 && W == 1 && m == 0) | |
1995 | { | |
4b7f6baa CM |
1996 | OUTS (outf, "["); |
1997 | OUTS (outf, iregs (i)); | |
1998 | OUTS (outf, "--]="); | |
1999 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
2000 | } |
2001 | else if (aop == 1 && W == 1 && m == 1) | |
2002 | { | |
4b7f6baa CM |
2003 | OUTS (outf, "W["); |
2004 | OUTS (outf, iregs (i)); | |
2005 | OUTS (outf, "--]="); | |
2006 | OUTS (outf, dregs_lo (reg)); | |
4b7f6baa CM |
2007 | } |
2008 | else if (aop == 1 && W == 1 && m == 2) | |
2009 | { | |
4b7f6baa CM |
2010 | OUTS (outf, "W["); |
2011 | OUTS (outf, iregs (i)); | |
2012 | OUTS (outf, "--]="); | |
2013 | OUTS (outf, dregs_hi (reg)); | |
4b7f6baa CM |
2014 | } |
2015 | else if (aop == 2 && W == 1 && m == 0) | |
2016 | { | |
4b7f6baa CM |
2017 | OUTS (outf, "["); |
2018 | OUTS (outf, iregs (i)); | |
2019 | OUTS (outf, "]="); | |
2020 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
2021 | } |
2022 | else if (aop == 2 && W == 1 && m == 1) | |
2023 | { | |
4b7f6baa CM |
2024 | OUTS (outf, "W["); |
2025 | OUTS (outf, iregs (i)); | |
2026 | OUTS (outf, "]="); | |
2027 | OUTS (outf, dregs_lo (reg)); | |
4b7f6baa CM |
2028 | } |
2029 | else if (aop == 2 && W == 1 && m == 2) | |
2030 | { | |
4b7f6baa CM |
2031 | OUTS (outf, "W["); |
2032 | OUTS (outf, iregs (i)); | |
2033 | OUTS (outf, "]="); | |
2034 | OUTS (outf, dregs_hi (reg)); | |
4b7f6baa CM |
2035 | } |
2036 | else if (aop == 3 && W == 0) | |
2037 | { | |
4b7f6baa CM |
2038 | OUTS (outf, dregs (reg)); |
2039 | OUTS (outf, "=["); | |
2040 | OUTS (outf, iregs (i)); | |
2041 | OUTS (outf, "++"); | |
2042 | OUTS (outf, mregs (m)); | |
2043 | OUTS (outf, "]"); | |
4b7f6baa CM |
2044 | } |
2045 | else if (aop == 3 && W == 1) | |
2046 | { | |
4b7f6baa CM |
2047 | OUTS (outf, "["); |
2048 | OUTS (outf, iregs (i)); | |
2049 | OUTS (outf, "++"); | |
2050 | OUTS (outf, mregs (m)); | |
2051 | OUTS (outf, "]="); | |
2052 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
2053 | } |
2054 | else | |
b7d48530 NC |
2055 | return 0; |
2056 | ||
2057 | return 2; | |
4b7f6baa CM |
2058 | } |
2059 | ||
2060 | static int | |
2061 | decode_LDST_0 (TIword iw0, disassemble_info *outf) | |
2062 | { | |
b7d48530 NC |
2063 | /* LDST |
2064 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2065 | | 1 | 0 | 0 | 1 |.sz....|.W.|.aop...|.Z.|.ptr.......|.reg.......| | |
2066 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2067 | int Z = ((iw0 >> LDST_Z_bits) & LDST_Z_mask); |
2068 | int W = ((iw0 >> LDST_W_bits) & LDST_W_mask); | |
2069 | int sz = ((iw0 >> LDST_sz_bits) & LDST_sz_mask); | |
2070 | int aop = ((iw0 >> LDST_aop_bits) & LDST_aop_mask); | |
2071 | int reg = ((iw0 >> LDST_reg_bits) & LDST_reg_mask); | |
2072 | int ptr = ((iw0 >> LDST_ptr_bits) & LDST_ptr_mask); | |
2073 | ||
2074 | if (aop == 0 && sz == 0 && Z == 0 && W == 0) | |
2075 | { | |
4b7f6baa CM |
2076 | OUTS (outf, dregs (reg)); |
2077 | OUTS (outf, "=["); | |
2078 | OUTS (outf, pregs (ptr)); | |
2079 | OUTS (outf, "++]"); | |
4b7f6baa CM |
2080 | } |
2081 | else if (aop == 0 && sz == 0 && Z == 1 && W == 0) | |
2082 | { | |
4b7f6baa CM |
2083 | OUTS (outf, pregs (reg)); |
2084 | OUTS (outf, "=["); | |
2085 | OUTS (outf, pregs (ptr)); | |
2086 | OUTS (outf, "++]"); | |
4b7f6baa CM |
2087 | } |
2088 | else if (aop == 0 && sz == 1 && Z == 0 && W == 0) | |
2089 | { | |
4b7f6baa CM |
2090 | OUTS (outf, dregs (reg)); |
2091 | OUTS (outf, "=W["); | |
2092 | OUTS (outf, pregs (ptr)); | |
2093 | OUTS (outf, "++] (Z)"); | |
4b7f6baa CM |
2094 | } |
2095 | else if (aop == 0 && sz == 1 && Z == 1 && W == 0) | |
2096 | { | |
4b7f6baa CM |
2097 | OUTS (outf, dregs (reg)); |
2098 | OUTS (outf, "=W["); | |
2099 | OUTS (outf, pregs (ptr)); | |
2100 | OUTS (outf, "++](X)"); | |
4b7f6baa CM |
2101 | } |
2102 | else if (aop == 0 && sz == 2 && Z == 0 && W == 0) | |
2103 | { | |
4b7f6baa CM |
2104 | OUTS (outf, dregs (reg)); |
2105 | OUTS (outf, "=B["); | |
2106 | OUTS (outf, pregs (ptr)); | |
2107 | OUTS (outf, "++] (Z)"); | |
4b7f6baa CM |
2108 | } |
2109 | else if (aop == 0 && sz == 2 && Z == 1 && W == 0) | |
2110 | { | |
4b7f6baa CM |
2111 | OUTS (outf, dregs (reg)); |
2112 | OUTS (outf, "=B["); | |
2113 | OUTS (outf, pregs (ptr)); | |
2114 | OUTS (outf, "++](X)"); | |
4b7f6baa CM |
2115 | } |
2116 | else if (aop == 1 && sz == 0 && Z == 0 && W == 0) | |
2117 | { | |
4b7f6baa CM |
2118 | OUTS (outf, dregs (reg)); |
2119 | OUTS (outf, "=["); | |
2120 | OUTS (outf, pregs (ptr)); | |
2121 | OUTS (outf, "--]"); | |
4b7f6baa CM |
2122 | } |
2123 | else if (aop == 1 && sz == 0 && Z == 1 && W == 0) | |
2124 | { | |
4b7f6baa CM |
2125 | OUTS (outf, pregs (reg)); |
2126 | OUTS (outf, "=["); | |
2127 | OUTS (outf, pregs (ptr)); | |
2128 | OUTS (outf, "--]"); | |
4b7f6baa CM |
2129 | } |
2130 | else if (aop == 1 && sz == 1 && Z == 0 && W == 0) | |
2131 | { | |
4b7f6baa CM |
2132 | OUTS (outf, dregs (reg)); |
2133 | OUTS (outf, "=W["); | |
2134 | OUTS (outf, pregs (ptr)); | |
2135 | OUTS (outf, "--] (Z)"); | |
4b7f6baa CM |
2136 | } |
2137 | else if (aop == 1 && sz == 1 && Z == 1 && W == 0) | |
2138 | { | |
4b7f6baa CM |
2139 | OUTS (outf, dregs (reg)); |
2140 | OUTS (outf, "=W["); | |
2141 | OUTS (outf, pregs (ptr)); | |
2142 | OUTS (outf, "--](X)"); | |
4b7f6baa CM |
2143 | } |
2144 | else if (aop == 1 && sz == 2 && Z == 0 && W == 0) | |
2145 | { | |
4b7f6baa CM |
2146 | OUTS (outf, dregs (reg)); |
2147 | OUTS (outf, "=B["); | |
2148 | OUTS (outf, pregs (ptr)); | |
2149 | OUTS (outf, "--] (Z)"); | |
4b7f6baa CM |
2150 | } |
2151 | else if (aop == 1 && sz == 2 && Z == 1 && W == 0) | |
2152 | { | |
4b7f6baa CM |
2153 | OUTS (outf, dregs (reg)); |
2154 | OUTS (outf, "=B["); | |
2155 | OUTS (outf, pregs (ptr)); | |
2156 | OUTS (outf, "--](X)"); | |
4b7f6baa CM |
2157 | } |
2158 | else if (aop == 2 && sz == 0 && Z == 0 && W == 0) | |
2159 | { | |
4b7f6baa CM |
2160 | OUTS (outf, dregs (reg)); |
2161 | OUTS (outf, "=["); | |
2162 | OUTS (outf, pregs (ptr)); | |
2163 | OUTS (outf, "]"); | |
4b7f6baa CM |
2164 | } |
2165 | else if (aop == 2 && sz == 0 && Z == 1 && W == 0) | |
2166 | { | |
4b7f6baa CM |
2167 | OUTS (outf, pregs (reg)); |
2168 | OUTS (outf, "=["); | |
2169 | OUTS (outf, pregs (ptr)); | |
2170 | OUTS (outf, "]"); | |
4b7f6baa CM |
2171 | } |
2172 | else if (aop == 2 && sz == 1 && Z == 0 && W == 0) | |
2173 | { | |
4b7f6baa CM |
2174 | OUTS (outf, dregs (reg)); |
2175 | OUTS (outf, "=W["); | |
2176 | OUTS (outf, pregs (ptr)); | |
2177 | OUTS (outf, "] (Z)"); | |
4b7f6baa CM |
2178 | } |
2179 | else if (aop == 2 && sz == 1 && Z == 1 && W == 0) | |
2180 | { | |
4b7f6baa CM |
2181 | OUTS (outf, dregs (reg)); |
2182 | OUTS (outf, "=W["); | |
2183 | OUTS (outf, pregs (ptr)); | |
2184 | OUTS (outf, "](X)"); | |
4b7f6baa CM |
2185 | } |
2186 | else if (aop == 2 && sz == 2 && Z == 0 && W == 0) | |
2187 | { | |
4b7f6baa CM |
2188 | OUTS (outf, dregs (reg)); |
2189 | OUTS (outf, "=B["); | |
2190 | OUTS (outf, pregs (ptr)); | |
2191 | OUTS (outf, "] (Z)"); | |
4b7f6baa CM |
2192 | } |
2193 | else if (aop == 2 && sz == 2 && Z == 1 && W == 0) | |
2194 | { | |
4b7f6baa CM |
2195 | OUTS (outf, dregs (reg)); |
2196 | OUTS (outf, "=B["); | |
2197 | OUTS (outf, pregs (ptr)); | |
2198 | OUTS (outf, "](X)"); | |
4b7f6baa CM |
2199 | } |
2200 | else if (aop == 0 && sz == 0 && Z == 0 && W == 1) | |
2201 | { | |
4b7f6baa CM |
2202 | OUTS (outf, "["); |
2203 | OUTS (outf, pregs (ptr)); | |
2204 | OUTS (outf, "++]="); | |
2205 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
2206 | } |
2207 | else if (aop == 0 && sz == 0 && Z == 1 && W == 1) | |
2208 | { | |
4b7f6baa CM |
2209 | OUTS (outf, "["); |
2210 | OUTS (outf, pregs (ptr)); | |
2211 | OUTS (outf, "++]="); | |
2212 | OUTS (outf, pregs (reg)); | |
4b7f6baa CM |
2213 | } |
2214 | else if (aop == 0 && sz == 1 && Z == 0 && W == 1) | |
2215 | { | |
4b7f6baa CM |
2216 | OUTS (outf, "W["); |
2217 | OUTS (outf, pregs (ptr)); | |
2218 | OUTS (outf, "++]="); | |
2219 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
2220 | } |
2221 | else if (aop == 0 && sz == 2 && Z == 0 && W == 1) | |
2222 | { | |
4b7f6baa CM |
2223 | OUTS (outf, "B["); |
2224 | OUTS (outf, pregs (ptr)); | |
2225 | OUTS (outf, "++]="); | |
2226 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
2227 | } |
2228 | else if (aop == 1 && sz == 0 && Z == 0 && W == 1) | |
2229 | { | |
4b7f6baa CM |
2230 | OUTS (outf, "["); |
2231 | OUTS (outf, pregs (ptr)); | |
2232 | OUTS (outf, "--]="); | |
2233 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
2234 | } |
2235 | else if (aop == 1 && sz == 0 && Z == 1 && W == 1) | |
2236 | { | |
4b7f6baa CM |
2237 | OUTS (outf, "["); |
2238 | OUTS (outf, pregs (ptr)); | |
2239 | OUTS (outf, "--]="); | |
2240 | OUTS (outf, pregs (reg)); | |
4b7f6baa CM |
2241 | } |
2242 | else if (aop == 1 && sz == 1 && Z == 0 && W == 1) | |
2243 | { | |
4b7f6baa CM |
2244 | OUTS (outf, "W["); |
2245 | OUTS (outf, pregs (ptr)); | |
2246 | OUTS (outf, "--]="); | |
2247 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
2248 | } |
2249 | else if (aop == 1 && sz == 2 && Z == 0 && W == 1) | |
2250 | { | |
4b7f6baa CM |
2251 | OUTS (outf, "B["); |
2252 | OUTS (outf, pregs (ptr)); | |
2253 | OUTS (outf, "--]="); | |
2254 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
2255 | } |
2256 | else if (aop == 2 && sz == 0 && Z == 0 && W == 1) | |
2257 | { | |
4b7f6baa CM |
2258 | OUTS (outf, "["); |
2259 | OUTS (outf, pregs (ptr)); | |
2260 | OUTS (outf, "]="); | |
2261 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
2262 | } |
2263 | else if (aop == 2 && sz == 0 && Z == 1 && W == 1) | |
2264 | { | |
4b7f6baa CM |
2265 | OUTS (outf, "["); |
2266 | OUTS (outf, pregs (ptr)); | |
2267 | OUTS (outf, "]="); | |
2268 | OUTS (outf, pregs (reg)); | |
4b7f6baa CM |
2269 | } |
2270 | else if (aop == 2 && sz == 1 && Z == 0 && W == 1) | |
2271 | { | |
4b7f6baa CM |
2272 | OUTS (outf, "W["); |
2273 | OUTS (outf, pregs (ptr)); | |
2274 | OUTS (outf, "]="); | |
2275 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
2276 | } |
2277 | else if (aop == 2 && sz == 2 && Z == 0 && W == 1) | |
2278 | { | |
4b7f6baa CM |
2279 | OUTS (outf, "B["); |
2280 | OUTS (outf, pregs (ptr)); | |
2281 | OUTS (outf, "]="); | |
2282 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
2283 | } |
2284 | else | |
b7d48530 NC |
2285 | return 0; |
2286 | ||
2287 | return 2; | |
4b7f6baa CM |
2288 | } |
2289 | ||
2290 | static int | |
2291 | decode_LDSTiiFP_0 (TIword iw0, disassemble_info *outf) | |
2292 | { | |
b7d48530 NC |
2293 | /* LDSTiiFP |
2294 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2295 | | 1 | 0 | 1 | 1 | 1 | 0 |.W.|.offset............|.reg...........| | |
2296 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2297 | int reg = ((iw0 >> LDSTiiFP_reg_bits) & LDSTiiFP_reg_mask); |
2298 | int offset = ((iw0 >> LDSTiiFP_offset_bits) & LDSTiiFP_offset_mask); | |
2299 | int W = ((iw0 >> LDSTiiFP_W_bits) & LDSTiiFP_W_mask); | |
2300 | ||
2301 | if (W == 0) | |
2302 | { | |
4b7f6baa CM |
2303 | OUTS (outf, dpregs (reg)); |
2304 | OUTS (outf, "=[FP"); | |
2305 | OUTS (outf, negimm5s4 (offset)); | |
2306 | OUTS (outf, "]"); | |
4b7f6baa CM |
2307 | } |
2308 | else if (W == 1) | |
2309 | { | |
4b7f6baa CM |
2310 | OUTS (outf, "[FP"); |
2311 | OUTS (outf, negimm5s4 (offset)); | |
2312 | OUTS (outf, "]="); | |
2313 | OUTS (outf, dpregs (reg)); | |
4b7f6baa CM |
2314 | } |
2315 | else | |
b7d48530 NC |
2316 | return 0; |
2317 | ||
2318 | return 2; | |
4b7f6baa CM |
2319 | } |
2320 | ||
2321 | static int | |
2322 | decode_LDSTii_0 (TIword iw0, disassemble_info *outf) | |
2323 | { | |
b7d48530 NC |
2324 | /* LDSTii |
2325 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2326 | | 1 | 0 | 1 |.W.|.op....|.offset........|.ptr.......|.reg.......| | |
2327 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2328 | int reg = ((iw0 >> LDSTii_reg_bit) & LDSTii_reg_mask); |
2329 | int ptr = ((iw0 >> LDSTii_ptr_bit) & LDSTii_ptr_mask); | |
2330 | int offset = ((iw0 >> LDSTii_offset_bit) & LDSTii_offset_mask); | |
2331 | int op = ((iw0 >> LDSTii_op_bit) & LDSTii_op_mask); | |
2332 | int W = ((iw0 >> LDSTii_W_bit) & LDSTii_W_mask); | |
2333 | ||
2334 | if (W == 0 && op == 0) | |
2335 | { | |
4b7f6baa CM |
2336 | OUTS (outf, dregs (reg)); |
2337 | OUTS (outf, "=["); | |
2338 | OUTS (outf, pregs (ptr)); | |
2339 | OUTS (outf, "+"); | |
2340 | OUTS (outf, uimm4s4 (offset)); | |
2341 | OUTS (outf, "]"); | |
4b7f6baa CM |
2342 | } |
2343 | else if (W == 0 && op == 1) | |
2344 | { | |
4b7f6baa CM |
2345 | OUTS (outf, dregs (reg)); |
2346 | OUTS (outf, "=W["); | |
2347 | OUTS (outf, pregs (ptr)); | |
2348 | OUTS (outf, "+"); | |
2349 | OUTS (outf, uimm4s2 (offset)); | |
2350 | OUTS (outf, "] (Z)"); | |
4b7f6baa CM |
2351 | } |
2352 | else if (W == 0 && op == 2) | |
2353 | { | |
4b7f6baa CM |
2354 | OUTS (outf, dregs (reg)); |
2355 | OUTS (outf, "=W["); | |
2356 | OUTS (outf, pregs (ptr)); | |
2357 | OUTS (outf, "+"); | |
2358 | OUTS (outf, uimm4s2 (offset)); | |
2359 | OUTS (outf, "](X)"); | |
4b7f6baa CM |
2360 | } |
2361 | else if (W == 0 && op == 3) | |
2362 | { | |
4b7f6baa CM |
2363 | OUTS (outf, pregs (reg)); |
2364 | OUTS (outf, "=["); | |
2365 | OUTS (outf, pregs (ptr)); | |
2366 | OUTS (outf, "+"); | |
2367 | OUTS (outf, uimm4s4 (offset)); | |
2368 | OUTS (outf, "]"); | |
4b7f6baa CM |
2369 | } |
2370 | else if (W == 1 && op == 0) | |
2371 | { | |
4b7f6baa CM |
2372 | OUTS (outf, "["); |
2373 | OUTS (outf, pregs (ptr)); | |
2374 | OUTS (outf, "+"); | |
2375 | OUTS (outf, uimm4s4 (offset)); | |
2376 | OUTS (outf, "]="); | |
2377 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
2378 | } |
2379 | else if (W == 1 && op == 1) | |
2380 | { | |
4b7f6baa CM |
2381 | OUTS (outf, "W"); |
2382 | OUTS (outf, "["); | |
2383 | OUTS (outf, pregs (ptr)); | |
2384 | OUTS (outf, "+"); | |
2385 | OUTS (outf, uimm4s2 (offset)); | |
2386 | OUTS (outf, "]"); | |
2387 | OUTS (outf, "="); | |
2388 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
2389 | } |
2390 | else if (W == 1 && op == 3) | |
2391 | { | |
4b7f6baa CM |
2392 | OUTS (outf, "["); |
2393 | OUTS (outf, pregs (ptr)); | |
2394 | OUTS (outf, "+"); | |
2395 | OUTS (outf, uimm4s4 (offset)); | |
2396 | OUTS (outf, "]="); | |
2397 | OUTS (outf, pregs (reg)); | |
4b7f6baa CM |
2398 | } |
2399 | else | |
b7d48530 NC |
2400 | return 0; |
2401 | ||
2402 | return 2; | |
4b7f6baa CM |
2403 | } |
2404 | ||
2405 | static int | |
2406 | decode_LoopSetup_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf) | |
2407 | { | |
b7d48530 NC |
2408 | /* LoopSetup |
2409 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2410 | | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 |.rop...|.c.|.soffset.......| | |
2411 | |.reg...........| - | - |.eoffset...............................| | |
2412 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2413 | int c = ((iw0 >> (LoopSetup_c_bits - 16)) & LoopSetup_c_mask); |
2414 | int reg = ((iw1 >> LoopSetup_reg_bits) & LoopSetup_reg_mask); | |
2415 | int rop = ((iw0 >> (LoopSetup_rop_bits - 16)) & LoopSetup_rop_mask); | |
2416 | int soffset = ((iw0 >> (LoopSetup_soffset_bits - 16)) & LoopSetup_soffset_mask); | |
2417 | int eoffset = ((iw1 >> LoopSetup_eoffset_bits) & LoopSetup_eoffset_mask); | |
2418 | ||
2419 | if (rop == 0) | |
2420 | { | |
4b7f6baa CM |
2421 | OUTS (outf, "LSETUP"); |
2422 | OUTS (outf, "("); | |
2423 | OUTS (outf, pcrel4 (soffset)); | |
2424 | OUTS (outf, ","); | |
2425 | OUTS (outf, lppcrel10 (eoffset)); | |
2426 | OUTS (outf, ")"); | |
2427 | OUTS (outf, counters (c)); | |
4b7f6baa CM |
2428 | } |
2429 | else if (rop == 1) | |
2430 | { | |
4b7f6baa CM |
2431 | OUTS (outf, "LSETUP"); |
2432 | OUTS (outf, "("); | |
2433 | OUTS (outf, pcrel4 (soffset)); | |
2434 | OUTS (outf, ","); | |
2435 | OUTS (outf, lppcrel10 (eoffset)); | |
2436 | OUTS (outf, ")"); | |
2437 | OUTS (outf, counters (c)); | |
2438 | OUTS (outf, "="); | |
2439 | OUTS (outf, pregs (reg)); | |
4b7f6baa CM |
2440 | } |
2441 | else if (rop == 3) | |
2442 | { | |
4b7f6baa CM |
2443 | OUTS (outf, "LSETUP"); |
2444 | OUTS (outf, "("); | |
2445 | OUTS (outf, pcrel4 (soffset)); | |
2446 | OUTS (outf, ","); | |
2447 | OUTS (outf, lppcrel10 (eoffset)); | |
2448 | OUTS (outf, ")"); | |
2449 | OUTS (outf, counters (c)); | |
2450 | OUTS (outf, "="); | |
2451 | OUTS (outf, pregs (reg)); | |
2452 | OUTS (outf, ">>1"); | |
4b7f6baa CM |
2453 | } |
2454 | else | |
b7d48530 NC |
2455 | return 0; |
2456 | ||
2457 | return 4; | |
4b7f6baa CM |
2458 | } |
2459 | ||
2460 | static int | |
2461 | decode_LDIMMhalf_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
2462 | { | |
b7d48530 NC |
2463 | /* LDIMMhalf |
2464 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2465 | | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 |.Z.|.H.|.S.|.grp...|.reg.......| | |
2466 | |.hword.........................................................| | |
2467 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2468 | int H = ((iw0 >> (LDIMMhalf_H_bits - 16)) & LDIMMhalf_H_mask); |
2469 | int Z = ((iw0 >> (LDIMMhalf_Z_bits - 16)) & LDIMMhalf_Z_mask); | |
2470 | int S = ((iw0 >> (LDIMMhalf_S_bits - 16)) & LDIMMhalf_S_mask); | |
2471 | int reg = ((iw0 >> (LDIMMhalf_reg_bits - 16)) & LDIMMhalf_reg_mask); | |
2472 | int grp = ((iw0 >> (LDIMMhalf_grp_bits - 16)) & LDIMMhalf_grp_mask); | |
2473 | int hword = ((iw1 >> LDIMMhalf_hword_bits) & LDIMMhalf_hword_mask); | |
2474 | ||
b21c9cb4 BS |
2475 | bu32 *pval = get_allreg (grp, reg); |
2476 | ||
2477 | /* Since we don't have 32-bit immediate loads, we allow the disassembler | |
2478 | to combine them, so it prints out the right values. | |
2479 | Here we keep track of the registers. */ | |
2480 | if (H == 0 && S == 1 && Z == 0) | |
2481 | { | |
2482 | /* regs = imm16 (x) */ | |
2483 | *pval = imm16_val (hword); | |
2484 | } | |
2485 | else if (H == 0 && S == 0 && Z == 1) | |
2486 | { | |
2487 | /* regs = luimm16 (Z) */ | |
2488 | *pval = luimm16_val (hword); | |
2489 | } | |
2490 | else if (H == 0 && S == 0 && Z == 0) | |
2491 | { | |
2492 | /* regs_lo = luimm16 */ | |
2493 | *pval &= 0xFFFF0000; | |
2494 | *pval |= luimm16_val (hword); | |
2495 | } | |
2496 | else if (H == 1 && S == 0 && Z == 0) | |
2497 | { | |
2498 | /* regs_hi = huimm16 */ | |
2499 | *pval &= 0xFFFF; | |
2500 | *pval |= luimm16_val (hword) << 16; | |
2501 | } | |
2502 | ||
2503 | /* Here we do the disassembly */ | |
4b7f6baa CM |
2504 | if (grp == 0 && H == 0 && S == 0 && Z == 0) |
2505 | { | |
4b7f6baa CM |
2506 | OUTS (outf, dregs_lo (reg)); |
2507 | OUTS (outf, "="); | |
2508 | OUTS (outf, imm16 (hword)); | |
4b7f6baa CM |
2509 | } |
2510 | else if (grp == 0 && H == 1 && S == 0 && Z == 0) | |
2511 | { | |
4b7f6baa CM |
2512 | OUTS (outf, dregs_hi (reg)); |
2513 | OUTS (outf, "="); | |
2514 | OUTS (outf, imm16 (hword)); | |
4b7f6baa CM |
2515 | } |
2516 | else if (grp == 0 && H == 0 && S == 1 && Z == 0) | |
2517 | { | |
4b7f6baa CM |
2518 | OUTS (outf, dregs (reg)); |
2519 | OUTS (outf, "="); | |
2520 | OUTS (outf, imm16 (hword)); | |
2521 | OUTS (outf, " (X)"); | |
4b7f6baa CM |
2522 | } |
2523 | else if (H == 0 && S == 1 && Z == 0) | |
2524 | { | |
4b7f6baa CM |
2525 | OUTS (outf, regs (reg, grp)); |
2526 | OUTS (outf, "="); | |
2527 | OUTS (outf, imm16 (hword)); | |
2528 | OUTS (outf, " (X)"); | |
4b7f6baa CM |
2529 | } |
2530 | else if (H == 0 && S == 0 && Z == 1) | |
2531 | { | |
4b7f6baa CM |
2532 | OUTS (outf, regs (reg, grp)); |
2533 | OUTS (outf, "="); | |
2534 | OUTS (outf, luimm16 (hword)); | |
2535 | OUTS (outf, "(Z)"); | |
4b7f6baa CM |
2536 | } |
2537 | else if (H == 0 && S == 0 && Z == 0) | |
2538 | { | |
4b7f6baa CM |
2539 | OUTS (outf, regs_lo (reg, grp)); |
2540 | OUTS (outf, "="); | |
b21c9cb4 | 2541 | OUTS (outf, uimm16 (hword)); |
4b7f6baa CM |
2542 | } |
2543 | else if (H == 1 && S == 0 && Z == 0) | |
2544 | { | |
4b7f6baa CM |
2545 | OUTS (outf, regs_hi (reg, grp)); |
2546 | OUTS (outf, "="); | |
b21c9cb4 | 2547 | OUTS (outf, uimm16 (hword)); |
4b7f6baa CM |
2548 | } |
2549 | else | |
b7d48530 NC |
2550 | return 0; |
2551 | ||
b21c9cb4 BS |
2552 | /* And we print out the 32-bit value if it is a pointer. */ |
2553 | if ( S == 0 && Z == 0 && grp != 0 ) | |
2554 | { | |
2555 | OUTS (outf, "\t/* "); | |
2556 | /* If it is an MMR, don't print the symbol. */ | |
2557 | if ( *pval < 0xFFC00000 ) | |
2558 | OUTS (outf, huimm32(*pval)); | |
2559 | else | |
2560 | OUTS (outf, uimm32(*pval)); | |
2561 | ||
2562 | OUTS (outf, " */"); | |
2563 | } | |
2564 | ||
b7d48530 | 2565 | return 4; |
4b7f6baa CM |
2566 | } |
2567 | ||
2568 | static int | |
2569 | decode_CALLa_0 (TIword iw0, TIword iw1, bfd_vma pc, disassemble_info *outf) | |
2570 | { | |
b7d48530 NC |
2571 | /* CALLa |
2572 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2573 | | 1 | 1 | 1 | 0 | 0 | 0 | 1 |.S.|.msw...........................| | |
2574 | |.lsw...........................................................| | |
2575 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2576 | int S = ((iw0 >> (CALLa_S_bits - 16)) & CALLa_S_mask); |
2577 | int lsw = ((iw1 >> 0) & 0xffff); | |
2578 | int msw = ((iw0 >> 0) & 0xff); | |
2579 | ||
2580 | if (S == 1) | |
b7d48530 | 2581 | OUTS (outf, "CALL "); |
4b7f6baa | 2582 | else if (S == 0) |
b7d48530 | 2583 | OUTS (outf, "JUMP.L "); |
4b7f6baa | 2584 | else |
b7d48530 NC |
2585 | return 0; |
2586 | ||
2587 | OUTS (outf, pcrel24 (((msw) << 16) | (lsw))); | |
2588 | return 4; | |
4b7f6baa CM |
2589 | } |
2590 | ||
2591 | static int | |
2592 | decode_LDSTidxI_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
2593 | { | |
b7d48530 NC |
2594 | /* LDSTidxI |
2595 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2596 | | 1 | 1 | 1 | 0 | 0 | 1 |.W.|.Z.|.sz....|.ptr.......|.reg.......| | |
2597 | |.offset........................................................| | |
2598 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2599 | int Z = ((iw0 >> (LDSTidxI_Z_bits - 16)) & LDSTidxI_Z_mask); |
2600 | int W = ((iw0 >> (LDSTidxI_W_bits - 16)) & LDSTidxI_W_mask); | |
2601 | int sz = ((iw0 >> (LDSTidxI_sz_bits - 16)) & LDSTidxI_sz_mask); | |
2602 | int reg = ((iw0 >> (LDSTidxI_reg_bits - 16)) & LDSTidxI_reg_mask); | |
2603 | int ptr = ((iw0 >> (LDSTidxI_ptr_bits - 16)) & LDSTidxI_ptr_mask); | |
2604 | int offset = ((iw1 >> LDSTidxI_offset_bits) & LDSTidxI_offset_mask); | |
2605 | ||
2606 | if (W == 0 && sz == 0 && Z == 0) | |
2607 | { | |
4b7f6baa CM |
2608 | OUTS (outf, dregs (reg)); |
2609 | OUTS (outf, "=["); | |
2610 | OUTS (outf, pregs (ptr)); | |
2611 | OUTS (outf, "+"); | |
2612 | OUTS (outf, imm16s4 (offset)); | |
2613 | OUTS (outf, "]"); | |
4b7f6baa CM |
2614 | } |
2615 | else if (W == 0 && sz == 0 && Z == 1) | |
2616 | { | |
4b7f6baa CM |
2617 | OUTS (outf, pregs (reg)); |
2618 | OUTS (outf, "=["); | |
2619 | OUTS (outf, pregs (ptr)); | |
2620 | OUTS (outf, "+"); | |
2621 | OUTS (outf, imm16s4 (offset)); | |
2622 | OUTS (outf, "]"); | |
4b7f6baa CM |
2623 | } |
2624 | else if (W == 0 && sz == 1 && Z == 0) | |
2625 | { | |
4b7f6baa CM |
2626 | OUTS (outf, dregs (reg)); |
2627 | OUTS (outf, "=W["); | |
2628 | OUTS (outf, pregs (ptr)); | |
2629 | OUTS (outf, "+"); | |
2630 | OUTS (outf, imm16s2 (offset)); | |
2631 | OUTS (outf, "] (Z)"); | |
4b7f6baa CM |
2632 | } |
2633 | else if (W == 0 && sz == 1 && Z == 1) | |
2634 | { | |
4b7f6baa CM |
2635 | OUTS (outf, dregs (reg)); |
2636 | OUTS (outf, "=W["); | |
2637 | OUTS (outf, pregs (ptr)); | |
2638 | OUTS (outf, "+"); | |
2639 | OUTS (outf, imm16s2 (offset)); | |
2640 | OUTS (outf, "](X)"); | |
4b7f6baa CM |
2641 | } |
2642 | else if (W == 0 && sz == 2 && Z == 0) | |
2643 | { | |
4b7f6baa CM |
2644 | OUTS (outf, dregs (reg)); |
2645 | OUTS (outf, "=B["); | |
2646 | OUTS (outf, pregs (ptr)); | |
2647 | OUTS (outf, "+"); | |
2648 | OUTS (outf, imm16 (offset)); | |
2649 | OUTS (outf, "] (Z)"); | |
4b7f6baa CM |
2650 | } |
2651 | else if (W == 0 && sz == 2 && Z == 1) | |
2652 | { | |
4b7f6baa CM |
2653 | OUTS (outf, dregs (reg)); |
2654 | OUTS (outf, "=B["); | |
2655 | OUTS (outf, pregs (ptr)); | |
2656 | OUTS (outf, "+"); | |
2657 | OUTS (outf, imm16 (offset)); | |
2658 | OUTS (outf, "](X)"); | |
4b7f6baa CM |
2659 | } |
2660 | else if (W == 1 && sz == 0 && Z == 0) | |
2661 | { | |
4b7f6baa CM |
2662 | OUTS (outf, "["); |
2663 | OUTS (outf, pregs (ptr)); | |
2664 | OUTS (outf, "+"); | |
2665 | OUTS (outf, imm16s4 (offset)); | |
2666 | OUTS (outf, "]="); | |
2667 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
2668 | } |
2669 | else if (W == 1 && sz == 0 && Z == 1) | |
2670 | { | |
4b7f6baa CM |
2671 | OUTS (outf, "["); |
2672 | OUTS (outf, pregs (ptr)); | |
2673 | OUTS (outf, "+"); | |
2674 | OUTS (outf, imm16s4 (offset)); | |
2675 | OUTS (outf, "]="); | |
2676 | OUTS (outf, pregs (reg)); | |
4b7f6baa CM |
2677 | } |
2678 | else if (W == 1 && sz == 1 && Z == 0) | |
2679 | { | |
4b7f6baa CM |
2680 | OUTS (outf, "W["); |
2681 | OUTS (outf, pregs (ptr)); | |
2682 | OUTS (outf, "+"); | |
2683 | OUTS (outf, imm16s2 (offset)); | |
2684 | OUTS (outf, "]="); | |
2685 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
2686 | } |
2687 | else if (W == 1 && sz == 2 && Z == 0) | |
2688 | { | |
4b7f6baa CM |
2689 | OUTS (outf, "B["); |
2690 | OUTS (outf, pregs (ptr)); | |
2691 | OUTS (outf, "+"); | |
2692 | OUTS (outf, imm16 (offset)); | |
2693 | OUTS (outf, "]="); | |
2694 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
2695 | } |
2696 | else | |
b7d48530 NC |
2697 | return 0; |
2698 | ||
2699 | return 4; | |
4b7f6baa CM |
2700 | } |
2701 | ||
2702 | static int | |
2703 | decode_linkage_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
2704 | { | |
b7d48530 NC |
2705 | /* linkage |
2706 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2707 | | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.R.| | |
2708 | |.framesize.....................................................| | |
2709 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2710 | int R = ((iw0 >> (Linkage_R_bits - 16)) & Linkage_R_mask); |
2711 | int framesize = ((iw1 >> Linkage_framesize_bits) & Linkage_framesize_mask); | |
2712 | ||
2713 | if (R == 0) | |
2714 | { | |
4b7f6baa CM |
2715 | OUTS (outf, "LINK "); |
2716 | OUTS (outf, uimm16s4 (framesize)); | |
4b7f6baa CM |
2717 | } |
2718 | else if (R == 1) | |
b7d48530 | 2719 | OUTS (outf, "UNLINK"); |
4b7f6baa | 2720 | else |
b7d48530 NC |
2721 | return 0; |
2722 | ||
2723 | return 4; | |
4b7f6baa CM |
2724 | } |
2725 | ||
2726 | static int | |
2727 | decode_dsp32mac_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
2728 | { | |
b7d48530 NC |
2729 | /* dsp32mac |
2730 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2731 | | 1 | 1 | 0 | 0 |.M.| 0 | 0 |.mmod..........|.MM|.P.|.w1|.op1...| | |
2732 | |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1..| | |
2733 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
2734 | int op1 = ((iw0 >> (DSP32Mac_op1_bits - 16)) & DSP32Mac_op1_mask); | |
2735 | int w1 = ((iw0 >> (DSP32Mac_w1_bits - 16)) & DSP32Mac_w1_mask); | |
2736 | int P = ((iw0 >> (DSP32Mac_p_bits - 16)) & DSP32Mac_p_mask); | |
2737 | int MM = ((iw0 >> (DSP32Mac_MM_bits - 16)) & DSP32Mac_MM_mask); | |
4b7f6baa | 2738 | int mmod = ((iw0 >> (DSP32Mac_mmod_bits - 16)) & DSP32Mac_mmod_mask); |
b7d48530 | 2739 | int w0 = ((iw1 >> DSP32Mac_w0_bits) & DSP32Mac_w0_mask); |
4b7f6baa CM |
2740 | int src0 = ((iw1 >> DSP32Mac_src0_bits) & DSP32Mac_src0_mask); |
2741 | int src1 = ((iw1 >> DSP32Mac_src1_bits) & DSP32Mac_src1_mask); | |
b7d48530 NC |
2742 | int dst = ((iw1 >> DSP32Mac_dst_bits) & DSP32Mac_dst_mask); |
2743 | int h10 = ((iw1 >> DSP32Mac_h10_bits) & DSP32Mac_h10_mask); | |
2744 | int h00 = ((iw1 >> DSP32Mac_h00_bits) & DSP32Mac_h00_mask); | |
2745 | int op0 = ((iw1 >> DSP32Mac_op0_bits) & DSP32Mac_op0_mask); | |
2746 | int h11 = ((iw1 >> DSP32Mac_h11_bits) & DSP32Mac_h11_mask); | |
2747 | int h01 = ((iw1 >> DSP32Mac_h01_bits) & DSP32Mac_h01_mask); | |
4b7f6baa CM |
2748 | |
2749 | if (w0 == 0 && w1 == 0 && op1 == 3 && op0 == 3) | |
2750 | return 0; | |
2751 | ||
2752 | if (op1 == 3 && MM) | |
2753 | return 0; | |
2754 | ||
2755 | if ((w1 || w0) && mmod == M_W32) | |
2756 | return 0; | |
2757 | ||
2758 | if (((1 << mmod) & (P ? 0x31b : 0x1b5f)) == 0) | |
2759 | return 0; | |
2760 | ||
2761 | if (w1 == 1 || op1 != 3) | |
2762 | { | |
2763 | if (w1) | |
2764 | OUTS (outf, P ? dregs (dst + 1) : dregs_hi (dst)); | |
2765 | ||
2766 | if (op1 == 3) | |
2767 | OUTS (outf, " = A1"); | |
2768 | else | |
2769 | { | |
2770 | if (w1) | |
2771 | OUTS (outf, " = ("); | |
2772 | decode_macfunc (1, op1, h01, h11, src0, src1, outf); | |
2773 | if (w1) | |
2774 | OUTS (outf, ")"); | |
2775 | } | |
2776 | ||
2777 | if (w0 == 1 || op0 != 3) | |
2778 | { | |
2779 | if (MM) | |
2780 | OUTS (outf, " (M)"); | |
2781 | MM = 0; | |
2782 | OUTS (outf, ", "); | |
2783 | } | |
2784 | } | |
2785 | ||
2786 | if (w0 == 1 || op0 != 3) | |
2787 | { | |
2788 | if (w0) | |
2789 | OUTS (outf, P ? dregs (dst) : dregs_lo (dst)); | |
2790 | ||
2791 | if (op0 == 3) | |
2792 | OUTS (outf, " = A0"); | |
2793 | else | |
2794 | { | |
2795 | if (w0) | |
2796 | OUTS (outf, " = ("); | |
2797 | decode_macfunc (0, op0, h00, h10, src0, src1, outf); | |
2798 | if (w0) | |
2799 | OUTS (outf, ")"); | |
2800 | } | |
2801 | } | |
2802 | ||
2803 | decode_optmode (mmod, MM, outf); | |
2804 | ||
2805 | return 4; | |
2806 | } | |
2807 | ||
2808 | static int | |
2809 | decode_dsp32mult_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
2810 | { | |
b7d48530 NC |
2811 | /* dsp32mult |
2812 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2813 | | 1 | 1 | 0 | 0 |.M.| 0 | 1 |.mmod..........|.MM|.P.|.w1|.op1...| | |
2814 | |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1..| | |
2815 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
2816 | int w1 = ((iw0 >> (DSP32Mac_w1_bits - 16)) & DSP32Mac_w1_mask); | |
2817 | int P = ((iw0 >> (DSP32Mac_p_bits - 16)) & DSP32Mac_p_mask); | |
2818 | int MM = ((iw0 >> (DSP32Mac_MM_bits - 16)) & DSP32Mac_MM_mask); | |
4b7f6baa | 2819 | int mmod = ((iw0 >> (DSP32Mac_mmod_bits - 16)) & DSP32Mac_mmod_mask); |
b7d48530 | 2820 | int w0 = ((iw1 >> DSP32Mac_w0_bits) & DSP32Mac_w0_mask); |
4b7f6baa CM |
2821 | int src0 = ((iw1 >> DSP32Mac_src0_bits) & DSP32Mac_src0_mask); |
2822 | int src1 = ((iw1 >> DSP32Mac_src1_bits) & DSP32Mac_src1_mask); | |
b7d48530 NC |
2823 | int dst = ((iw1 >> DSP32Mac_dst_bits) & DSP32Mac_dst_mask); |
2824 | int h10 = ((iw1 >> DSP32Mac_h10_bits) & DSP32Mac_h10_mask); | |
2825 | int h00 = ((iw1 >> DSP32Mac_h00_bits) & DSP32Mac_h00_mask); | |
2826 | int h11 = ((iw1 >> DSP32Mac_h11_bits) & DSP32Mac_h11_mask); | |
2827 | int h01 = ((iw1 >> DSP32Mac_h01_bits) & DSP32Mac_h01_mask); | |
4b7f6baa CM |
2828 | |
2829 | if (w1 == 0 && w0 == 0) | |
2830 | return 0; | |
b7d48530 | 2831 | |
4b7f6baa CM |
2832 | if (((1 << mmod) & (P ? 0x313 : 0x1b57)) == 0) |
2833 | return 0; | |
b7d48530 | 2834 | |
4b7f6baa CM |
2835 | if (w1) |
2836 | { | |
2837 | OUTS (outf, P ? dregs (dst | 1) : dregs_hi (dst)); | |
2838 | OUTS (outf, " = "); | |
2839 | decode_multfunc (h01, h11, src0, src1, outf); | |
2840 | ||
2841 | if (w0) | |
2842 | { | |
2843 | if (MM) | |
2844 | OUTS (outf, " (M)"); | |
2845 | MM = 0; | |
2846 | OUTS (outf, ", "); | |
2847 | } | |
2848 | } | |
2849 | ||
2850 | if (w0) | |
2851 | { | |
2852 | OUTS (outf, dregs (dst)); | |
2853 | OUTS (outf, " = "); | |
2854 | decode_multfunc (h00, h10, src0, src1, outf); | |
2855 | } | |
2856 | ||
2857 | decode_optmode (mmod, MM, outf); | |
2858 | return 4; | |
2859 | } | |
2860 | ||
2861 | static int | |
2862 | decode_dsp32alu_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
2863 | { | |
b7d48530 NC |
2864 | /* dsp32alu |
2865 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
2866 | | 1 | 1 | 0 | 0 |.M.| 1 | 0 | - | - | - |.HL|.aopcde............| | |
2867 | |.aop...|.s.|.x.|.dst0......|.dst1......|.src0......|.src1......| | |
2868 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
2869 | int s = ((iw1 >> DSP32Alu_s_bits) & DSP32Alu_s_mask); |
2870 | int x = ((iw1 >> DSP32Alu_x_bits) & DSP32Alu_x_mask); | |
2871 | int aop = ((iw1 >> DSP32Alu_aop_bits) & DSP32Alu_aop_mask); | |
2872 | int src0 = ((iw1 >> DSP32Alu_src0_bits) & DSP32Alu_src0_mask); | |
2873 | int src1 = ((iw1 >> DSP32Alu_src1_bits) & DSP32Alu_src1_mask); | |
2874 | int dst0 = ((iw1 >> DSP32Alu_dst0_bits) & DSP32Alu_dst0_mask); | |
2875 | int dst1 = ((iw1 >> DSP32Alu_dst1_bits) & DSP32Alu_dst1_mask); | |
2876 | int HL = ((iw0 >> (DSP32Alu_HL_bits - 16)) & DSP32Alu_HL_mask); | |
2877 | int aopcde = ((iw0 >> (DSP32Alu_aopcde_bits - 16)) & DSP32Alu_aopcde_mask); | |
2878 | ||
2879 | if (aop == 0 && aopcde == 9 && HL == 0 && s == 0) | |
2880 | { | |
4b7f6baa CM |
2881 | OUTS (outf, "A0.L="); |
2882 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
2883 | } |
2884 | else if (aop == 2 && aopcde == 9 && HL == 1 && s == 0) | |
2885 | { | |
4b7f6baa CM |
2886 | OUTS (outf, "A1.H="); |
2887 | OUTS (outf, dregs_hi (src0)); | |
4b7f6baa CM |
2888 | } |
2889 | else if (aop == 2 && aopcde == 9 && HL == 0 && s == 0) | |
2890 | { | |
4b7f6baa CM |
2891 | OUTS (outf, "A1.L="); |
2892 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
2893 | } |
2894 | else if (aop == 0 && aopcde == 9 && HL == 1 && s == 0) | |
2895 | { | |
4b7f6baa CM |
2896 | OUTS (outf, "A0.H="); |
2897 | OUTS (outf, dregs_hi (src0)); | |
4b7f6baa CM |
2898 | } |
2899 | else if (x == 1 && HL == 1 && aop == 3 && aopcde == 5) | |
2900 | { | |
4b7f6baa CM |
2901 | OUTS (outf, dregs_hi (dst0)); |
2902 | OUTS (outf, "="); | |
2903 | OUTS (outf, dregs (src0)); | |
2904 | OUTS (outf, "-"); | |
2905 | OUTS (outf, dregs (src1)); | |
2906 | OUTS (outf, "(RND20)"); | |
4b7f6baa CM |
2907 | } |
2908 | else if (x == 1 && HL == 1 && aop == 2 && aopcde == 5) | |
2909 | { | |
4b7f6baa CM |
2910 | OUTS (outf, dregs_hi (dst0)); |
2911 | OUTS (outf, "="); | |
2912 | OUTS (outf, dregs (src0)); | |
2913 | OUTS (outf, "+"); | |
2914 | OUTS (outf, dregs (src1)); | |
2915 | OUTS (outf, "(RND20)"); | |
4b7f6baa CM |
2916 | } |
2917 | else if (x == 0 && HL == 0 && aop == 1 && aopcde == 5) | |
2918 | { | |
4b7f6baa CM |
2919 | OUTS (outf, dregs_lo (dst0)); |
2920 | OUTS (outf, "="); | |
2921 | OUTS (outf, dregs (src0)); | |
2922 | OUTS (outf, "-"); | |
2923 | OUTS (outf, dregs (src1)); | |
2924 | OUTS (outf, "(RND12)"); | |
4b7f6baa CM |
2925 | } |
2926 | else if (x == 0 && HL == 0 && aop == 0 && aopcde == 5) | |
2927 | { | |
4b7f6baa CM |
2928 | OUTS (outf, dregs_lo (dst0)); |
2929 | OUTS (outf, "="); | |
2930 | OUTS (outf, dregs (src0)); | |
2931 | OUTS (outf, "+"); | |
2932 | OUTS (outf, dregs (src1)); | |
2933 | OUTS (outf, "(RND12)"); | |
4b7f6baa CM |
2934 | } |
2935 | else if (x == 1 && HL == 0 && aop == 3 && aopcde == 5) | |
2936 | { | |
4b7f6baa CM |
2937 | OUTS (outf, dregs_lo (dst0)); |
2938 | OUTS (outf, "="); | |
2939 | OUTS (outf, dregs (src0)); | |
2940 | OUTS (outf, "-"); | |
2941 | OUTS (outf, dregs (src1)); | |
2942 | OUTS (outf, "(RND20)"); | |
4b7f6baa CM |
2943 | } |
2944 | else if (x == 0 && HL == 1 && aop == 0 && aopcde == 5) | |
2945 | { | |
4b7f6baa CM |
2946 | OUTS (outf, dregs_hi (dst0)); |
2947 | OUTS (outf, "="); | |
2948 | OUTS (outf, dregs (src0)); | |
2949 | OUTS (outf, "+"); | |
2950 | OUTS (outf, dregs (src1)); | |
2951 | OUTS (outf, "(RND12)"); | |
4b7f6baa CM |
2952 | } |
2953 | else if (x == 1 && HL == 0 && aop == 2 && aopcde == 5) | |
2954 | { | |
4b7f6baa CM |
2955 | OUTS (outf, dregs_lo (dst0)); |
2956 | OUTS (outf, "="); | |
2957 | OUTS (outf, dregs (src0)); | |
2958 | OUTS (outf, "+"); | |
2959 | OUTS (outf, dregs (src1)); | |
2960 | OUTS (outf, "(RND20)"); | |
4b7f6baa CM |
2961 | } |
2962 | else if (x == 0 && HL == 1 && aop == 1 && aopcde == 5) | |
2963 | { | |
4b7f6baa CM |
2964 | OUTS (outf, dregs_hi (dst0)); |
2965 | OUTS (outf, "="); | |
2966 | OUTS (outf, dregs (src0)); | |
2967 | OUTS (outf, "-"); | |
2968 | OUTS (outf, dregs (src1)); | |
2969 | OUTS (outf, "(RND12)"); | |
4b7f6baa CM |
2970 | } |
2971 | else if (HL == 1 && aop == 0 && aopcde == 2) | |
2972 | { | |
4b7f6baa CM |
2973 | OUTS (outf, dregs_hi (dst0)); |
2974 | OUTS (outf, "="); | |
2975 | OUTS (outf, dregs_lo (src0)); | |
2976 | OUTS (outf, "+"); | |
2977 | OUTS (outf, dregs_lo (src1)); | |
2978 | OUTS (outf, " "); | |
2979 | amod1 (s, x, outf); | |
4b7f6baa CM |
2980 | } |
2981 | else if (HL == 1 && aop == 1 && aopcde == 2) | |
2982 | { | |
4b7f6baa CM |
2983 | OUTS (outf, dregs_hi (dst0)); |
2984 | OUTS (outf, "="); | |
2985 | OUTS (outf, dregs_lo (src0)); | |
2986 | OUTS (outf, "+"); | |
2987 | OUTS (outf, dregs_hi (src1)); | |
2988 | OUTS (outf, " "); | |
2989 | amod1 (s, x, outf); | |
4b7f6baa CM |
2990 | } |
2991 | else if (HL == 1 && aop == 2 && aopcde == 2) | |
2992 | { | |
4b7f6baa CM |
2993 | OUTS (outf, dregs_hi (dst0)); |
2994 | OUTS (outf, "="); | |
2995 | OUTS (outf, dregs_hi (src0)); | |
2996 | OUTS (outf, "+"); | |
2997 | OUTS (outf, dregs_lo (src1)); | |
2998 | OUTS (outf, " "); | |
2999 | amod1 (s, x, outf); | |
4b7f6baa CM |
3000 | } |
3001 | else if (HL == 1 && aop == 3 && aopcde == 2) | |
3002 | { | |
4b7f6baa CM |
3003 | OUTS (outf, dregs_hi (dst0)); |
3004 | OUTS (outf, "="); | |
3005 | OUTS (outf, dregs_hi (src0)); | |
3006 | OUTS (outf, "+"); | |
3007 | OUTS (outf, dregs_hi (src1)); | |
3008 | OUTS (outf, " "); | |
3009 | amod1 (s, x, outf); | |
4b7f6baa CM |
3010 | } |
3011 | else if (HL == 0 && aop == 0 && aopcde == 3) | |
3012 | { | |
4b7f6baa CM |
3013 | OUTS (outf, dregs_lo (dst0)); |
3014 | OUTS (outf, "="); | |
3015 | OUTS (outf, dregs_lo (src0)); | |
3016 | OUTS (outf, "-"); | |
3017 | OUTS (outf, dregs_lo (src1)); | |
3018 | OUTS (outf, " "); | |
3019 | amod1 (s, x, outf); | |
4b7f6baa CM |
3020 | } |
3021 | else if (HL == 0 && aop == 1 && aopcde == 3) | |
3022 | { | |
4b7f6baa CM |
3023 | OUTS (outf, dregs_lo (dst0)); |
3024 | OUTS (outf, "="); | |
3025 | OUTS (outf, dregs_lo (src0)); | |
3026 | OUTS (outf, "-"); | |
3027 | OUTS (outf, dregs_hi (src1)); | |
3028 | OUTS (outf, " "); | |
3029 | amod1 (s, x, outf); | |
4b7f6baa CM |
3030 | } |
3031 | else if (HL == 0 && aop == 3 && aopcde == 2) | |
3032 | { | |
4b7f6baa CM |
3033 | OUTS (outf, dregs_lo (dst0)); |
3034 | OUTS (outf, "="); | |
3035 | OUTS (outf, dregs_hi (src0)); | |
3036 | OUTS (outf, "+"); | |
3037 | OUTS (outf, dregs_hi (src1)); | |
3038 | OUTS (outf, " "); | |
3039 | amod1 (s, x, outf); | |
4b7f6baa CM |
3040 | } |
3041 | else if (HL == 1 && aop == 0 && aopcde == 3) | |
3042 | { | |
4b7f6baa CM |
3043 | OUTS (outf, dregs_hi (dst0)); |
3044 | OUTS (outf, "="); | |
3045 | OUTS (outf, dregs_lo (src0)); | |
3046 | OUTS (outf, "-"); | |
3047 | OUTS (outf, dregs_lo (src1)); | |
3048 | OUTS (outf, " "); | |
3049 | amod1 (s, x, outf); | |
4b7f6baa CM |
3050 | } |
3051 | else if (HL == 1 && aop == 1 && aopcde == 3) | |
3052 | { | |
4b7f6baa CM |
3053 | OUTS (outf, dregs_hi (dst0)); |
3054 | OUTS (outf, "="); | |
3055 | OUTS (outf, dregs_lo (src0)); | |
3056 | OUTS (outf, "-"); | |
3057 | OUTS (outf, dregs_hi (src1)); | |
3058 | OUTS (outf, " "); | |
3059 | amod1 (s, x, outf); | |
4b7f6baa CM |
3060 | } |
3061 | else if (HL == 1 && aop == 2 && aopcde == 3) | |
3062 | { | |
4b7f6baa CM |
3063 | OUTS (outf, dregs_hi (dst0)); |
3064 | OUTS (outf, "="); | |
3065 | OUTS (outf, dregs_hi (src0)); | |
3066 | OUTS (outf, "-"); | |
3067 | OUTS (outf, dregs_lo (src1)); | |
3068 | OUTS (outf, " "); | |
3069 | amod1 (s, x, outf); | |
4b7f6baa CM |
3070 | } |
3071 | else if (HL == 1 && aop == 3 && aopcde == 3) | |
3072 | { | |
4b7f6baa CM |
3073 | OUTS (outf, dregs_hi (dst0)); |
3074 | OUTS (outf, "="); | |
3075 | OUTS (outf, dregs_hi (src0)); | |
3076 | OUTS (outf, "-"); | |
3077 | OUTS (outf, dregs_hi (src1)); | |
3078 | OUTS (outf, " "); | |
3079 | amod1 (s, x, outf); | |
4b7f6baa CM |
3080 | } |
3081 | else if (HL == 0 && aop == 2 && aopcde == 2) | |
3082 | { | |
4b7f6baa CM |
3083 | OUTS (outf, dregs_lo (dst0)); |
3084 | OUTS (outf, "="); | |
3085 | OUTS (outf, dregs_hi (src0)); | |
3086 | OUTS (outf, "+"); | |
3087 | OUTS (outf, dregs_lo (src1)); | |
3088 | OUTS (outf, " "); | |
3089 | amod1 (s, x, outf); | |
4b7f6baa CM |
3090 | } |
3091 | else if (HL == 0 && aop == 1 && aopcde == 2) | |
3092 | { | |
4b7f6baa CM |
3093 | OUTS (outf, dregs_lo (dst0)); |
3094 | OUTS (outf, "="); | |
3095 | OUTS (outf, dregs_lo (src0)); | |
3096 | OUTS (outf, "+"); | |
3097 | OUTS (outf, dregs_hi (src1)); | |
3098 | OUTS (outf, " "); | |
3099 | amod1 (s, x, outf); | |
4b7f6baa CM |
3100 | } |
3101 | else if (HL == 0 && aop == 2 && aopcde == 3) | |
3102 | { | |
4b7f6baa CM |
3103 | OUTS (outf, dregs_lo (dst0)); |
3104 | OUTS (outf, "="); | |
3105 | OUTS (outf, dregs_hi (src0)); | |
3106 | OUTS (outf, "-"); | |
3107 | OUTS (outf, dregs_lo (src1)); | |
3108 | OUTS (outf, " "); | |
3109 | amod1 (s, x, outf); | |
4b7f6baa CM |
3110 | } |
3111 | else if (HL == 0 && aop == 3 && aopcde == 3) | |
3112 | { | |
4b7f6baa CM |
3113 | OUTS (outf, dregs_lo (dst0)); |
3114 | OUTS (outf, "="); | |
3115 | OUTS (outf, dregs_hi (src0)); | |
3116 | OUTS (outf, "-"); | |
3117 | OUTS (outf, dregs_hi (src1)); | |
3118 | OUTS (outf, " "); | |
3119 | amod1 (s, x, outf); | |
4b7f6baa CM |
3120 | } |
3121 | else if (HL == 0 && aop == 0 && aopcde == 2) | |
3122 | { | |
4b7f6baa CM |
3123 | OUTS (outf, dregs_lo (dst0)); |
3124 | OUTS (outf, "="); | |
3125 | OUTS (outf, dregs_lo (src0)); | |
3126 | OUTS (outf, "+"); | |
3127 | OUTS (outf, dregs_lo (src1)); | |
3128 | OUTS (outf, " "); | |
3129 | amod1 (s, x, outf); | |
4b7f6baa CM |
3130 | } |
3131 | else if (aop == 0 && aopcde == 9 && s == 1) | |
3132 | { | |
4b7f6baa CM |
3133 | OUTS (outf, "A0="); |
3134 | OUTS (outf, dregs (src0)); | |
4b7f6baa CM |
3135 | } |
3136 | else if (aop == 3 && aopcde == 11 && s == 0) | |
b7d48530 NC |
3137 | OUTS (outf, "A0-=A1"); |
3138 | ||
4b7f6baa | 3139 | else if (aop == 3 && aopcde == 11 && s == 1) |
b7d48530 NC |
3140 | OUTS (outf, "A0-=A1(W32)"); |
3141 | ||
4b7f6baa CM |
3142 | else if (aop == 3 && aopcde == 22 && HL == 1) |
3143 | { | |
4b7f6baa CM |
3144 | OUTS (outf, dregs (dst0)); |
3145 | OUTS (outf, "=BYTEOP2M("); | |
3146 | OUTS (outf, dregs (src0 + 1)); | |
3147 | OUTS (outf, ":"); | |
3148 | OUTS (outf, imm5 (src0)); | |
3149 | OUTS (outf, ","); | |
3150 | OUTS (outf, dregs (src1 + 1)); | |
3151 | OUTS (outf, ":"); | |
3152 | OUTS (outf, imm5 (src1)); | |
3153 | OUTS (outf, ")(TH"); | |
3154 | if (s == 1) | |
3155 | OUTS (outf, ", R)"); | |
3156 | else | |
3157 | OUTS (outf, ")"); | |
4b7f6baa CM |
3158 | } |
3159 | else if (aop == 3 && aopcde == 22 && HL == 0) | |
3160 | { | |
4b7f6baa CM |
3161 | OUTS (outf, dregs (dst0)); |
3162 | OUTS (outf, "=BYTEOP2M("); | |
3163 | OUTS (outf, dregs (src0 + 1)); | |
3164 | OUTS (outf, ":"); | |
3165 | OUTS (outf, imm5 (src0)); | |
3166 | OUTS (outf, ","); | |
3167 | OUTS (outf, dregs (src1 + 1)); | |
3168 | OUTS (outf, ":"); | |
3169 | OUTS (outf, imm5 (src1)); | |
3170 | OUTS (outf, ")(TL"); | |
3171 | if (s == 1) | |
3172 | OUTS (outf, ", R)"); | |
3173 | else | |
3174 | OUTS (outf, ")"); | |
4b7f6baa CM |
3175 | } |
3176 | else if (aop == 2 && aopcde == 22 && HL == 1) | |
3177 | { | |
4b7f6baa CM |
3178 | OUTS (outf, dregs (dst0)); |
3179 | OUTS (outf, "=BYTEOP2M("); | |
3180 | OUTS (outf, dregs (src0 + 1)); | |
3181 | OUTS (outf, ":"); | |
3182 | OUTS (outf, imm5 (src0)); | |
3183 | OUTS (outf, ","); | |
3184 | OUTS (outf, dregs (src1 + 1)); | |
3185 | OUTS (outf, ":"); | |
3186 | OUTS (outf, imm5 (src1)); | |
3187 | OUTS (outf, ")(RNDH"); | |
3188 | if (s == 1) | |
3189 | OUTS (outf, ", R)"); | |
3190 | else | |
3191 | OUTS (outf, ")"); | |
4b7f6baa CM |
3192 | } |
3193 | else if (aop == 2 && aopcde == 22 && HL == 0) | |
3194 | { | |
4b7f6baa CM |
3195 | OUTS (outf, dregs (dst0)); |
3196 | OUTS (outf, "=BYTEOP2M("); | |
3197 | OUTS (outf, dregs (src0 + 1)); | |
3198 | OUTS (outf, ":"); | |
3199 | OUTS (outf, imm5 (src0)); | |
3200 | OUTS (outf, ","); | |
3201 | OUTS (outf, dregs (src1 + 1)); | |
3202 | OUTS (outf, ":"); | |
3203 | OUTS (outf, imm5 (src1)); | |
3204 | OUTS (outf, ")(RNDL"); | |
3205 | if (s == 1) | |
3206 | OUTS (outf, ", R)"); | |
3207 | else | |
3208 | OUTS (outf, ")"); | |
4b7f6baa CM |
3209 | } |
3210 | else if (aop == 1 && aopcde == 22 && HL == 1) | |
3211 | { | |
4b7f6baa CM |
3212 | OUTS (outf, dregs (dst0)); |
3213 | OUTS (outf, "=BYTEOP2P("); | |
3214 | OUTS (outf, dregs (src0 + 1)); | |
3215 | OUTS (outf, ":"); | |
3216 | OUTS (outf, imm5 (src0)); | |
3217 | OUTS (outf, ","); | |
3218 | OUTS (outf, dregs (src1 + 1)); | |
3219 | OUTS (outf, ":"); | |
3220 | OUTS (outf, imm5 (src1)); | |
3221 | OUTS (outf, ")(TH"); | |
3222 | if (s == 1) | |
3223 | OUTS (outf, ", R)"); | |
3224 | else | |
3225 | OUTS (outf, ")"); | |
4b7f6baa CM |
3226 | } |
3227 | else if (aop == 1 && aopcde == 22 && HL == 0) | |
3228 | { | |
4b7f6baa CM |
3229 | OUTS (outf, dregs (dst0)); |
3230 | OUTS (outf, "=BYTEOP2P("); | |
3231 | OUTS (outf, dregs (src0 + 1)); | |
3232 | OUTS (outf, ":"); | |
3233 | OUTS (outf, imm5 (src0)); | |
3234 | OUTS (outf, ","); | |
3235 | OUTS (outf, dregs (src1 + 1)); | |
3236 | OUTS (outf, ":"); | |
3237 | OUTS (outf, imm5 (src1)); | |
3238 | OUTS (outf, ")(TL"); | |
3239 | if (s == 1) | |
3240 | OUTS (outf, ", R)"); | |
3241 | else | |
3242 | OUTS (outf, ")"); | |
4b7f6baa CM |
3243 | } |
3244 | else if (aop == 0 && aopcde == 22 && HL == 1) | |
3245 | { | |
4b7f6baa CM |
3246 | OUTS (outf, dregs (dst0)); |
3247 | OUTS (outf, "=BYTEOP2P("); | |
3248 | OUTS (outf, dregs (src0 + 1)); | |
3249 | OUTS (outf, ":"); | |
3250 | OUTS (outf, imm5 (src0)); | |
3251 | OUTS (outf, ","); | |
3252 | OUTS (outf, dregs (src1 + 1)); | |
3253 | OUTS (outf, ":"); | |
3254 | OUTS (outf, imm5 (src1)); | |
3255 | OUTS (outf, ")(RNDH"); | |
3256 | if (s == 1) | |
3257 | OUTS (outf, ", R)"); | |
3258 | else | |
3259 | OUTS (outf, ")"); | |
4b7f6baa CM |
3260 | } |
3261 | else if (aop == 0 && aopcde == 22 && HL == 0) | |
3262 | { | |
4b7f6baa CM |
3263 | OUTS (outf, dregs (dst0)); |
3264 | OUTS (outf, "=BYTEOP2P("); | |
3265 | OUTS (outf, dregs (src0 + 1)); | |
3266 | OUTS (outf, ":"); | |
3267 | OUTS (outf, imm5 (src0)); | |
3268 | OUTS (outf, ","); | |
3269 | OUTS (outf, dregs (src1 + 1)); | |
3270 | OUTS (outf, ":"); | |
3271 | OUTS (outf, imm5 (src1)); | |
3272 | OUTS (outf, ")(RNDL"); | |
3273 | if (s == 1) | |
3274 | OUTS (outf, ", R)"); | |
3275 | else | |
3276 | OUTS (outf, ")"); | |
4b7f6baa CM |
3277 | } |
3278 | else if (aop == 0 && s == 0 && aopcde == 8) | |
b7d48530 NC |
3279 | OUTS (outf, "A0=0"); |
3280 | ||
4b7f6baa | 3281 | else if (aop == 0 && s == 1 && aopcde == 8) |
b7d48530 NC |
3282 | OUTS (outf, "A0=A0(S)"); |
3283 | ||
4b7f6baa | 3284 | else if (aop == 1 && s == 0 && aopcde == 8) |
b7d48530 NC |
3285 | OUTS (outf, "A1=0"); |
3286 | ||
4b7f6baa | 3287 | else if (aop == 1 && s == 1 && aopcde == 8) |
b7d48530 NC |
3288 | OUTS (outf, "A1=A1(S)"); |
3289 | ||
4b7f6baa | 3290 | else if (aop == 2 && s == 0 && aopcde == 8) |
b7d48530 NC |
3291 | OUTS (outf, "A1=A0=0"); |
3292 | ||
4b7f6baa | 3293 | else if (aop == 2 && s == 1 && aopcde == 8) |
b7d48530 NC |
3294 | OUTS (outf, "A1=A1(S),A0=A0(S)"); |
3295 | ||
4b7f6baa | 3296 | else if (aop == 3 && s == 0 && aopcde == 8) |
b7d48530 NC |
3297 | OUTS (outf, "A0=A1"); |
3298 | ||
4b7f6baa | 3299 | else if (aop == 3 && s == 1 && aopcde == 8) |
b7d48530 NC |
3300 | OUTS (outf, "A1=A0"); |
3301 | ||
4b7f6baa CM |
3302 | else if (aop == 1 && aopcde == 9 && s == 0) |
3303 | { | |
4b7f6baa CM |
3304 | OUTS (outf, "A0.x="); |
3305 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3306 | } |
3307 | else if (aop == 1 && HL == 0 && aopcde == 11) | |
3308 | { | |
4b7f6baa CM |
3309 | OUTS (outf, dregs_lo (dst0)); |
3310 | OUTS (outf, "=(A0+=A1)"); | |
4b7f6baa CM |
3311 | } |
3312 | else if (aop == 3 && HL == 0 && aopcde == 16) | |
b7d48530 NC |
3313 | OUTS (outf, "A1= ABS A0,A0= ABS A0"); |
3314 | ||
4b7f6baa CM |
3315 | else if (aop == 0 && aopcde == 23 && HL == 1) |
3316 | { | |
4b7f6baa CM |
3317 | OUTS (outf, dregs (dst0)); |
3318 | OUTS (outf, "=BYTEOP3P("); | |
3319 | OUTS (outf, dregs (src0 + 1)); | |
3320 | OUTS (outf, ":"); | |
3321 | OUTS (outf, imm5 (src0)); | |
3322 | OUTS (outf, ","); | |
3323 | OUTS (outf, dregs (src1 + 1)); | |
3324 | OUTS (outf, ":"); | |
3325 | OUTS (outf, imm5 (src1)); | |
3326 | OUTS (outf, ")(HI"); | |
3327 | if (s == 1) | |
3328 | OUTS (outf, ", R)"); | |
3329 | else | |
3330 | OUTS (outf, ")"); | |
4b7f6baa CM |
3331 | } |
3332 | else if (aop == 3 && aopcde == 9 && s == 0) | |
3333 | { | |
4b7f6baa CM |
3334 | OUTS (outf, "A1.x="); |
3335 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3336 | } |
3337 | else if (aop == 1 && HL == 1 && aopcde == 16) | |
b7d48530 NC |
3338 | OUTS (outf, "A1= ABS A1"); |
3339 | ||
4b7f6baa | 3340 | else if (aop == 0 && HL == 1 && aopcde == 16) |
b7d48530 NC |
3341 | OUTS (outf, "A1= ABS A0"); |
3342 | ||
4b7f6baa CM |
3343 | else if (aop == 2 && aopcde == 9 && s == 1) |
3344 | { | |
4b7f6baa CM |
3345 | OUTS (outf, "A1="); |
3346 | OUTS (outf, dregs (src0)); | |
4b7f6baa CM |
3347 | } |
3348 | else if (HL == 0 && aop == 3 && aopcde == 12) | |
3349 | { | |
4b7f6baa CM |
3350 | OUTS (outf, dregs_lo (dst0)); |
3351 | OUTS (outf, "="); | |
3352 | OUTS (outf, dregs (src0)); | |
3353 | OUTS (outf, "(RND)"); | |
4b7f6baa CM |
3354 | } |
3355 | else if (aop == 1 && HL == 0 && aopcde == 16) | |
b7d48530 NC |
3356 | OUTS (outf, "A0= ABS A1"); |
3357 | ||
4b7f6baa | 3358 | else if (aop == 0 && HL == 0 && aopcde == 16) |
b7d48530 NC |
3359 | OUTS (outf, "A0= ABS A0"); |
3360 | ||
4b7f6baa CM |
3361 | else if (aop == 3 && HL == 0 && aopcde == 15) |
3362 | { | |
4b7f6baa CM |
3363 | OUTS (outf, dregs (dst0)); |
3364 | OUTS (outf, "=-"); | |
3365 | OUTS (outf, dregs (src0)); | |
3366 | OUTS (outf, "(V)"); | |
4b7f6baa CM |
3367 | } |
3368 | else if (aop == 3 && s == 1 && HL == 0 && aopcde == 7) | |
3369 | { | |
4b7f6baa CM |
3370 | OUTS (outf, dregs (dst0)); |
3371 | OUTS (outf, "=-"); | |
3372 | OUTS (outf, dregs (src0)); | |
3373 | OUTS (outf, "(S)"); | |
4b7f6baa CM |
3374 | } |
3375 | else if (aop == 3 && s == 0 && HL == 0 && aopcde == 7) | |
3376 | { | |
4b7f6baa CM |
3377 | OUTS (outf, dregs (dst0)); |
3378 | OUTS (outf, "=-"); | |
3379 | OUTS (outf, dregs (src0)); | |
3380 | OUTS (outf, "(NS)"); | |
4b7f6baa CM |
3381 | } |
3382 | else if (aop == 1 && HL == 1 && aopcde == 11) | |
3383 | { | |
4b7f6baa CM |
3384 | OUTS (outf, dregs_hi (dst0)); |
3385 | OUTS (outf, "=(A0+=A1)"); | |
4b7f6baa CM |
3386 | } |
3387 | else if (aop == 2 && aopcde == 11 && s == 0) | |
b7d48530 NC |
3388 | OUTS (outf, "A0+=A1"); |
3389 | ||
4b7f6baa | 3390 | else if (aop == 2 && aopcde == 11 && s == 1) |
b7d48530 NC |
3391 | OUTS (outf, "A0+=A1(W32)"); |
3392 | ||
4b7f6baa | 3393 | else if (aop == 3 && HL == 0 && aopcde == 14) |
b7d48530 NC |
3394 | OUTS (outf, "A1=-A1,A0=-A0"); |
3395 | ||
4b7f6baa CM |
3396 | else if (HL == 1 && aop == 3 && aopcde == 12) |
3397 | { | |
4b7f6baa CM |
3398 | OUTS (outf, dregs_hi (dst0)); |
3399 | OUTS (outf, "="); | |
3400 | OUTS (outf, dregs (src0)); | |
3401 | OUTS (outf, "(RND)"); | |
4b7f6baa CM |
3402 | } |
3403 | else if (aop == 0 && aopcde == 23 && HL == 0) | |
3404 | { | |
4b7f6baa CM |
3405 | OUTS (outf, dregs (dst0)); |
3406 | OUTS (outf, "=BYTEOP3P("); | |
3407 | OUTS (outf, dregs (src0 + 1)); | |
3408 | OUTS (outf, ":"); | |
3409 | OUTS (outf, imm5 (src0)); | |
3410 | OUTS (outf, ","); | |
3411 | OUTS (outf, dregs (src1 + 1)); | |
3412 | OUTS (outf, ":"); | |
3413 | OUTS (outf, imm5 (src1)); | |
3414 | OUTS (outf, ")(LO"); | |
3415 | if (s == 1) | |
3416 | OUTS (outf, ", R)"); | |
3417 | else | |
3418 | OUTS (outf, ")"); | |
4b7f6baa CM |
3419 | } |
3420 | else if (aop == 0 && HL == 0 && aopcde == 14) | |
b7d48530 NC |
3421 | OUTS (outf, "A0=-A0"); |
3422 | ||
4b7f6baa | 3423 | else if (aop == 1 && HL == 0 && aopcde == 14) |
b7d48530 NC |
3424 | OUTS (outf, "A0=-A1"); |
3425 | ||
4b7f6baa | 3426 | else if (aop == 0 && HL == 1 && aopcde == 14) |
b7d48530 NC |
3427 | OUTS (outf, "A1=-A0"); |
3428 | ||
4b7f6baa | 3429 | else if (aop == 1 && HL == 1 && aopcde == 14) |
b7d48530 NC |
3430 | OUTS (outf, "A1=-A1"); |
3431 | ||
4b7f6baa CM |
3432 | else if (aop == 0 && aopcde == 12) |
3433 | { | |
4b7f6baa CM |
3434 | OUTS (outf, dregs_hi (dst0)); |
3435 | OUTS (outf, "="); | |
3436 | OUTS (outf, dregs_lo (dst0)); | |
3437 | OUTS (outf, "=SIGN("); | |
3438 | OUTS (outf, dregs_hi (src0)); | |
3439 | OUTS (outf, ")*"); | |
3440 | OUTS (outf, dregs_hi (src1)); | |
3441 | OUTS (outf, "+SIGN("); | |
3442 | OUTS (outf, dregs_lo (src0)); | |
3443 | OUTS (outf, ")*"); | |
3444 | OUTS (outf, dregs_lo (src1)); | |
3445 | OUTS (outf, ")"); | |
4b7f6baa CM |
3446 | } |
3447 | else if (aop == 2 && aopcde == 0) | |
3448 | { | |
4b7f6baa CM |
3449 | OUTS (outf, dregs (dst0)); |
3450 | OUTS (outf, "="); | |
3451 | OUTS (outf, dregs (src0)); | |
3452 | OUTS (outf, "-|+"); | |
3453 | OUTS (outf, dregs (src1)); | |
3454 | OUTS (outf, " "); | |
3455 | amod0 (s, x, outf); | |
4b7f6baa CM |
3456 | } |
3457 | else if (aop == 1 && aopcde == 12) | |
3458 | { | |
4b7f6baa CM |
3459 | OUTS (outf, dregs (dst1)); |
3460 | OUTS (outf, "=A1.L+A1.H,"); | |
3461 | OUTS (outf, dregs (dst0)); | |
3462 | OUTS (outf, "=A0.L+A0.H"); | |
4b7f6baa CM |
3463 | } |
3464 | else if (aop == 2 && aopcde == 4) | |
3465 | { | |
4b7f6baa CM |
3466 | OUTS (outf, dregs (dst1)); |
3467 | OUTS (outf, "="); | |
3468 | OUTS (outf, dregs (src0)); | |
3469 | OUTS (outf, "+"); | |
3470 | OUTS (outf, dregs (src1)); | |
3471 | OUTS (outf, ","); | |
3472 | OUTS (outf, dregs (dst0)); | |
3473 | OUTS (outf, "="); | |
3474 | OUTS (outf, dregs (src0)); | |
3475 | OUTS (outf, "-"); | |
3476 | OUTS (outf, dregs (src1)); | |
3477 | OUTS (outf, " "); | |
3478 | amod1 (s, x, outf); | |
4b7f6baa CM |
3479 | } |
3480 | else if (HL == 0 && aopcde == 1) | |
3481 | { | |
4b7f6baa CM |
3482 | OUTS (outf, dregs (dst1)); |
3483 | OUTS (outf, "="); | |
3484 | OUTS (outf, dregs (src0)); | |
3485 | OUTS (outf, "+|+"); | |
3486 | OUTS (outf, dregs (src1)); | |
3487 | OUTS (outf, ","); | |
3488 | OUTS (outf, dregs (dst0)); | |
3489 | OUTS (outf, "="); | |
3490 | OUTS (outf, dregs (src0)); | |
3491 | OUTS (outf, "-|-"); | |
3492 | OUTS (outf, dregs (src1)); | |
3493 | amod0amod2 (s, x, aop, outf); | |
4b7f6baa CM |
3494 | } |
3495 | else if (aop == 0 && aopcde == 11) | |
3496 | { | |
4b7f6baa CM |
3497 | OUTS (outf, dregs (dst0)); |
3498 | OUTS (outf, "=(A0+=A1)"); | |
4b7f6baa CM |
3499 | } |
3500 | else if (aop == 0 && aopcde == 10) | |
3501 | { | |
4b7f6baa CM |
3502 | OUTS (outf, dregs_lo (dst0)); |
3503 | OUTS (outf, "=A0.x"); | |
4b7f6baa CM |
3504 | } |
3505 | else if (aop == 1 && aopcde == 10) | |
3506 | { | |
4b7f6baa CM |
3507 | OUTS (outf, dregs_lo (dst0)); |
3508 | OUTS (outf, "=A1.x"); | |
4b7f6baa CM |
3509 | } |
3510 | else if (aop == 1 && aopcde == 0) | |
3511 | { | |
4b7f6baa CM |
3512 | OUTS (outf, dregs (dst0)); |
3513 | OUTS (outf, "="); | |
3514 | OUTS (outf, dregs (src0)); | |
3515 | OUTS (outf, "+|-"); | |
3516 | OUTS (outf, dregs (src1)); | |
3517 | OUTS (outf, " "); | |
3518 | amod0 (s, x, outf); | |
4b7f6baa CM |
3519 | } |
3520 | else if (aop == 3 && aopcde == 0) | |
3521 | { | |
4b7f6baa CM |
3522 | OUTS (outf, dregs (dst0)); |
3523 | OUTS (outf, "="); | |
3524 | OUTS (outf, dregs (src0)); | |
3525 | OUTS (outf, "-|-"); | |
3526 | OUTS (outf, dregs (src1)); | |
3527 | OUTS (outf, " "); | |
3528 | amod0 (s, x, outf); | |
4b7f6baa CM |
3529 | } |
3530 | else if (aop == 1 && aopcde == 4) | |
3531 | { | |
4b7f6baa CM |
3532 | OUTS (outf, dregs (dst0)); |
3533 | OUTS (outf, "="); | |
3534 | OUTS (outf, dregs (src0)); | |
3535 | OUTS (outf, "-"); | |
3536 | OUTS (outf, dregs (src1)); | |
3537 | OUTS (outf, " "); | |
3538 | amod1 (s, x, outf); | |
4b7f6baa CM |
3539 | } |
3540 | else if (aop == 0 && aopcde == 17) | |
3541 | { | |
4b7f6baa CM |
3542 | OUTS (outf, dregs (dst1)); |
3543 | OUTS (outf, "=A1+A0,"); | |
3544 | OUTS (outf, dregs (dst0)); | |
3545 | OUTS (outf, "=A1-A0 "); | |
3546 | amod1 (s, x, outf); | |
4b7f6baa CM |
3547 | } |
3548 | else if (aop == 1 && aopcde == 17) | |
3549 | { | |
4b7f6baa CM |
3550 | OUTS (outf, dregs (dst1)); |
3551 | OUTS (outf, "=A0+A1,"); | |
3552 | OUTS (outf, dregs (dst0)); | |
3553 | OUTS (outf, "=A0-A1 "); | |
3554 | amod1 (s, x, outf); | |
4b7f6baa CM |
3555 | } |
3556 | else if (aop == 0 && aopcde == 18) | |
3557 | { | |
4b7f6baa CM |
3558 | OUTS (outf, "SAA("); |
3559 | OUTS (outf, dregs (src0 + 1)); | |
3560 | OUTS (outf, ":"); | |
3561 | OUTS (outf, imm5 (src0)); | |
3562 | OUTS (outf, ","); | |
3563 | OUTS (outf, dregs (src1 + 1)); | |
3564 | OUTS (outf, ":"); | |
3565 | OUTS (outf, imm5 (src1)); | |
3566 | OUTS (outf, ") "); | |
3567 | aligndir (s, outf); | |
4b7f6baa CM |
3568 | } |
3569 | else if (aop == 3 && aopcde == 18) | |
b7d48530 NC |
3570 | OUTS (outf, "DISALGNEXCPT"); |
3571 | ||
4b7f6baa CM |
3572 | else if (aop == 0 && aopcde == 20) |
3573 | { | |
4b7f6baa CM |
3574 | OUTS (outf, dregs (dst0)); |
3575 | OUTS (outf, "=BYTEOP1P("); | |
3576 | OUTS (outf, dregs (src0 + 1)); | |
3577 | OUTS (outf, ":"); | |
3578 | OUTS (outf, imm5 (src0)); | |
3579 | OUTS (outf, ","); | |
3580 | OUTS (outf, dregs (src1 + 1)); | |
3581 | OUTS (outf, ":"); | |
3582 | OUTS (outf, imm5 (src1)); | |
3583 | OUTS (outf, ")"); | |
3584 | aligndir (s, outf); | |
4b7f6baa CM |
3585 | } |
3586 | else if (aop == 1 && aopcde == 20) | |
3587 | { | |
4b7f6baa CM |
3588 | OUTS (outf, dregs (dst0)); |
3589 | OUTS (outf, "=BYTEOP1P("); | |
3590 | OUTS (outf, dregs (src0 + 1)); | |
3591 | OUTS (outf, ":"); | |
3592 | OUTS (outf, imm5 (src0)); | |
3593 | OUTS (outf, ","); | |
3594 | OUTS (outf, dregs (src1 + 1)); | |
3595 | OUTS (outf, ":"); | |
3596 | OUTS (outf, imm5 (src1)); | |
3597 | OUTS (outf, ")(T"); | |
3598 | if (s == 1) | |
3599 | OUTS (outf, ", R)"); | |
3600 | else | |
3601 | OUTS (outf, ")"); | |
4b7f6baa CM |
3602 | } |
3603 | else if (aop == 0 && aopcde == 21) | |
3604 | { | |
4b7f6baa CM |
3605 | OUTS (outf, "("); |
3606 | OUTS (outf, dregs (dst1)); | |
3607 | OUTS (outf, ","); | |
3608 | OUTS (outf, dregs (dst0)); | |
3609 | OUTS (outf, ")=BYTEOP16P("); | |
3610 | OUTS (outf, dregs (src0 + 1)); | |
3611 | OUTS (outf, ":"); | |
3612 | OUTS (outf, imm5 (src0)); | |
3613 | OUTS (outf, ","); | |
3614 | OUTS (outf, dregs (src1 + 1)); | |
3615 | OUTS (outf, ":"); | |
3616 | OUTS (outf, imm5 (src1)); | |
3617 | OUTS (outf, ") "); | |
3618 | aligndir (s, outf); | |
4b7f6baa CM |
3619 | } |
3620 | else if (aop == 1 && aopcde == 21) | |
3621 | { | |
4b7f6baa CM |
3622 | OUTS (outf, "("); |
3623 | OUTS (outf, dregs (dst1)); | |
3624 | OUTS (outf, ","); | |
3625 | OUTS (outf, dregs (dst0)); | |
3626 | OUTS (outf, ")=BYTEOP16M("); | |
3627 | OUTS (outf, dregs (src0 + 1)); | |
3628 | OUTS (outf, ":"); | |
3629 | OUTS (outf, imm5 (src0)); | |
3630 | OUTS (outf, ","); | |
3631 | OUTS (outf, dregs (src1 + 1)); | |
3632 | OUTS (outf, ":"); | |
3633 | OUTS (outf, imm5 (src1)); | |
3634 | OUTS (outf, ") "); | |
3635 | aligndir (s, outf); | |
4b7f6baa CM |
3636 | } |
3637 | else if (aop == 2 && aopcde == 7) | |
3638 | { | |
4b7f6baa CM |
3639 | OUTS (outf, dregs (dst0)); |
3640 | OUTS (outf, "= ABS "); | |
3641 | OUTS (outf, dregs (src0)); | |
4b7f6baa CM |
3642 | } |
3643 | else if (aop == 1 && aopcde == 7) | |
3644 | { | |
4b7f6baa CM |
3645 | OUTS (outf, dregs (dst0)); |
3646 | OUTS (outf, "=MIN("); | |
3647 | OUTS (outf, dregs (src0)); | |
3648 | OUTS (outf, ","); | |
3649 | OUTS (outf, dregs (src1)); | |
3650 | OUTS (outf, ")"); | |
4b7f6baa CM |
3651 | } |
3652 | else if (aop == 0 && aopcde == 7) | |
3653 | { | |
4b7f6baa CM |
3654 | OUTS (outf, dregs (dst0)); |
3655 | OUTS (outf, "=MAX("); | |
3656 | OUTS (outf, dregs (src0)); | |
3657 | OUTS (outf, ","); | |
3658 | OUTS (outf, dregs (src1)); | |
3659 | OUTS (outf, ")"); | |
4b7f6baa CM |
3660 | } |
3661 | else if (aop == 2 && aopcde == 6) | |
3662 | { | |
4b7f6baa CM |
3663 | OUTS (outf, dregs (dst0)); |
3664 | OUTS (outf, "= ABS "); | |
3665 | OUTS (outf, dregs (src0)); | |
3666 | OUTS (outf, "(V)"); | |
4b7f6baa CM |
3667 | } |
3668 | else if (aop == 1 && aopcde == 6) | |
3669 | { | |
4b7f6baa CM |
3670 | OUTS (outf, dregs (dst0)); |
3671 | OUTS (outf, "=MIN("); | |
3672 | OUTS (outf, dregs (src0)); | |
3673 | OUTS (outf, ","); | |
3674 | OUTS (outf, dregs (src1)); | |
3675 | OUTS (outf, ")(V)"); | |
4b7f6baa CM |
3676 | } |
3677 | else if (aop == 0 && aopcde == 6) | |
3678 | { | |
4b7f6baa CM |
3679 | OUTS (outf, dregs (dst0)); |
3680 | OUTS (outf, "=MAX("); | |
3681 | OUTS (outf, dregs (src0)); | |
3682 | OUTS (outf, ","); | |
3683 | OUTS (outf, dregs (src1)); | |
3684 | OUTS (outf, ")(V)"); | |
4b7f6baa CM |
3685 | } |
3686 | else if (HL == 1 && aopcde == 1) | |
3687 | { | |
4b7f6baa CM |
3688 | OUTS (outf, dregs (dst1)); |
3689 | OUTS (outf, "="); | |
3690 | OUTS (outf, dregs (src0)); | |
3691 | OUTS (outf, "+|-"); | |
3692 | OUTS (outf, dregs (src1)); | |
3693 | OUTS (outf, ","); | |
3694 | OUTS (outf, dregs (dst0)); | |
3695 | OUTS (outf, "="); | |
3696 | OUTS (outf, dregs (src0)); | |
3697 | OUTS (outf, "-|+"); | |
3698 | OUTS (outf, dregs (src1)); | |
3699 | amod0amod2 (s, x, aop, outf); | |
4b7f6baa CM |
3700 | } |
3701 | else if (aop == 0 && aopcde == 4) | |
3702 | { | |
4b7f6baa CM |
3703 | OUTS (outf, dregs (dst0)); |
3704 | OUTS (outf, "="); | |
3705 | OUTS (outf, dregs (src0)); | |
3706 | OUTS (outf, "+"); | |
3707 | OUTS (outf, dregs (src1)); | |
3708 | OUTS (outf, " "); | |
3709 | amod1 (s, x, outf); | |
4b7f6baa CM |
3710 | } |
3711 | else if (aop == 0 && aopcde == 0) | |
3712 | { | |
4b7f6baa CM |
3713 | OUTS (outf, dregs (dst0)); |
3714 | OUTS (outf, "="); | |
3715 | OUTS (outf, dregs (src0)); | |
3716 | OUTS (outf, "+|+"); | |
3717 | OUTS (outf, dregs (src1)); | |
3718 | OUTS (outf, " "); | |
3719 | amod0 (s, x, outf); | |
4b7f6baa CM |
3720 | } |
3721 | else if (aop == 0 && aopcde == 24) | |
3722 | { | |
4b7f6baa CM |
3723 | OUTS (outf, dregs (dst0)); |
3724 | OUTS (outf, "=BYTEPACK("); | |
3725 | OUTS (outf, dregs (src0)); | |
3726 | OUTS (outf, ","); | |
3727 | OUTS (outf, dregs (src1)); | |
3728 | OUTS (outf, ")"); | |
4b7f6baa CM |
3729 | } |
3730 | else if (aop == 1 && aopcde == 24) | |
3731 | { | |
4b7f6baa CM |
3732 | OUTS (outf, "("); |
3733 | OUTS (outf, dregs (dst1)); | |
3734 | OUTS (outf, ","); | |
3735 | OUTS (outf, dregs (dst0)); | |
3736 | OUTS (outf, ") = BYTEUNPACK "); | |
3737 | OUTS (outf, dregs (src0 + 1)); | |
3738 | OUTS (outf, ":"); | |
3739 | OUTS (outf, imm5 (src0)); | |
3740 | OUTS (outf, " "); | |
3741 | aligndir (s, outf); | |
4b7f6baa CM |
3742 | } |
3743 | else if (aopcde == 13) | |
3744 | { | |
4b7f6baa CM |
3745 | OUTS (outf, "("); |
3746 | OUTS (outf, dregs (dst1)); | |
3747 | OUTS (outf, ","); | |
3748 | OUTS (outf, dregs (dst0)); | |
3749 | OUTS (outf, ") = SEARCH "); | |
3750 | OUTS (outf, dregs (src0)); | |
3751 | OUTS (outf, "("); | |
3752 | searchmod (aop, outf); | |
3753 | OUTS (outf, ")"); | |
4b7f6baa CM |
3754 | } |
3755 | else | |
b7d48530 NC |
3756 | return 0; |
3757 | ||
3758 | return 4; | |
4b7f6baa CM |
3759 | } |
3760 | ||
3761 | static int | |
3762 | decode_dsp32shift_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
3763 | { | |
b7d48530 NC |
3764 | /* dsp32shift |
3765 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
3766 | | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 0 | - | - |.sopcde............| | |
3767 | |.sop...|.HLs...|.dst0......| - | - | - |.src0......|.src1......| | |
3768 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
3769 | int HLs = ((iw1 >> DSP32Shift_HLs_bits) & DSP32Shift_HLs_mask); |
3770 | int sop = ((iw1 >> DSP32Shift_sop_bits) & DSP32Shift_sop_mask); | |
3771 | int src0 = ((iw1 >> DSP32Shift_src0_bits) & DSP32Shift_src0_mask); | |
3772 | int src1 = ((iw1 >> DSP32Shift_src1_bits) & DSP32Shift_src1_mask); | |
3773 | int dst0 = ((iw1 >> DSP32Shift_dst0_bits) & DSP32Shift_dst0_mask); | |
3774 | int sopcde = ((iw0 >> (DSP32Shift_sopcde_bits - 16)) & DSP32Shift_sopcde_mask); | |
3775 | const char *acc01 = (HLs & 1) == 0 ? "A0" : "A1"; | |
3776 | ||
4b7f6baa CM |
3777 | if (HLs == 0 && sop == 0 && sopcde == 0) |
3778 | { | |
4b7f6baa CM |
3779 | OUTS (outf, dregs_lo (dst0)); |
3780 | OUTS (outf, "= ASHIFT "); | |
3781 | OUTS (outf, dregs_lo (src1)); | |
3782 | OUTS (outf, " BY "); | |
3783 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3784 | } |
3785 | else if (HLs == 1 && sop == 0 && sopcde == 0) | |
3786 | { | |
4b7f6baa CM |
3787 | OUTS (outf, dregs_lo (dst0)); |
3788 | OUTS (outf, "= ASHIFT "); | |
3789 | OUTS (outf, dregs_hi (src1)); | |
3790 | OUTS (outf, " BY "); | |
3791 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3792 | } |
3793 | else if (HLs == 2 && sop == 0 && sopcde == 0) | |
3794 | { | |
4b7f6baa CM |
3795 | OUTS (outf, dregs_hi (dst0)); |
3796 | OUTS (outf, "= ASHIFT "); | |
3797 | OUTS (outf, dregs_lo (src1)); | |
3798 | OUTS (outf, " BY "); | |
3799 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3800 | } |
3801 | else if (HLs == 3 && sop == 0 && sopcde == 0) | |
3802 | { | |
4b7f6baa CM |
3803 | OUTS (outf, dregs_hi (dst0)); |
3804 | OUTS (outf, "= ASHIFT "); | |
3805 | OUTS (outf, dregs_hi (src1)); | |
3806 | OUTS (outf, " BY "); | |
3807 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3808 | } |
3809 | else if (HLs == 0 && sop == 1 && sopcde == 0) | |
3810 | { | |
4b7f6baa CM |
3811 | OUTS (outf, dregs_lo (dst0)); |
3812 | OUTS (outf, "= ASHIFT "); | |
3813 | OUTS (outf, dregs_lo (src1)); | |
3814 | OUTS (outf, " BY "); | |
3815 | OUTS (outf, dregs_lo (src0)); | |
3816 | OUTS (outf, "(S)"); | |
4b7f6baa CM |
3817 | } |
3818 | else if (HLs == 1 && sop == 1 && sopcde == 0) | |
3819 | { | |
4b7f6baa CM |
3820 | OUTS (outf, dregs_lo (dst0)); |
3821 | OUTS (outf, "= ASHIFT "); | |
3822 | OUTS (outf, dregs_hi (src1)); | |
3823 | OUTS (outf, " BY "); | |
3824 | OUTS (outf, dregs_lo (src0)); | |
3825 | OUTS (outf, "(S)"); | |
4b7f6baa CM |
3826 | } |
3827 | else if (HLs == 2 && sop == 1 && sopcde == 0) | |
3828 | { | |
4b7f6baa CM |
3829 | OUTS (outf, dregs_hi (dst0)); |
3830 | OUTS (outf, "= ASHIFT "); | |
3831 | OUTS (outf, dregs_lo (src1)); | |
3832 | OUTS (outf, " BY "); | |
3833 | OUTS (outf, dregs_lo (src0)); | |
3834 | OUTS (outf, "(S)"); | |
4b7f6baa CM |
3835 | } |
3836 | else if (HLs == 3 && sop == 1 && sopcde == 0) | |
3837 | { | |
4b7f6baa CM |
3838 | OUTS (outf, dregs_hi (dst0)); |
3839 | OUTS (outf, "= ASHIFT "); | |
3840 | OUTS (outf, dregs_hi (src1)); | |
3841 | OUTS (outf, " BY "); | |
3842 | OUTS (outf, dregs_lo (src0)); | |
3843 | OUTS (outf, "(S)"); | |
4b7f6baa CM |
3844 | } |
3845 | else if (sop == 2 && sopcde == 0) | |
3846 | { | |
4b7f6baa CM |
3847 | OUTS (outf, (HLs & 2) == 0 ? dregs_lo (dst0) : dregs_hi (dst0)); |
3848 | OUTS (outf, "= LSHIFT "); | |
3849 | OUTS (outf, (HLs & 1) == 0 ? dregs_lo (src1) : dregs_hi (src1)); | |
3850 | OUTS (outf, " BY "); | |
3851 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3852 | } |
3853 | else if (sop == 0 && sopcde == 3) | |
3854 | { | |
4b7f6baa CM |
3855 | OUTS (outf, acc01); |
3856 | OUTS (outf, "= ASHIFT "); | |
3857 | OUTS (outf, acc01); | |
3858 | OUTS (outf, " BY "); | |
3859 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3860 | } |
3861 | else if (sop == 1 && sopcde == 3) | |
3862 | { | |
4b7f6baa CM |
3863 | OUTS (outf, acc01); |
3864 | OUTS (outf, "= LSHIFT "); | |
3865 | OUTS (outf, acc01); | |
3866 | OUTS (outf, " BY "); | |
3867 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3868 | } |
3869 | else if (sop == 2 && sopcde == 3) | |
3870 | { | |
4b7f6baa CM |
3871 | OUTS (outf, acc01); |
3872 | OUTS (outf, "= ROT "); | |
3873 | OUTS (outf, acc01); | |
3874 | OUTS (outf, " BY "); | |
3875 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3876 | } |
3877 | else if (sop == 3 && sopcde == 3) | |
3878 | { | |
4b7f6baa CM |
3879 | OUTS (outf, dregs (dst0)); |
3880 | OUTS (outf, "= ROT "); | |
3881 | OUTS (outf, dregs (src1)); | |
3882 | OUTS (outf, " BY "); | |
3883 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3884 | } |
3885 | else if (sop == 1 && sopcde == 1) | |
3886 | { | |
4b7f6baa CM |
3887 | OUTS (outf, dregs (dst0)); |
3888 | OUTS (outf, "= ASHIFT "); | |
3889 | OUTS (outf, dregs (src1)); | |
3890 | OUTS (outf, " BY "); | |
3891 | OUTS (outf, dregs_lo (src0)); | |
3892 | OUTS (outf, "(V,S)"); | |
4b7f6baa CM |
3893 | } |
3894 | else if (sop == 0 && sopcde == 1) | |
3895 | { | |
4b7f6baa CM |
3896 | OUTS (outf, dregs (dst0)); |
3897 | OUTS (outf, "= ASHIFT "); | |
3898 | OUTS (outf, dregs (src1)); | |
3899 | OUTS (outf, " BY "); | |
3900 | OUTS (outf, dregs_lo (src0)); | |
3901 | OUTS (outf, "(V)"); | |
4b7f6baa CM |
3902 | } |
3903 | else if (sop == 0 && sopcde == 2) | |
3904 | { | |
4b7f6baa CM |
3905 | OUTS (outf, dregs (dst0)); |
3906 | OUTS (outf, "= ASHIFT "); | |
3907 | OUTS (outf, dregs (src1)); | |
3908 | OUTS (outf, " BY "); | |
3909 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3910 | } |
3911 | else if (sop == 1 && sopcde == 2) | |
3912 | { | |
4b7f6baa CM |
3913 | OUTS (outf, dregs (dst0)); |
3914 | OUTS (outf, "= ASHIFT "); | |
3915 | OUTS (outf, dregs (src1)); | |
3916 | OUTS (outf, " BY "); | |
3917 | OUTS (outf, dregs_lo (src0)); | |
3918 | OUTS (outf, "(S)"); | |
4b7f6baa CM |
3919 | } |
3920 | else if (sop == 2 && sopcde == 2) | |
3921 | { | |
4b7f6baa CM |
3922 | OUTS (outf, dregs (dst0)); |
3923 | OUTS (outf, "=SHIFT "); | |
3924 | OUTS (outf, dregs (src1)); | |
3925 | OUTS (outf, " BY "); | |
3926 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3927 | } |
3928 | else if (sop == 3 && sopcde == 2) | |
3929 | { | |
4b7f6baa CM |
3930 | OUTS (outf, dregs (dst0)); |
3931 | OUTS (outf, "= ROT "); | |
3932 | OUTS (outf, dregs (src1)); | |
3933 | OUTS (outf, " BY "); | |
3934 | OUTS (outf, dregs_lo (src0)); | |
4b7f6baa CM |
3935 | } |
3936 | else if (sop == 2 && sopcde == 1) | |
3937 | { | |
4b7f6baa CM |
3938 | OUTS (outf, dregs (dst0)); |
3939 | OUTS (outf, "=SHIFT "); | |
3940 | OUTS (outf, dregs (src1)); | |
3941 | OUTS (outf, " BY "); | |
3942 | OUTS (outf, dregs_lo (src0)); | |
3943 | OUTS (outf, "(V)"); | |
4b7f6baa CM |
3944 | } |
3945 | else if (sop == 0 && sopcde == 4) | |
3946 | { | |
4b7f6baa CM |
3947 | OUTS (outf, dregs (dst0)); |
3948 | OUTS (outf, "=PACK"); | |
3949 | OUTS (outf, "("); | |
3950 | OUTS (outf, dregs_lo (src1)); | |
3951 | OUTS (outf, ","); | |
3952 | OUTS (outf, dregs_lo (src0)); | |
3953 | OUTS (outf, ")"); | |
4b7f6baa CM |
3954 | } |
3955 | else if (sop == 1 && sopcde == 4) | |
3956 | { | |
4b7f6baa CM |
3957 | OUTS (outf, dregs (dst0)); |
3958 | OUTS (outf, "=PACK("); | |
3959 | OUTS (outf, dregs_lo (src1)); | |
3960 | OUTS (outf, ","); | |
3961 | OUTS (outf, dregs_hi (src0)); | |
3962 | OUTS (outf, ")"); | |
4b7f6baa CM |
3963 | } |
3964 | else if (sop == 2 && sopcde == 4) | |
3965 | { | |
4b7f6baa CM |
3966 | OUTS (outf, dregs (dst0)); |
3967 | OUTS (outf, "=PACK("); | |
3968 | OUTS (outf, dregs_hi (src1)); | |
3969 | OUTS (outf, ","); | |
3970 | OUTS (outf, dregs_lo (src0)); | |
3971 | OUTS (outf, ")"); | |
4b7f6baa CM |
3972 | } |
3973 | else if (sop == 3 && sopcde == 4) | |
3974 | { | |
4b7f6baa CM |
3975 | OUTS (outf, dregs (dst0)); |
3976 | OUTS (outf, "=PACK("); | |
3977 | OUTS (outf, dregs_hi (src1)); | |
3978 | OUTS (outf, ","); | |
3979 | OUTS (outf, dregs_hi (src0)); | |
3980 | OUTS (outf, ")"); | |
4b7f6baa CM |
3981 | } |
3982 | else if (sop == 0 && sopcde == 5) | |
3983 | { | |
4b7f6baa CM |
3984 | OUTS (outf, dregs_lo (dst0)); |
3985 | OUTS (outf, "=SIGNBITS "); | |
3986 | OUTS (outf, dregs (src1)); | |
4b7f6baa CM |
3987 | } |
3988 | else if (sop == 1 && sopcde == 5) | |
3989 | { | |
4b7f6baa CM |
3990 | OUTS (outf, dregs_lo (dst0)); |
3991 | OUTS (outf, "=SIGNBITS "); | |
3992 | OUTS (outf, dregs_lo (src1)); | |
4b7f6baa CM |
3993 | } |
3994 | else if (sop == 2 && sopcde == 5) | |
3995 | { | |
4b7f6baa CM |
3996 | OUTS (outf, dregs_lo (dst0)); |
3997 | OUTS (outf, "=SIGNBITS "); | |
3998 | OUTS (outf, dregs_hi (src1)); | |
4b7f6baa CM |
3999 | } |
4000 | else if (sop == 0 && sopcde == 6) | |
4001 | { | |
4b7f6baa CM |
4002 | OUTS (outf, dregs_lo (dst0)); |
4003 | OUTS (outf, "=SIGNBITS A0"); | |
4b7f6baa CM |
4004 | } |
4005 | else if (sop == 1 && sopcde == 6) | |
4006 | { | |
4b7f6baa CM |
4007 | OUTS (outf, dregs_lo (dst0)); |
4008 | OUTS (outf, "=SIGNBITS A1"); | |
4b7f6baa CM |
4009 | } |
4010 | else if (sop == 3 && sopcde == 6) | |
4011 | { | |
4b7f6baa CM |
4012 | OUTS (outf, dregs_lo (dst0)); |
4013 | OUTS (outf, "=ONES "); | |
4014 | OUTS (outf, dregs (src1)); | |
4b7f6baa CM |
4015 | } |
4016 | else if (sop == 0 && sopcde == 7) | |
4017 | { | |
4b7f6baa CM |
4018 | OUTS (outf, dregs_lo (dst0)); |
4019 | OUTS (outf, "=EXPADJ ("); | |
4020 | OUTS (outf, dregs (src1)); | |
4021 | OUTS (outf, ","); | |
4022 | OUTS (outf, dregs_lo (src0)); | |
4023 | OUTS (outf, ")"); | |
4b7f6baa CM |
4024 | } |
4025 | else if (sop == 1 && sopcde == 7) | |
4026 | { | |
4b7f6baa CM |
4027 | OUTS (outf, dregs_lo (dst0)); |
4028 | OUTS (outf, "=EXPADJ ("); | |
4029 | OUTS (outf, dregs (src1)); | |
4030 | OUTS (outf, ","); | |
4031 | OUTS (outf, dregs_lo (src0)); | |
4032 | OUTS (outf, ") (V)"); | |
4b7f6baa CM |
4033 | } |
4034 | else if (sop == 2 && sopcde == 7) | |
4035 | { | |
4b7f6baa CM |
4036 | OUTS (outf, dregs_lo (dst0)); |
4037 | OUTS (outf, "=EXPADJ ("); | |
4038 | OUTS (outf, dregs_lo (src1)); | |
4039 | OUTS (outf, ","); | |
4040 | OUTS (outf, dregs_lo (src0)); | |
4041 | OUTS (outf, ")"); | |
4b7f6baa CM |
4042 | } |
4043 | else if (sop == 3 && sopcde == 7) | |
4044 | { | |
4b7f6baa CM |
4045 | OUTS (outf, dregs_lo (dst0)); |
4046 | OUTS (outf, "=EXPADJ ("); | |
4047 | OUTS (outf, dregs_hi (src1)); | |
4048 | OUTS (outf, ","); | |
4049 | OUTS (outf, dregs_lo (src0)); | |
4050 | OUTS (outf, ")"); | |
4b7f6baa CM |
4051 | } |
4052 | else if (sop == 0 && sopcde == 8) | |
4053 | { | |
4b7f6baa CM |
4054 | OUTS (outf, "BITMUX ("); |
4055 | OUTS (outf, dregs (src0)); | |
4056 | OUTS (outf, ","); | |
4057 | OUTS (outf, dregs (src1)); | |
4058 | OUTS (outf, ",A0 )(ASR)"); | |
4b7f6baa CM |
4059 | } |
4060 | else if (sop == 1 && sopcde == 8) | |
4061 | { | |
4b7f6baa CM |
4062 | OUTS (outf, "BITMUX ("); |
4063 | OUTS (outf, dregs (src0)); | |
4064 | OUTS (outf, ","); | |
4065 | OUTS (outf, dregs (src1)); | |
4066 | OUTS (outf, ",A0 )(ASL)"); | |
4b7f6baa CM |
4067 | } |
4068 | else if (sop == 0 && sopcde == 9) | |
4069 | { | |
4b7f6baa CM |
4070 | OUTS (outf, dregs_lo (dst0)); |
4071 | OUTS (outf, "=VIT_MAX ("); | |
4072 | OUTS (outf, dregs (src1)); | |
4073 | OUTS (outf, ") (ASL)"); | |
4b7f6baa CM |
4074 | } |
4075 | else if (sop == 1 && sopcde == 9) | |
4076 | { | |
4b7f6baa CM |
4077 | OUTS (outf, dregs_lo (dst0)); |
4078 | OUTS (outf, "=VIT_MAX ("); | |
4079 | OUTS (outf, dregs (src1)); | |
4080 | OUTS (outf, ") (ASR)"); | |
4b7f6baa CM |
4081 | } |
4082 | else if (sop == 2 && sopcde == 9) | |
4083 | { | |
4b7f6baa CM |
4084 | OUTS (outf, dregs (dst0)); |
4085 | OUTS (outf, "=VIT_MAX("); | |
4086 | OUTS (outf, dregs (src1)); | |
4087 | OUTS (outf, ","); | |
4088 | OUTS (outf, dregs (src0)); | |
4089 | OUTS (outf, ")(ASL)"); | |
4b7f6baa CM |
4090 | } |
4091 | else if (sop == 3 && sopcde == 9) | |
4092 | { | |
4b7f6baa CM |
4093 | OUTS (outf, dregs (dst0)); |
4094 | OUTS (outf, "=VIT_MAX("); | |
4095 | OUTS (outf, dregs (src1)); | |
4096 | OUTS (outf, ","); | |
4097 | OUTS (outf, dregs (src0)); | |
4098 | OUTS (outf, ")(ASR)"); | |
4b7f6baa CM |
4099 | } |
4100 | else if (sop == 0 && sopcde == 10) | |
4101 | { | |
4b7f6baa CM |
4102 | OUTS (outf, dregs (dst0)); |
4103 | OUTS (outf, "=EXTRACT("); | |
4104 | OUTS (outf, dregs (src1)); | |
4105 | OUTS (outf, ","); | |
4106 | OUTS (outf, dregs_lo (src0)); | |
4107 | OUTS (outf, ") (Z)"); | |
4b7f6baa CM |
4108 | } |
4109 | else if (sop == 1 && sopcde == 10) | |
4110 | { | |
4b7f6baa CM |
4111 | OUTS (outf, dregs (dst0)); |
4112 | OUTS (outf, "=EXTRACT("); | |
4113 | OUTS (outf, dregs (src1)); | |
4114 | OUTS (outf, ","); | |
4115 | OUTS (outf, dregs_lo (src0)); | |
4116 | OUTS (outf, ")(X)"); | |
4b7f6baa CM |
4117 | } |
4118 | else if (sop == 2 && sopcde == 10) | |
4119 | { | |
4b7f6baa CM |
4120 | OUTS (outf, dregs (dst0)); |
4121 | OUTS (outf, "=DEPOSIT("); | |
4122 | OUTS (outf, dregs (src1)); | |
4123 | OUTS (outf, ","); | |
4124 | OUTS (outf, dregs (src0)); | |
4125 | OUTS (outf, ")"); | |
4b7f6baa CM |
4126 | } |
4127 | else if (sop == 3 && sopcde == 10) | |
4128 | { | |
4b7f6baa CM |
4129 | OUTS (outf, dregs (dst0)); |
4130 | OUTS (outf, "=DEPOSIT("); | |
4131 | OUTS (outf, dregs (src1)); | |
4132 | OUTS (outf, ","); | |
4133 | OUTS (outf, dregs (src0)); | |
4134 | OUTS (outf, ")(X)"); | |
4b7f6baa CM |
4135 | } |
4136 | else if (sop == 0 && sopcde == 11) | |
4137 | { | |
4b7f6baa CM |
4138 | OUTS (outf, dregs_lo (dst0)); |
4139 | OUTS (outf, "=CC=BXORSHIFT(A0,"); | |
4140 | OUTS (outf, dregs (src0)); | |
4141 | OUTS (outf, ")"); | |
4b7f6baa CM |
4142 | } |
4143 | else if (sop == 1 && sopcde == 11) | |
4144 | { | |
4b7f6baa CM |
4145 | OUTS (outf, dregs_lo (dst0)); |
4146 | OUTS (outf, "=CC=BXOR(A0,"); | |
4147 | OUTS (outf, dregs (src0)); | |
4148 | OUTS (outf, ")"); | |
4b7f6baa CM |
4149 | } |
4150 | else if (sop == 0 && sopcde == 12) | |
b7d48530 NC |
4151 | OUTS (outf, "A0=BXORSHIFT(A0,A1 ,CC)"); |
4152 | ||
4b7f6baa CM |
4153 | else if (sop == 1 && sopcde == 12) |
4154 | { | |
4b7f6baa CM |
4155 | OUTS (outf, dregs_lo (dst0)); |
4156 | OUTS (outf, "=CC=BXOR( A0,A1 ,CC )"); | |
4b7f6baa CM |
4157 | } |
4158 | else if (sop == 0 && sopcde == 13) | |
4159 | { | |
4b7f6baa CM |
4160 | OUTS (outf, dregs (dst0)); |
4161 | OUTS (outf, "=ALIGN8("); | |
4162 | OUTS (outf, dregs (src1)); | |
4163 | OUTS (outf, ","); | |
4164 | OUTS (outf, dregs (src0)); | |
4165 | OUTS (outf, ")"); | |
4b7f6baa CM |
4166 | } |
4167 | else if (sop == 1 && sopcde == 13) | |
4168 | { | |
4b7f6baa CM |
4169 | OUTS (outf, dregs (dst0)); |
4170 | OUTS (outf, "=ALIGN16("); | |
4171 | OUTS (outf, dregs (src1)); | |
4172 | OUTS (outf, ","); | |
4173 | OUTS (outf, dregs (src0)); | |
4174 | OUTS (outf, ")"); | |
4b7f6baa CM |
4175 | } |
4176 | else if (sop == 2 && sopcde == 13) | |
4177 | { | |
4b7f6baa CM |
4178 | OUTS (outf, dregs (dst0)); |
4179 | OUTS (outf, "=ALIGN24("); | |
4180 | OUTS (outf, dregs (src1)); | |
4181 | OUTS (outf, ","); | |
4182 | OUTS (outf, dregs (src0)); | |
4183 | OUTS (outf, ")"); | |
4b7f6baa CM |
4184 | } |
4185 | else | |
b7d48530 NC |
4186 | return 0; |
4187 | ||
4188 | return 4; | |
4b7f6baa CM |
4189 | } |
4190 | ||
4191 | static int | |
4192 | decode_dsp32shiftimm_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
4193 | { | |
b7d48530 NC |
4194 | /* dsp32shiftimm |
4195 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
4196 | | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 1 | - | - |.sopcde............| | |
4197 | |.sop...|.HLs...|.dst0......|.immag.................|.src1......| | |
4198 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4199 | int src1 = ((iw1 >> DSP32ShiftImm_src1_bits) & DSP32ShiftImm_src1_mask); | |
4200 | int sop = ((iw1 >> DSP32ShiftImm_sop_bits) & DSP32ShiftImm_sop_mask); | |
4201 | int bit8 = ((iw1 >> 8) & 0x1); | |
4202 | int immag = ((iw1 >> DSP32ShiftImm_immag_bits) & DSP32ShiftImm_immag_mask); | |
4b7f6baa | 4203 | int newimmag = (-(iw1 >> DSP32ShiftImm_immag_bits) & DSP32ShiftImm_immag_mask); |
b7d48530 NC |
4204 | int dst0 = ((iw1 >> DSP32ShiftImm_dst0_bits) & DSP32ShiftImm_dst0_mask); |
4205 | int sopcde = ((iw0 >> (DSP32ShiftImm_sopcde_bits - 16)) & DSP32ShiftImm_sopcde_mask); | |
4206 | int HLs = ((iw1 >> DSP32ShiftImm_HLs_bits) & DSP32ShiftImm_HLs_mask); | |
4b7f6baa CM |
4207 | |
4208 | ||
331f1cbe | 4209 | if (sop == 0 && sopcde == 0) |
4b7f6baa | 4210 | { |
331f1cbe BS |
4211 | OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); |
4212 | OUTS (outf, " = "); | |
4213 | OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); | |
4214 | OUTS (outf, " >>> "); | |
4b7f6baa | 4215 | OUTS (outf, uimm4 (newimmag)); |
4b7f6baa | 4216 | } |
331f1cbe | 4217 | else if (sop == 1 && sopcde == 0 && bit8 == 0) |
4b7f6baa | 4218 | { |
331f1cbe BS |
4219 | OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); |
4220 | OUTS (outf, " = "); | |
4221 | OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); | |
4222 | OUTS (outf, " << "); | |
4b7f6baa | 4223 | OUTS (outf, uimm4 (immag)); |
331f1cbe | 4224 | OUTS (outf, " (S)"); |
4b7f6baa | 4225 | } |
331f1cbe | 4226 | else if (sop == 1 && sopcde == 0 && bit8 == 1) |
4b7f6baa | 4227 | { |
331f1cbe BS |
4228 | OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); |
4229 | OUTS (outf, " = "); | |
4230 | OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); | |
4231 | OUTS (outf, " >>> "); | |
4b7f6baa | 4232 | OUTS (outf, uimm4 (newimmag)); |
331f1cbe | 4233 | OUTS (outf, " (S)"); |
4b7f6baa | 4234 | } |
331f1cbe | 4235 | else if (sop == 2 && sopcde == 0 && bit8 == 0) |
4b7f6baa | 4236 | { |
331f1cbe BS |
4237 | OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); |
4238 | OUTS (outf, " = "); | |
4239 | OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); | |
4240 | OUTS (outf, " << "); | |
4b7f6baa | 4241 | OUTS (outf, uimm4 (immag)); |
4b7f6baa | 4242 | } |
331f1cbe | 4243 | else if (sop == 2 && sopcde == 0 && bit8 == 1) |
4b7f6baa | 4244 | { |
331f1cbe BS |
4245 | OUTS (outf, (HLs & 2) ? dregs_hi (dst0) : dregs_lo (dst0)); |
4246 | OUTS (outf, " = "); | |
4247 | OUTS (outf, (HLs & 1) ? dregs_hi (src1) : dregs_lo (src1)); | |
4248 | OUTS (outf, " >> "); | |
4b7f6baa | 4249 | OUTS (outf, uimm4 (newimmag)); |
4b7f6baa | 4250 | } |
4b7f6baa CM |
4251 | else if (sop == 2 && sopcde == 3 && HLs == 1) |
4252 | { | |
4b7f6baa CM |
4253 | OUTS (outf, "A1= ROT A1 BY "); |
4254 | OUTS (outf, imm6 (immag)); | |
4b7f6baa CM |
4255 | } |
4256 | else if (sop == 0 && sopcde == 3 && HLs == 0 && bit8 == 0) | |
4257 | { | |
4b7f6baa CM |
4258 | OUTS (outf, "A0=A0<<"); |
4259 | OUTS (outf, uimm5 (immag)); | |
4b7f6baa CM |
4260 | } |
4261 | else if (sop == 0 && sopcde == 3 && HLs == 0 && bit8 == 1) | |
4262 | { | |
4b7f6baa CM |
4263 | OUTS (outf, "A0=A0>>>"); |
4264 | OUTS (outf, uimm5 (newimmag)); | |
4b7f6baa CM |
4265 | } |
4266 | else if (sop == 0 && sopcde == 3 && HLs == 1 && bit8 == 0) | |
4267 | { | |
4b7f6baa CM |
4268 | OUTS (outf, "A1=A1<<"); |
4269 | OUTS (outf, uimm5 (immag)); | |
4b7f6baa CM |
4270 | } |
4271 | else if (sop == 0 && sopcde == 3 && HLs == 1 && bit8 == 1) | |
4272 | { | |
4b7f6baa CM |
4273 | OUTS (outf, "A1=A1>>>"); |
4274 | OUTS (outf, uimm5 (newimmag)); | |
4b7f6baa CM |
4275 | } |
4276 | else if (sop == 1 && sopcde == 3 && HLs == 0) | |
4277 | { | |
4b7f6baa CM |
4278 | OUTS (outf, "A0=A0>>"); |
4279 | OUTS (outf, uimm5 (newimmag)); | |
4b7f6baa CM |
4280 | } |
4281 | else if (sop == 1 && sopcde == 3 && HLs == 1) | |
4282 | { | |
4b7f6baa CM |
4283 | OUTS (outf, "A1=A1>>"); |
4284 | OUTS (outf, uimm5 (newimmag)); | |
4b7f6baa CM |
4285 | } |
4286 | else if (sop == 2 && sopcde == 3 && HLs == 0) | |
4287 | { | |
4b7f6baa CM |
4288 | OUTS (outf, "A0= ROT A0 BY "); |
4289 | OUTS (outf, imm6 (immag)); | |
4b7f6baa CM |
4290 | } |
4291 | else if (sop == 1 && sopcde == 1 && bit8 == 0) | |
4292 | { | |
4b7f6baa CM |
4293 | OUTS (outf, dregs (dst0)); |
4294 | OUTS (outf, "="); | |
4295 | OUTS (outf, dregs (src1)); | |
4296 | OUTS (outf, "<<"); | |
4297 | OUTS (outf, uimm5 (immag)); | |
4298 | OUTS (outf, " (V, S)"); | |
4b7f6baa CM |
4299 | } |
4300 | else if (sop == 1 && sopcde == 1 && bit8 == 1) | |
4301 | { | |
4b7f6baa CM |
4302 | OUTS (outf, dregs (dst0)); |
4303 | OUTS (outf, "="); | |
4304 | OUTS (outf, dregs (src1)); | |
4305 | OUTS (outf, ">>>"); | |
4306 | OUTS (outf, imm5 (-immag)); | |
4307 | OUTS (outf, " (V)"); | |
4b7f6baa CM |
4308 | } |
4309 | else if (sop == 2 && sopcde == 1 && bit8 == 1) | |
4310 | { | |
4b7f6baa CM |
4311 | OUTS (outf, dregs (dst0)); |
4312 | OUTS (outf, "="); | |
4313 | OUTS (outf, dregs (src1)); | |
4314 | OUTS (outf, " >> "); | |
4315 | OUTS (outf, uimm5 (newimmag)); | |
4316 | OUTS (outf, " (V)"); | |
4b7f6baa CM |
4317 | } |
4318 | else if (sop == 2 && sopcde == 1 && bit8 == 0) | |
4319 | { | |
4b7f6baa CM |
4320 | OUTS (outf, dregs (dst0)); |
4321 | OUTS (outf, "="); | |
4322 | OUTS (outf, dregs (src1)); | |
4323 | OUTS (outf, "<<"); | |
4324 | OUTS (outf, imm5 (immag)); | |
4325 | OUTS (outf, " (V)"); | |
4b7f6baa CM |
4326 | } |
4327 | else if (sop == 0 && sopcde == 1) | |
4328 | { | |
4b7f6baa CM |
4329 | OUTS (outf, dregs (dst0)); |
4330 | OUTS (outf, "="); | |
4331 | OUTS (outf, dregs (src1)); | |
4332 | OUTS (outf, ">>>"); | |
4333 | OUTS (outf, uimm5 (newimmag)); | |
4334 | OUTS (outf, " (V)"); | |
4b7f6baa CM |
4335 | } |
4336 | else if (sop == 1 && sopcde == 2) | |
4337 | { | |
4b7f6baa CM |
4338 | OUTS (outf, dregs (dst0)); |
4339 | OUTS (outf, "="); | |
4340 | OUTS (outf, dregs (src1)); | |
4341 | OUTS (outf, "<<"); | |
4342 | OUTS (outf, uimm5 (immag)); | |
4343 | OUTS (outf, "(S)"); | |
4b7f6baa CM |
4344 | } |
4345 | else if (sop == 2 && sopcde == 2 && bit8 == 1) | |
4346 | { | |
4b7f6baa CM |
4347 | OUTS (outf, dregs (dst0)); |
4348 | OUTS (outf, "="); | |
4349 | OUTS (outf, dregs (src1)); | |
4350 | OUTS (outf, ">>"); | |
4351 | OUTS (outf, uimm5 (newimmag)); | |
4b7f6baa CM |
4352 | } |
4353 | else if (sop == 2 && sopcde == 2 && bit8 == 0) | |
4354 | { | |
4b7f6baa CM |
4355 | OUTS (outf, dregs (dst0)); |
4356 | OUTS (outf, "="); | |
4357 | OUTS (outf, dregs (src1)); | |
4358 | OUTS (outf, "<<"); | |
4359 | OUTS (outf, uimm5 (immag)); | |
4b7f6baa CM |
4360 | } |
4361 | else if (sop == 3 && sopcde == 2) | |
4362 | { | |
4b7f6baa CM |
4363 | OUTS (outf, dregs (dst0)); |
4364 | OUTS (outf, "= ROT "); | |
4365 | OUTS (outf, dregs (src1)); | |
4366 | OUTS (outf, " BY "); | |
4367 | OUTS (outf, imm6 (immag)); | |
4b7f6baa CM |
4368 | } |
4369 | else if (sop == 0 && sopcde == 2) | |
4370 | { | |
4b7f6baa CM |
4371 | OUTS (outf, dregs (dst0)); |
4372 | OUTS (outf, "="); | |
4373 | OUTS (outf, dregs (src1)); | |
4374 | OUTS (outf, ">>>"); | |
4375 | OUTS (outf, uimm5 (newimmag)); | |
4b7f6baa CM |
4376 | } |
4377 | else | |
b7d48530 NC |
4378 | return 0; |
4379 | ||
4380 | return 4; | |
4b7f6baa CM |
4381 | } |
4382 | ||
4383 | static int | |
4384 | decode_pseudoDEBUG_0 (TIword iw0, disassemble_info *outf) | |
4385 | { | |
b7d48530 NC |
4386 | /* pseudoDEBUG |
4387 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
4388 | | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 |.fn....|.grp.......|.reg.......| | |
4389 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa CM |
4390 | int fn = ((iw0 >> PseudoDbg_fn_bits) & PseudoDbg_fn_mask); |
4391 | int grp = ((iw0 >> PseudoDbg_grp_bits) & PseudoDbg_grp_mask); | |
4392 | int reg = ((iw0 >> PseudoDbg_reg_bits) & PseudoDbg_reg_mask); | |
4393 | ||
4394 | if (reg == 0 && fn == 3) | |
b7d48530 NC |
4395 | OUTS (outf, "DBG A0"); |
4396 | ||
4b7f6baa | 4397 | else if (reg == 1 && fn == 3) |
b7d48530 NC |
4398 | OUTS (outf, "DBG A1"); |
4399 | ||
4b7f6baa | 4400 | else if (reg == 3 && fn == 3) |
b7d48530 NC |
4401 | OUTS (outf, "ABORT"); |
4402 | ||
4b7f6baa | 4403 | else if (reg == 4 && fn == 3) |
b7d48530 NC |
4404 | OUTS (outf, "HLT"); |
4405 | ||
4b7f6baa | 4406 | else if (reg == 5 && fn == 3) |
b7d48530 NC |
4407 | OUTS (outf, "DBGHALT"); |
4408 | ||
4b7f6baa CM |
4409 | else if (reg == 6 && fn == 3) |
4410 | { | |
4b7f6baa CM |
4411 | OUTS (outf, "DBGCMPLX("); |
4412 | OUTS (outf, dregs (grp)); | |
4413 | OUTS (outf, ")"); | |
4b7f6baa CM |
4414 | } |
4415 | else if (reg == 7 && fn == 3) | |
b7d48530 NC |
4416 | OUTS (outf, "DBG"); |
4417 | ||
4b7f6baa CM |
4418 | else if (grp == 0 && fn == 2) |
4419 | { | |
4b7f6baa CM |
4420 | OUTS (outf, "OUTC"); |
4421 | OUTS (outf, dregs (reg)); | |
4b7f6baa CM |
4422 | } |
4423 | else if (fn == 0) | |
4424 | { | |
4b7f6baa CM |
4425 | OUTS (outf, "DBG"); |
4426 | OUTS (outf, allregs (reg, grp)); | |
4b7f6baa CM |
4427 | } |
4428 | else if (fn == 1) | |
4429 | { | |
4b7f6baa CM |
4430 | OUTS (outf, "PRNT"); |
4431 | OUTS (outf, allregs (reg, grp)); | |
4b7f6baa CM |
4432 | } |
4433 | else | |
b7d48530 NC |
4434 | return 0; |
4435 | ||
4436 | return 2; | |
4b7f6baa CM |
4437 | } |
4438 | ||
4439 | static int | |
4440 | decode_pseudodbg_assert_0 (TIword iw0, TIword iw1, disassemble_info *outf) | |
4441 | { | |
b7d48530 NC |
4442 | /* pseudodbg_assert |
4443 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ | |
4444 | | 1 | 1 | 1 | 1 | 0 | - | - | - | - | - |.dbgop.....|.regtest...| | |
4445 | |.expected......................................................| | |
4446 | +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ */ | |
4b7f6baa | 4447 | int expected = ((iw1 >> PseudoDbg_Assert_expected_bits) & PseudoDbg_Assert_expected_mask); |
b7d48530 NC |
4448 | int dbgop = ((iw0 >> (PseudoDbg_Assert_dbgop_bits - 16)) & PseudoDbg_Assert_dbgop_mask); |
4449 | int regtest = ((iw0 >> (PseudoDbg_Assert_regtest_bits - 16)) & PseudoDbg_Assert_regtest_mask); | |
4b7f6baa CM |
4450 | |
4451 | if (dbgop == 0) | |
4452 | { | |
4b7f6baa CM |
4453 | OUTS (outf, "DBGA("); |
4454 | OUTS (outf, dregs_lo (regtest)); | |
4455 | OUTS (outf, ","); | |
4456 | OUTS (outf, uimm16 (expected)); | |
4457 | OUTS (outf, ")"); | |
4b7f6baa CM |
4458 | } |
4459 | else if (dbgop == 1) | |
4460 | { | |
4b7f6baa CM |
4461 | OUTS (outf, "DBGA("); |
4462 | OUTS (outf, dregs_hi (regtest)); | |
4463 | OUTS (outf, ","); | |
4464 | OUTS (outf, uimm16 (expected)); | |
4465 | OUTS (outf, ")"); | |
4b7f6baa CM |
4466 | } |
4467 | else if (dbgop == 2) | |
4468 | { | |
4b7f6baa CM |
4469 | OUTS (outf, "DBGAL("); |
4470 | OUTS (outf, dregs (regtest)); | |
4471 | OUTS (outf, ","); | |
4472 | OUTS (outf, uimm16 (expected)); | |
4473 | OUTS (outf, ")"); | |
4b7f6baa CM |
4474 | } |
4475 | else if (dbgop == 3) | |
4476 | { | |
4b7f6baa CM |
4477 | OUTS (outf, "DBGAH("); |
4478 | OUTS (outf, dregs (regtest)); | |
4479 | OUTS (outf, ","); | |
4480 | OUTS (outf, uimm16 (expected)); | |
4481 | OUTS (outf, ")"); | |
4b7f6baa CM |
4482 | } |
4483 | else | |
b7d48530 NC |
4484 | return 0; |
4485 | return 4; | |
4b7f6baa CM |
4486 | } |
4487 | ||
4488 | int | |
4489 | _print_insn_bfin (bfd_vma pc, disassemble_info *outf) | |
4490 | { | |
4b7f6baa CM |
4491 | bfd_byte buf[4]; |
4492 | TIword iw0; | |
4493 | TIword iw1; | |
4494 | int status; | |
b7d48530 NC |
4495 | int rv = 0; |
4496 | ||
4b7f6baa CM |
4497 | status = (*outf->read_memory_func) (pc & ~0x1, buf, 2, outf); |
4498 | status = (*outf->read_memory_func) ((pc + 2) & ~0x1, buf + 2, 2, outf); | |
4499 | ||
4500 | iw0 = bfd_getl16 (buf); | |
4501 | iw1 = bfd_getl16 (buf + 2); | |
4502 | ||
4503 | if ((iw0 & 0xf7ff) == 0xc003 && iw1 == 0x1800) | |
4504 | { | |
4505 | OUTS (outf, "mnop"); | |
4506 | return 4; | |
4507 | } | |
4508 | else if ((iw0 & 0xff00) == 0x0000) | |
b7d48530 | 4509 | rv = decode_ProgCtrl_0 (iw0, outf); |
4b7f6baa | 4510 | else if ((iw0 & 0xffc0) == 0x0240) |
b7d48530 | 4511 | rv = decode_CaCTRL_0 (iw0, outf); |
4b7f6baa | 4512 | else if ((iw0 & 0xff80) == 0x0100) |
b7d48530 | 4513 | rv = decode_PushPopReg_0 (iw0, outf); |
4b7f6baa | 4514 | else if ((iw0 & 0xfe00) == 0x0400) |
b7d48530 | 4515 | rv = decode_PushPopMultiple_0 (iw0, outf); |
4b7f6baa | 4516 | else if ((iw0 & 0xfe00) == 0x0600) |
b7d48530 | 4517 | rv = decode_ccMV_0 (iw0, outf); |
4b7f6baa | 4518 | else if ((iw0 & 0xf800) == 0x0800) |
b7d48530 | 4519 | rv = decode_CCflag_0 (iw0, outf); |
4b7f6baa | 4520 | else if ((iw0 & 0xffe0) == 0x0200) |
b7d48530 | 4521 | rv = decode_CC2dreg_0 (iw0, outf); |
4b7f6baa | 4522 | else if ((iw0 & 0xff00) == 0x0300) |
b7d48530 | 4523 | rv = decode_CC2stat_0 (iw0, outf); |
4b7f6baa | 4524 | else if ((iw0 & 0xf000) == 0x1000) |
b7d48530 | 4525 | rv = decode_BRCC_0 (iw0, pc, outf); |
4b7f6baa | 4526 | else if ((iw0 & 0xf000) == 0x2000) |
b7d48530 | 4527 | rv = decode_UJUMP_0 (iw0, pc, outf); |
4b7f6baa | 4528 | else if ((iw0 & 0xf000) == 0x3000) |
b7d48530 | 4529 | rv = decode_REGMV_0 (iw0, outf); |
4b7f6baa | 4530 | else if ((iw0 & 0xfc00) == 0x4000) |
b7d48530 | 4531 | rv = decode_ALU2op_0 (iw0, outf); |
4b7f6baa | 4532 | else if ((iw0 & 0xfe00) == 0x4400) |
b7d48530 | 4533 | rv = decode_PTR2op_0 (iw0, outf); |
4b7f6baa | 4534 | else if ((iw0 & 0xf800) == 0x4800) |
b7d48530 | 4535 | rv = decode_LOGI2op_0 (iw0, outf); |
4b7f6baa | 4536 | else if ((iw0 & 0xf000) == 0x5000) |
b7d48530 | 4537 | rv = decode_COMP3op_0 (iw0, outf); |
4b7f6baa | 4538 | else if ((iw0 & 0xf800) == 0x6000) |
b7d48530 | 4539 | rv = decode_COMPI2opD_0 (iw0, outf); |
4b7f6baa | 4540 | else if ((iw0 & 0xf800) == 0x6800) |
b7d48530 | 4541 | rv = decode_COMPI2opP_0 (iw0, outf); |
4b7f6baa | 4542 | else if ((iw0 & 0xf000) == 0x8000) |
b7d48530 | 4543 | rv = decode_LDSTpmod_0 (iw0, outf); |
4b7f6baa | 4544 | else if ((iw0 & 0xff60) == 0x9e60) |
b7d48530 | 4545 | rv = decode_dagMODim_0 (iw0, outf); |
4b7f6baa | 4546 | else if ((iw0 & 0xfff0) == 0x9f60) |
b7d48530 | 4547 | rv = decode_dagMODik_0 (iw0, outf); |
4b7f6baa | 4548 | else if ((iw0 & 0xfc00) == 0x9c00) |
b7d48530 | 4549 | rv = decode_dspLDST_0 (iw0, outf); |
4b7f6baa | 4550 | else if ((iw0 & 0xf000) == 0x9000) |
b7d48530 | 4551 | rv = decode_LDST_0 (iw0, outf); |
4b7f6baa | 4552 | else if ((iw0 & 0xfc00) == 0xb800) |
b7d48530 | 4553 | rv = decode_LDSTiiFP_0 (iw0, outf); |
4b7f6baa | 4554 | else if ((iw0 & 0xe000) == 0xA000) |
b7d48530 | 4555 | rv = decode_LDSTii_0 (iw0, outf); |
4b7f6baa | 4556 | else if ((iw0 & 0xff80) == 0xe080 && (iw1 & 0x0C00) == 0x0000) |
b7d48530 | 4557 | rv = decode_LoopSetup_0 (iw0, iw1, pc, outf); |
4b7f6baa | 4558 | else if ((iw0 & 0xff00) == 0xe100 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4559 | rv = decode_LDIMMhalf_0 (iw0, iw1, outf); |
4b7f6baa | 4560 | else if ((iw0 & 0xfe00) == 0xe200 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4561 | rv = decode_CALLa_0 (iw0, iw1, pc, outf); |
4b7f6baa | 4562 | else if ((iw0 & 0xfc00) == 0xe400 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4563 | rv = decode_LDSTidxI_0 (iw0, iw1, outf); |
4b7f6baa | 4564 | else if ((iw0 & 0xfffe) == 0xe800 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4565 | rv = decode_linkage_0 (iw0, iw1, outf); |
4b7f6baa | 4566 | else if ((iw0 & 0xf600) == 0xc000 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4567 | rv = decode_dsp32mac_0 (iw0, iw1, outf); |
4b7f6baa | 4568 | else if ((iw0 & 0xf600) == 0xc200 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4569 | rv = decode_dsp32mult_0 (iw0, iw1, outf); |
4b7f6baa | 4570 | else if ((iw0 & 0xf7c0) == 0xc400 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4571 | rv = decode_dsp32alu_0 (iw0, iw1, outf); |
4b7f6baa | 4572 | else if ((iw0 & 0xf780) == 0xc600 && (iw1 & 0x01c0) == 0x0000) |
b7d48530 | 4573 | rv = decode_dsp32shift_0 (iw0, iw1, outf); |
4b7f6baa | 4574 | else if ((iw0 & 0xf780) == 0xc680 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4575 | rv = decode_dsp32shiftimm_0 (iw0, iw1, outf); |
4b7f6baa | 4576 | else if ((iw0 & 0xff00) == 0xf800) |
b7d48530 | 4577 | rv = decode_pseudoDEBUG_0 (iw0, outf); |
4b7f6baa | 4578 | #if 0 |
4b7f6baa | 4579 | else if ((iw0 & 0xFF00) == 0xF900) |
b7d48530 | 4580 | rv = decode_pseudoOChar_0 (iw0, iw1, pc, outf); |
4b7f6baa | 4581 | #endif |
4b7f6baa | 4582 | else if ((iw0 & 0xFFC0) == 0xf000 && (iw1 & 0x0000) == 0x0000) |
b7d48530 | 4583 | rv = decode_pseudodbg_assert_0 (iw0, iw1, outf); |
4b7f6baa | 4584 | |
b7d48530 | 4585 | return rv; |
4b7f6baa CM |
4586 | } |
4587 | ||
4588 | ||
4589 | int | |
4590 | print_insn_bfin (bfd_vma pc, disassemble_info *outf) | |
4591 | { | |
471e4e36 JZ |
4592 | bfd_byte buf[2]; |
4593 | unsigned short iw0; | |
4594 | int status; | |
4b7f6baa | 4595 | int count = 0; |
471e4e36 JZ |
4596 | |
4597 | status = (*outf->read_memory_func) (pc & ~0x01, buf, 2, outf); | |
4598 | iw0 = bfd_getl16 (buf); | |
4b7f6baa CM |
4599 | |
4600 | count += _print_insn_bfin (pc, outf); | |
471e4e36 | 4601 | |
4b7f6baa | 4602 | /* Proper display of multiple issue instructions. */ |
471e4e36 | 4603 | |
4b7f6baa | 4604 | if ((iw0 & 0xc000) == 0xc000 && (iw0 & BIT_MULTI_INS) |
b7d48530 | 4605 | && ((iw0 & 0xe800) != 0xe800 /* Not Linkage. */ )) |
4b7f6baa CM |
4606 | { |
4607 | outf->fprintf_func (outf->stream, " || "); | |
4608 | count += _print_insn_bfin (pc + 4, outf); | |
4609 | outf->fprintf_func (outf->stream, " || "); | |
4610 | count += _print_insn_bfin (pc + 6, outf); | |
4611 | } | |
4612 | if (count == 0) | |
4613 | { | |
4614 | outf->fprintf_func (outf->stream, "ILLEGAL"); | |
4615 | return 2; | |
4616 | } | |
4617 | outf->fprintf_func (outf->stream, ";"); | |
4618 | return count; | |
4619 | } |