2005-10-28 Dave Brolley <brolley@redhat.com>
[deliverable/binutils-gdb.git] / opcodes / cgen-dis.in
CommitLineData
f6e6b40f
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1/* Disassembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
47b0e7ad
NC
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-dis.in isn't
f6e6b40f 6
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NC
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005
8 Free Software Foundation, Inc.
f6e6b40f 9
47b0e7ad 10 This file is part of the GNU Binutils and GDB, the GNU debugger.
f6e6b40f 11
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NC
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
15 any later version.
f6e6b40f 16
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NC
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
f6e6b40f 21
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NC
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
f6e6b40f
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25
26/* ??? Eventually more and more of this stuff can go to cpu-independent files.
27 Keep that in mind. */
28
29#include "sysdep.h"
30#include <stdio.h>
31#include "ansidecl.h"
32#include "dis-asm.h"
33#include "bfd.h"
34#include "symcat.h"
98f70fc4 35#include "libiberty.h"
f6e6b40f
BE
36#include "@prefix@-desc.h"
37#include "@prefix@-opc.h"
38#include "opintl.h"
39
40/* Default text to print if an instruction isn't recognized. */
41#define UNKNOWN_INSN_MSG _("*unknown*")
42
43static void print_normal
10e05405 44 (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
f6e6b40f 45static void print_address
bf143b25 46 (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
f6e6b40f 47static void print_keyword
bf143b25 48 (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
f6e6b40f 49static void print_insn_normal
10e05405 50 (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
0e2ee3ca 51static int print_insn
33b71eeb 52 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned);
f6e6b40f 53static int default_print_insn
bf143b25 54 (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
0e2ee3ca 55static int read_insn
33b71eeb 56 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
10e05405 57 unsigned long *);
f6e6b40f 58\f
47b0e7ad 59/* -- disassembler routines inserted here. */
f6e6b40f
BE
60\f
61/* Default print handler. */
62
63static void
10e05405
MM
64print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
65 void *dis_info,
66 long value,
67 unsigned int attrs,
68 bfd_vma pc ATTRIBUTE_UNUSED,
69 int length ATTRIBUTE_UNUSED)
f6e6b40f
BE
70{
71 disassemble_info *info = (disassemble_info *) dis_info;
72
73#ifdef CGEN_PRINT_NORMAL
74 CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
75#endif
76
77 /* Print the operand as directed by the attributes. */
78 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
79 ; /* nothing to do */
80 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
81 (*info->fprintf_func) (info->stream, "%ld", value);
82 else
83 (*info->fprintf_func) (info->stream, "0x%lx", value);
84}
85
86/* Default address handler. */
87
88static void
10e05405
MM
89print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
90 void *dis_info,
91 bfd_vma value,
92 unsigned int attrs,
93 bfd_vma pc ATTRIBUTE_UNUSED,
94 int length ATTRIBUTE_UNUSED)
f6e6b40f
BE
95{
96 disassemble_info *info = (disassemble_info *) dis_info;
97
98#ifdef CGEN_PRINT_ADDRESS
99 CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
100#endif
101
102 /* Print the operand as directed by the attributes. */
103 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
47b0e7ad 104 ; /* Nothing to do. */
f6e6b40f
BE
105 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
106 (*info->print_address_func) (value, info);
107 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
108 (*info->print_address_func) (value, info);
109 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
110 (*info->fprintf_func) (info->stream, "%ld", (long) value);
111 else
112 (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
113}
114
115/* Keyword print handler. */
116
117static void
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MM
118print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
119 void *dis_info,
120 CGEN_KEYWORD *keyword_table,
121 long value,
122 unsigned int attrs ATTRIBUTE_UNUSED)
f6e6b40f
BE
123{
124 disassemble_info *info = (disassemble_info *) dis_info;
125 const CGEN_KEYWORD_ENTRY *ke;
126
127 ke = cgen_keyword_lookup_value (keyword_table, value);
128 if (ke != NULL)
129 (*info->fprintf_func) (info->stream, "%s", ke->name);
130 else
131 (*info->fprintf_func) (info->stream, "???");
132}
133\f
134/* Default insn printer.
135
10e05405 136 DIS_INFO is defined as `void *' so the disassembler needn't know anything
f6e6b40f
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137 about disassemble_info. */
138
139static void
10e05405
MM
140print_insn_normal (CGEN_CPU_DESC cd,
141 void *dis_info,
142 const CGEN_INSN *insn,
143 CGEN_FIELDS *fields,
144 bfd_vma pc,
145 int length)
f6e6b40f
BE
146{
147 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
148 disassemble_info *info = (disassemble_info *) dis_info;
4a9f416d 149 const CGEN_SYNTAX_CHAR_TYPE *syn;
f6e6b40f
BE
150
151 CGEN_INIT_PRINT (cd);
152
153 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
154 {
155 if (CGEN_SYNTAX_MNEMONIC_P (*syn))
156 {
157 (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
158 continue;
159 }
160 if (CGEN_SYNTAX_CHAR_P (*syn))
161 {
162 (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
163 continue;
164 }
165
166 /* We have an operand. */
167 @arch@_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
168 fields, CGEN_INSN_ATTRS (insn), pc, length);
169 }
170}
171\f
6bb95a0f
DB
172/* Subroutine of print_insn. Reads an insn into the given buffers and updates
173 the extract info.
174 Returns 0 if all is well, non-zero otherwise. */
0e2ee3ca 175
f6e6b40f 176static int
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MM
177read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
178 bfd_vma pc,
179 disassemble_info *info,
33b71eeb 180 bfd_byte *buf,
10e05405
MM
181 int buflen,
182 CGEN_EXTRACT_INFO *ex_info,
183 unsigned long *insn_value)
f6e6b40f 184{
6bb95a0f 185 int status = (*info->read_memory_func) (pc, buf, buflen, info);
47b0e7ad 186
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DB
187 if (status != 0)
188 {
189 (*info->memory_error_func) (status, pc, info);
190 return -1;
191 }
f6e6b40f 192
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DB
193 ex_info->dis_info = info;
194 ex_info->valid = (1 << buflen) - 1;
195 ex_info->insn_bytes = buf;
f6e6b40f 196
7e30bc36 197 *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
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DB
198 return 0;
199}
200
201/* Utility to print an insn.
202 BUF is the base part of the insn, target byte order, BUFLEN bytes long.
203 The result is the size of the insn in bytes or zero for an unknown insn
204 or -1 if an error occurs fetching data (memory_error_func will have
205 been called). */
206
207static int
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MM
208print_insn (CGEN_CPU_DESC cd,
209 bfd_vma pc,
210 disassemble_info *info,
33b71eeb 211 bfd_byte *buf,
10e05405 212 unsigned int buflen)
6bb95a0f 213{
81f6038f 214 CGEN_INSN_INT insn_value;
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DB
215 const CGEN_INSN_LIST *insn_list;
216 CGEN_EXTRACT_INFO ex_info;
6e9a3f4d 217 int basesize;
6bb95a0f 218
52646233 219 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
6e9a3f4d
JH
220 basesize = cd->base_insn_bitsize < buflen * 8 ?
221 cd->base_insn_bitsize : buflen * 8;
222 insn_value = cgen_get_insn_value (cd, buf, basesize);
223
52646233
FCE
224
225 /* Fill in ex_info fields like read_insn would. Don't actually call
226 read_insn, since the incoming buffer is already read (and possibly
227 modified a la m32r). */
228 ex_info.valid = (1 << buflen) - 1;
229 ex_info.dis_info = info;
230 ex_info.insn_bytes = buf;
6bb95a0f 231
f6e6b40f
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232 /* The instructions are stored in hash lists.
233 Pick the first one and keep trying until we find the right one. */
234
33b71eeb 235 insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
f6e6b40f
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236 while (insn_list != NULL)
237 {
238 const CGEN_INSN *insn = insn_list->insn;
239 CGEN_FIELDS fields;
240 int length;
52646233 241 unsigned long insn_value_cropped;
f6e6b40f
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242
243#ifdef CGEN_VALIDATE_INSN_SUPPORTED
0e2ee3ca 244 /* Not needed as insn shouldn't be in hash lists if not supported. */
f6e6b40f
BE
245 /* Supported by this cpu? */
246 if (! @arch@_cgen_insn_supported (cd, insn))
247 {
248 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
249 continue;
250 }
251#endif
252
253 /* Basic bit mask must be correct. */
254 /* ??? May wish to allow target to defer this check until the extract
255 handler. */
52646233
FCE
256
257 /* Base size may exceed this instruction's size. Extract the
258 relevant part from the buffer. */
0e2ee3ca
NC
259 if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
260 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
52646233
FCE
261 insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
262 info->endian == BFD_ENDIAN_BIG);
263 else
264 insn_value_cropped = insn_value;
265
266 if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
f6e6b40f
BE
267 == CGEN_INSN_BASE_VALUE (insn))
268 {
269 /* Printing is handled in two passes. The first pass parses the
270 machine insn and extracts the fields. The second pass prints
271 them. */
272
1ffd7d02
DB
273 /* Make sure the entire insn is loaded into insn_value, if it
274 can fit. */
0e2ee3ca
NC
275 if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
276 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
6bb95a0f
DB
277 {
278 unsigned long full_insn_value;
279 int rc = read_insn (cd, pc, info, buf,
280 CGEN_INSN_BITSIZE (insn) / 8,
281 & ex_info, & full_insn_value);
282 if (rc != 0)
283 return rc;
284 length = CGEN_EXTRACT_FN (cd, insn)
285 (cd, insn, &ex_info, full_insn_value, &fields, pc);
286 }
287 else
1ffd7d02 288 length = CGEN_EXTRACT_FN (cd, insn)
84fd0d38 289 (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
6bb95a0f 290
47b0e7ad 291 /* Length < 0 -> error. */
f6e6b40f
BE
292 if (length < 0)
293 return length;
294 if (length > 0)
295 {
296 CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
47b0e7ad 297 /* Length is in bits, result is in bytes. */
f6e6b40f
BE
298 return length / 8;
299 }
300 }
301
302 insn_list = CGEN_DIS_NEXT_INSN (insn_list);
303 }
304
305 return 0;
306}
307
308/* Default value for CGEN_PRINT_INSN.
309 The result is the size of the insn in bytes or zero for an unknown insn
310 or -1 if an error occured fetching bytes. */
311
312#ifndef CGEN_PRINT_INSN
313#define CGEN_PRINT_INSN default_print_insn
314#endif
315
316static int
10e05405 317default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
f6e6b40f 318{
33b71eeb 319 bfd_byte buf[CGEN_MAX_INSN_SIZE];
a00ad97d 320 int buflen;
f6e6b40f
BE
321 int status;
322
a00ad97d
FCE
323 /* Attempt to read the base part of the insn. */
324 buflen = cd->base_insn_bitsize / 8;
325 status = (*info->read_memory_func) (pc, buf, buflen, info);
326
327 /* Try again with the minimum part, if min < base. */
328 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
329 {
330 buflen = cd->min_insn_bitsize / 8;
331 status = (*info->read_memory_func) (pc, buf, buflen, info);
332 }
f6e6b40f 333
f6e6b40f
BE
334 if (status != 0)
335 {
336 (*info->memory_error_func) (status, pc, info);
337 return -1;
338 }
339
a00ad97d 340 return print_insn (cd, pc, info, buf, buflen);
f6e6b40f
BE
341}
342
343/* Main entry point.
344 Print one instruction from PC on INFO->STREAM.
345 Return the size of the instruction (in bytes). */
346
47b0e7ad
NC
347typedef struct cpu_desc_list
348{
748f46d4
GH
349 struct cpu_desc_list *next;
350 int isa;
351 int mach;
352 int endian;
353 CGEN_CPU_DESC cd;
354} cpu_desc_list;
355
f6e6b40f 356int
10e05405 357print_insn_@arch@ (bfd_vma pc, disassemble_info *info)
f6e6b40f 358{
748f46d4
GH
359 static cpu_desc_list *cd_list = 0;
360 cpu_desc_list *cl = 0;
f6e6b40f
BE
361 static CGEN_CPU_DESC cd = 0;
362 static int prev_isa;
363 static int prev_mach;
364 static int prev_endian;
365 int length;
366 int isa,mach;
367 int endian = (info->endian == BFD_ENDIAN_BIG
368 ? CGEN_ENDIAN_BIG
369 : CGEN_ENDIAN_LITTLE);
370 enum bfd_architecture arch;
371
372 /* ??? gdb will set mach but leave the architecture as "unknown" */
373#ifndef CGEN_BFD_ARCH
374#define CGEN_BFD_ARCH bfd_arch_@arch@
375#endif
376 arch = info->arch;
377 if (arch == bfd_arch_unknown)
378 arch = CGEN_BFD_ARCH;
27fca2d8
PM
379
380 /* There's no standard way to compute the machine or isa number
f6e6b40f 381 so we leave it to the target. */
27fca2d8
PM
382#ifdef CGEN_COMPUTE_MACH
383 mach = CGEN_COMPUTE_MACH (info);
384#else
385 mach = info->mach;
386#endif
387
f6e6b40f
BE
388#ifdef CGEN_COMPUTE_ISA
389 isa = CGEN_COMPUTE_ISA (info);
390#else
cadaa522 391 isa = info->insn_sets;
f6e6b40f
BE
392#endif
393
748f46d4 394 /* If we've switched cpu's, try to find a handle we've used before */
f6e6b40f
BE
395 if (cd
396 && (isa != prev_isa
397 || mach != prev_mach
398 || endian != prev_endian))
399 {
f6e6b40f 400 cd = 0;
748f46d4
GH
401 for (cl = cd_list; cl; cl = cl->next)
402 {
403 if (cl->isa == isa &&
404 cl->mach == mach &&
405 cl->endian == endian)
406 {
407 cd = cl->cd;
408 break;
409 }
410 }
411 }
f6e6b40f
BE
412
413 /* If we haven't initialized yet, initialize the opcode table. */
414 if (! cd)
415 {
416 const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
417 const char *mach_name;
418
419 if (!arch_type)
420 abort ();
421 mach_name = arch_type->printable_name;
422
423 prev_isa = isa;
424 prev_mach = mach;
425 prev_endian = endian;
426 cd = @arch@_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
427 CGEN_CPU_OPEN_BFDMACH, mach_name,
428 CGEN_CPU_OPEN_ENDIAN, prev_endian,
429 CGEN_CPU_OPEN_END);
430 if (!cd)
431 abort ();
748f46d4 432
47b0e7ad 433 /* Save this away for future reference. */
748f46d4
GH
434 cl = xmalloc (sizeof (struct cpu_desc_list));
435 cl->cd = cd;
436 cl->isa = isa;
437 cl->mach = mach;
438 cl->endian = endian;
439 cl->next = cd_list;
440 cd_list = cl;
441
f6e6b40f
BE
442 @arch@_cgen_init_dis (cd);
443 }
444
445 /* We try to have as much common code as possible.
446 But at this point some targets need to take over. */
447 /* ??? Some targets may need a hook elsewhere. Try to avoid this,
448 but if not possible try to move this hook elsewhere rather than
449 have two hooks. */
450 length = CGEN_PRINT_INSN (cd, pc, info);
451 if (length > 0)
452 return length;
453 if (length < 0)
454 return -1;
455
456 (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
457 return cd->default_insn_bitsize / 8;
458}
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