Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* Select disassembly routine for specified architecture. |
aef6203b | 2 | Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, |
aa137e4d | 3 | 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011 Free Software Foundation, Inc. |
252b5132 | 4 | |
9b201bb5 NC |
5 | This file is part of the GNU opcodes library. |
6 | ||
7 | This library is free software; you can redistribute it and/or modify | |
7499d566 | 8 | it under the terms of the GNU General Public License as published by |
9b201bb5 | 9 | the Free Software Foundation; either version 3 of the License, or |
7499d566 | 10 | (at your option) any later version. |
252b5132 | 11 | |
7499d566 NC |
12 | This program is distributed in the hope that it will be useful, |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
252b5132 | 16 | |
7499d566 NC |
17 | You should have received a copy of the GNU General Public License |
18 | along with this program; if not, write to the Free Software | |
9b201bb5 NC |
19 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
20 | MA 02110-1301, USA. */ | |
252b5132 | 21 | |
0d8dfecf | 22 | #include "sysdep.h" |
252b5132 RH |
23 | #include "dis-asm.h" |
24 | ||
25 | #ifdef ARCH_all | |
252b5132 RH |
26 | #define ARCH_alpha |
27 | #define ARCH_arc | |
28 | #define ARCH_arm | |
adde6300 | 29 | #define ARCH_avr |
4b7f6baa | 30 | #define ARCH_bfin |
3d3d428f | 31 | #define ARCH_cr16 |
6c95a37f | 32 | #define ARCH_cris |
1fe1f39c | 33 | #define ARCH_crx |
252b5132 RH |
34 | #define ARCH_d10v |
35 | #define ARCH_d30v | |
d172d4ba | 36 | #define ARCH_dlx |
56b13185 | 37 | #define ARCH_epiphany |
e729279b NC |
38 | #define ARCH_fr30 |
39 | #define ARCH_frv | |
252b5132 RH |
40 | #define ARCH_h8300 |
41 | #define ARCH_h8500 | |
42 | #define ARCH_hppa | |
5b93d8bb | 43 | #define ARCH_i370 |
252b5132 | 44 | #define ARCH_i386 |
9d751335 | 45 | #define ARCH_i860 |
252b5132 | 46 | #define ARCH_i960 |
800eeca4 | 47 | #define ARCH_ia64 |
e729279b NC |
48 | #define ARCH_ip2k |
49 | #define ARCH_iq2000 | |
84e94c90 | 50 | #define ARCH_lm32 |
e729279b | 51 | #define ARCH_m32c |
252b5132 | 52 | #define ARCH_m32r |
60bcf0fa NC |
53 | #define ARCH_m68hc11 |
54 | #define ARCH_m68hc12 | |
e729279b | 55 | #define ARCH_m68k |
252b5132 RH |
56 | #define ARCH_m88k |
57 | #define ARCH_mcore | |
bd2f2e55 | 58 | #define ARCH_mep |
7ba29e2a | 59 | #define ARCH_microblaze |
252b5132 | 60 | #define ARCH_mips |
3c3bdf30 | 61 | #define ARCH_mmix |
252b5132 RH |
62 | #define ARCH_mn10200 |
63 | #define ARCH_mn10300 | |
59b1530d | 64 | #define ARCH_moxie |
d031aafb | 65 | #define ARCH_mt |
2469cfa2 | 66 | #define ARCH_msp430 |
252b5132 | 67 | #define ARCH_ns32k |
87e6d782 | 68 | #define ARCH_openrisc |
3b16e843 | 69 | #define ARCH_or32 |
e135f41b | 70 | #define ARCH_pdp11 |
1e608f98 | 71 | #define ARCH_pj |
252b5132 RH |
72 | #define ARCH_powerpc |
73 | #define ARCH_rs6000 | |
99c513f6 | 74 | #define ARCH_rl78 |
c7927a3c | 75 | #define ARCH_rx |
a85d7ed0 | 76 | #define ARCH_s390 |
1c0d3aa6 | 77 | #define ARCH_score |
252b5132 RH |
78 | #define ARCH_sh |
79 | #define ARCH_sparc | |
e9f53129 | 80 | #define ARCH_spu |
252b5132 | 81 | #define ARCH_tic30 |
026df7c5 | 82 | #define ARCH_tic4x |
5c84d377 | 83 | #define ARCH_tic54x |
40b36596 | 84 | #define ARCH_tic6x |
252b5132 | 85 | #define ARCH_tic80 |
aa137e4d NC |
86 | #define ARCH_tilegx |
87 | #define ARCH_tilepro | |
252b5132 RH |
88 | #define ARCH_v850 |
89 | #define ARCH_vax | |
90 | #define ARCH_w65 | |
93fbbb04 | 91 | #define ARCH_xstormy16 |
d70c5fc7 | 92 | #define ARCH_xc16x |
e0001a05 | 93 | #define ARCH_xtensa |
3c9b82ba | 94 | #define ARCH_z80 |
252b5132 | 95 | #define ARCH_z8k |
d28847ce | 96 | #define INCLUDE_SHMEDIA |
252b5132 RH |
97 | #endif |
98 | ||
49f58d10 JB |
99 | #ifdef ARCH_m32c |
100 | #include "m32c-desc.h" | |
101 | #endif | |
252b5132 RH |
102 | |
103 | disassembler_ftype | |
104 | disassembler (abfd) | |
105 | bfd *abfd; | |
106 | { | |
107 | enum bfd_architecture a = bfd_get_arch (abfd); | |
108 | disassembler_ftype disassemble; | |
109 | ||
110 | switch (a) | |
111 | { | |
112 | /* If you add a case to this table, also add it to the | |
113 | ARCH_all definition right above this function. */ | |
252b5132 RH |
114 | #ifdef ARCH_alpha |
115 | case bfd_arch_alpha: | |
116 | disassemble = print_insn_alpha; | |
117 | break; | |
118 | #endif | |
119 | #ifdef ARCH_arc | |
120 | case bfd_arch_arc: | |
6ca4eb77 AM |
121 | disassemble = arc_get_disassembler (abfd); |
122 | break; | |
252b5132 RH |
123 | #endif |
124 | #ifdef ARCH_arm | |
125 | case bfd_arch_arm: | |
126 | if (bfd_big_endian (abfd)) | |
127 | disassemble = print_insn_big_arm; | |
128 | else | |
129 | disassemble = print_insn_little_arm; | |
130 | break; | |
131 | #endif | |
adde6300 AM |
132 | #ifdef ARCH_avr |
133 | case bfd_arch_avr: | |
134 | disassemble = print_insn_avr; | |
135 | break; | |
136 | #endif | |
4b7f6baa CM |
137 | #ifdef ARCH_bfin |
138 | case bfd_arch_bfin: | |
139 | disassemble = print_insn_bfin; | |
140 | break; | |
141 | #endif | |
3d3d428f NC |
142 | #ifdef ARCH_cr16 |
143 | case bfd_arch_cr16: | |
144 | disassemble = print_insn_cr16; | |
145 | break; | |
146 | #endif | |
6c95a37f HPN |
147 | #ifdef ARCH_cris |
148 | case bfd_arch_cris: | |
78966507 | 149 | disassemble = cris_get_disassembler (abfd); |
6c95a37f | 150 | break; |
1fe1f39c NC |
151 | #endif |
152 | #ifdef ARCH_crx | |
153 | case bfd_arch_crx: | |
154 | disassemble = print_insn_crx; | |
155 | break; | |
6c95a37f | 156 | #endif |
252b5132 RH |
157 | #ifdef ARCH_d10v |
158 | case bfd_arch_d10v: | |
159 | disassemble = print_insn_d10v; | |
160 | break; | |
161 | #endif | |
162 | #ifdef ARCH_d30v | |
163 | case bfd_arch_d30v: | |
164 | disassemble = print_insn_d30v; | |
165 | break; | |
166 | #endif | |
d172d4ba NC |
167 | #ifdef ARCH_dlx |
168 | case bfd_arch_dlx: | |
169 | /* As far as I know we only handle big-endian DLX objects. */ | |
170 | disassemble = print_insn_dlx; | |
171 | break; | |
172 | #endif | |
252b5132 RH |
173 | #ifdef ARCH_h8300 |
174 | case bfd_arch_h8300: | |
049f8936 NC |
175 | if (bfd_get_mach (abfd) == bfd_mach_h8300h |
176 | || bfd_get_mach (abfd) == bfd_mach_h8300hn) | |
252b5132 | 177 | disassemble = print_insn_h8300h; |
049f8936 | 178 | else if (bfd_get_mach (abfd) == bfd_mach_h8300s |
d43ff6d2 | 179 | || bfd_get_mach (abfd) == bfd_mach_h8300sn |
a53b85e2 AO |
180 | || bfd_get_mach (abfd) == bfd_mach_h8300sx |
181 | || bfd_get_mach (abfd) == bfd_mach_h8300sxn) | |
252b5132 | 182 | disassemble = print_insn_h8300s; |
b7ed8fad | 183 | else |
252b5132 RH |
184 | disassemble = print_insn_h8300; |
185 | break; | |
186 | #endif | |
187 | #ifdef ARCH_h8500 | |
188 | case bfd_arch_h8500: | |
189 | disassemble = print_insn_h8500; | |
190 | break; | |
191 | #endif | |
192 | #ifdef ARCH_hppa | |
193 | case bfd_arch_hppa: | |
194 | disassemble = print_insn_hppa; | |
195 | break; | |
196 | #endif | |
5b93d8bb AM |
197 | #ifdef ARCH_i370 |
198 | case bfd_arch_i370: | |
199 | disassemble = print_insn_i370; | |
200 | break; | |
201 | #endif | |
252b5132 RH |
202 | #ifdef ARCH_i386 |
203 | case bfd_arch_i386: | |
8a9036a4 | 204 | case bfd_arch_l1om: |
7a9068fe | 205 | case bfd_arch_k1om: |
e396998b | 206 | disassemble = print_insn_i386; |
252b5132 RH |
207 | break; |
208 | #endif | |
9d751335 JE |
209 | #ifdef ARCH_i860 |
210 | case bfd_arch_i860: | |
211 | disassemble = print_insn_i860; | |
212 | break; | |
213 | #endif | |
252b5132 RH |
214 | #ifdef ARCH_i960 |
215 | case bfd_arch_i960: | |
216 | disassemble = print_insn_i960; | |
217 | break; | |
218 | #endif | |
800eeca4 JW |
219 | #ifdef ARCH_ia64 |
220 | case bfd_arch_ia64: | |
221 | disassemble = print_insn_ia64; | |
222 | break; | |
223 | #endif | |
a40cbfa3 NC |
224 | #ifdef ARCH_ip2k |
225 | case bfd_arch_ip2k: | |
226 | disassemble = print_insn_ip2k; | |
227 | break; | |
228 | #endif | |
cfb8c092 NC |
229 | #ifdef ARCH_epiphany |
230 | case bfd_arch_epiphany: | |
231 | disassemble = print_insn_epiphany; | |
232 | break; | |
233 | #endif | |
252b5132 RH |
234 | #ifdef ARCH_fr30 |
235 | case bfd_arch_fr30: | |
236 | disassemble = print_insn_fr30; | |
237 | break; | |
238 | #endif | |
84e94c90 NC |
239 | #ifdef ARCH_lm32 |
240 | case bfd_arch_lm32: | |
241 | disassemble = print_insn_lm32; | |
242 | break; | |
243 | #endif | |
252b5132 RH |
244 | #ifdef ARCH_m32r |
245 | case bfd_arch_m32r: | |
246 | disassemble = print_insn_m32r; | |
247 | break; | |
248 | #endif | |
60bcf0fa NC |
249 | #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) |
250 | case bfd_arch_m68hc11: | |
251 | disassemble = print_insn_m68hc11; | |
252 | break; | |
253 | case bfd_arch_m68hc12: | |
254 | disassemble = print_insn_m68hc12; | |
255 | break; | |
256 | #endif | |
252b5132 RH |
257 | #ifdef ARCH_m68k |
258 | case bfd_arch_m68k: | |
259 | disassemble = print_insn_m68k; | |
260 | break; | |
261 | #endif | |
262 | #ifdef ARCH_m88k | |
263 | case bfd_arch_m88k: | |
264 | disassemble = print_insn_m88k; | |
265 | break; | |
266 | #endif | |
d031aafb NS |
267 | #ifdef ARCH_mt |
268 | case bfd_arch_mt: | |
269 | disassemble = print_insn_mt; | |
ac188222 DB |
270 | break; |
271 | #endif | |
7ba29e2a NC |
272 | #ifdef ARCH_microblaze |
273 | case bfd_arch_microblaze: | |
274 | disassemble = print_insn_microblaze; | |
275 | break; | |
276 | #endif | |
2469cfa2 NC |
277 | #ifdef ARCH_msp430 |
278 | case bfd_arch_msp430: | |
279 | disassemble = print_insn_msp430; | |
280 | break; | |
281 | #endif | |
252b5132 RH |
282 | #ifdef ARCH_ns32k |
283 | case bfd_arch_ns32k: | |
284 | disassemble = print_insn_ns32k; | |
285 | break; | |
286 | #endif | |
287 | #ifdef ARCH_mcore | |
288 | case bfd_arch_mcore: | |
289 | disassemble = print_insn_mcore; | |
290 | break; | |
291 | #endif | |
bd2f2e55 DB |
292 | #ifdef ARCH_mep |
293 | case bfd_arch_mep: | |
294 | disassemble = print_insn_mep; | |
295 | break; | |
296 | #endif | |
252b5132 RH |
297 | #ifdef ARCH_mips |
298 | case bfd_arch_mips: | |
299 | if (bfd_big_endian (abfd)) | |
300 | disassemble = print_insn_big_mips; | |
301 | else | |
302 | disassemble = print_insn_little_mips; | |
303 | break; | |
304 | #endif | |
3c3bdf30 NC |
305 | #ifdef ARCH_mmix |
306 | case bfd_arch_mmix: | |
307 | disassemble = print_insn_mmix; | |
308 | break; | |
309 | #endif | |
252b5132 RH |
310 | #ifdef ARCH_mn10200 |
311 | case bfd_arch_mn10200: | |
312 | disassemble = print_insn_mn10200; | |
313 | break; | |
314 | #endif | |
315 | #ifdef ARCH_mn10300 | |
316 | case bfd_arch_mn10300: | |
317 | disassemble = print_insn_mn10300; | |
318 | break; | |
319 | #endif | |
87e6d782 NC |
320 | #ifdef ARCH_openrisc |
321 | case bfd_arch_openrisc: | |
322 | disassemble = print_insn_openrisc; | |
323 | break; | |
324 | #endif | |
3b16e843 NC |
325 | #ifdef ARCH_or32 |
326 | case bfd_arch_or32: | |
327 | if (bfd_big_endian (abfd)) | |
6ca4eb77 | 328 | disassemble = print_insn_big_or32; |
3b16e843 | 329 | else |
6ca4eb77 | 330 | disassemble = print_insn_little_or32; |
3b16e843 NC |
331 | break; |
332 | #endif | |
e135f41b NC |
333 | #ifdef ARCH_pdp11 |
334 | case bfd_arch_pdp11: | |
335 | disassemble = print_insn_pdp11; | |
336 | break; | |
337 | #endif | |
1e608f98 ILT |
338 | #ifdef ARCH_pj |
339 | case bfd_arch_pj: | |
340 | disassemble = print_insn_pj; | |
341 | break; | |
342 | #endif | |
252b5132 RH |
343 | #ifdef ARCH_powerpc |
344 | case bfd_arch_powerpc: | |
345 | if (bfd_big_endian (abfd)) | |
346 | disassemble = print_insn_big_powerpc; | |
347 | else | |
348 | disassemble = print_insn_little_powerpc; | |
349 | break; | |
350 | #endif | |
351 | #ifdef ARCH_rs6000 | |
352 | case bfd_arch_rs6000: | |
39c20e8f | 353 | if (bfd_get_mach (abfd) == bfd_mach_ppc_620) |
7f6d05e8 CP |
354 | disassemble = print_insn_big_powerpc; |
355 | else | |
356 | disassemble = print_insn_rs6000; | |
252b5132 RH |
357 | break; |
358 | #endif | |
99c513f6 DD |
359 | #ifdef ARCH_rl78 |
360 | case bfd_arch_rl78: | |
361 | disassemble = print_insn_rl78; | |
362 | break; | |
363 | #endif | |
c7927a3c NC |
364 | #ifdef ARCH_rx |
365 | case bfd_arch_rx: | |
366 | disassemble = print_insn_rx; | |
367 | break; | |
368 | #endif | |
a85d7ed0 NC |
369 | #ifdef ARCH_s390 |
370 | case bfd_arch_s390: | |
371 | disassemble = print_insn_s390; | |
372 | break; | |
373 | #endif | |
1c0d3aa6 NC |
374 | #ifdef ARCH_score |
375 | case bfd_arch_score: | |
376 | if (bfd_big_endian (abfd)) | |
6ca4eb77 | 377 | disassemble = print_insn_big_score; |
1c0d3aa6 | 378 | else |
6ca4eb77 | 379 | disassemble = print_insn_little_score; |
1c0d3aa6 NC |
380 | break; |
381 | #endif | |
252b5132 RH |
382 | #ifdef ARCH_sh |
383 | case bfd_arch_sh: | |
1c509ca8 | 384 | disassemble = print_insn_sh; |
252b5132 RH |
385 | break; |
386 | #endif | |
387 | #ifdef ARCH_sparc | |
388 | case bfd_arch_sparc: | |
389 | disassemble = print_insn_sparc; | |
390 | break; | |
391 | #endif | |
e9f53129 AM |
392 | #ifdef ARCH_spu |
393 | case bfd_arch_spu: | |
394 | disassemble = print_insn_spu; | |
395 | break; | |
396 | #endif | |
252b5132 RH |
397 | #ifdef ARCH_tic30 |
398 | case bfd_arch_tic30: | |
399 | disassemble = print_insn_tic30; | |
400 | break; | |
401 | #endif | |
026df7c5 NC |
402 | #ifdef ARCH_tic4x |
403 | case bfd_arch_tic4x: | |
404 | disassemble = print_insn_tic4x; | |
405 | break; | |
406 | #endif | |
5c84d377 TW |
407 | #ifdef ARCH_tic54x |
408 | case bfd_arch_tic54x: | |
409 | disassemble = print_insn_tic54x; | |
410 | break; | |
411 | #endif | |
40b36596 JM |
412 | #ifdef ARCH_tic6x |
413 | case bfd_arch_tic6x: | |
414 | disassemble = print_insn_tic6x; | |
415 | break; | |
416 | #endif | |
252b5132 RH |
417 | #ifdef ARCH_tic80 |
418 | case bfd_arch_tic80: | |
419 | disassemble = print_insn_tic80; | |
420 | break; | |
421 | #endif | |
422 | #ifdef ARCH_v850 | |
423 | case bfd_arch_v850: | |
424 | disassemble = print_insn_v850; | |
425 | break; | |
426 | #endif | |
427 | #ifdef ARCH_w65 | |
428 | case bfd_arch_w65: | |
429 | disassemble = print_insn_w65; | |
430 | break; | |
431 | #endif | |
93fbbb04 GK |
432 | #ifdef ARCH_xstormy16 |
433 | case bfd_arch_xstormy16: | |
434 | disassemble = print_insn_xstormy16; | |
435 | break; | |
436 | #endif | |
d70c5fc7 NC |
437 | #ifdef ARCH_xc16x |
438 | case bfd_arch_xc16x: | |
439 | disassemble = print_insn_xc16x; | |
440 | break; | |
441 | #endif | |
e0001a05 NC |
442 | #ifdef ARCH_xtensa |
443 | case bfd_arch_xtensa: | |
444 | disassemble = print_insn_xtensa; | |
445 | break; | |
446 | #endif | |
3c9b82ba NC |
447 | #ifdef ARCH_z80 |
448 | case bfd_arch_z80: | |
449 | disassemble = print_insn_z80; | |
450 | break; | |
451 | #endif | |
252b5132 RH |
452 | #ifdef ARCH_z8k |
453 | case bfd_arch_z8k: | |
454 | if (bfd_get_mach(abfd) == bfd_mach_z8001) | |
455 | disassemble = print_insn_z8001; | |
b7ed8fad | 456 | else |
252b5132 RH |
457 | disassemble = print_insn_z8002; |
458 | break; | |
459 | #endif | |
460 | #ifdef ARCH_vax | |
461 | case bfd_arch_vax: | |
462 | disassemble = print_insn_vax; | |
463 | break; | |
fd3c93d5 DB |
464 | #endif |
465 | #ifdef ARCH_frv | |
466 | case bfd_arch_frv: | |
467 | disassemble = print_insn_frv; | |
468 | break; | |
47b1a55a | 469 | #endif |
59b1530d AG |
470 | #ifdef ARCH_moxie |
471 | case bfd_arch_moxie: | |
472 | disassemble = print_insn_moxie; | |
473 | break; | |
474 | #endif | |
47b1a55a SC |
475 | #ifdef ARCH_iq2000 |
476 | case bfd_arch_iq2000: | |
477 | disassemble = print_insn_iq2000; | |
478 | break; | |
49f58d10 JB |
479 | #endif |
480 | #ifdef ARCH_m32c | |
481 | case bfd_arch_m32c: | |
482 | disassemble = print_insn_m32c; | |
483 | break; | |
aa137e4d NC |
484 | #endif |
485 | #ifdef ARCH_tilegx | |
486 | case bfd_arch_tilegx: | |
487 | disassemble = print_insn_tilegx; | |
488 | break; | |
489 | #endif | |
490 | #ifdef ARCH_tilepro | |
491 | case bfd_arch_tilepro: | |
492 | disassemble = print_insn_tilepro; | |
493 | break; | |
252b5132 RH |
494 | #endif |
495 | default: | |
496 | return 0; | |
497 | } | |
498 | return disassemble; | |
499 | } | |
94470b23 NC |
500 | |
501 | void | |
9aaaa291 | 502 | disassembler_usage (stream) |
7f32bebc | 503 | FILE * stream ATTRIBUTE_UNUSED; |
94470b23 | 504 | { |
58efb6c0 NC |
505 | #ifdef ARCH_arm |
506 | print_arm_disassembler_options (stream); | |
507 | #endif | |
640c0ccd CD |
508 | #ifdef ARCH_mips |
509 | print_mips_disassembler_options (stream); | |
510 | #endif | |
07dd56a9 NC |
511 | #ifdef ARCH_powerpc |
512 | print_ppc_disassembler_options (stream); | |
513 | #endif | |
f59a29b9 L |
514 | #ifdef ARCH_i386 |
515 | print_i386_disassembler_options (stream); | |
516 | #endif | |
112b7c50 AK |
517 | #ifdef ARCH_s390 |
518 | print_s390_disassembler_options (stream); | |
519 | #endif | |
b7ed8fad | 520 | |
94470b23 NC |
521 | return; |
522 | } | |
22a398e1 NC |
523 | |
524 | void | |
525 | disassemble_init_for_target (struct disassemble_info * info) | |
526 | { | |
527 | if (info == NULL) | |
528 | return; | |
529 | ||
530 | switch (info->arch) | |
531 | { | |
532 | #ifdef ARCH_arm | |
533 | case bfd_arch_arm: | |
534 | info->symbol_is_valid = arm_symbol_is_valid; | |
d99b6465 | 535 | info->disassembler_needs_relocs = TRUE; |
22a398e1 | 536 | break; |
0bcb06d2 AS |
537 | #endif |
538 | #ifdef ARCH_ia64 | |
539 | case bfd_arch_ia64: | |
540 | info->skip_zeroes = 16; | |
541 | break; | |
542 | #endif | |
543 | #ifdef ARCH_tic4x | |
544 | case bfd_arch_tic4x: | |
545 | info->skip_zeroes = 32; | |
fb53f5a8 | 546 | break; |
49f58d10 | 547 | #endif |
bd2f2e55 DB |
548 | #ifdef ARCH_mep |
549 | case bfd_arch_mep: | |
550 | info->skip_zeroes = 256; | |
551 | info->skip_zeroes_at_end = 0; | |
552 | break; | |
553 | #endif | |
49f58d10 JB |
554 | #ifdef ARCH_m32c |
555 | case bfd_arch_m32c: | |
6ca4eb77 AM |
556 | /* This processor in fact is little endian. The value set here |
557 | reflects the way opcodes are written in the cgen description. */ | |
49f58d10 | 558 | info->endian = BFD_ENDIAN_BIG; |
fb53f5a8 DB |
559 | if (! info->insn_sets) |
560 | { | |
561 | info->insn_sets = cgen_bitset_create (ISA_MAX); | |
562 | if (info->mach == bfd_mach_m16c) | |
563 | cgen_bitset_set (info->insn_sets, ISA_M16C); | |
564 | else | |
565 | cgen_bitset_set (info->insn_sets, ISA_M32C); | |
566 | } | |
49f58d10 | 567 | break; |
22a398e1 NC |
568 | #endif |
569 | default: | |
570 | break; | |
571 | } | |
572 | } |