Fix the mask for the sqrdml(a|s)h instructions.
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
219d1afa 2 Copyright (C) 1994-2018 Free Software Foundation, Inc.
252b5132 3
9b201bb5
NC
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7499d566 7 it under the terms of the GNU General Public License as published by
9b201bb5 8 the Free Software Foundation; either version 3 of the License, or
7499d566 9 (at your option) any later version.
252b5132 10
7499d566
NC
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
252b5132 15
7499d566
NC
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
9b201bb5
NC
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
0d8dfecf 21#include "sysdep.h"
88c1242d 22#include "disassemble.h"
65b48a81 23#include "safe-ctype.h"
003ca0fd 24#include <assert.h>
252b5132
RH
25
26#ifdef ARCH_all
a06ea964 27#define ARCH_aarch64
252b5132
RH
28#define ARCH_alpha
29#define ARCH_arc
30#define ARCH_arm
adde6300 31#define ARCH_avr
4b7f6baa 32#define ARCH_bfin
3d3d428f 33#define ARCH_cr16
6c95a37f 34#define ARCH_cris
1fe1f39c 35#define ARCH_crx
252b5132
RH
36#define ARCH_d10v
37#define ARCH_d30v
d172d4ba 38#define ARCH_dlx
56b13185 39#define ARCH_epiphany
e729279b
NC
40#define ARCH_fr30
41#define ARCH_frv
3f8107ab 42#define ARCH_ft32
252b5132 43#define ARCH_h8300
252b5132
RH
44#define ARCH_hppa
45#define ARCH_i386
800eeca4 46#define ARCH_ia64
e729279b
NC
47#define ARCH_ip2k
48#define ARCH_iq2000
84e94c90 49#define ARCH_lm32
e729279b 50#define ARCH_m32c
252b5132 51#define ARCH_m32r
60bcf0fa
NC
52#define ARCH_m68hc11
53#define ARCH_m68hc12
e729279b 54#define ARCH_m68k
252b5132 55#define ARCH_mcore
bd2f2e55 56#define ARCH_mep
a3c62988 57#define ARCH_metag
7ba29e2a 58#define ARCH_microblaze
252b5132 59#define ARCH_mips
3c3bdf30 60#define ARCH_mmix
252b5132
RH
61#define ARCH_mn10200
62#define ARCH_mn10300
59b1530d 63#define ARCH_moxie
d031aafb 64#define ARCH_mt
2469cfa2 65#define ARCH_msp430
35c08157 66#define ARCH_nds32
36591ba1 67#define ARCH_nios2
252b5132 68#define ARCH_ns32k
73589c9d 69#define ARCH_or1k
e135f41b 70#define ARCH_pdp11
1e608f98 71#define ARCH_pj
252b5132 72#define ARCH_powerpc
11146849 73#define ARCH_pru
0bccfb29 74#define ARCH_riscv
252b5132 75#define ARCH_rs6000
99c513f6 76#define ARCH_rl78
c7927a3c 77#define ARCH_rx
a85d7ed0 78#define ARCH_s390
1c0d3aa6 79#define ARCH_score
252b5132
RH
80#define ARCH_sh
81#define ARCH_sparc
e9f53129 82#define ARCH_spu
252b5132 83#define ARCH_tic30
026df7c5 84#define ARCH_tic4x
5c84d377 85#define ARCH_tic54x
40b36596 86#define ARCH_tic6x
252b5132 87#define ARCH_tic80
aa137e4d
NC
88#define ARCH_tilegx
89#define ARCH_tilepro
252b5132
RH
90#define ARCH_v850
91#define ARCH_vax
1945cfa5 92#define ARCH_visium
62ecb94c 93#define ARCH_wasm32
93fbbb04 94#define ARCH_xstormy16
d70c5fc7 95#define ARCH_xc16x
f6c1a2d5 96#define ARCH_xgate
e0001a05 97#define ARCH_xtensa
3c9b82ba 98#define ARCH_z80
252b5132
RH
99#define ARCH_z8k
100#endif
101
49f58d10
JB
102#ifdef ARCH_m32c
103#include "m32c-desc.h"
104#endif
252b5132
RH
105
106disassembler_ftype
b28b8b5e
L
107disassembler (enum bfd_architecture a,
108 bfd_boolean big ATTRIBUTE_UNUSED,
109 unsigned long mach ATTRIBUTE_UNUSED,
e347efc3 110 bfd *abfd ATTRIBUTE_UNUSED)
252b5132 111{
252b5132
RH
112 disassembler_ftype disassemble;
113
114 switch (a)
115 {
116 /* If you add a case to this table, also add it to the
117 ARCH_all definition right above this function. */
a06ea964
NC
118#ifdef ARCH_aarch64
119 case bfd_arch_aarch64:
120 disassemble = print_insn_aarch64;
121 break;
122#endif
252b5132
RH
123#ifdef ARCH_alpha
124 case bfd_arch_alpha:
125 disassemble = print_insn_alpha;
126 break;
127#endif
128#ifdef ARCH_arc
129 case bfd_arch_arc:
6ca4eb77
AM
130 disassemble = arc_get_disassembler (abfd);
131 break;
252b5132
RH
132#endif
133#ifdef ARCH_arm
134 case bfd_arch_arm:
003ca0fd 135 if (big)
252b5132
RH
136 disassemble = print_insn_big_arm;
137 else
138 disassemble = print_insn_little_arm;
139 break;
140#endif
adde6300
AM
141#ifdef ARCH_avr
142 case bfd_arch_avr:
143 disassemble = print_insn_avr;
144 break;
145#endif
4b7f6baa
CM
146#ifdef ARCH_bfin
147 case bfd_arch_bfin:
148 disassemble = print_insn_bfin;
149 break;
150#endif
3d3d428f
NC
151#ifdef ARCH_cr16
152 case bfd_arch_cr16:
153 disassemble = print_insn_cr16;
154 break;
155#endif
6c95a37f
HPN
156#ifdef ARCH_cris
157 case bfd_arch_cris:
78966507 158 disassemble = cris_get_disassembler (abfd);
6c95a37f 159 break;
1fe1f39c
NC
160#endif
161#ifdef ARCH_crx
162 case bfd_arch_crx:
163 disassemble = print_insn_crx;
164 break;
6c95a37f 165#endif
252b5132
RH
166#ifdef ARCH_d10v
167 case bfd_arch_d10v:
168 disassemble = print_insn_d10v;
169 break;
170#endif
171#ifdef ARCH_d30v
172 case bfd_arch_d30v:
173 disassemble = print_insn_d30v;
174 break;
175#endif
d172d4ba
NC
176#ifdef ARCH_dlx
177 case bfd_arch_dlx:
178 /* As far as I know we only handle big-endian DLX objects. */
179 disassemble = print_insn_dlx;
180 break;
181#endif
252b5132
RH
182#ifdef ARCH_h8300
183 case bfd_arch_h8300:
003ca0fd 184 if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
252b5132 185 disassemble = print_insn_h8300h;
003ca0fd
YQ
186 else if (mach == bfd_mach_h8300s
187 || mach == bfd_mach_h8300sn
188 || mach == bfd_mach_h8300sx
189 || mach == bfd_mach_h8300sxn)
252b5132 190 disassemble = print_insn_h8300s;
b7ed8fad 191 else
252b5132
RH
192 disassemble = print_insn_h8300;
193 break;
194#endif
252b5132
RH
195#ifdef ARCH_hppa
196 case bfd_arch_hppa:
197 disassemble = print_insn_hppa;
198 break;
199#endif
200#ifdef ARCH_i386
201 case bfd_arch_i386:
7b6d09fb 202 case bfd_arch_iamcu:
8a9036a4 203 case bfd_arch_l1om:
7a9068fe 204 case bfd_arch_k1om:
e396998b 205 disassemble = print_insn_i386;
252b5132
RH
206 break;
207#endif
800eeca4
JW
208#ifdef ARCH_ia64
209 case bfd_arch_ia64:
210 disassemble = print_insn_ia64;
211 break;
212#endif
a40cbfa3
NC
213#ifdef ARCH_ip2k
214 case bfd_arch_ip2k:
215 disassemble = print_insn_ip2k;
216 break;
217#endif
cfb8c092
NC
218#ifdef ARCH_epiphany
219 case bfd_arch_epiphany:
220 disassemble = print_insn_epiphany;
221 break;
222#endif
252b5132
RH
223#ifdef ARCH_fr30
224 case bfd_arch_fr30:
225 disassemble = print_insn_fr30;
226 break;
227#endif
84e94c90
NC
228#ifdef ARCH_lm32
229 case bfd_arch_lm32:
230 disassemble = print_insn_lm32;
231 break;
232#endif
252b5132
RH
233#ifdef ARCH_m32r
234 case bfd_arch_m32r:
235 disassemble = print_insn_m32r;
236 break;
237#endif
6927f982
NC
238#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
239 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
60bcf0fa
NC
240 case bfd_arch_m68hc11:
241 disassemble = print_insn_m68hc11;
242 break;
243 case bfd_arch_m68hc12:
244 disassemble = print_insn_m68hc12;
245 break;
6927f982
NC
246 case bfd_arch_m9s12x:
247 disassemble = print_insn_m9s12x;
248 break;
249 case bfd_arch_m9s12xg:
250 disassemble = print_insn_m9s12xg;
251 break;
60bcf0fa 252#endif
252b5132
RH
253#ifdef ARCH_m68k
254 case bfd_arch_m68k:
255 disassemble = print_insn_m68k;
256 break;
257#endif
d031aafb
NS
258#ifdef ARCH_mt
259 case bfd_arch_mt:
260 disassemble = print_insn_mt;
ac188222
DB
261 break;
262#endif
7ba29e2a
NC
263#ifdef ARCH_microblaze
264 case bfd_arch_microblaze:
265 disassemble = print_insn_microblaze;
266 break;
267#endif
2469cfa2
NC
268#ifdef ARCH_msp430
269 case bfd_arch_msp430:
270 disassemble = print_insn_msp430;
271 break;
272#endif
35c08157
KLC
273#ifdef ARCH_nds32
274 case bfd_arch_nds32:
275 disassemble = print_insn_nds32;
276 break;
277#endif
252b5132
RH
278#ifdef ARCH_ns32k
279 case bfd_arch_ns32k:
280 disassemble = print_insn_ns32k;
281 break;
282#endif
283#ifdef ARCH_mcore
284 case bfd_arch_mcore:
285 disassemble = print_insn_mcore;
286 break;
287#endif
bd2f2e55
DB
288#ifdef ARCH_mep
289 case bfd_arch_mep:
290 disassemble = print_insn_mep;
291 break;
292#endif
a3c62988
NC
293#ifdef ARCH_metag
294 case bfd_arch_metag:
295 disassemble = print_insn_metag;
296 break;
297#endif
252b5132
RH
298#ifdef ARCH_mips
299 case bfd_arch_mips:
003ca0fd 300 if (big)
252b5132
RH
301 disassemble = print_insn_big_mips;
302 else
303 disassemble = print_insn_little_mips;
304 break;
305#endif
3c3bdf30
NC
306#ifdef ARCH_mmix
307 case bfd_arch_mmix:
308 disassemble = print_insn_mmix;
309 break;
310#endif
252b5132
RH
311#ifdef ARCH_mn10200
312 case bfd_arch_mn10200:
313 disassemble = print_insn_mn10200;
314 break;
315#endif
316#ifdef ARCH_mn10300
317 case bfd_arch_mn10300:
318 disassemble = print_insn_mn10300;
319 break;
320#endif
36591ba1
SL
321#ifdef ARCH_nios2
322 case bfd_arch_nios2:
003ca0fd 323 if (big)
36591ba1
SL
324 disassemble = print_insn_big_nios2;
325 else
326 disassemble = print_insn_little_nios2;
327 break;
328#endif
73589c9d
CS
329#ifdef ARCH_or1k
330 case bfd_arch_or1k:
331 disassemble = print_insn_or1k;
3b16e843
NC
332 break;
333#endif
e135f41b
NC
334#ifdef ARCH_pdp11
335 case bfd_arch_pdp11:
336 disassemble = print_insn_pdp11;
337 break;
338#endif
1e608f98
ILT
339#ifdef ARCH_pj
340 case bfd_arch_pj:
341 disassemble = print_insn_pj;
342 break;
343#endif
252b5132
RH
344#ifdef ARCH_powerpc
345 case bfd_arch_powerpc:
52fe4420
AM
346#endif
347#ifdef ARCH_rs6000
348 case bfd_arch_rs6000:
349#endif
350#if defined ARCH_powerpc || defined ARCH_rs6000
003ca0fd 351 if (big)
252b5132
RH
352 disassemble = print_insn_big_powerpc;
353 else
354 disassemble = print_insn_little_powerpc;
355 break;
356#endif
11146849
DD
357#ifdef ARCH_pru
358 case bfd_arch_pru:
359 disassemble = print_insn_pru;
360 break;
361#endif
e23eba97
NC
362#ifdef ARCH_riscv
363 case bfd_arch_riscv:
364 disassemble = print_insn_riscv;
ae4c0df4 365 break;
e23eba97 366#endif
99c513f6
DD
367#ifdef ARCH_rl78
368 case bfd_arch_rl78:
0952813b 369 disassemble = rl78_get_disassembler (abfd);
99c513f6
DD
370 break;
371#endif
c7927a3c
NC
372#ifdef ARCH_rx
373 case bfd_arch_rx:
374 disassemble = print_insn_rx;
375 break;
376#endif
a85d7ed0
NC
377#ifdef ARCH_s390
378 case bfd_arch_s390:
379 disassemble = print_insn_s390;
380 break;
381#endif
1c0d3aa6
NC
382#ifdef ARCH_score
383 case bfd_arch_score:
003ca0fd 384 if (big)
6ca4eb77 385 disassemble = print_insn_big_score;
1c0d3aa6 386 else
6ca4eb77 387 disassemble = print_insn_little_score;
1c0d3aa6
NC
388 break;
389#endif
252b5132
RH
390#ifdef ARCH_sh
391 case bfd_arch_sh:
1c509ca8 392 disassemble = print_insn_sh;
252b5132
RH
393 break;
394#endif
395#ifdef ARCH_sparc
396 case bfd_arch_sparc:
397 disassemble = print_insn_sparc;
398 break;
399#endif
e9f53129
AM
400#ifdef ARCH_spu
401 case bfd_arch_spu:
402 disassemble = print_insn_spu;
403 break;
404#endif
252b5132
RH
405#ifdef ARCH_tic30
406 case bfd_arch_tic30:
407 disassemble = print_insn_tic30;
408 break;
409#endif
026df7c5
NC
410#ifdef ARCH_tic4x
411 case bfd_arch_tic4x:
412 disassemble = print_insn_tic4x;
413 break;
414#endif
5c84d377
TW
415#ifdef ARCH_tic54x
416 case bfd_arch_tic54x:
417 disassemble = print_insn_tic54x;
418 break;
419#endif
40b36596
JM
420#ifdef ARCH_tic6x
421 case bfd_arch_tic6x:
422 disassemble = print_insn_tic6x;
423 break;
424#endif
252b5132
RH
425#ifdef ARCH_tic80
426 case bfd_arch_tic80:
427 disassemble = print_insn_tic80;
428 break;
429#endif
3f8107ab
AM
430#ifdef ARCH_ft32
431 case bfd_arch_ft32:
432 disassemble = print_insn_ft32;
433 break;
434#endif
252b5132
RH
435#ifdef ARCH_v850
436 case bfd_arch_v850:
de863c74 437 case bfd_arch_v850_rh850:
252b5132
RH
438 disassemble = print_insn_v850;
439 break;
440#endif
62ecb94c
PC
441#ifdef ARCH_wasm32
442 case bfd_arch_wasm32:
443 disassemble = print_insn_wasm32;
444 break;
445#endif
f6c1a2d5
NC
446#ifdef ARCH_xgate
447 case bfd_arch_xgate:
448 disassemble = print_insn_xgate;
449 break;
450#endif
93fbbb04
GK
451#ifdef ARCH_xstormy16
452 case bfd_arch_xstormy16:
453 disassemble = print_insn_xstormy16;
454 break;
455#endif
d70c5fc7
NC
456#ifdef ARCH_xc16x
457 case bfd_arch_xc16x:
458 disassemble = print_insn_xc16x;
459 break;
460#endif
e0001a05
NC
461#ifdef ARCH_xtensa
462 case bfd_arch_xtensa:
463 disassemble = print_insn_xtensa;
464 break;
465#endif
3c9b82ba
NC
466#ifdef ARCH_z80
467 case bfd_arch_z80:
468 disassemble = print_insn_z80;
469 break;
470#endif
252b5132
RH
471#ifdef ARCH_z8k
472 case bfd_arch_z8k:
003ca0fd 473 if (mach == bfd_mach_z8001)
252b5132 474 disassemble = print_insn_z8001;
b7ed8fad 475 else
252b5132
RH
476 disassemble = print_insn_z8002;
477 break;
478#endif
479#ifdef ARCH_vax
480 case bfd_arch_vax:
481 disassemble = print_insn_vax;
482 break;
fd3c93d5 483#endif
1945cfa5
EB
484#ifdef ARCH_visium
485 case bfd_arch_visium:
486 disassemble = print_insn_visium;
487 break;
488#endif
fd3c93d5
DB
489#ifdef ARCH_frv
490 case bfd_arch_frv:
491 disassemble = print_insn_frv;
492 break;
47b1a55a 493#endif
59b1530d
AG
494#ifdef ARCH_moxie
495 case bfd_arch_moxie:
496 disassemble = print_insn_moxie;
497 break;
498#endif
47b1a55a
SC
499#ifdef ARCH_iq2000
500 case bfd_arch_iq2000:
501 disassemble = print_insn_iq2000;
502 break;
49f58d10
JB
503#endif
504#ifdef ARCH_m32c
505 case bfd_arch_m32c:
506 disassemble = print_insn_m32c;
507 break;
aa137e4d
NC
508#endif
509#ifdef ARCH_tilegx
510 case bfd_arch_tilegx:
511 disassemble = print_insn_tilegx;
512 break;
513#endif
514#ifdef ARCH_tilepro
515 case bfd_arch_tilepro:
516 disassemble = print_insn_tilepro;
517 break;
252b5132
RH
518#endif
519 default:
520 return 0;
521 }
522 return disassemble;
523}
94470b23
NC
524
525void
e6c7cdec 526disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
94470b23 527{
a06ea964
NC
528#ifdef ARCH_aarch64
529 print_aarch64_disassembler_options (stream);
530#endif
37fd5ef3
CZ
531#ifdef ARCH_arc
532 print_arc_disassembler_options (stream);
533#endif
58efb6c0
NC
534#ifdef ARCH_arm
535 print_arm_disassembler_options (stream);
536#endif
640c0ccd
CD
537#ifdef ARCH_mips
538 print_mips_disassembler_options (stream);
539#endif
07dd56a9
NC
540#ifdef ARCH_powerpc
541 print_ppc_disassembler_options (stream);
542#endif
e23eba97
NC
543#ifdef ARCH_riscv
544 print_riscv_disassembler_options (stream);
545#endif
f59a29b9
L
546#ifdef ARCH_i386
547 print_i386_disassembler_options (stream);
548#endif
112b7c50
AK
549#ifdef ARCH_s390
550 print_s390_disassembler_options (stream);
551#endif
62ecb94c
PC
552#ifdef ARCH_wasm32
553 print_wasm32_disassembler_options (stream);
554#endif
b7ed8fad 555
94470b23
NC
556 return;
557}
22a398e1
NC
558
559void
560disassemble_init_for_target (struct disassemble_info * info)
561{
562 if (info == NULL)
563 return;
564
565 switch (info->arch)
566 {
a06ea964
NC
567#ifdef ARCH_aarch64
568 case bfd_arch_aarch64:
569 info->symbol_is_valid = aarch64_symbol_is_valid;
570 info->disassembler_needs_relocs = TRUE;
571 break;
572#endif
22a398e1
NC
573#ifdef ARCH_arm
574 case bfd_arch_arm:
575 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 576 info->disassembler_needs_relocs = TRUE;
22a398e1 577 break;
0bcb06d2
AS
578#endif
579#ifdef ARCH_ia64
580 case bfd_arch_ia64:
581 info->skip_zeroes = 16;
582 break;
583#endif
584#ifdef ARCH_tic4x
585 case bfd_arch_tic4x:
586 info->skip_zeroes = 32;
fb53f5a8 587 break;
49f58d10 588#endif
bd2f2e55
DB
589#ifdef ARCH_mep
590 case bfd_arch_mep:
591 info->skip_zeroes = 256;
592 info->skip_zeroes_at_end = 0;
593 break;
594#endif
a3c62988
NC
595#ifdef ARCH_metag
596 case bfd_arch_metag:
597 info->disassembler_needs_relocs = TRUE;
598 break;
599#endif
49f58d10
JB
600#ifdef ARCH_m32c
601 case bfd_arch_m32c:
6ca4eb77
AM
602 /* This processor in fact is little endian. The value set here
603 reflects the way opcodes are written in the cgen description. */
49f58d10 604 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB
605 if (! info->insn_sets)
606 {
607 info->insn_sets = cgen_bitset_create (ISA_MAX);
608 if (info->mach == bfd_mach_m16c)
609 cgen_bitset_set (info->insn_sets, ISA_M16C);
610 else
611 cgen_bitset_set (info->insn_sets, ISA_M32C);
612 }
49f58d10 613 break;
b240011a 614#endif
024d185c
DD
615#ifdef ARCH_pru
616 case bfd_arch_pru:
617 info->disassembler_needs_relocs = TRUE;
618 break;
619#endif
fbc22555
DD
620#ifdef ARCH_powerpc
621 case bfd_arch_powerpc:
622#endif
b240011a
AM
623#ifdef ARCH_rs6000
624 case bfd_arch_rs6000:
625#endif
626#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
627 disassemble_init_powerpc (info);
628 break;
65b48a81 629#endif
62ecb94c
PC
630#ifdef ARCH_wasm32
631 case bfd_arch_wasm32:
632 disassemble_init_wasm32 (info);
633 break;
634#endif
65b48a81
PB
635#ifdef ARCH_s390
636 case bfd_arch_s390:
637 disassemble_init_s390 (info);
638 break;
22a398e1
NC
639#endif
640 default:
641 break;
642 }
643}
65b48a81
PB
644
645/* Remove whitespace and consecutive commas from OPTIONS. */
646
647char *
648remove_whitespace_and_extra_commas (char *options)
649{
650 char *str;
651 size_t i, len;
652
653 if (options == NULL)
654 return NULL;
655
656 /* Strip off all trailing whitespace and commas. */
657 for (len = strlen (options); len > 0; len--)
658 {
659 if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
660 break;
661 options[len - 1] = '\0';
662 }
663
664 /* Convert all remaining whitespace to commas. */
665 for (i = 0; options[i] != '\0'; i++)
666 if (ISSPACE (options[i]))
667 options[i] = ',';
668
669 /* Remove consecutive commas. */
670 for (str = options; *str != '\0'; str++)
671 if (*str == ',' && (*(str + 1) == ',' || str == options))
672 {
673 char *next = str + 1;
674 while (*next == ',')
675 next++;
676 len = strlen (next);
677 if (str != options)
678 str++;
679 memmove (str, next, len);
680 next[len - (size_t)(next - str)] = '\0';
681 }
682 return (strlen (options) != 0) ? options : NULL;
683}
684
685/* Like STRCMP, but treat ',' the same as '\0' so that we match
686 strings like "foobar" against "foobar,xxyyzz,...". */
687
688int
689disassembler_options_cmp (const char *s1, const char *s2)
690{
691 unsigned char c1, c2;
692
693 do
694 {
695 c1 = (unsigned char) *s1++;
696 if (c1 == ',')
697 c1 = '\0';
698 c2 = (unsigned char) *s2++;
699 if (c2 == ',')
700 c2 = '\0';
701 if (c1 == '\0')
702 return c1 - c2;
703 }
704 while (c1 == c2);
705
706 return c1 - c2;
707}
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