Really commit it... dunno what happened last time.
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
3b16e843 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
5b93d8bb 3 Free Software Foundation, Inc.
252b5132
RH
4
5This program is free software; you can redistribute it and/or modify
6it under the terms of the GNU General Public License as published by
7the Free Software Foundation; either version 2 of the License, or
8(at your option) any later version.
9
10This program is distributed in the hope that it will be useful,
11but WITHOUT ANY WARRANTY; without even the implied warranty of
12MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13GNU General Public License for more details.
14
15You should have received a copy of the GNU General Public License
16along with this program; if not, write to the Free Software
17Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
18
0d8dfecf 19#include "sysdep.h"
252b5132
RH
20#include "dis-asm.h"
21
22#ifdef ARCH_all
23#define ARCH_a29k
24#define ARCH_alpha
25#define ARCH_arc
26#define ARCH_arm
adde6300 27#define ARCH_avr
6c95a37f 28#define ARCH_cris
252b5132
RH
29#define ARCH_d10v
30#define ARCH_d30v
d172d4ba 31#define ARCH_dlx
252b5132
RH
32#define ARCH_h8300
33#define ARCH_h8500
34#define ARCH_hppa
5b93d8bb 35#define ARCH_i370
252b5132 36#define ARCH_i386
9d751335 37#define ARCH_i860
252b5132 38#define ARCH_i960
a40cbfa3 39#define ARCH_ip2k
800eeca4 40#define ARCH_ia64
252b5132
RH
41#define ARCH_fr30
42#define ARCH_m32r
43#define ARCH_m68k
60bcf0fa
NC
44#define ARCH_m68hc11
45#define ARCH_m68hc12
252b5132
RH
46#define ARCH_m88k
47#define ARCH_mcore
48#define ARCH_mips
3c3bdf30 49#define ARCH_mmix
252b5132
RH
50#define ARCH_mn10200
51#define ARCH_mn10300
2469cfa2 52#define ARCH_msp430
252b5132 53#define ARCH_ns32k
87e6d782 54#define ARCH_openrisc
3b16e843 55#define ARCH_or32
e135f41b 56#define ARCH_pdp11
1e608f98 57#define ARCH_pj
252b5132
RH
58#define ARCH_powerpc
59#define ARCH_rs6000
a85d7ed0 60#define ARCH_s390
252b5132
RH
61#define ARCH_sh
62#define ARCH_sparc
63#define ARCH_tic30
026df7c5 64#define ARCH_tic4x
5c84d377 65#define ARCH_tic54x
252b5132
RH
66#define ARCH_tic80
67#define ARCH_v850
68#define ARCH_vax
69#define ARCH_w65
93fbbb04 70#define ARCH_xstormy16
252b5132 71#define ARCH_z8k
fd3c93d5 72#define ARCH_frv
47b1a55a 73#define ARCH_iq2000
d28847ce 74#define INCLUDE_SHMEDIA
252b5132
RH
75#endif
76
77
78disassembler_ftype
79disassembler (abfd)
80 bfd *abfd;
81{
82 enum bfd_architecture a = bfd_get_arch (abfd);
83 disassembler_ftype disassemble;
84
85 switch (a)
86 {
87 /* If you add a case to this table, also add it to the
88 ARCH_all definition right above this function. */
89#ifdef ARCH_a29k
90 case bfd_arch_a29k:
91 /* As far as I know we only handle big-endian 29k objects. */
92 disassemble = print_insn_big_a29k;
93 break;
94#endif
95#ifdef ARCH_alpha
96 case bfd_arch_alpha:
97 disassemble = print_insn_alpha;
98 break;
99#endif
100#ifdef ARCH_arc
101 case bfd_arch_arc:
102 {
0d2bcfaf 103 disassemble = arc_get_disassembler (abfd);
252b5132
RH
104 break;
105 }
106#endif
107#ifdef ARCH_arm
108 case bfd_arch_arm:
109 if (bfd_big_endian (abfd))
110 disassemble = print_insn_big_arm;
111 else
112 disassemble = print_insn_little_arm;
113 break;
114#endif
adde6300
AM
115#ifdef ARCH_avr
116 case bfd_arch_avr:
117 disassemble = print_insn_avr;
118 break;
119#endif
6c95a37f
HPN
120#ifdef ARCH_cris
121 case bfd_arch_cris:
78966507 122 disassemble = cris_get_disassembler (abfd);
6c95a37f
HPN
123 break;
124#endif
252b5132
RH
125#ifdef ARCH_d10v
126 case bfd_arch_d10v:
127 disassemble = print_insn_d10v;
128 break;
129#endif
130#ifdef ARCH_d30v
131 case bfd_arch_d30v:
132 disassemble = print_insn_d30v;
133 break;
134#endif
d172d4ba
NC
135#ifdef ARCH_dlx
136 case bfd_arch_dlx:
137 /* As far as I know we only handle big-endian DLX objects. */
138 disassemble = print_insn_dlx;
139 break;
140#endif
252b5132
RH
141#ifdef ARCH_h8300
142 case bfd_arch_h8300:
143 if (bfd_get_mach(abfd) == bfd_mach_h8300h)
144 disassemble = print_insn_h8300h;
145 else if (bfd_get_mach(abfd) == bfd_mach_h8300s)
146 disassemble = print_insn_h8300s;
b7ed8fad 147 else
252b5132
RH
148 disassemble = print_insn_h8300;
149 break;
150#endif
151#ifdef ARCH_h8500
152 case bfd_arch_h8500:
153 disassemble = print_insn_h8500;
154 break;
155#endif
156#ifdef ARCH_hppa
157 case bfd_arch_hppa:
158 disassemble = print_insn_hppa;
159 break;
160#endif
5b93d8bb
AM
161#ifdef ARCH_i370
162 case bfd_arch_i370:
163 disassemble = print_insn_i370;
164 break;
165#endif
252b5132
RH
166#ifdef ARCH_i386
167 case bfd_arch_i386:
e396998b 168 disassemble = print_insn_i386;
252b5132
RH
169 break;
170#endif
9d751335
JE
171#ifdef ARCH_i860
172 case bfd_arch_i860:
173 disassemble = print_insn_i860;
174 break;
175#endif
252b5132
RH
176#ifdef ARCH_i960
177 case bfd_arch_i960:
178 disassemble = print_insn_i960;
179 break;
180#endif
800eeca4
JW
181#ifdef ARCH_ia64
182 case bfd_arch_ia64:
183 disassemble = print_insn_ia64;
184 break;
185#endif
a40cbfa3
NC
186#ifdef ARCH_ip2k
187 case bfd_arch_ip2k:
188 disassemble = print_insn_ip2k;
189 break;
190#endif
252b5132
RH
191#ifdef ARCH_fr30
192 case bfd_arch_fr30:
193 disassemble = print_insn_fr30;
194 break;
195#endif
196#ifdef ARCH_m32r
197 case bfd_arch_m32r:
198 disassemble = print_insn_m32r;
199 break;
200#endif
60bcf0fa
NC
201#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
202 case bfd_arch_m68hc11:
203 disassemble = print_insn_m68hc11;
204 break;
205 case bfd_arch_m68hc12:
206 disassemble = print_insn_m68hc12;
207 break;
208#endif
252b5132
RH
209#ifdef ARCH_m68k
210 case bfd_arch_m68k:
211 disassemble = print_insn_m68k;
212 break;
213#endif
214#ifdef ARCH_m88k
215 case bfd_arch_m88k:
216 disassemble = print_insn_m88k;
217 break;
218#endif
2469cfa2
NC
219#ifdef ARCH_msp430
220 case bfd_arch_msp430:
221 disassemble = print_insn_msp430;
222 break;
223#endif
252b5132
RH
224#ifdef ARCH_ns32k
225 case bfd_arch_ns32k:
226 disassemble = print_insn_ns32k;
227 break;
228#endif
229#ifdef ARCH_mcore
230 case bfd_arch_mcore:
231 disassemble = print_insn_mcore;
232 break;
233#endif
234#ifdef ARCH_mips
235 case bfd_arch_mips:
236 if (bfd_big_endian (abfd))
237 disassemble = print_insn_big_mips;
238 else
239 disassemble = print_insn_little_mips;
240 break;
241#endif
3c3bdf30
NC
242#ifdef ARCH_mmix
243 case bfd_arch_mmix:
244 disassemble = print_insn_mmix;
245 break;
246#endif
252b5132
RH
247#ifdef ARCH_mn10200
248 case bfd_arch_mn10200:
249 disassemble = print_insn_mn10200;
250 break;
251#endif
252#ifdef ARCH_mn10300
253 case bfd_arch_mn10300:
254 disassemble = print_insn_mn10300;
255 break;
256#endif
87e6d782
NC
257#ifdef ARCH_openrisc
258 case bfd_arch_openrisc:
259 disassemble = print_insn_openrisc;
260 break;
261#endif
3b16e843
NC
262#ifdef ARCH_or32
263 case bfd_arch_or32:
264 if (bfd_big_endian (abfd))
265 disassemble = print_insn_big_or32;
266 else
267 disassemble = print_insn_little_or32;
268 break;
269#endif
e135f41b
NC
270#ifdef ARCH_pdp11
271 case bfd_arch_pdp11:
272 disassemble = print_insn_pdp11;
273 break;
274#endif
1e608f98
ILT
275#ifdef ARCH_pj
276 case bfd_arch_pj:
277 disassemble = print_insn_pj;
278 break;
279#endif
252b5132
RH
280#ifdef ARCH_powerpc
281 case bfd_arch_powerpc:
282 if (bfd_big_endian (abfd))
283 disassemble = print_insn_big_powerpc;
284 else
285 disassemble = print_insn_little_powerpc;
286 break;
287#endif
288#ifdef ARCH_rs6000
289 case bfd_arch_rs6000:
39c20e8f 290 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
7f6d05e8
CP
291 disassemble = print_insn_big_powerpc;
292 else
293 disassemble = print_insn_rs6000;
252b5132
RH
294 break;
295#endif
a85d7ed0
NC
296#ifdef ARCH_s390
297 case bfd_arch_s390:
298 disassemble = print_insn_s390;
299 break;
300#endif
252b5132
RH
301#ifdef ARCH_sh
302 case bfd_arch_sh:
1c509ca8 303 disassemble = print_insn_sh;
252b5132
RH
304 break;
305#endif
306#ifdef ARCH_sparc
307 case bfd_arch_sparc:
308 disassemble = print_insn_sparc;
309 break;
310#endif
311#ifdef ARCH_tic30
312 case bfd_arch_tic30:
313 disassemble = print_insn_tic30;
314 break;
315#endif
026df7c5
NC
316#ifdef ARCH_tic4x
317 case bfd_arch_tic4x:
318 disassemble = print_insn_tic4x;
319 break;
320#endif
5c84d377
TW
321#ifdef ARCH_tic54x
322 case bfd_arch_tic54x:
323 disassemble = print_insn_tic54x;
324 break;
325#endif
252b5132
RH
326#ifdef ARCH_tic80
327 case bfd_arch_tic80:
328 disassemble = print_insn_tic80;
329 break;
330#endif
331#ifdef ARCH_v850
332 case bfd_arch_v850:
333 disassemble = print_insn_v850;
334 break;
335#endif
336#ifdef ARCH_w65
337 case bfd_arch_w65:
338 disassemble = print_insn_w65;
339 break;
340#endif
93fbbb04
GK
341#ifdef ARCH_xstormy16
342 case bfd_arch_xstormy16:
343 disassemble = print_insn_xstormy16;
344 break;
345#endif
252b5132
RH
346#ifdef ARCH_z8k
347 case bfd_arch_z8k:
348 if (bfd_get_mach(abfd) == bfd_mach_z8001)
349 disassemble = print_insn_z8001;
b7ed8fad 350 else
252b5132
RH
351 disassemble = print_insn_z8002;
352 break;
353#endif
354#ifdef ARCH_vax
355 case bfd_arch_vax:
356 disassemble = print_insn_vax;
357 break;
fd3c93d5
DB
358#endif
359#ifdef ARCH_frv
360 case bfd_arch_frv:
361 disassemble = print_insn_frv;
362 break;
47b1a55a
SC
363#endif
364#ifdef ARCH_iq2000
365 case bfd_arch_iq2000:
366 disassemble = print_insn_iq2000;
367 break;
252b5132
RH
368#endif
369 default:
370 return 0;
371 }
372 return disassemble;
373}
94470b23
NC
374
375void
9aaaa291 376disassembler_usage (stream)
7f32bebc 377 FILE * stream ATTRIBUTE_UNUSED;
94470b23 378{
58efb6c0
NC
379#ifdef ARCH_arm
380 print_arm_disassembler_options (stream);
381#endif
640c0ccd
CD
382#ifdef ARCH_mips
383 print_mips_disassembler_options (stream);
384#endif
07dd56a9
NC
385#ifdef ARCH_powerpc
386 print_ppc_disassembler_options (stream);
387#endif
b7ed8fad 388
94470b23
NC
389 return;
390}
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