* bfd-in.h (STRING_AND_COMMA): New macro. Takes one constant string as its
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
aef6203b
AM
2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 2004, 2005 Free Software Foundation, Inc.
252b5132 4
7499d566
NC
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
252b5132 9
7499d566
NC
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
252b5132 14
7499d566
NC
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
f4321104 17 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
252b5132 18
0d8dfecf 19#include "sysdep.h"
252b5132
RH
20#include "dis-asm.h"
21
22#ifdef ARCH_all
252b5132
RH
23#define ARCH_alpha
24#define ARCH_arc
25#define ARCH_arm
adde6300 26#define ARCH_avr
4b7f6baa 27#define ARCH_bfin
6c95a37f 28#define ARCH_cris
1fe1f39c 29#define ARCH_crx
252b5132
RH
30#define ARCH_d10v
31#define ARCH_d30v
d172d4ba 32#define ARCH_dlx
e729279b
NC
33#define ARCH_fr30
34#define ARCH_frv
252b5132
RH
35#define ARCH_h8300
36#define ARCH_h8500
37#define ARCH_hppa
5b93d8bb 38#define ARCH_i370
252b5132 39#define ARCH_i386
9d751335 40#define ARCH_i860
252b5132 41#define ARCH_i960
800eeca4 42#define ARCH_ia64
e729279b
NC
43#define ARCH_ip2k
44#define ARCH_iq2000
45#define ARCH_m32c
252b5132 46#define ARCH_m32r
60bcf0fa
NC
47#define ARCH_m68hc11
48#define ARCH_m68hc12
e729279b 49#define ARCH_m68k
252b5132 50#define ARCH_m88k
7499d566 51#define ARCH_maxq
252b5132
RH
52#define ARCH_mcore
53#define ARCH_mips
3c3bdf30 54#define ARCH_mmix
252b5132
RH
55#define ARCH_mn10200
56#define ARCH_mn10300
d031aafb 57#define ARCH_mt
2469cfa2 58#define ARCH_msp430
252b5132 59#define ARCH_ns32k
87e6d782 60#define ARCH_openrisc
3b16e843 61#define ARCH_or32
e135f41b 62#define ARCH_pdp11
1e608f98 63#define ARCH_pj
252b5132
RH
64#define ARCH_powerpc
65#define ARCH_rs6000
a85d7ed0 66#define ARCH_s390
252b5132
RH
67#define ARCH_sh
68#define ARCH_sparc
69#define ARCH_tic30
026df7c5 70#define ARCH_tic4x
5c84d377 71#define ARCH_tic54x
252b5132
RH
72#define ARCH_tic80
73#define ARCH_v850
74#define ARCH_vax
75#define ARCH_w65
93fbbb04 76#define ARCH_xstormy16
d70c5fc7 77#define ARCH_xc16x
e0001a05 78#define ARCH_xtensa
3c9b82ba 79#define ARCH_z80
252b5132 80#define ARCH_z8k
d28847ce 81#define INCLUDE_SHMEDIA
252b5132
RH
82#endif
83
49f58d10
JB
84#ifdef ARCH_m32c
85#include "m32c-desc.h"
86#endif
252b5132
RH
87
88disassembler_ftype
89disassembler (abfd)
90 bfd *abfd;
91{
92 enum bfd_architecture a = bfd_get_arch (abfd);
93 disassembler_ftype disassemble;
94
95 switch (a)
96 {
97 /* If you add a case to this table, also add it to the
98 ARCH_all definition right above this function. */
252b5132
RH
99#ifdef ARCH_alpha
100 case bfd_arch_alpha:
101 disassemble = print_insn_alpha;
102 break;
103#endif
104#ifdef ARCH_arc
105 case bfd_arch_arc:
106 {
0d2bcfaf 107 disassemble = arc_get_disassembler (abfd);
252b5132
RH
108 break;
109 }
110#endif
111#ifdef ARCH_arm
112 case bfd_arch_arm:
113 if (bfd_big_endian (abfd))
114 disassemble = print_insn_big_arm;
115 else
116 disassemble = print_insn_little_arm;
117 break;
118#endif
adde6300
AM
119#ifdef ARCH_avr
120 case bfd_arch_avr:
121 disassemble = print_insn_avr;
122 break;
123#endif
4b7f6baa
CM
124#ifdef ARCH_bfin
125 case bfd_arch_bfin:
126 disassemble = print_insn_bfin;
127 break;
128#endif
6c95a37f
HPN
129#ifdef ARCH_cris
130 case bfd_arch_cris:
78966507 131 disassemble = cris_get_disassembler (abfd);
6c95a37f 132 break;
1fe1f39c
NC
133#endif
134#ifdef ARCH_crx
135 case bfd_arch_crx:
136 disassemble = print_insn_crx;
137 break;
6c95a37f 138#endif
252b5132
RH
139#ifdef ARCH_d10v
140 case bfd_arch_d10v:
141 disassemble = print_insn_d10v;
142 break;
143#endif
144#ifdef ARCH_d30v
145 case bfd_arch_d30v:
146 disassemble = print_insn_d30v;
147 break;
148#endif
d172d4ba
NC
149#ifdef ARCH_dlx
150 case bfd_arch_dlx:
151 /* As far as I know we only handle big-endian DLX objects. */
152 disassemble = print_insn_dlx;
153 break;
154#endif
252b5132
RH
155#ifdef ARCH_h8300
156 case bfd_arch_h8300:
049f8936
NC
157 if (bfd_get_mach (abfd) == bfd_mach_h8300h
158 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
252b5132 159 disassemble = print_insn_h8300h;
049f8936 160 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
d43ff6d2 161 || bfd_get_mach (abfd) == bfd_mach_h8300sn
a53b85e2
AO
162 || bfd_get_mach (abfd) == bfd_mach_h8300sx
163 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
252b5132 164 disassemble = print_insn_h8300s;
b7ed8fad 165 else
252b5132
RH
166 disassemble = print_insn_h8300;
167 break;
168#endif
169#ifdef ARCH_h8500
170 case bfd_arch_h8500:
171 disassemble = print_insn_h8500;
172 break;
173#endif
174#ifdef ARCH_hppa
175 case bfd_arch_hppa:
176 disassemble = print_insn_hppa;
177 break;
178#endif
5b93d8bb
AM
179#ifdef ARCH_i370
180 case bfd_arch_i370:
181 disassemble = print_insn_i370;
182 break;
183#endif
252b5132
RH
184#ifdef ARCH_i386
185 case bfd_arch_i386:
e396998b 186 disassemble = print_insn_i386;
252b5132
RH
187 break;
188#endif
9d751335
JE
189#ifdef ARCH_i860
190 case bfd_arch_i860:
191 disassemble = print_insn_i860;
192 break;
193#endif
252b5132
RH
194#ifdef ARCH_i960
195 case bfd_arch_i960:
196 disassemble = print_insn_i960;
197 break;
198#endif
800eeca4
JW
199#ifdef ARCH_ia64
200 case bfd_arch_ia64:
201 disassemble = print_insn_ia64;
202 break;
203#endif
a40cbfa3
NC
204#ifdef ARCH_ip2k
205 case bfd_arch_ip2k:
206 disassemble = print_insn_ip2k;
207 break;
208#endif
252b5132
RH
209#ifdef ARCH_fr30
210 case bfd_arch_fr30:
211 disassemble = print_insn_fr30;
212 break;
213#endif
214#ifdef ARCH_m32r
215 case bfd_arch_m32r:
216 disassemble = print_insn_m32r;
217 break;
218#endif
60bcf0fa
NC
219#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
220 case bfd_arch_m68hc11:
221 disassemble = print_insn_m68hc11;
222 break;
223 case bfd_arch_m68hc12:
224 disassemble = print_insn_m68hc12;
225 break;
226#endif
252b5132
RH
227#ifdef ARCH_m68k
228 case bfd_arch_m68k:
229 disassemble = print_insn_m68k;
230 break;
231#endif
232#ifdef ARCH_m88k
233 case bfd_arch_m88k:
234 disassemble = print_insn_m88k;
235 break;
236#endif
7499d566
NC
237#ifdef ARCH_maxq
238 case bfd_arch_maxq:
239 disassemble = print_insn_maxq_little;
240 break;
241#endif
d031aafb
NS
242#ifdef ARCH_mt
243 case bfd_arch_mt:
244 disassemble = print_insn_mt;
ac188222
DB
245 break;
246#endif
2469cfa2
NC
247#ifdef ARCH_msp430
248 case bfd_arch_msp430:
249 disassemble = print_insn_msp430;
250 break;
251#endif
252b5132
RH
252#ifdef ARCH_ns32k
253 case bfd_arch_ns32k:
254 disassemble = print_insn_ns32k;
255 break;
256#endif
257#ifdef ARCH_mcore
258 case bfd_arch_mcore:
259 disassemble = print_insn_mcore;
260 break;
261#endif
262#ifdef ARCH_mips
263 case bfd_arch_mips:
264 if (bfd_big_endian (abfd))
265 disassemble = print_insn_big_mips;
266 else
267 disassemble = print_insn_little_mips;
268 break;
269#endif
3c3bdf30
NC
270#ifdef ARCH_mmix
271 case bfd_arch_mmix:
272 disassemble = print_insn_mmix;
273 break;
274#endif
252b5132
RH
275#ifdef ARCH_mn10200
276 case bfd_arch_mn10200:
277 disassemble = print_insn_mn10200;
278 break;
279#endif
280#ifdef ARCH_mn10300
281 case bfd_arch_mn10300:
282 disassemble = print_insn_mn10300;
283 break;
284#endif
87e6d782
NC
285#ifdef ARCH_openrisc
286 case bfd_arch_openrisc:
287 disassemble = print_insn_openrisc;
288 break;
289#endif
3b16e843
NC
290#ifdef ARCH_or32
291 case bfd_arch_or32:
292 if (bfd_big_endian (abfd))
293 disassemble = print_insn_big_or32;
294 else
295 disassemble = print_insn_little_or32;
296 break;
297#endif
e135f41b
NC
298#ifdef ARCH_pdp11
299 case bfd_arch_pdp11:
300 disassemble = print_insn_pdp11;
301 break;
302#endif
1e608f98
ILT
303#ifdef ARCH_pj
304 case bfd_arch_pj:
305 disassemble = print_insn_pj;
306 break;
307#endif
252b5132
RH
308#ifdef ARCH_powerpc
309 case bfd_arch_powerpc:
310 if (bfd_big_endian (abfd))
311 disassemble = print_insn_big_powerpc;
312 else
313 disassemble = print_insn_little_powerpc;
314 break;
315#endif
316#ifdef ARCH_rs6000
317 case bfd_arch_rs6000:
39c20e8f 318 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
7f6d05e8
CP
319 disassemble = print_insn_big_powerpc;
320 else
321 disassemble = print_insn_rs6000;
252b5132
RH
322 break;
323#endif
a85d7ed0
NC
324#ifdef ARCH_s390
325 case bfd_arch_s390:
326 disassemble = print_insn_s390;
327 break;
328#endif
252b5132
RH
329#ifdef ARCH_sh
330 case bfd_arch_sh:
1c509ca8 331 disassemble = print_insn_sh;
252b5132
RH
332 break;
333#endif
334#ifdef ARCH_sparc
335 case bfd_arch_sparc:
336 disassemble = print_insn_sparc;
337 break;
338#endif
339#ifdef ARCH_tic30
340 case bfd_arch_tic30:
341 disassemble = print_insn_tic30;
342 break;
343#endif
026df7c5
NC
344#ifdef ARCH_tic4x
345 case bfd_arch_tic4x:
346 disassemble = print_insn_tic4x;
347 break;
348#endif
5c84d377
TW
349#ifdef ARCH_tic54x
350 case bfd_arch_tic54x:
351 disassemble = print_insn_tic54x;
352 break;
353#endif
252b5132
RH
354#ifdef ARCH_tic80
355 case bfd_arch_tic80:
356 disassemble = print_insn_tic80;
357 break;
358#endif
359#ifdef ARCH_v850
360 case bfd_arch_v850:
361 disassemble = print_insn_v850;
362 break;
363#endif
364#ifdef ARCH_w65
365 case bfd_arch_w65:
366 disassemble = print_insn_w65;
367 break;
368#endif
93fbbb04
GK
369#ifdef ARCH_xstormy16
370 case bfd_arch_xstormy16:
371 disassemble = print_insn_xstormy16;
372 break;
373#endif
d70c5fc7
NC
374#ifdef ARCH_xc16x
375 case bfd_arch_xc16x:
376 disassemble = print_insn_xc16x;
377 break;
378#endif
e0001a05
NC
379#ifdef ARCH_xtensa
380 case bfd_arch_xtensa:
381 disassemble = print_insn_xtensa;
382 break;
383#endif
3c9b82ba
NC
384#ifdef ARCH_z80
385 case bfd_arch_z80:
386 disassemble = print_insn_z80;
387 break;
388#endif
252b5132
RH
389#ifdef ARCH_z8k
390 case bfd_arch_z8k:
391 if (bfd_get_mach(abfd) == bfd_mach_z8001)
392 disassemble = print_insn_z8001;
b7ed8fad 393 else
252b5132
RH
394 disassemble = print_insn_z8002;
395 break;
396#endif
397#ifdef ARCH_vax
398 case bfd_arch_vax:
399 disassemble = print_insn_vax;
400 break;
fd3c93d5
DB
401#endif
402#ifdef ARCH_frv
403 case bfd_arch_frv:
404 disassemble = print_insn_frv;
405 break;
47b1a55a
SC
406#endif
407#ifdef ARCH_iq2000
408 case bfd_arch_iq2000:
409 disassemble = print_insn_iq2000;
410 break;
49f58d10
JB
411#endif
412#ifdef ARCH_m32c
413 case bfd_arch_m32c:
414 disassemble = print_insn_m32c;
415 break;
252b5132
RH
416#endif
417 default:
418 return 0;
419 }
420 return disassemble;
421}
94470b23
NC
422
423void
9aaaa291 424disassembler_usage (stream)
7f32bebc 425 FILE * stream ATTRIBUTE_UNUSED;
94470b23 426{
58efb6c0
NC
427#ifdef ARCH_arm
428 print_arm_disassembler_options (stream);
429#endif
640c0ccd
CD
430#ifdef ARCH_mips
431 print_mips_disassembler_options (stream);
432#endif
07dd56a9
NC
433#ifdef ARCH_powerpc
434 print_ppc_disassembler_options (stream);
435#endif
b7ed8fad 436
94470b23
NC
437 return;
438}
22a398e1
NC
439
440void
441disassemble_init_for_target (struct disassemble_info * info)
442{
443 if (info == NULL)
444 return;
445
446 switch (info->arch)
447 {
448#ifdef ARCH_arm
449 case bfd_arch_arm:
450 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 451 info->disassembler_needs_relocs = TRUE;
22a398e1 452 break;
0bcb06d2
AS
453#endif
454#ifdef ARCH_ia64
455 case bfd_arch_ia64:
456 info->skip_zeroes = 16;
457 break;
458#endif
459#ifdef ARCH_tic4x
460 case bfd_arch_tic4x:
461 info->skip_zeroes = 32;
fb53f5a8 462 break;
49f58d10
JB
463#endif
464#ifdef ARCH_m32c
465 case bfd_arch_m32c:
466 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB
467 if (! info->insn_sets)
468 {
469 info->insn_sets = cgen_bitset_create (ISA_MAX);
470 if (info->mach == bfd_mach_m16c)
471 cgen_bitset_set (info->insn_sets, ISA_M16C);
472 else
473 cgen_bitset_set (info->insn_sets, ISA_M32C);
474 }
49f58d10 475 break;
22a398e1
NC
476#endif
477 default:
478 break;
479 }
480}
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