* configure.ac: Don't add target-libmudflap to noconfigdirs for
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
aef6203b 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
1c0d3aa6 3 2004, 2005, 2006 Free Software Foundation, Inc.
252b5132 4
7499d566
NC
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
252b5132 9
7499d566
NC
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
252b5132 14
7499d566
NC
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
f4321104 17 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
252b5132 18
0d8dfecf 19#include "sysdep.h"
252b5132
RH
20#include "dis-asm.h"
21
22#ifdef ARCH_all
252b5132
RH
23#define ARCH_alpha
24#define ARCH_arc
25#define ARCH_arm
adde6300 26#define ARCH_avr
4b7f6baa 27#define ARCH_bfin
6c95a37f 28#define ARCH_cris
1fe1f39c 29#define ARCH_crx
252b5132
RH
30#define ARCH_d10v
31#define ARCH_d30v
d172d4ba 32#define ARCH_dlx
e729279b
NC
33#define ARCH_fr30
34#define ARCH_frv
252b5132
RH
35#define ARCH_h8300
36#define ARCH_h8500
37#define ARCH_hppa
5b93d8bb 38#define ARCH_i370
252b5132 39#define ARCH_i386
9d751335 40#define ARCH_i860
252b5132 41#define ARCH_i960
800eeca4 42#define ARCH_ia64
e729279b
NC
43#define ARCH_ip2k
44#define ARCH_iq2000
45#define ARCH_m32c
252b5132 46#define ARCH_m32r
60bcf0fa
NC
47#define ARCH_m68hc11
48#define ARCH_m68hc12
e729279b 49#define ARCH_m68k
252b5132 50#define ARCH_m88k
7499d566 51#define ARCH_maxq
252b5132 52#define ARCH_mcore
bd2f2e55 53#define ARCH_mep
252b5132 54#define ARCH_mips
3c3bdf30 55#define ARCH_mmix
252b5132
RH
56#define ARCH_mn10200
57#define ARCH_mn10300
d031aafb 58#define ARCH_mt
2469cfa2 59#define ARCH_msp430
252b5132 60#define ARCH_ns32k
87e6d782 61#define ARCH_openrisc
3b16e843 62#define ARCH_or32
e135f41b 63#define ARCH_pdp11
1e608f98 64#define ARCH_pj
252b5132
RH
65#define ARCH_powerpc
66#define ARCH_rs6000
a85d7ed0 67#define ARCH_s390
1c0d3aa6 68#define ARCH_score
252b5132
RH
69#define ARCH_sh
70#define ARCH_sparc
e9f53129 71#define ARCH_spu
252b5132 72#define ARCH_tic30
026df7c5 73#define ARCH_tic4x
5c84d377 74#define ARCH_tic54x
252b5132
RH
75#define ARCH_tic80
76#define ARCH_v850
77#define ARCH_vax
78#define ARCH_w65
93fbbb04 79#define ARCH_xstormy16
d70c5fc7 80#define ARCH_xc16x
e0001a05 81#define ARCH_xtensa
3c9b82ba 82#define ARCH_z80
252b5132 83#define ARCH_z8k
d28847ce 84#define INCLUDE_SHMEDIA
252b5132
RH
85#endif
86
49f58d10
JB
87#ifdef ARCH_m32c
88#include "m32c-desc.h"
89#endif
252b5132
RH
90
91disassembler_ftype
92disassembler (abfd)
93 bfd *abfd;
94{
95 enum bfd_architecture a = bfd_get_arch (abfd);
96 disassembler_ftype disassemble;
97
98 switch (a)
99 {
100 /* If you add a case to this table, also add it to the
101 ARCH_all definition right above this function. */
252b5132
RH
102#ifdef ARCH_alpha
103 case bfd_arch_alpha:
104 disassemble = print_insn_alpha;
105 break;
106#endif
107#ifdef ARCH_arc
108 case bfd_arch_arc:
109 {
0d2bcfaf 110 disassemble = arc_get_disassembler (abfd);
252b5132
RH
111 break;
112 }
113#endif
114#ifdef ARCH_arm
115 case bfd_arch_arm:
116 if (bfd_big_endian (abfd))
117 disassemble = print_insn_big_arm;
118 else
119 disassemble = print_insn_little_arm;
120 break;
121#endif
adde6300
AM
122#ifdef ARCH_avr
123 case bfd_arch_avr:
124 disassemble = print_insn_avr;
125 break;
126#endif
4b7f6baa
CM
127#ifdef ARCH_bfin
128 case bfd_arch_bfin:
129 disassemble = print_insn_bfin;
130 break;
131#endif
6c95a37f
HPN
132#ifdef ARCH_cris
133 case bfd_arch_cris:
78966507 134 disassemble = cris_get_disassembler (abfd);
6c95a37f 135 break;
1fe1f39c
NC
136#endif
137#ifdef ARCH_crx
138 case bfd_arch_crx:
139 disassemble = print_insn_crx;
140 break;
6c95a37f 141#endif
252b5132
RH
142#ifdef ARCH_d10v
143 case bfd_arch_d10v:
144 disassemble = print_insn_d10v;
145 break;
146#endif
147#ifdef ARCH_d30v
148 case bfd_arch_d30v:
149 disassemble = print_insn_d30v;
150 break;
151#endif
d172d4ba
NC
152#ifdef ARCH_dlx
153 case bfd_arch_dlx:
154 /* As far as I know we only handle big-endian DLX objects. */
155 disassemble = print_insn_dlx;
156 break;
157#endif
252b5132
RH
158#ifdef ARCH_h8300
159 case bfd_arch_h8300:
049f8936
NC
160 if (bfd_get_mach (abfd) == bfd_mach_h8300h
161 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
252b5132 162 disassemble = print_insn_h8300h;
049f8936 163 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
d43ff6d2 164 || bfd_get_mach (abfd) == bfd_mach_h8300sn
a53b85e2
AO
165 || bfd_get_mach (abfd) == bfd_mach_h8300sx
166 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
252b5132 167 disassemble = print_insn_h8300s;
b7ed8fad 168 else
252b5132
RH
169 disassemble = print_insn_h8300;
170 break;
171#endif
172#ifdef ARCH_h8500
173 case bfd_arch_h8500:
174 disassemble = print_insn_h8500;
175 break;
176#endif
177#ifdef ARCH_hppa
178 case bfd_arch_hppa:
179 disassemble = print_insn_hppa;
180 break;
181#endif
5b93d8bb
AM
182#ifdef ARCH_i370
183 case bfd_arch_i370:
184 disassemble = print_insn_i370;
185 break;
186#endif
252b5132
RH
187#ifdef ARCH_i386
188 case bfd_arch_i386:
e396998b 189 disassemble = print_insn_i386;
252b5132
RH
190 break;
191#endif
9d751335
JE
192#ifdef ARCH_i860
193 case bfd_arch_i860:
194 disassemble = print_insn_i860;
195 break;
196#endif
252b5132
RH
197#ifdef ARCH_i960
198 case bfd_arch_i960:
199 disassemble = print_insn_i960;
200 break;
201#endif
800eeca4
JW
202#ifdef ARCH_ia64
203 case bfd_arch_ia64:
204 disassemble = print_insn_ia64;
205 break;
206#endif
a40cbfa3
NC
207#ifdef ARCH_ip2k
208 case bfd_arch_ip2k:
209 disassemble = print_insn_ip2k;
210 break;
211#endif
252b5132
RH
212#ifdef ARCH_fr30
213 case bfd_arch_fr30:
214 disassemble = print_insn_fr30;
215 break;
216#endif
217#ifdef ARCH_m32r
218 case bfd_arch_m32r:
219 disassemble = print_insn_m32r;
220 break;
221#endif
60bcf0fa
NC
222#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
223 case bfd_arch_m68hc11:
224 disassemble = print_insn_m68hc11;
225 break;
226 case bfd_arch_m68hc12:
227 disassemble = print_insn_m68hc12;
228 break;
229#endif
252b5132
RH
230#ifdef ARCH_m68k
231 case bfd_arch_m68k:
232 disassemble = print_insn_m68k;
233 break;
234#endif
235#ifdef ARCH_m88k
236 case bfd_arch_m88k:
237 disassemble = print_insn_m88k;
238 break;
239#endif
7499d566
NC
240#ifdef ARCH_maxq
241 case bfd_arch_maxq:
242 disassemble = print_insn_maxq_little;
243 break;
244#endif
d031aafb
NS
245#ifdef ARCH_mt
246 case bfd_arch_mt:
247 disassemble = print_insn_mt;
ac188222
DB
248 break;
249#endif
2469cfa2
NC
250#ifdef ARCH_msp430
251 case bfd_arch_msp430:
252 disassemble = print_insn_msp430;
253 break;
254#endif
252b5132
RH
255#ifdef ARCH_ns32k
256 case bfd_arch_ns32k:
257 disassemble = print_insn_ns32k;
258 break;
259#endif
260#ifdef ARCH_mcore
261 case bfd_arch_mcore:
262 disassemble = print_insn_mcore;
263 break;
264#endif
bd2f2e55
DB
265#ifdef ARCH_mep
266 case bfd_arch_mep:
267 disassemble = print_insn_mep;
268 break;
269#endif
252b5132
RH
270#ifdef ARCH_mips
271 case bfd_arch_mips:
272 if (bfd_big_endian (abfd))
273 disassemble = print_insn_big_mips;
274 else
275 disassemble = print_insn_little_mips;
276 break;
277#endif
3c3bdf30
NC
278#ifdef ARCH_mmix
279 case bfd_arch_mmix:
280 disassemble = print_insn_mmix;
281 break;
282#endif
252b5132
RH
283#ifdef ARCH_mn10200
284 case bfd_arch_mn10200:
285 disassemble = print_insn_mn10200;
286 break;
287#endif
288#ifdef ARCH_mn10300
289 case bfd_arch_mn10300:
290 disassemble = print_insn_mn10300;
291 break;
292#endif
87e6d782
NC
293#ifdef ARCH_openrisc
294 case bfd_arch_openrisc:
295 disassemble = print_insn_openrisc;
296 break;
297#endif
3b16e843
NC
298#ifdef ARCH_or32
299 case bfd_arch_or32:
300 if (bfd_big_endian (abfd))
301 disassemble = print_insn_big_or32;
302 else
303 disassemble = print_insn_little_or32;
304 break;
305#endif
e135f41b
NC
306#ifdef ARCH_pdp11
307 case bfd_arch_pdp11:
308 disassemble = print_insn_pdp11;
309 break;
310#endif
1e608f98
ILT
311#ifdef ARCH_pj
312 case bfd_arch_pj:
313 disassemble = print_insn_pj;
314 break;
315#endif
252b5132
RH
316#ifdef ARCH_powerpc
317 case bfd_arch_powerpc:
318 if (bfd_big_endian (abfd))
319 disassemble = print_insn_big_powerpc;
320 else
321 disassemble = print_insn_little_powerpc;
322 break;
323#endif
324#ifdef ARCH_rs6000
325 case bfd_arch_rs6000:
39c20e8f 326 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
7f6d05e8
CP
327 disassemble = print_insn_big_powerpc;
328 else
329 disassemble = print_insn_rs6000;
252b5132
RH
330 break;
331#endif
a85d7ed0
NC
332#ifdef ARCH_s390
333 case bfd_arch_s390:
334 disassemble = print_insn_s390;
335 break;
336#endif
1c0d3aa6
NC
337#ifdef ARCH_score
338 case bfd_arch_score:
339 if (bfd_big_endian (abfd))
340 disassemble = print_insn_big_score;
341 else
342 disassemble = print_insn_little_score;
343 break;
344#endif
252b5132
RH
345#ifdef ARCH_sh
346 case bfd_arch_sh:
1c509ca8 347 disassemble = print_insn_sh;
252b5132
RH
348 break;
349#endif
350#ifdef ARCH_sparc
351 case bfd_arch_sparc:
352 disassemble = print_insn_sparc;
353 break;
354#endif
e9f53129
AM
355#ifdef ARCH_spu
356 case bfd_arch_spu:
357 disassemble = print_insn_spu;
358 break;
359#endif
252b5132
RH
360#ifdef ARCH_tic30
361 case bfd_arch_tic30:
362 disassemble = print_insn_tic30;
363 break;
364#endif
026df7c5
NC
365#ifdef ARCH_tic4x
366 case bfd_arch_tic4x:
367 disassemble = print_insn_tic4x;
368 break;
369#endif
5c84d377
TW
370#ifdef ARCH_tic54x
371 case bfd_arch_tic54x:
372 disassemble = print_insn_tic54x;
373 break;
374#endif
252b5132
RH
375#ifdef ARCH_tic80
376 case bfd_arch_tic80:
377 disassemble = print_insn_tic80;
378 break;
379#endif
380#ifdef ARCH_v850
381 case bfd_arch_v850:
382 disassemble = print_insn_v850;
383 break;
384#endif
385#ifdef ARCH_w65
386 case bfd_arch_w65:
387 disassemble = print_insn_w65;
388 break;
389#endif
93fbbb04
GK
390#ifdef ARCH_xstormy16
391 case bfd_arch_xstormy16:
392 disassemble = print_insn_xstormy16;
393 break;
394#endif
d70c5fc7
NC
395#ifdef ARCH_xc16x
396 case bfd_arch_xc16x:
397 disassemble = print_insn_xc16x;
398 break;
399#endif
e0001a05
NC
400#ifdef ARCH_xtensa
401 case bfd_arch_xtensa:
402 disassemble = print_insn_xtensa;
403 break;
404#endif
3c9b82ba
NC
405#ifdef ARCH_z80
406 case bfd_arch_z80:
407 disassemble = print_insn_z80;
408 break;
409#endif
252b5132
RH
410#ifdef ARCH_z8k
411 case bfd_arch_z8k:
412 if (bfd_get_mach(abfd) == bfd_mach_z8001)
413 disassemble = print_insn_z8001;
b7ed8fad 414 else
252b5132
RH
415 disassemble = print_insn_z8002;
416 break;
417#endif
418#ifdef ARCH_vax
419 case bfd_arch_vax:
420 disassemble = print_insn_vax;
421 break;
fd3c93d5
DB
422#endif
423#ifdef ARCH_frv
424 case bfd_arch_frv:
425 disassemble = print_insn_frv;
426 break;
47b1a55a
SC
427#endif
428#ifdef ARCH_iq2000
429 case bfd_arch_iq2000:
430 disassemble = print_insn_iq2000;
431 break;
49f58d10
JB
432#endif
433#ifdef ARCH_m32c
434 case bfd_arch_m32c:
435 disassemble = print_insn_m32c;
436 break;
252b5132
RH
437#endif
438 default:
439 return 0;
440 }
441 return disassemble;
442}
94470b23
NC
443
444void
9aaaa291 445disassembler_usage (stream)
7f32bebc 446 FILE * stream ATTRIBUTE_UNUSED;
94470b23 447{
58efb6c0
NC
448#ifdef ARCH_arm
449 print_arm_disassembler_options (stream);
450#endif
640c0ccd
CD
451#ifdef ARCH_mips
452 print_mips_disassembler_options (stream);
453#endif
07dd56a9
NC
454#ifdef ARCH_powerpc
455 print_ppc_disassembler_options (stream);
456#endif
f59a29b9
L
457#ifdef ARCH_i386
458 print_i386_disassembler_options (stream);
459#endif
b7ed8fad 460
94470b23
NC
461 return;
462}
22a398e1
NC
463
464void
465disassemble_init_for_target (struct disassemble_info * info)
466{
467 if (info == NULL)
468 return;
469
470 switch (info->arch)
471 {
472#ifdef ARCH_arm
473 case bfd_arch_arm:
474 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 475 info->disassembler_needs_relocs = TRUE;
22a398e1 476 break;
0bcb06d2
AS
477#endif
478#ifdef ARCH_ia64
479 case bfd_arch_ia64:
480 info->skip_zeroes = 16;
481 break;
482#endif
483#ifdef ARCH_tic4x
484 case bfd_arch_tic4x:
485 info->skip_zeroes = 32;
fb53f5a8 486 break;
49f58d10 487#endif
bd2f2e55
DB
488#ifdef ARCH_mep
489 case bfd_arch_mep:
490 info->skip_zeroes = 256;
491 info->skip_zeroes_at_end = 0;
492 break;
493#endif
49f58d10
JB
494#ifdef ARCH_m32c
495 case bfd_arch_m32c:
496 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB
497 if (! info->insn_sets)
498 {
499 info->insn_sets = cgen_bitset_create (ISA_MAX);
500 if (info->mach == bfd_mach_m16c)
501 cgen_bitset_set (info->insn_sets, ISA_M16C);
502 else
503 cgen_bitset_set (info->insn_sets, ISA_M32C);
504 }
49f58d10 505 break;
22a398e1
NC
506#endif
507 default:
508 break;
509 }
510}
This page took 0.457023 seconds and 4 git commands to generate.