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wrong dimension found in ada-lang.c:ada_array_bound_from_type
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
aef6203b 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
b240011a
AM		 3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
4 Free Software Foundation, Inc.
252b5132 5
9b201bb5
NC		 6 This file is part of the GNU opcodes library.
7
8 This library is free software; you can redistribute it and/or modify
7499d566 9 it under the terms of the GNU General Public License as published by
9b201bb5 10 the Free Software Foundation; either version 3 of the License, or
7499d566 11 (at your option) any later version.
252b5132 12
7499d566
NC		 13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
252b5132 17
7499d566
NC		 18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
9b201bb5
NC		 20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
252b5132 22
0d8dfecf 23#include "sysdep.h"
252b5132
RH		 24#include "dis-asm.h"
25
26#ifdef ARCH_all
a06ea964 27#define ARCH_aarch64
252b5132
RH		 28#define ARCH_alpha
29#define ARCH_arc
30#define ARCH_arm
adde6300 31#define ARCH_avr
4b7f6baa 32#define ARCH_bfin
3d3d428f 33#define ARCH_cr16
6c95a37f 34#define ARCH_cris
1fe1f39c 35#define ARCH_crx
252b5132
RH		 36#define ARCH_d10v
37#define ARCH_d30v
d172d4ba 38#define ARCH_dlx
56b13185 39#define ARCH_epiphany
e729279b
NC		 40#define ARCH_fr30
41#define ARCH_frv
252b5132
RH		 42#define ARCH_h8300
43#define ARCH_h8500
44#define ARCH_hppa
5b93d8bb 45#define ARCH_i370
252b5132 46#define ARCH_i386
9d751335 47#define ARCH_i860
252b5132 48#define ARCH_i960
800eeca4 49#define ARCH_ia64
e729279b
NC		 50#define ARCH_ip2k
51#define ARCH_iq2000
84e94c90 52#define ARCH_lm32
e729279b 53#define ARCH_m32c
252b5132 54#define ARCH_m32r
60bcf0fa
NC		 55#define ARCH_m68hc11
56#define ARCH_m68hc12
e729279b 57#define ARCH_m68k
252b5132
RH		 58#define ARCH_m88k
59#define ARCH_mcore
bd2f2e55 60#define ARCH_mep
a3c62988 61#define ARCH_metag
7ba29e2a 62#define ARCH_microblaze
252b5132 63#define ARCH_mips
3c3bdf30 64#define ARCH_mmix
252b5132
RH		 65#define ARCH_mn10200
66#define ARCH_mn10300
59b1530d 67#define ARCH_moxie
d031aafb 68#define ARCH_mt
2469cfa2 69#define ARCH_msp430
36591ba1 70#define ARCH_nios2
252b5132 71#define ARCH_ns32k
87e6d782 72#define ARCH_openrisc
3b16e843 73#define ARCH_or32
e135f41b 74#define ARCH_pdp11
1e608f98 75#define ARCH_pj
252b5132
RH		 76#define ARCH_powerpc
77#define ARCH_rs6000
99c513f6 78#define ARCH_rl78
c7927a3c 79#define ARCH_rx
a85d7ed0 80#define ARCH_s390
1c0d3aa6 81#define ARCH_score
252b5132
RH		 82#define ARCH_sh
83#define ARCH_sparc
e9f53129 84#define ARCH_spu
252b5132 85#define ARCH_tic30
026df7c5 86#define ARCH_tic4x
5c84d377 87#define ARCH_tic54x
40b36596 88#define ARCH_tic6x
252b5132 89#define ARCH_tic80
aa137e4d
NC		 90#define ARCH_tilegx
91#define ARCH_tilepro
252b5132
RH		 92#define ARCH_v850
93#define ARCH_vax
94#define ARCH_w65
93fbbb04 95#define ARCH_xstormy16
d70c5fc7 96#define ARCH_xc16x
f6c1a2d5 97#define ARCH_xgate
e0001a05 98#define ARCH_xtensa
3c9b82ba 99#define ARCH_z80
252b5132 100#define ARCH_z8k
d28847ce 101#define INCLUDE_SHMEDIA
252b5132
RH		 102#endif
103
49f58d10
JB		 104#ifdef ARCH_m32c
105#include "m32c-desc.h"
106#endif
252b5132
RH		 107
108disassembler_ftype
109disassembler (abfd)
110 bfd *abfd;
111{
112 enum bfd_architecture a = bfd_get_arch (abfd);
113 disassembler_ftype disassemble;
114
115 switch (a)
116 {
117 /* If you add a case to this table, also add it to the
118 ARCH_all definition right above this function. */
a06ea964
NC		 119#ifdef ARCH_aarch64
120 case bfd_arch_aarch64:
121 disassemble = print_insn_aarch64;
122 break;
123#endif
252b5132
RH		 124#ifdef ARCH_alpha
125 case bfd_arch_alpha:
126 disassemble = print_insn_alpha;
127 break;
128#endif
129#ifdef ARCH_arc
130 case bfd_arch_arc:
6ca4eb77
AM		 131 disassemble = arc_get_disassembler (abfd);
132 break;
252b5132
RH		 133#endif
134#ifdef ARCH_arm
135 case bfd_arch_arm:
136 if (bfd_big_endian (abfd))
137 disassemble = print_insn_big_arm;
138 else
139 disassemble = print_insn_little_arm;
140 break;
141#endif
adde6300
AM		 142#ifdef ARCH_avr
143 case bfd_arch_avr:
144 disassemble = print_insn_avr;
145 break;
146#endif
4b7f6baa
CM		 147#ifdef ARCH_bfin
148 case bfd_arch_bfin:
149 disassemble = print_insn_bfin;
150 break;
151#endif
3d3d428f
NC		 152#ifdef ARCH_cr16
153 case bfd_arch_cr16:
154 disassemble = print_insn_cr16;
155 break;
156#endif
6c95a37f
HPN		 157#ifdef ARCH_cris
158 case bfd_arch_cris:
78966507 159 disassemble = cris_get_disassembler (abfd);
6c95a37f 160 break;
1fe1f39c
NC		 161#endif
162#ifdef ARCH_crx
163 case bfd_arch_crx:
164 disassemble = print_insn_crx;
165 break;
6c95a37f 166#endif
252b5132
RH		 167#ifdef ARCH_d10v
168 case bfd_arch_d10v:
169 disassemble = print_insn_d10v;
170 break;
171#endif
172#ifdef ARCH_d30v
173 case bfd_arch_d30v:
174 disassemble = print_insn_d30v;
175 break;
176#endif
d172d4ba
NC		 177#ifdef ARCH_dlx
178 case bfd_arch_dlx:
179 /* As far as I know we only handle big-endian DLX objects. */
180 disassemble = print_insn_dlx;
181 break;
182#endif
252b5132
RH		 183#ifdef ARCH_h8300
184 case bfd_arch_h8300:
049f8936
NC		 185 if (bfd_get_mach (abfd) == bfd_mach_h8300h
186 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
252b5132 187 disassemble = print_insn_h8300h;
049f8936 188 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
d43ff6d2 189 || bfd_get_mach (abfd) == bfd_mach_h8300sn
a53b85e2
AO		 190 || bfd_get_mach (abfd) == bfd_mach_h8300sx
191 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
252b5132 192 disassemble = print_insn_h8300s;
b7ed8fad 193 else
252b5132
RH		 194 disassemble = print_insn_h8300;
195 break;
196#endif
197#ifdef ARCH_h8500
198 case bfd_arch_h8500:
199 disassemble = print_insn_h8500;
200 break;
201#endif
202#ifdef ARCH_hppa
203 case bfd_arch_hppa:
204 disassemble = print_insn_hppa;
205 break;
206#endif
5b93d8bb
AM		 207#ifdef ARCH_i370
208 case bfd_arch_i370:
209 disassemble = print_insn_i370;
210 break;
211#endif
252b5132
RH		 212#ifdef ARCH_i386
213 case bfd_arch_i386:
8a9036a4 214 case bfd_arch_l1om:
7a9068fe 215 case bfd_arch_k1om:
e396998b 216 disassemble = print_insn_i386;
252b5132
RH		 217 break;
218#endif
9d751335
JE		 219#ifdef ARCH_i860
220 case bfd_arch_i860:
221 disassemble = print_insn_i860;
222 break;
223#endif
252b5132
RH		 224#ifdef ARCH_i960
225 case bfd_arch_i960:
226 disassemble = print_insn_i960;
227 break;
228#endif
800eeca4
JW		 229#ifdef ARCH_ia64
230 case bfd_arch_ia64:
231 disassemble = print_insn_ia64;
232 break;
233#endif
a40cbfa3
NC		 234#ifdef ARCH_ip2k
235 case bfd_arch_ip2k:
236 disassemble = print_insn_ip2k;
237 break;
238#endif
cfb8c092
NC		 239#ifdef ARCH_epiphany
240 case bfd_arch_epiphany:
241 disassemble = print_insn_epiphany;
242 break;
243#endif
252b5132
RH		 244#ifdef ARCH_fr30
245 case bfd_arch_fr30:
246 disassemble = print_insn_fr30;
247 break;
248#endif
84e94c90
NC		 249#ifdef ARCH_lm32
250 case bfd_arch_lm32:
251 disassemble = print_insn_lm32;
252 break;
253#endif
252b5132
RH		 254#ifdef ARCH_m32r
255 case bfd_arch_m32r:
256 disassemble = print_insn_m32r;
257 break;
258#endif
6927f982
NC		 259#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
260 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
60bcf0fa
NC		 261 case bfd_arch_m68hc11:
262 disassemble = print_insn_m68hc11;
263 break;
264 case bfd_arch_m68hc12:
265 disassemble = print_insn_m68hc12;
266 break;
6927f982
NC		 267 case bfd_arch_m9s12x:
268 disassemble = print_insn_m9s12x;
269 break;
270 case bfd_arch_m9s12xg:
271 disassemble = print_insn_m9s12xg;
272 break;
60bcf0fa 273#endif
252b5132
RH		 274#ifdef ARCH_m68k
275 case bfd_arch_m68k:
276 disassemble = print_insn_m68k;
277 break;
278#endif
279#ifdef ARCH_m88k
280 case bfd_arch_m88k:
281 disassemble = print_insn_m88k;
282 break;
283#endif
d031aafb
NS		 284#ifdef ARCH_mt
285 case bfd_arch_mt:
286 disassemble = print_insn_mt;
ac188222
DB		 287 break;
288#endif
7ba29e2a
NC		 289#ifdef ARCH_microblaze
290 case bfd_arch_microblaze:
291 disassemble = print_insn_microblaze;
292 break;
293#endif
2469cfa2
NC		 294#ifdef ARCH_msp430
295 case bfd_arch_msp430:
296 disassemble = print_insn_msp430;
297 break;
298#endif
252b5132
RH		 299#ifdef ARCH_ns32k
300 case bfd_arch_ns32k:
301 disassemble = print_insn_ns32k;
302 break;
303#endif
304#ifdef ARCH_mcore
305 case bfd_arch_mcore:
306 disassemble = print_insn_mcore;
307 break;
308#endif
bd2f2e55
DB		 309#ifdef ARCH_mep
310 case bfd_arch_mep:
311 disassemble = print_insn_mep;
312 break;
313#endif
a3c62988
NC		 314#ifdef ARCH_metag
315 case bfd_arch_metag:
316 disassemble = print_insn_metag;
317 break;
318#endif
252b5132
RH		 319#ifdef ARCH_mips
320 case bfd_arch_mips:
321 if (bfd_big_endian (abfd))
322 disassemble = print_insn_big_mips;
323 else
324 disassemble = print_insn_little_mips;
325 break;
326#endif
3c3bdf30
NC		 327#ifdef ARCH_mmix
328 case bfd_arch_mmix:
329 disassemble = print_insn_mmix;
330 break;
331#endif
252b5132
RH		 332#ifdef ARCH_mn10200
333 case bfd_arch_mn10200:
334 disassemble = print_insn_mn10200;
335 break;
336#endif
337#ifdef ARCH_mn10300
338 case bfd_arch_mn10300:
339 disassemble = print_insn_mn10300;
340 break;
341#endif
36591ba1
SL		 342#ifdef ARCH_nios2
343 case bfd_arch_nios2:
344 if (bfd_big_endian (abfd))
345 disassemble = print_insn_big_nios2;
346 else
347 disassemble = print_insn_little_nios2;
348 break;
349#endif
87e6d782
NC		 350#ifdef ARCH_openrisc
351 case bfd_arch_openrisc:
352 disassemble = print_insn_openrisc;
353 break;
354#endif
3b16e843
NC		 355#ifdef ARCH_or32
356 case bfd_arch_or32:
357 if (bfd_big_endian (abfd))
6ca4eb77 358 disassemble = print_insn_big_or32;
3b16e843 359 else
6ca4eb77 360 disassemble = print_insn_little_or32;
3b16e843
NC		 361 break;
362#endif
e135f41b
NC		 363#ifdef ARCH_pdp11
364 case bfd_arch_pdp11:
365 disassemble = print_insn_pdp11;
366 break;
367#endif
1e608f98
ILT		 368#ifdef ARCH_pj
369 case bfd_arch_pj:
370 disassemble = print_insn_pj;
371 break;
372#endif
252b5132
RH		 373#ifdef ARCH_powerpc
374 case bfd_arch_powerpc:
375 if (bfd_big_endian (abfd))
376 disassemble = print_insn_big_powerpc;
377 else
378 disassemble = print_insn_little_powerpc;
379 break;
380#endif
381#ifdef ARCH_rs6000
382 case bfd_arch_rs6000:
39c20e8f 383 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
7f6d05e8
CP		 384 disassemble = print_insn_big_powerpc;
385 else
386 disassemble = print_insn_rs6000;
252b5132
RH		 387 break;
388#endif
99c513f6
DD		 389#ifdef ARCH_rl78
390 case bfd_arch_rl78:
391 disassemble = print_insn_rl78;
392 break;
393#endif
c7927a3c
NC		 394#ifdef ARCH_rx
395 case bfd_arch_rx:
396 disassemble = print_insn_rx;
397 break;
398#endif
a85d7ed0
NC		 399#ifdef ARCH_s390
400 case bfd_arch_s390:
401 disassemble = print_insn_s390;
402 break;
403#endif
1c0d3aa6
NC		 404#ifdef ARCH_score
405 case bfd_arch_score:
406 if (bfd_big_endian (abfd))
6ca4eb77 407 disassemble = print_insn_big_score;
1c0d3aa6 408 else
6ca4eb77 409 disassemble = print_insn_little_score;
1c0d3aa6
NC		 410 break;
411#endif
252b5132
RH		 412#ifdef ARCH_sh
413 case bfd_arch_sh:
1c509ca8 414 disassemble = print_insn_sh;
252b5132
RH		 415 break;
416#endif
417#ifdef ARCH_sparc
418 case bfd_arch_sparc:
419 disassemble = print_insn_sparc;
420 break;
421#endif
e9f53129
AM		 422#ifdef ARCH_spu
423 case bfd_arch_spu:
424 disassemble = print_insn_spu;
425 break;
426#endif
252b5132
RH		 427#ifdef ARCH_tic30
428 case bfd_arch_tic30:
429 disassemble = print_insn_tic30;
430 break;
431#endif
026df7c5
NC		 432#ifdef ARCH_tic4x
433 case bfd_arch_tic4x:
434 disassemble = print_insn_tic4x;
435 break;
436#endif
5c84d377
TW		 437#ifdef ARCH_tic54x
438 case bfd_arch_tic54x:
439 disassemble = print_insn_tic54x;
440 break;
441#endif
40b36596
JM		 442#ifdef ARCH_tic6x
443 case bfd_arch_tic6x:
444 disassemble = print_insn_tic6x;
445 break;
446#endif
252b5132
RH		 447#ifdef ARCH_tic80
448 case bfd_arch_tic80:
449 disassemble = print_insn_tic80;
450 break;
451#endif
452#ifdef ARCH_v850
453 case bfd_arch_v850:
de863c74 454 case bfd_arch_v850_rh850:
252b5132
RH		 455 disassemble = print_insn_v850;
456 break;
457#endif
458#ifdef ARCH_w65
459 case bfd_arch_w65:
460 disassemble = print_insn_w65;
461 break;
462#endif
f6c1a2d5
NC		 463#ifdef ARCH_xgate
464 case bfd_arch_xgate:
465 disassemble = print_insn_xgate;
466 break;
467#endif
93fbbb04
GK		 468#ifdef ARCH_xstormy16
469 case bfd_arch_xstormy16:
470 disassemble = print_insn_xstormy16;
471 break;
472#endif
d70c5fc7
NC		 473#ifdef ARCH_xc16x
474 case bfd_arch_xc16x:
475 disassemble = print_insn_xc16x;
476 break;
477#endif
e0001a05
NC		 478#ifdef ARCH_xtensa
479 case bfd_arch_xtensa:
480 disassemble = print_insn_xtensa;
481 break;
482#endif
3c9b82ba
NC		 483#ifdef ARCH_z80
484 case bfd_arch_z80:
485 disassemble = print_insn_z80;
486 break;
487#endif
252b5132
RH		 488#ifdef ARCH_z8k
489 case bfd_arch_z8k:
490 if (bfd_get_mach(abfd) == bfd_mach_z8001)
491 disassemble = print_insn_z8001;
b7ed8fad 492 else
252b5132
RH		 493 disassemble = print_insn_z8002;
494 break;
495#endif
496#ifdef ARCH_vax
497 case bfd_arch_vax:
498 disassemble = print_insn_vax;
499 break;
fd3c93d5
DB		 500#endif
501#ifdef ARCH_frv
502 case bfd_arch_frv:
503 disassemble = print_insn_frv;
504 break;
47b1a55a 505#endif
59b1530d
AG		 506#ifdef ARCH_moxie
507 case bfd_arch_moxie:
508 disassemble = print_insn_moxie;
509 break;
510#endif
47b1a55a
SC		 511#ifdef ARCH_iq2000
512 case bfd_arch_iq2000:
513 disassemble = print_insn_iq2000;
514 break;
49f58d10
JB		 515#endif
516#ifdef ARCH_m32c
517 case bfd_arch_m32c:
518 disassemble = print_insn_m32c;
519 break;
aa137e4d
NC		 520#endif
521#ifdef ARCH_tilegx
522 case bfd_arch_tilegx:
523 disassemble = print_insn_tilegx;
524 break;
525#endif
526#ifdef ARCH_tilepro
527 case bfd_arch_tilepro:
528 disassemble = print_insn_tilepro;
529 break;
252b5132
RH		 530#endif
531 default:
532 return 0;
533 }
534 return disassemble;
535}
94470b23
NC		 536
537void
9aaaa291 538disassembler_usage (stream)
7f32bebc 539 FILE * stream ATTRIBUTE_UNUSED;
94470b23 540{
a06ea964
NC		 541#ifdef ARCH_aarch64
542 print_aarch64_disassembler_options (stream);
543#endif
58efb6c0
NC		 544#ifdef ARCH_arm
545 print_arm_disassembler_options (stream);
546#endif
640c0ccd
CD		 547#ifdef ARCH_mips
548 print_mips_disassembler_options (stream);
549#endif
07dd56a9
NC		 550#ifdef ARCH_powerpc
551 print_ppc_disassembler_options (stream);
552#endif
f59a29b9
L		 553#ifdef ARCH_i386
554 print_i386_disassembler_options (stream);
555#endif
112b7c50
AK		 556#ifdef ARCH_s390
557 print_s390_disassembler_options (stream);
558#endif
b7ed8fad 559
94470b23
NC		 560 return;
561}
22a398e1
NC		 562
563void
564disassemble_init_for_target (struct disassemble_info * info)
565{
566 if (info == NULL)
567 return;
568
569 switch (info->arch)
570 {
a06ea964
NC		 571#ifdef ARCH_aarch64
572 case bfd_arch_aarch64:
573 info->symbol_is_valid = aarch64_symbol_is_valid;
574 info->disassembler_needs_relocs = TRUE;
575 break;
576#endif
22a398e1
NC		 577#ifdef ARCH_arm
578 case bfd_arch_arm:
579 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 580 info->disassembler_needs_relocs = TRUE;
22a398e1 581 break;
0bcb06d2
AS		 582#endif
583#ifdef ARCH_ia64
584 case bfd_arch_ia64:
585 info->skip_zeroes = 16;
586 break;
587#endif
588#ifdef ARCH_tic4x
589 case bfd_arch_tic4x:
590 info->skip_zeroes = 32;
fb53f5a8 591 break;
49f58d10 592#endif
bd2f2e55
DB		 593#ifdef ARCH_mep
594 case bfd_arch_mep:
595 info->skip_zeroes = 256;
596 info->skip_zeroes_at_end = 0;
597 break;
598#endif
a3c62988
NC		 599#ifdef ARCH_metag
600 case bfd_arch_metag:
601 info->disassembler_needs_relocs = TRUE;
602 break;
603#endif
49f58d10
JB		 604#ifdef ARCH_m32c
605 case bfd_arch_m32c:
6ca4eb77
AM		 606 /* This processor in fact is little endian. The value set here
607 reflects the way opcodes are written in the cgen description. */
49f58d10 608 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB		 609 if (! info->insn_sets)
610 {
611 info->insn_sets = cgen_bitset_create (ISA_MAX);
612 if (info->mach == bfd_mach_m16c)
613 cgen_bitset_set (info->insn_sets, ISA_M16C);
614 else
615 cgen_bitset_set (info->insn_sets, ISA_M32C);
616 }
49f58d10 617 break;
b240011a
AM		 618#endif
619#ifdef ARCH_powerpc
620 case bfd_arch_powerpc:
621#endif
622#ifdef ARCH_rs6000
623 case bfd_arch_rs6000:
624#endif
625#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
626 disassemble_init_powerpc (info);
627 break;
22a398e1
NC		 628#endif
629 default:
630 break;
631 }
632}
GDB Binutils - Deliverables
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