Commit | Line | Data |
---|---|---|
252b5132 | 1 | /* Select disassembly routine for specified architecture. |
5b93d8bb AM |
2 | Copyright (C) 1994, 95, 96, 97, 98, 99, 2000 |
3 | Free Software Foundation, Inc. | |
252b5132 RH |
4 | |
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 2 of the License, or | |
8 | (at your option) any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
16 | along with this program; if not, write to the Free Software | |
17 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
18 | ||
0d8dfecf | 19 | #include "sysdep.h" |
252b5132 RH |
20 | #include "dis-asm.h" |
21 | ||
22 | #ifdef ARCH_all | |
23 | #define ARCH_a29k | |
24 | #define ARCH_alpha | |
25 | #define ARCH_arc | |
26 | #define ARCH_arm | |
adde6300 | 27 | #define ARCH_avr |
6c95a37f | 28 | #define ARCH_cris |
252b5132 RH |
29 | #define ARCH_d10v |
30 | #define ARCH_d30v | |
31 | #define ARCH_h8300 | |
32 | #define ARCH_h8500 | |
33 | #define ARCH_hppa | |
5b93d8bb | 34 | #define ARCH_i370 |
252b5132 | 35 | #define ARCH_i386 |
9d751335 | 36 | #define ARCH_i860 |
252b5132 | 37 | #define ARCH_i960 |
800eeca4 | 38 | #define ARCH_ia64 |
252b5132 RH |
39 | #define ARCH_fr30 |
40 | #define ARCH_m32r | |
41 | #define ARCH_m68k | |
60bcf0fa NC |
42 | #define ARCH_m68hc11 |
43 | #define ARCH_m68hc12 | |
252b5132 RH |
44 | #define ARCH_m88k |
45 | #define ARCH_mcore | |
46 | #define ARCH_mips | |
47 | #define ARCH_mn10200 | |
48 | #define ARCH_mn10300 | |
49 | #define ARCH_ns32k | |
1e608f98 | 50 | #define ARCH_pj |
252b5132 RH |
51 | #define ARCH_powerpc |
52 | #define ARCH_rs6000 | |
a85d7ed0 | 53 | #define ARCH_s390 |
252b5132 RH |
54 | #define ARCH_sh |
55 | #define ARCH_sparc | |
56 | #define ARCH_tic30 | |
5c84d377 | 57 | #define ARCH_tic54x |
252b5132 RH |
58 | #define ARCH_tic80 |
59 | #define ARCH_v850 | |
60 | #define ARCH_vax | |
61 | #define ARCH_w65 | |
62 | #define ARCH_z8k | |
63 | #endif | |
64 | ||
65 | ||
66 | disassembler_ftype | |
67 | disassembler (abfd) | |
68 | bfd *abfd; | |
69 | { | |
70 | enum bfd_architecture a = bfd_get_arch (abfd); | |
71 | disassembler_ftype disassemble; | |
72 | ||
73 | switch (a) | |
74 | { | |
75 | /* If you add a case to this table, also add it to the | |
76 | ARCH_all definition right above this function. */ | |
77 | #ifdef ARCH_a29k | |
78 | case bfd_arch_a29k: | |
79 | /* As far as I know we only handle big-endian 29k objects. */ | |
80 | disassemble = print_insn_big_a29k; | |
81 | break; | |
82 | #endif | |
83 | #ifdef ARCH_alpha | |
84 | case bfd_arch_alpha: | |
85 | disassemble = print_insn_alpha; | |
86 | break; | |
87 | #endif | |
88 | #ifdef ARCH_arc | |
89 | case bfd_arch_arc: | |
90 | { | |
0d2bcfaf | 91 | disassemble = arc_get_disassembler (abfd); |
252b5132 RH |
92 | break; |
93 | } | |
94 | #endif | |
95 | #ifdef ARCH_arm | |
96 | case bfd_arch_arm: | |
97 | if (bfd_big_endian (abfd)) | |
98 | disassemble = print_insn_big_arm; | |
99 | else | |
100 | disassemble = print_insn_little_arm; | |
101 | break; | |
102 | #endif | |
adde6300 AM |
103 | #ifdef ARCH_avr |
104 | case bfd_arch_avr: | |
105 | disassemble = print_insn_avr; | |
106 | break; | |
107 | #endif | |
6c95a37f HPN |
108 | #ifdef ARCH_cris |
109 | case bfd_arch_cris: | |
78966507 | 110 | disassemble = cris_get_disassembler (abfd); |
6c95a37f HPN |
111 | break; |
112 | #endif | |
252b5132 RH |
113 | #ifdef ARCH_d10v |
114 | case bfd_arch_d10v: | |
115 | disassemble = print_insn_d10v; | |
116 | break; | |
117 | #endif | |
118 | #ifdef ARCH_d30v | |
119 | case bfd_arch_d30v: | |
120 | disassemble = print_insn_d30v; | |
121 | break; | |
122 | #endif | |
123 | #ifdef ARCH_h8300 | |
124 | case bfd_arch_h8300: | |
125 | if (bfd_get_mach(abfd) == bfd_mach_h8300h) | |
126 | disassemble = print_insn_h8300h; | |
127 | else if (bfd_get_mach(abfd) == bfd_mach_h8300s) | |
128 | disassemble = print_insn_h8300s; | |
b7ed8fad | 129 | else |
252b5132 RH |
130 | disassemble = print_insn_h8300; |
131 | break; | |
132 | #endif | |
133 | #ifdef ARCH_h8500 | |
134 | case bfd_arch_h8500: | |
135 | disassemble = print_insn_h8500; | |
136 | break; | |
137 | #endif | |
138 | #ifdef ARCH_hppa | |
139 | case bfd_arch_hppa: | |
140 | disassemble = print_insn_hppa; | |
141 | break; | |
142 | #endif | |
5b93d8bb AM |
143 | #ifdef ARCH_i370 |
144 | case bfd_arch_i370: | |
145 | disassemble = print_insn_i370; | |
146 | break; | |
147 | #endif | |
252b5132 RH |
148 | #ifdef ARCH_i386 |
149 | case bfd_arch_i386: | |
52b15da3 JH |
150 | if (bfd_get_mach (abfd) == bfd_mach_i386_i386_intel_syntax |
151 | || bfd_get_mach (abfd) == bfd_mach_x86_64_intel_syntax) | |
252b5132 RH |
152 | disassemble = print_insn_i386_intel; |
153 | else | |
154 | disassemble = print_insn_i386_att; | |
155 | break; | |
156 | #endif | |
9d751335 JE |
157 | #ifdef ARCH_i860 |
158 | case bfd_arch_i860: | |
159 | disassemble = print_insn_i860; | |
160 | break; | |
161 | #endif | |
252b5132 RH |
162 | #ifdef ARCH_i960 |
163 | case bfd_arch_i960: | |
164 | disassemble = print_insn_i960; | |
165 | break; | |
166 | #endif | |
800eeca4 JW |
167 | #ifdef ARCH_ia64 |
168 | case bfd_arch_ia64: | |
169 | disassemble = print_insn_ia64; | |
170 | break; | |
171 | #endif | |
252b5132 RH |
172 | #ifdef ARCH_fr30 |
173 | case bfd_arch_fr30: | |
174 | disassemble = print_insn_fr30; | |
175 | break; | |
176 | #endif | |
177 | #ifdef ARCH_m32r | |
178 | case bfd_arch_m32r: | |
179 | disassemble = print_insn_m32r; | |
180 | break; | |
181 | #endif | |
60bcf0fa NC |
182 | #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) |
183 | case bfd_arch_m68hc11: | |
184 | disassemble = print_insn_m68hc11; | |
185 | break; | |
186 | case bfd_arch_m68hc12: | |
187 | disassemble = print_insn_m68hc12; | |
188 | break; | |
189 | #endif | |
252b5132 RH |
190 | #ifdef ARCH_m68k |
191 | case bfd_arch_m68k: | |
192 | disassemble = print_insn_m68k; | |
193 | break; | |
194 | #endif | |
195 | #ifdef ARCH_m88k | |
196 | case bfd_arch_m88k: | |
197 | disassemble = print_insn_m88k; | |
198 | break; | |
199 | #endif | |
200 | #ifdef ARCH_ns32k | |
201 | case bfd_arch_ns32k: | |
202 | disassemble = print_insn_ns32k; | |
203 | break; | |
204 | #endif | |
205 | #ifdef ARCH_mcore | |
206 | case bfd_arch_mcore: | |
207 | disassemble = print_insn_mcore; | |
208 | break; | |
209 | #endif | |
210 | #ifdef ARCH_mips | |
211 | case bfd_arch_mips: | |
212 | if (bfd_big_endian (abfd)) | |
213 | disassemble = print_insn_big_mips; | |
214 | else | |
215 | disassemble = print_insn_little_mips; | |
216 | break; | |
217 | #endif | |
218 | #ifdef ARCH_mn10200 | |
219 | case bfd_arch_mn10200: | |
220 | disassemble = print_insn_mn10200; | |
221 | break; | |
222 | #endif | |
223 | #ifdef ARCH_mn10300 | |
224 | case bfd_arch_mn10300: | |
225 | disassemble = print_insn_mn10300; | |
226 | break; | |
227 | #endif | |
1e608f98 ILT |
228 | #ifdef ARCH_pj |
229 | case bfd_arch_pj: | |
230 | disassemble = print_insn_pj; | |
231 | break; | |
232 | #endif | |
252b5132 RH |
233 | #ifdef ARCH_powerpc |
234 | case bfd_arch_powerpc: | |
235 | if (bfd_big_endian (abfd)) | |
236 | disassemble = print_insn_big_powerpc; | |
237 | else | |
238 | disassemble = print_insn_little_powerpc; | |
239 | break; | |
240 | #endif | |
241 | #ifdef ARCH_rs6000 | |
242 | case bfd_arch_rs6000: | |
39c20e8f | 243 | if (bfd_get_mach (abfd) == bfd_mach_ppc_620) |
7f6d05e8 CP |
244 | disassemble = print_insn_big_powerpc; |
245 | else | |
246 | disassemble = print_insn_rs6000; | |
252b5132 RH |
247 | break; |
248 | #endif | |
a85d7ed0 NC |
249 | #ifdef ARCH_s390 |
250 | case bfd_arch_s390: | |
251 | disassemble = print_insn_s390; | |
252 | break; | |
253 | #endif | |
252b5132 RH |
254 | #ifdef ARCH_sh |
255 | case bfd_arch_sh: | |
256 | if (bfd_big_endian (abfd)) | |
257 | disassemble = print_insn_sh; | |
258 | else | |
259 | disassemble = print_insn_shl; | |
260 | break; | |
261 | #endif | |
262 | #ifdef ARCH_sparc | |
263 | case bfd_arch_sparc: | |
264 | disassemble = print_insn_sparc; | |
265 | break; | |
266 | #endif | |
267 | #ifdef ARCH_tic30 | |
268 | case bfd_arch_tic30: | |
269 | disassemble = print_insn_tic30; | |
270 | break; | |
271 | #endif | |
5c84d377 TW |
272 | #ifdef ARCH_tic54x |
273 | case bfd_arch_tic54x: | |
274 | disassemble = print_insn_tic54x; | |
275 | break; | |
276 | #endif | |
252b5132 RH |
277 | #ifdef ARCH_tic80 |
278 | case bfd_arch_tic80: | |
279 | disassemble = print_insn_tic80; | |
280 | break; | |
281 | #endif | |
282 | #ifdef ARCH_v850 | |
283 | case bfd_arch_v850: | |
284 | disassemble = print_insn_v850; | |
285 | break; | |
286 | #endif | |
287 | #ifdef ARCH_w65 | |
288 | case bfd_arch_w65: | |
289 | disassemble = print_insn_w65; | |
290 | break; | |
291 | #endif | |
292 | #ifdef ARCH_z8k | |
293 | case bfd_arch_z8k: | |
294 | if (bfd_get_mach(abfd) == bfd_mach_z8001) | |
295 | disassemble = print_insn_z8001; | |
b7ed8fad | 296 | else |
252b5132 RH |
297 | disassemble = print_insn_z8002; |
298 | break; | |
299 | #endif | |
300 | #ifdef ARCH_vax | |
301 | case bfd_arch_vax: | |
302 | disassemble = print_insn_vax; | |
303 | break; | |
304 | #endif | |
305 | default: | |
306 | return 0; | |
307 | } | |
308 | return disassemble; | |
309 | } | |
94470b23 NC |
310 | |
311 | void | |
9aaaa291 | 312 | disassembler_usage (stream) |
c1485d85 | 313 | FILE * stream ATTRIBUTE_UNUSED; |
94470b23 | 314 | { |
58efb6c0 NC |
315 | #ifdef ARCH_arm |
316 | print_arm_disassembler_options (stream); | |
317 | #endif | |
b7ed8fad | 318 | |
94470b23 NC |
319 | return; |
320 | } |