Remove w65 support
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
219d1afa 2 Copyright (C) 1994-2018 Free Software Foundation, Inc.
252b5132 3
9b201bb5
NC
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7499d566 7 it under the terms of the GNU General Public License as published by
9b201bb5 8 the Free Software Foundation; either version 3 of the License, or
7499d566 9 (at your option) any later version.
252b5132 10
7499d566
NC
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
252b5132 15
7499d566
NC
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
9b201bb5
NC
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
0d8dfecf 21#include "sysdep.h"
88c1242d 22#include "disassemble.h"
65b48a81 23#include "safe-ctype.h"
003ca0fd 24#include <assert.h>
252b5132
RH
25
26#ifdef ARCH_all
a06ea964 27#define ARCH_aarch64
252b5132
RH
28#define ARCH_alpha
29#define ARCH_arc
30#define ARCH_arm
adde6300 31#define ARCH_avr
4b7f6baa 32#define ARCH_bfin
3d3d428f 33#define ARCH_cr16
6c95a37f 34#define ARCH_cris
1fe1f39c 35#define ARCH_crx
252b5132
RH
36#define ARCH_d10v
37#define ARCH_d30v
d172d4ba 38#define ARCH_dlx
56b13185 39#define ARCH_epiphany
e729279b
NC
40#define ARCH_fr30
41#define ARCH_frv
3f8107ab 42#define ARCH_ft32
252b5132 43#define ARCH_h8300
252b5132
RH
44#define ARCH_hppa
45#define ARCH_i386
800eeca4 46#define ARCH_ia64
e729279b
NC
47#define ARCH_ip2k
48#define ARCH_iq2000
84e94c90 49#define ARCH_lm32
e729279b 50#define ARCH_m32c
252b5132 51#define ARCH_m32r
60bcf0fa
NC
52#define ARCH_m68hc11
53#define ARCH_m68hc12
e729279b 54#define ARCH_m68k
252b5132 55#define ARCH_mcore
bd2f2e55 56#define ARCH_mep
a3c62988 57#define ARCH_metag
7ba29e2a 58#define ARCH_microblaze
252b5132 59#define ARCH_mips
3c3bdf30 60#define ARCH_mmix
252b5132
RH
61#define ARCH_mn10200
62#define ARCH_mn10300
59b1530d 63#define ARCH_moxie
d031aafb 64#define ARCH_mt
2469cfa2 65#define ARCH_msp430
35c08157 66#define ARCH_nds32
36591ba1 67#define ARCH_nios2
252b5132 68#define ARCH_ns32k
73589c9d 69#define ARCH_or1k
e135f41b 70#define ARCH_pdp11
1e608f98 71#define ARCH_pj
252b5132 72#define ARCH_powerpc
11146849 73#define ARCH_pru
0bccfb29 74#define ARCH_riscv
252b5132 75#define ARCH_rs6000
99c513f6 76#define ARCH_rl78
c7927a3c 77#define ARCH_rx
a85d7ed0 78#define ARCH_s390
1c0d3aa6 79#define ARCH_score
252b5132
RH
80#define ARCH_sh
81#define ARCH_sparc
e9f53129 82#define ARCH_spu
252b5132 83#define ARCH_tic30
026df7c5 84#define ARCH_tic4x
5c84d377 85#define ARCH_tic54x
40b36596 86#define ARCH_tic6x
252b5132 87#define ARCH_tic80
aa137e4d
NC
88#define ARCH_tilegx
89#define ARCH_tilepro
252b5132
RH
90#define ARCH_v850
91#define ARCH_vax
1945cfa5 92#define ARCH_visium
62ecb94c 93#define ARCH_wasm32
93fbbb04 94#define ARCH_xstormy16
d70c5fc7 95#define ARCH_xc16x
f6c1a2d5 96#define ARCH_xgate
e0001a05 97#define ARCH_xtensa
3c9b82ba 98#define ARCH_z80
252b5132 99#define ARCH_z8k
d28847ce 100#define INCLUDE_SHMEDIA
252b5132
RH
101#endif
102
49f58d10
JB
103#ifdef ARCH_m32c
104#include "m32c-desc.h"
105#endif
252b5132
RH
106
107disassembler_ftype
b28b8b5e
L
108disassembler (enum bfd_architecture a,
109 bfd_boolean big ATTRIBUTE_UNUSED,
110 unsigned long mach ATTRIBUTE_UNUSED,
e347efc3 111 bfd *abfd ATTRIBUTE_UNUSED)
252b5132 112{
252b5132
RH
113 disassembler_ftype disassemble;
114
115 switch (a)
116 {
117 /* If you add a case to this table, also add it to the
118 ARCH_all definition right above this function. */
a06ea964
NC
119#ifdef ARCH_aarch64
120 case bfd_arch_aarch64:
121 disassemble = print_insn_aarch64;
122 break;
123#endif
252b5132
RH
124#ifdef ARCH_alpha
125 case bfd_arch_alpha:
126 disassemble = print_insn_alpha;
127 break;
128#endif
129#ifdef ARCH_arc
130 case bfd_arch_arc:
6ca4eb77
AM
131 disassemble = arc_get_disassembler (abfd);
132 break;
252b5132
RH
133#endif
134#ifdef ARCH_arm
135 case bfd_arch_arm:
003ca0fd 136 if (big)
252b5132
RH
137 disassemble = print_insn_big_arm;
138 else
139 disassemble = print_insn_little_arm;
140 break;
141#endif
adde6300
AM
142#ifdef ARCH_avr
143 case bfd_arch_avr:
144 disassemble = print_insn_avr;
145 break;
146#endif
4b7f6baa
CM
147#ifdef ARCH_bfin
148 case bfd_arch_bfin:
149 disassemble = print_insn_bfin;
150 break;
151#endif
3d3d428f
NC
152#ifdef ARCH_cr16
153 case bfd_arch_cr16:
154 disassemble = print_insn_cr16;
155 break;
156#endif
6c95a37f
HPN
157#ifdef ARCH_cris
158 case bfd_arch_cris:
78966507 159 disassemble = cris_get_disassembler (abfd);
6c95a37f 160 break;
1fe1f39c
NC
161#endif
162#ifdef ARCH_crx
163 case bfd_arch_crx:
164 disassemble = print_insn_crx;
165 break;
6c95a37f 166#endif
252b5132
RH
167#ifdef ARCH_d10v
168 case bfd_arch_d10v:
169 disassemble = print_insn_d10v;
170 break;
171#endif
172#ifdef ARCH_d30v
173 case bfd_arch_d30v:
174 disassemble = print_insn_d30v;
175 break;
176#endif
d172d4ba
NC
177#ifdef ARCH_dlx
178 case bfd_arch_dlx:
179 /* As far as I know we only handle big-endian DLX objects. */
180 disassemble = print_insn_dlx;
181 break;
182#endif
252b5132
RH
183#ifdef ARCH_h8300
184 case bfd_arch_h8300:
003ca0fd 185 if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
252b5132 186 disassemble = print_insn_h8300h;
003ca0fd
YQ
187 else if (mach == bfd_mach_h8300s
188 || mach == bfd_mach_h8300sn
189 || mach == bfd_mach_h8300sx
190 || mach == bfd_mach_h8300sxn)
252b5132 191 disassemble = print_insn_h8300s;
b7ed8fad 192 else
252b5132
RH
193 disassemble = print_insn_h8300;
194 break;
195#endif
252b5132
RH
196#ifdef ARCH_hppa
197 case bfd_arch_hppa:
198 disassemble = print_insn_hppa;
199 break;
200#endif
201#ifdef ARCH_i386
202 case bfd_arch_i386:
7b6d09fb 203 case bfd_arch_iamcu:
8a9036a4 204 case bfd_arch_l1om:
7a9068fe 205 case bfd_arch_k1om:
e396998b 206 disassemble = print_insn_i386;
252b5132
RH
207 break;
208#endif
800eeca4
JW
209#ifdef ARCH_ia64
210 case bfd_arch_ia64:
211 disassemble = print_insn_ia64;
212 break;
213#endif
a40cbfa3
NC
214#ifdef ARCH_ip2k
215 case bfd_arch_ip2k:
216 disassemble = print_insn_ip2k;
217 break;
218#endif
cfb8c092
NC
219#ifdef ARCH_epiphany
220 case bfd_arch_epiphany:
221 disassemble = print_insn_epiphany;
222 break;
223#endif
252b5132
RH
224#ifdef ARCH_fr30
225 case bfd_arch_fr30:
226 disassemble = print_insn_fr30;
227 break;
228#endif
84e94c90
NC
229#ifdef ARCH_lm32
230 case bfd_arch_lm32:
231 disassemble = print_insn_lm32;
232 break;
233#endif
252b5132
RH
234#ifdef ARCH_m32r
235 case bfd_arch_m32r:
236 disassemble = print_insn_m32r;
237 break;
238#endif
6927f982
NC
239#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
240 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
60bcf0fa
NC
241 case bfd_arch_m68hc11:
242 disassemble = print_insn_m68hc11;
243 break;
244 case bfd_arch_m68hc12:
245 disassemble = print_insn_m68hc12;
246 break;
6927f982
NC
247 case bfd_arch_m9s12x:
248 disassemble = print_insn_m9s12x;
249 break;
250 case bfd_arch_m9s12xg:
251 disassemble = print_insn_m9s12xg;
252 break;
60bcf0fa 253#endif
252b5132
RH
254#ifdef ARCH_m68k
255 case bfd_arch_m68k:
256 disassemble = print_insn_m68k;
257 break;
258#endif
d031aafb
NS
259#ifdef ARCH_mt
260 case bfd_arch_mt:
261 disassemble = print_insn_mt;
ac188222
DB
262 break;
263#endif
7ba29e2a
NC
264#ifdef ARCH_microblaze
265 case bfd_arch_microblaze:
266 disassemble = print_insn_microblaze;
267 break;
268#endif
2469cfa2
NC
269#ifdef ARCH_msp430
270 case bfd_arch_msp430:
271 disassemble = print_insn_msp430;
272 break;
273#endif
35c08157
KLC
274#ifdef ARCH_nds32
275 case bfd_arch_nds32:
276 disassemble = print_insn_nds32;
277 break;
278#endif
252b5132
RH
279#ifdef ARCH_ns32k
280 case bfd_arch_ns32k:
281 disassemble = print_insn_ns32k;
282 break;
283#endif
284#ifdef ARCH_mcore
285 case bfd_arch_mcore:
286 disassemble = print_insn_mcore;
287 break;
288#endif
bd2f2e55
DB
289#ifdef ARCH_mep
290 case bfd_arch_mep:
291 disassemble = print_insn_mep;
292 break;
293#endif
a3c62988
NC
294#ifdef ARCH_metag
295 case bfd_arch_metag:
296 disassemble = print_insn_metag;
297 break;
298#endif
252b5132
RH
299#ifdef ARCH_mips
300 case bfd_arch_mips:
003ca0fd 301 if (big)
252b5132
RH
302 disassemble = print_insn_big_mips;
303 else
304 disassemble = print_insn_little_mips;
305 break;
306#endif
3c3bdf30
NC
307#ifdef ARCH_mmix
308 case bfd_arch_mmix:
309 disassemble = print_insn_mmix;
310 break;
311#endif
252b5132
RH
312#ifdef ARCH_mn10200
313 case bfd_arch_mn10200:
314 disassemble = print_insn_mn10200;
315 break;
316#endif
317#ifdef ARCH_mn10300
318 case bfd_arch_mn10300:
319 disassemble = print_insn_mn10300;
320 break;
321#endif
36591ba1
SL
322#ifdef ARCH_nios2
323 case bfd_arch_nios2:
003ca0fd 324 if (big)
36591ba1
SL
325 disassemble = print_insn_big_nios2;
326 else
327 disassemble = print_insn_little_nios2;
328 break;
329#endif
73589c9d
CS
330#ifdef ARCH_or1k
331 case bfd_arch_or1k:
332 disassemble = print_insn_or1k;
3b16e843
NC
333 break;
334#endif
e135f41b
NC
335#ifdef ARCH_pdp11
336 case bfd_arch_pdp11:
337 disassemble = print_insn_pdp11;
338 break;
339#endif
1e608f98
ILT
340#ifdef ARCH_pj
341 case bfd_arch_pj:
342 disassemble = print_insn_pj;
343 break;
344#endif
252b5132
RH
345#ifdef ARCH_powerpc
346 case bfd_arch_powerpc:
52fe4420
AM
347#endif
348#ifdef ARCH_rs6000
349 case bfd_arch_rs6000:
350#endif
351#if defined ARCH_powerpc || defined ARCH_rs6000
003ca0fd 352 if (big)
252b5132
RH
353 disassemble = print_insn_big_powerpc;
354 else
355 disassemble = print_insn_little_powerpc;
356 break;
357#endif
11146849
DD
358#ifdef ARCH_pru
359 case bfd_arch_pru:
360 disassemble = print_insn_pru;
361 break;
362#endif
e23eba97
NC
363#ifdef ARCH_riscv
364 case bfd_arch_riscv:
365 disassemble = print_insn_riscv;
ae4c0df4 366 break;
e23eba97 367#endif
99c513f6
DD
368#ifdef ARCH_rl78
369 case bfd_arch_rl78:
0952813b 370 disassemble = rl78_get_disassembler (abfd);
99c513f6
DD
371 break;
372#endif
c7927a3c
NC
373#ifdef ARCH_rx
374 case bfd_arch_rx:
375 disassemble = print_insn_rx;
376 break;
377#endif
a85d7ed0
NC
378#ifdef ARCH_s390
379 case bfd_arch_s390:
380 disassemble = print_insn_s390;
381 break;
382#endif
1c0d3aa6
NC
383#ifdef ARCH_score
384 case bfd_arch_score:
003ca0fd 385 if (big)
6ca4eb77 386 disassemble = print_insn_big_score;
1c0d3aa6 387 else
6ca4eb77 388 disassemble = print_insn_little_score;
1c0d3aa6
NC
389 break;
390#endif
252b5132
RH
391#ifdef ARCH_sh
392 case bfd_arch_sh:
1c509ca8 393 disassemble = print_insn_sh;
252b5132
RH
394 break;
395#endif
396#ifdef ARCH_sparc
397 case bfd_arch_sparc:
398 disassemble = print_insn_sparc;
399 break;
400#endif
e9f53129
AM
401#ifdef ARCH_spu
402 case bfd_arch_spu:
403 disassemble = print_insn_spu;
404 break;
405#endif
252b5132
RH
406#ifdef ARCH_tic30
407 case bfd_arch_tic30:
408 disassemble = print_insn_tic30;
409 break;
410#endif
026df7c5
NC
411#ifdef ARCH_tic4x
412 case bfd_arch_tic4x:
413 disassemble = print_insn_tic4x;
414 break;
415#endif
5c84d377
TW
416#ifdef ARCH_tic54x
417 case bfd_arch_tic54x:
418 disassemble = print_insn_tic54x;
419 break;
420#endif
40b36596
JM
421#ifdef ARCH_tic6x
422 case bfd_arch_tic6x:
423 disassemble = print_insn_tic6x;
424 break;
425#endif
252b5132
RH
426#ifdef ARCH_tic80
427 case bfd_arch_tic80:
428 disassemble = print_insn_tic80;
429 break;
430#endif
3f8107ab
AM
431#ifdef ARCH_ft32
432 case bfd_arch_ft32:
433 disassemble = print_insn_ft32;
434 break;
435#endif
252b5132
RH
436#ifdef ARCH_v850
437 case bfd_arch_v850:
de863c74 438 case bfd_arch_v850_rh850:
252b5132
RH
439 disassemble = print_insn_v850;
440 break;
441#endif
62ecb94c
PC
442#ifdef ARCH_wasm32
443 case bfd_arch_wasm32:
444 disassemble = print_insn_wasm32;
445 break;
446#endif
f6c1a2d5
NC
447#ifdef ARCH_xgate
448 case bfd_arch_xgate:
449 disassemble = print_insn_xgate;
450 break;
451#endif
93fbbb04
GK
452#ifdef ARCH_xstormy16
453 case bfd_arch_xstormy16:
454 disassemble = print_insn_xstormy16;
455 break;
456#endif
d70c5fc7
NC
457#ifdef ARCH_xc16x
458 case bfd_arch_xc16x:
459 disassemble = print_insn_xc16x;
460 break;
461#endif
e0001a05
NC
462#ifdef ARCH_xtensa
463 case bfd_arch_xtensa:
464 disassemble = print_insn_xtensa;
465 break;
466#endif
3c9b82ba
NC
467#ifdef ARCH_z80
468 case bfd_arch_z80:
469 disassemble = print_insn_z80;
470 break;
471#endif
252b5132
RH
472#ifdef ARCH_z8k
473 case bfd_arch_z8k:
003ca0fd 474 if (mach == bfd_mach_z8001)
252b5132 475 disassemble = print_insn_z8001;
b7ed8fad 476 else
252b5132
RH
477 disassemble = print_insn_z8002;
478 break;
479#endif
480#ifdef ARCH_vax
481 case bfd_arch_vax:
482 disassemble = print_insn_vax;
483 break;
fd3c93d5 484#endif
1945cfa5
EB
485#ifdef ARCH_visium
486 case bfd_arch_visium:
487 disassemble = print_insn_visium;
488 break;
489#endif
fd3c93d5
DB
490#ifdef ARCH_frv
491 case bfd_arch_frv:
492 disassemble = print_insn_frv;
493 break;
47b1a55a 494#endif
59b1530d
AG
495#ifdef ARCH_moxie
496 case bfd_arch_moxie:
497 disassemble = print_insn_moxie;
498 break;
499#endif
47b1a55a
SC
500#ifdef ARCH_iq2000
501 case bfd_arch_iq2000:
502 disassemble = print_insn_iq2000;
503 break;
49f58d10
JB
504#endif
505#ifdef ARCH_m32c
506 case bfd_arch_m32c:
507 disassemble = print_insn_m32c;
508 break;
aa137e4d
NC
509#endif
510#ifdef ARCH_tilegx
511 case bfd_arch_tilegx:
512 disassemble = print_insn_tilegx;
513 break;
514#endif
515#ifdef ARCH_tilepro
516 case bfd_arch_tilepro:
517 disassemble = print_insn_tilepro;
518 break;
252b5132
RH
519#endif
520 default:
521 return 0;
522 }
523 return disassemble;
524}
94470b23
NC
525
526void
e6c7cdec 527disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
94470b23 528{
a06ea964
NC
529#ifdef ARCH_aarch64
530 print_aarch64_disassembler_options (stream);
531#endif
37fd5ef3
CZ
532#ifdef ARCH_arc
533 print_arc_disassembler_options (stream);
534#endif
58efb6c0
NC
535#ifdef ARCH_arm
536 print_arm_disassembler_options (stream);
537#endif
640c0ccd
CD
538#ifdef ARCH_mips
539 print_mips_disassembler_options (stream);
540#endif
07dd56a9
NC
541#ifdef ARCH_powerpc
542 print_ppc_disassembler_options (stream);
543#endif
e23eba97
NC
544#ifdef ARCH_riscv
545 print_riscv_disassembler_options (stream);
546#endif
f59a29b9
L
547#ifdef ARCH_i386
548 print_i386_disassembler_options (stream);
549#endif
112b7c50
AK
550#ifdef ARCH_s390
551 print_s390_disassembler_options (stream);
552#endif
62ecb94c
PC
553#ifdef ARCH_wasm32
554 print_wasm32_disassembler_options (stream);
555#endif
b7ed8fad 556
94470b23
NC
557 return;
558}
22a398e1
NC
559
560void
561disassemble_init_for_target (struct disassemble_info * info)
562{
563 if (info == NULL)
564 return;
565
566 switch (info->arch)
567 {
a06ea964
NC
568#ifdef ARCH_aarch64
569 case bfd_arch_aarch64:
570 info->symbol_is_valid = aarch64_symbol_is_valid;
571 info->disassembler_needs_relocs = TRUE;
572 break;
573#endif
22a398e1
NC
574#ifdef ARCH_arm
575 case bfd_arch_arm:
576 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 577 info->disassembler_needs_relocs = TRUE;
22a398e1 578 break;
0bcb06d2
AS
579#endif
580#ifdef ARCH_ia64
581 case bfd_arch_ia64:
582 info->skip_zeroes = 16;
583 break;
584#endif
585#ifdef ARCH_tic4x
586 case bfd_arch_tic4x:
587 info->skip_zeroes = 32;
fb53f5a8 588 break;
49f58d10 589#endif
bd2f2e55
DB
590#ifdef ARCH_mep
591 case bfd_arch_mep:
592 info->skip_zeroes = 256;
593 info->skip_zeroes_at_end = 0;
594 break;
595#endif
a3c62988
NC
596#ifdef ARCH_metag
597 case bfd_arch_metag:
598 info->disassembler_needs_relocs = TRUE;
599 break;
600#endif
49f58d10
JB
601#ifdef ARCH_m32c
602 case bfd_arch_m32c:
6ca4eb77
AM
603 /* This processor in fact is little endian. The value set here
604 reflects the way opcodes are written in the cgen description. */
49f58d10 605 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB
606 if (! info->insn_sets)
607 {
608 info->insn_sets = cgen_bitset_create (ISA_MAX);
609 if (info->mach == bfd_mach_m16c)
610 cgen_bitset_set (info->insn_sets, ISA_M16C);
611 else
612 cgen_bitset_set (info->insn_sets, ISA_M32C);
613 }
49f58d10 614 break;
b240011a 615#endif
024d185c
DD
616#ifdef ARCH_pru
617 case bfd_arch_pru:
618 info->disassembler_needs_relocs = TRUE;
619 break;
620#endif
fbc22555
DD
621#ifdef ARCH_powerpc
622 case bfd_arch_powerpc:
623#endif
b240011a
AM
624#ifdef ARCH_rs6000
625 case bfd_arch_rs6000:
626#endif
627#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
628 disassemble_init_powerpc (info);
629 break;
65b48a81 630#endif
62ecb94c
PC
631#ifdef ARCH_wasm32
632 case bfd_arch_wasm32:
633 disassemble_init_wasm32 (info);
634 break;
635#endif
65b48a81
PB
636#ifdef ARCH_s390
637 case bfd_arch_s390:
638 disassemble_init_s390 (info);
639 break;
22a398e1
NC
640#endif
641 default:
642 break;
643 }
644}
65b48a81
PB
645
646/* Remove whitespace and consecutive commas from OPTIONS. */
647
648char *
649remove_whitespace_and_extra_commas (char *options)
650{
651 char *str;
652 size_t i, len;
653
654 if (options == NULL)
655 return NULL;
656
657 /* Strip off all trailing whitespace and commas. */
658 for (len = strlen (options); len > 0; len--)
659 {
660 if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
661 break;
662 options[len - 1] = '\0';
663 }
664
665 /* Convert all remaining whitespace to commas. */
666 for (i = 0; options[i] != '\0'; i++)
667 if (ISSPACE (options[i]))
668 options[i] = ',';
669
670 /* Remove consecutive commas. */
671 for (str = options; *str != '\0'; str++)
672 if (*str == ',' && (*(str + 1) == ',' || str == options))
673 {
674 char *next = str + 1;
675 while (*next == ',')
676 next++;
677 len = strlen (next);
678 if (str != options)
679 str++;
680 memmove (str, next, len);
681 next[len - (size_t)(next - str)] = '\0';
682 }
683 return (strlen (options) != 0) ? options : NULL;
684}
685
686/* Like STRCMP, but treat ',' the same as '\0' so that we match
687 strings like "foobar" against "foobar,xxyyzz,...". */
688
689int
690disassembler_options_cmp (const char *s1, const char *s2)
691{
692 unsigned char c1, c2;
693
694 do
695 {
696 c1 = (unsigned char) *s1++;
697 if (c1 == ',')
698 c1 = '\0';
699 c2 = (unsigned char) *s2++;
700 if (c2 == ',')
701 c2 = '\0';
702 if (c1 == '\0')
703 return c1 - c2;
704 }
705 while (c1 == c2);
706
707 return c1 - c2;
708}
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