bfd
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
aef6203b 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
aa820537 3 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
252b5132 4
9b201bb5
NC
5 This file is part of the GNU opcodes library.
6
7 This library is free software; you can redistribute it and/or modify
7499d566 8 it under the terms of the GNU General Public License as published by
9b201bb5 9 the Free Software Foundation; either version 3 of the License, or
7499d566 10 (at your option) any later version.
252b5132 11
7499d566
NC
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
252b5132 16
7499d566
NC
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
9b201bb5
NC
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
252b5132 21
0d8dfecf 22#include "sysdep.h"
252b5132
RH
23#include "dis-asm.h"
24
25#ifdef ARCH_all
252b5132
RH
26#define ARCH_alpha
27#define ARCH_arc
28#define ARCH_arm
adde6300 29#define ARCH_avr
4b7f6baa 30#define ARCH_bfin
3d3d428f 31#define ARCH_cr16
6c95a37f 32#define ARCH_cris
1fe1f39c 33#define ARCH_crx
252b5132
RH
34#define ARCH_d10v
35#define ARCH_d30v
d172d4ba 36#define ARCH_dlx
e729279b
NC
37#define ARCH_fr30
38#define ARCH_frv
252b5132
RH
39#define ARCH_h8300
40#define ARCH_h8500
41#define ARCH_hppa
5b93d8bb 42#define ARCH_i370
252b5132 43#define ARCH_i386
9d751335 44#define ARCH_i860
252b5132 45#define ARCH_i960
800eeca4 46#define ARCH_ia64
e729279b
NC
47#define ARCH_ip2k
48#define ARCH_iq2000
84e94c90 49#define ARCH_lm32
e729279b 50#define ARCH_m32c
252b5132 51#define ARCH_m32r
60bcf0fa
NC
52#define ARCH_m68hc11
53#define ARCH_m68hc12
e729279b 54#define ARCH_m68k
252b5132 55#define ARCH_m88k
7499d566 56#define ARCH_maxq
252b5132 57#define ARCH_mcore
bd2f2e55 58#define ARCH_mep
7ba29e2a 59#define ARCH_microblaze
252b5132 60#define ARCH_mips
3c3bdf30 61#define ARCH_mmix
252b5132
RH
62#define ARCH_mn10200
63#define ARCH_mn10300
59b1530d 64#define ARCH_moxie
d031aafb 65#define ARCH_mt
2469cfa2 66#define ARCH_msp430
252b5132 67#define ARCH_ns32k
87e6d782 68#define ARCH_openrisc
3b16e843 69#define ARCH_or32
e135f41b 70#define ARCH_pdp11
1e608f98 71#define ARCH_pj
252b5132
RH
72#define ARCH_powerpc
73#define ARCH_rs6000
c7927a3c 74#define ARCH_rx
a85d7ed0 75#define ARCH_s390
1c0d3aa6 76#define ARCH_score
252b5132
RH
77#define ARCH_sh
78#define ARCH_sparc
e9f53129 79#define ARCH_spu
252b5132 80#define ARCH_tic30
026df7c5 81#define ARCH_tic4x
5c84d377 82#define ARCH_tic54x
252b5132
RH
83#define ARCH_tic80
84#define ARCH_v850
85#define ARCH_vax
86#define ARCH_w65
93fbbb04 87#define ARCH_xstormy16
d70c5fc7 88#define ARCH_xc16x
e0001a05 89#define ARCH_xtensa
3c9b82ba 90#define ARCH_z80
252b5132 91#define ARCH_z8k
d28847ce 92#define INCLUDE_SHMEDIA
252b5132
RH
93#endif
94
49f58d10
JB
95#ifdef ARCH_m32c
96#include "m32c-desc.h"
97#endif
252b5132
RH
98
99disassembler_ftype
100disassembler (abfd)
101 bfd *abfd;
102{
103 enum bfd_architecture a = bfd_get_arch (abfd);
104 disassembler_ftype disassemble;
105
106 switch (a)
107 {
108 /* If you add a case to this table, also add it to the
109 ARCH_all definition right above this function. */
252b5132
RH
110#ifdef ARCH_alpha
111 case bfd_arch_alpha:
112 disassemble = print_insn_alpha;
113 break;
114#endif
115#ifdef ARCH_arc
116 case bfd_arch_arc:
117 {
0d2bcfaf 118 disassemble = arc_get_disassembler (abfd);
252b5132
RH
119 break;
120 }
121#endif
122#ifdef ARCH_arm
123 case bfd_arch_arm:
124 if (bfd_big_endian (abfd))
125 disassemble = print_insn_big_arm;
126 else
127 disassemble = print_insn_little_arm;
128 break;
129#endif
adde6300
AM
130#ifdef ARCH_avr
131 case bfd_arch_avr:
132 disassemble = print_insn_avr;
133 break;
134#endif
4b7f6baa
CM
135#ifdef ARCH_bfin
136 case bfd_arch_bfin:
137 disassemble = print_insn_bfin;
138 break;
139#endif
3d3d428f
NC
140#ifdef ARCH_cr16
141 case bfd_arch_cr16:
142 disassemble = print_insn_cr16;
143 break;
144#endif
6c95a37f
HPN
145#ifdef ARCH_cris
146 case bfd_arch_cris:
78966507 147 disassemble = cris_get_disassembler (abfd);
6c95a37f 148 break;
1fe1f39c
NC
149#endif
150#ifdef ARCH_crx
151 case bfd_arch_crx:
152 disassemble = print_insn_crx;
153 break;
6c95a37f 154#endif
252b5132
RH
155#ifdef ARCH_d10v
156 case bfd_arch_d10v:
157 disassemble = print_insn_d10v;
158 break;
159#endif
160#ifdef ARCH_d30v
161 case bfd_arch_d30v:
162 disassemble = print_insn_d30v;
163 break;
164#endif
d172d4ba
NC
165#ifdef ARCH_dlx
166 case bfd_arch_dlx:
167 /* As far as I know we only handle big-endian DLX objects. */
168 disassemble = print_insn_dlx;
169 break;
170#endif
252b5132
RH
171#ifdef ARCH_h8300
172 case bfd_arch_h8300:
049f8936
NC
173 if (bfd_get_mach (abfd) == bfd_mach_h8300h
174 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
252b5132 175 disassemble = print_insn_h8300h;
049f8936 176 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
d43ff6d2 177 || bfd_get_mach (abfd) == bfd_mach_h8300sn
a53b85e2
AO
178 || bfd_get_mach (abfd) == bfd_mach_h8300sx
179 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
252b5132 180 disassemble = print_insn_h8300s;
b7ed8fad 181 else
252b5132
RH
182 disassemble = print_insn_h8300;
183 break;
184#endif
185#ifdef ARCH_h8500
186 case bfd_arch_h8500:
187 disassemble = print_insn_h8500;
188 break;
189#endif
190#ifdef ARCH_hppa
191 case bfd_arch_hppa:
192 disassemble = print_insn_hppa;
193 break;
194#endif
5b93d8bb
AM
195#ifdef ARCH_i370
196 case bfd_arch_i370:
197 disassemble = print_insn_i370;
198 break;
199#endif
252b5132
RH
200#ifdef ARCH_i386
201 case bfd_arch_i386:
8a9036a4 202 case bfd_arch_l1om:
e396998b 203 disassemble = print_insn_i386;
252b5132
RH
204 break;
205#endif
9d751335
JE
206#ifdef ARCH_i860
207 case bfd_arch_i860:
208 disassemble = print_insn_i860;
209 break;
210#endif
252b5132
RH
211#ifdef ARCH_i960
212 case bfd_arch_i960:
213 disassemble = print_insn_i960;
214 break;
215#endif
800eeca4
JW
216#ifdef ARCH_ia64
217 case bfd_arch_ia64:
218 disassemble = print_insn_ia64;
219 break;
220#endif
a40cbfa3
NC
221#ifdef ARCH_ip2k
222 case bfd_arch_ip2k:
223 disassemble = print_insn_ip2k;
224 break;
225#endif
252b5132
RH
226#ifdef ARCH_fr30
227 case bfd_arch_fr30:
228 disassemble = print_insn_fr30;
229 break;
230#endif
84e94c90
NC
231#ifdef ARCH_lm32
232 case bfd_arch_lm32:
233 disassemble = print_insn_lm32;
234 break;
235#endif
252b5132
RH
236#ifdef ARCH_m32r
237 case bfd_arch_m32r:
238 disassemble = print_insn_m32r;
239 break;
240#endif
60bcf0fa
NC
241#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
242 case bfd_arch_m68hc11:
243 disassemble = print_insn_m68hc11;
244 break;
245 case bfd_arch_m68hc12:
246 disassemble = print_insn_m68hc12;
247 break;
248#endif
252b5132
RH
249#ifdef ARCH_m68k
250 case bfd_arch_m68k:
251 disassemble = print_insn_m68k;
252 break;
253#endif
254#ifdef ARCH_m88k
255 case bfd_arch_m88k:
256 disassemble = print_insn_m88k;
257 break;
258#endif
7499d566
NC
259#ifdef ARCH_maxq
260 case bfd_arch_maxq:
261 disassemble = print_insn_maxq_little;
262 break;
263#endif
d031aafb
NS
264#ifdef ARCH_mt
265 case bfd_arch_mt:
266 disassemble = print_insn_mt;
ac188222
DB
267 break;
268#endif
7ba29e2a
NC
269#ifdef ARCH_microblaze
270 case bfd_arch_microblaze:
271 disassemble = print_insn_microblaze;
272 break;
273#endif
2469cfa2
NC
274#ifdef ARCH_msp430
275 case bfd_arch_msp430:
276 disassemble = print_insn_msp430;
277 break;
278#endif
252b5132
RH
279#ifdef ARCH_ns32k
280 case bfd_arch_ns32k:
281 disassemble = print_insn_ns32k;
282 break;
283#endif
284#ifdef ARCH_mcore
285 case bfd_arch_mcore:
286 disassemble = print_insn_mcore;
287 break;
288#endif
bd2f2e55
DB
289#ifdef ARCH_mep
290 case bfd_arch_mep:
291 disassemble = print_insn_mep;
292 break;
293#endif
252b5132
RH
294#ifdef ARCH_mips
295 case bfd_arch_mips:
296 if (bfd_big_endian (abfd))
297 disassemble = print_insn_big_mips;
298 else
299 disassemble = print_insn_little_mips;
300 break;
301#endif
3c3bdf30
NC
302#ifdef ARCH_mmix
303 case bfd_arch_mmix:
304 disassemble = print_insn_mmix;
305 break;
306#endif
252b5132
RH
307#ifdef ARCH_mn10200
308 case bfd_arch_mn10200:
309 disassemble = print_insn_mn10200;
310 break;
311#endif
312#ifdef ARCH_mn10300
313 case bfd_arch_mn10300:
314 disassemble = print_insn_mn10300;
315 break;
316#endif
87e6d782
NC
317#ifdef ARCH_openrisc
318 case bfd_arch_openrisc:
319 disassemble = print_insn_openrisc;
320 break;
321#endif
3b16e843
NC
322#ifdef ARCH_or32
323 case bfd_arch_or32:
324 if (bfd_big_endian (abfd))
325 disassemble = print_insn_big_or32;
326 else
327 disassemble = print_insn_little_or32;
328 break;
329#endif
e135f41b
NC
330#ifdef ARCH_pdp11
331 case bfd_arch_pdp11:
332 disassemble = print_insn_pdp11;
333 break;
334#endif
1e608f98
ILT
335#ifdef ARCH_pj
336 case bfd_arch_pj:
337 disassemble = print_insn_pj;
338 break;
339#endif
252b5132
RH
340#ifdef ARCH_powerpc
341 case bfd_arch_powerpc:
342 if (bfd_big_endian (abfd))
343 disassemble = print_insn_big_powerpc;
344 else
345 disassemble = print_insn_little_powerpc;
346 break;
347#endif
348#ifdef ARCH_rs6000
349 case bfd_arch_rs6000:
39c20e8f 350 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
7f6d05e8
CP
351 disassemble = print_insn_big_powerpc;
352 else
353 disassemble = print_insn_rs6000;
252b5132
RH
354 break;
355#endif
c7927a3c
NC
356#ifdef ARCH_rx
357 case bfd_arch_rx:
358 disassemble = print_insn_rx;
359 break;
360#endif
a85d7ed0
NC
361#ifdef ARCH_s390
362 case bfd_arch_s390:
363 disassemble = print_insn_s390;
364 break;
365#endif
1c0d3aa6
NC
366#ifdef ARCH_score
367 case bfd_arch_score:
368 if (bfd_big_endian (abfd))
369 disassemble = print_insn_big_score;
370 else
371 disassemble = print_insn_little_score;
372 break;
373#endif
252b5132
RH
374#ifdef ARCH_sh
375 case bfd_arch_sh:
1c509ca8 376 disassemble = print_insn_sh;
252b5132
RH
377 break;
378#endif
379#ifdef ARCH_sparc
380 case bfd_arch_sparc:
381 disassemble = print_insn_sparc;
382 break;
383#endif
e9f53129
AM
384#ifdef ARCH_spu
385 case bfd_arch_spu:
386 disassemble = print_insn_spu;
387 break;
388#endif
252b5132
RH
389#ifdef ARCH_tic30
390 case bfd_arch_tic30:
391 disassemble = print_insn_tic30;
392 break;
393#endif
026df7c5
NC
394#ifdef ARCH_tic4x
395 case bfd_arch_tic4x:
396 disassemble = print_insn_tic4x;
397 break;
398#endif
5c84d377
TW
399#ifdef ARCH_tic54x
400 case bfd_arch_tic54x:
401 disassemble = print_insn_tic54x;
402 break;
403#endif
252b5132
RH
404#ifdef ARCH_tic80
405 case bfd_arch_tic80:
406 disassemble = print_insn_tic80;
407 break;
408#endif
409#ifdef ARCH_v850
410 case bfd_arch_v850:
411 disassemble = print_insn_v850;
412 break;
413#endif
414#ifdef ARCH_w65
415 case bfd_arch_w65:
416 disassemble = print_insn_w65;
417 break;
418#endif
93fbbb04
GK
419#ifdef ARCH_xstormy16
420 case bfd_arch_xstormy16:
421 disassemble = print_insn_xstormy16;
422 break;
423#endif
d70c5fc7
NC
424#ifdef ARCH_xc16x
425 case bfd_arch_xc16x:
426 disassemble = print_insn_xc16x;
427 break;
428#endif
e0001a05
NC
429#ifdef ARCH_xtensa
430 case bfd_arch_xtensa:
431 disassemble = print_insn_xtensa;
432 break;
433#endif
3c9b82ba
NC
434#ifdef ARCH_z80
435 case bfd_arch_z80:
436 disassemble = print_insn_z80;
437 break;
438#endif
252b5132
RH
439#ifdef ARCH_z8k
440 case bfd_arch_z8k:
441 if (bfd_get_mach(abfd) == bfd_mach_z8001)
442 disassemble = print_insn_z8001;
b7ed8fad 443 else
252b5132
RH
444 disassemble = print_insn_z8002;
445 break;
446#endif
447#ifdef ARCH_vax
448 case bfd_arch_vax:
449 disassemble = print_insn_vax;
450 break;
fd3c93d5
DB
451#endif
452#ifdef ARCH_frv
453 case bfd_arch_frv:
454 disassemble = print_insn_frv;
455 break;
47b1a55a 456#endif
59b1530d
AG
457#ifdef ARCH_moxie
458 case bfd_arch_moxie:
459 disassemble = print_insn_moxie;
460 break;
461#endif
47b1a55a
SC
462#ifdef ARCH_iq2000
463 case bfd_arch_iq2000:
464 disassemble = print_insn_iq2000;
465 break;
49f58d10
JB
466#endif
467#ifdef ARCH_m32c
468 case bfd_arch_m32c:
469 disassemble = print_insn_m32c;
470 break;
252b5132
RH
471#endif
472 default:
473 return 0;
474 }
475 return disassemble;
476}
94470b23
NC
477
478void
9aaaa291 479disassembler_usage (stream)
7f32bebc 480 FILE * stream ATTRIBUTE_UNUSED;
94470b23 481{
58efb6c0
NC
482#ifdef ARCH_arm
483 print_arm_disassembler_options (stream);
484#endif
640c0ccd
CD
485#ifdef ARCH_mips
486 print_mips_disassembler_options (stream);
487#endif
07dd56a9
NC
488#ifdef ARCH_powerpc
489 print_ppc_disassembler_options (stream);
490#endif
f59a29b9
L
491#ifdef ARCH_i386
492 print_i386_disassembler_options (stream);
493#endif
112b7c50
AK
494#ifdef ARCH_s390
495 print_s390_disassembler_options (stream);
496#endif
b7ed8fad 497
94470b23
NC
498 return;
499}
22a398e1
NC
500
501void
502disassemble_init_for_target (struct disassemble_info * info)
503{
504 if (info == NULL)
505 return;
506
507 switch (info->arch)
508 {
509#ifdef ARCH_arm
510 case bfd_arch_arm:
511 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 512 info->disassembler_needs_relocs = TRUE;
22a398e1 513 break;
0bcb06d2
AS
514#endif
515#ifdef ARCH_ia64
516 case bfd_arch_ia64:
517 info->skip_zeroes = 16;
518 break;
519#endif
520#ifdef ARCH_tic4x
521 case bfd_arch_tic4x:
522 info->skip_zeroes = 32;
fb53f5a8 523 break;
49f58d10 524#endif
bd2f2e55
DB
525#ifdef ARCH_mep
526 case bfd_arch_mep:
527 info->skip_zeroes = 256;
528 info->skip_zeroes_at_end = 0;
529 break;
530#endif
49f58d10
JB
531#ifdef ARCH_m32c
532 case bfd_arch_m32c:
533 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB
534 if (! info->insn_sets)
535 {
536 info->insn_sets = cgen_bitset_create (ISA_MAX);
537 if (info->mach == bfd_mach_m16c)
538 cgen_bitset_set (info->insn_sets, ISA_M16C);
539 else
540 cgen_bitset_set (info->insn_sets, ISA_M32C);
541 }
49f58d10 542 break;
22a398e1
NC
543#endif
544 default:
545 break;
546 }
547}
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