Remove h8500 support
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
219d1afa 2 Copyright (C) 1994-2018 Free Software Foundation, Inc.
252b5132 3
9b201bb5
NC
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7499d566 7 it under the terms of the GNU General Public License as published by
9b201bb5 8 the Free Software Foundation; either version 3 of the License, or
7499d566 9 (at your option) any later version.
252b5132 10
7499d566
NC
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
252b5132 15
7499d566
NC
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
9b201bb5
NC
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
252b5132 20
0d8dfecf 21#include "sysdep.h"
88c1242d 22#include "disassemble.h"
65b48a81 23#include "safe-ctype.h"
003ca0fd 24#include <assert.h>
252b5132
RH
25
26#ifdef ARCH_all
a06ea964 27#define ARCH_aarch64
252b5132
RH
28#define ARCH_alpha
29#define ARCH_arc
30#define ARCH_arm
adde6300 31#define ARCH_avr
4b7f6baa 32#define ARCH_bfin
3d3d428f 33#define ARCH_cr16
6c95a37f 34#define ARCH_cris
1fe1f39c 35#define ARCH_crx
252b5132
RH
36#define ARCH_d10v
37#define ARCH_d30v
d172d4ba 38#define ARCH_dlx
56b13185 39#define ARCH_epiphany
e729279b
NC
40#define ARCH_fr30
41#define ARCH_frv
3f8107ab 42#define ARCH_ft32
252b5132 43#define ARCH_h8300
252b5132 44#define ARCH_hppa
5b93d8bb 45#define ARCH_i370
252b5132 46#define ARCH_i386
800eeca4 47#define ARCH_ia64
e729279b
NC
48#define ARCH_ip2k
49#define ARCH_iq2000
84e94c90 50#define ARCH_lm32
e729279b 51#define ARCH_m32c
252b5132 52#define ARCH_m32r
60bcf0fa
NC
53#define ARCH_m68hc11
54#define ARCH_m68hc12
e729279b 55#define ARCH_m68k
252b5132
RH
56#define ARCH_m88k
57#define ARCH_mcore
bd2f2e55 58#define ARCH_mep
a3c62988 59#define ARCH_metag
7ba29e2a 60#define ARCH_microblaze
252b5132 61#define ARCH_mips
3c3bdf30 62#define ARCH_mmix
252b5132
RH
63#define ARCH_mn10200
64#define ARCH_mn10300
59b1530d 65#define ARCH_moxie
d031aafb 66#define ARCH_mt
2469cfa2 67#define ARCH_msp430
35c08157 68#define ARCH_nds32
36591ba1 69#define ARCH_nios2
252b5132 70#define ARCH_ns32k
73589c9d 71#define ARCH_or1k
e135f41b 72#define ARCH_pdp11
1e608f98 73#define ARCH_pj
252b5132 74#define ARCH_powerpc
11146849 75#define ARCH_pru
0bccfb29 76#define ARCH_riscv
252b5132 77#define ARCH_rs6000
99c513f6 78#define ARCH_rl78
c7927a3c 79#define ARCH_rx
a85d7ed0 80#define ARCH_s390
1c0d3aa6 81#define ARCH_score
252b5132
RH
82#define ARCH_sh
83#define ARCH_sparc
e9f53129 84#define ARCH_spu
252b5132 85#define ARCH_tic30
026df7c5 86#define ARCH_tic4x
5c84d377 87#define ARCH_tic54x
40b36596 88#define ARCH_tic6x
252b5132 89#define ARCH_tic80
aa137e4d
NC
90#define ARCH_tilegx
91#define ARCH_tilepro
252b5132
RH
92#define ARCH_v850
93#define ARCH_vax
1945cfa5 94#define ARCH_visium
252b5132 95#define ARCH_w65
62ecb94c 96#define ARCH_wasm32
93fbbb04 97#define ARCH_xstormy16
d70c5fc7 98#define ARCH_xc16x
f6c1a2d5 99#define ARCH_xgate
e0001a05 100#define ARCH_xtensa
3c9b82ba 101#define ARCH_z80
252b5132 102#define ARCH_z8k
d28847ce 103#define INCLUDE_SHMEDIA
252b5132
RH
104#endif
105
49f58d10
JB
106#ifdef ARCH_m32c
107#include "m32c-desc.h"
108#endif
252b5132
RH
109
110disassembler_ftype
b28b8b5e
L
111disassembler (enum bfd_architecture a,
112 bfd_boolean big ATTRIBUTE_UNUSED,
113 unsigned long mach ATTRIBUTE_UNUSED,
e347efc3 114 bfd *abfd ATTRIBUTE_UNUSED)
252b5132 115{
252b5132
RH
116 disassembler_ftype disassemble;
117
118 switch (a)
119 {
120 /* If you add a case to this table, also add it to the
121 ARCH_all definition right above this function. */
a06ea964
NC
122#ifdef ARCH_aarch64
123 case bfd_arch_aarch64:
124 disassemble = print_insn_aarch64;
125 break;
126#endif
252b5132
RH
127#ifdef ARCH_alpha
128 case bfd_arch_alpha:
129 disassemble = print_insn_alpha;
130 break;
131#endif
132#ifdef ARCH_arc
133 case bfd_arch_arc:
6ca4eb77
AM
134 disassemble = arc_get_disassembler (abfd);
135 break;
252b5132
RH
136#endif
137#ifdef ARCH_arm
138 case bfd_arch_arm:
003ca0fd 139 if (big)
252b5132
RH
140 disassemble = print_insn_big_arm;
141 else
142 disassemble = print_insn_little_arm;
143 break;
144#endif
adde6300
AM
145#ifdef ARCH_avr
146 case bfd_arch_avr:
147 disassemble = print_insn_avr;
148 break;
149#endif
4b7f6baa
CM
150#ifdef ARCH_bfin
151 case bfd_arch_bfin:
152 disassemble = print_insn_bfin;
153 break;
154#endif
3d3d428f
NC
155#ifdef ARCH_cr16
156 case bfd_arch_cr16:
157 disassemble = print_insn_cr16;
158 break;
159#endif
6c95a37f
HPN
160#ifdef ARCH_cris
161 case bfd_arch_cris:
78966507 162 disassemble = cris_get_disassembler (abfd);
6c95a37f 163 break;
1fe1f39c
NC
164#endif
165#ifdef ARCH_crx
166 case bfd_arch_crx:
167 disassemble = print_insn_crx;
168 break;
6c95a37f 169#endif
252b5132
RH
170#ifdef ARCH_d10v
171 case bfd_arch_d10v:
172 disassemble = print_insn_d10v;
173 break;
174#endif
175#ifdef ARCH_d30v
176 case bfd_arch_d30v:
177 disassemble = print_insn_d30v;
178 break;
179#endif
d172d4ba
NC
180#ifdef ARCH_dlx
181 case bfd_arch_dlx:
182 /* As far as I know we only handle big-endian DLX objects. */
183 disassemble = print_insn_dlx;
184 break;
185#endif
252b5132
RH
186#ifdef ARCH_h8300
187 case bfd_arch_h8300:
003ca0fd 188 if (mach == bfd_mach_h8300h || mach == bfd_mach_h8300hn)
252b5132 189 disassemble = print_insn_h8300h;
003ca0fd
YQ
190 else if (mach == bfd_mach_h8300s
191 || mach == bfd_mach_h8300sn
192 || mach == bfd_mach_h8300sx
193 || mach == bfd_mach_h8300sxn)
252b5132 194 disassemble = print_insn_h8300s;
b7ed8fad 195 else
252b5132
RH
196 disassemble = print_insn_h8300;
197 break;
198#endif
252b5132
RH
199#ifdef ARCH_hppa
200 case bfd_arch_hppa:
201 disassemble = print_insn_hppa;
202 break;
203#endif
5b93d8bb
AM
204#ifdef ARCH_i370
205 case bfd_arch_i370:
206 disassemble = print_insn_i370;
207 break;
208#endif
252b5132
RH
209#ifdef ARCH_i386
210 case bfd_arch_i386:
7b6d09fb 211 case bfd_arch_iamcu:
8a9036a4 212 case bfd_arch_l1om:
7a9068fe 213 case bfd_arch_k1om:
e396998b 214 disassemble = print_insn_i386;
252b5132
RH
215 break;
216#endif
800eeca4
JW
217#ifdef ARCH_ia64
218 case bfd_arch_ia64:
219 disassemble = print_insn_ia64;
220 break;
221#endif
a40cbfa3
NC
222#ifdef ARCH_ip2k
223 case bfd_arch_ip2k:
224 disassemble = print_insn_ip2k;
225 break;
226#endif
cfb8c092
NC
227#ifdef ARCH_epiphany
228 case bfd_arch_epiphany:
229 disassemble = print_insn_epiphany;
230 break;
231#endif
252b5132
RH
232#ifdef ARCH_fr30
233 case bfd_arch_fr30:
234 disassemble = print_insn_fr30;
235 break;
236#endif
84e94c90
NC
237#ifdef ARCH_lm32
238 case bfd_arch_lm32:
239 disassemble = print_insn_lm32;
240 break;
241#endif
252b5132
RH
242#ifdef ARCH_m32r
243 case bfd_arch_m32r:
244 disassemble = print_insn_m32r;
245 break;
246#endif
6927f982
NC
247#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \
248 || defined(ARCH_9s12x) || defined(ARCH_m9s12xg)
60bcf0fa
NC
249 case bfd_arch_m68hc11:
250 disassemble = print_insn_m68hc11;
251 break;
252 case bfd_arch_m68hc12:
253 disassemble = print_insn_m68hc12;
254 break;
6927f982
NC
255 case bfd_arch_m9s12x:
256 disassemble = print_insn_m9s12x;
257 break;
258 case bfd_arch_m9s12xg:
259 disassemble = print_insn_m9s12xg;
260 break;
60bcf0fa 261#endif
252b5132
RH
262#ifdef ARCH_m68k
263 case bfd_arch_m68k:
264 disassemble = print_insn_m68k;
265 break;
266#endif
267#ifdef ARCH_m88k
268 case bfd_arch_m88k:
269 disassemble = print_insn_m88k;
270 break;
271#endif
d031aafb
NS
272#ifdef ARCH_mt
273 case bfd_arch_mt:
274 disassemble = print_insn_mt;
ac188222
DB
275 break;
276#endif
7ba29e2a
NC
277#ifdef ARCH_microblaze
278 case bfd_arch_microblaze:
279 disassemble = print_insn_microblaze;
280 break;
281#endif
2469cfa2
NC
282#ifdef ARCH_msp430
283 case bfd_arch_msp430:
284 disassemble = print_insn_msp430;
285 break;
286#endif
35c08157
KLC
287#ifdef ARCH_nds32
288 case bfd_arch_nds32:
289 disassemble = print_insn_nds32;
290 break;
291#endif
252b5132
RH
292#ifdef ARCH_ns32k
293 case bfd_arch_ns32k:
294 disassemble = print_insn_ns32k;
295 break;
296#endif
297#ifdef ARCH_mcore
298 case bfd_arch_mcore:
299 disassemble = print_insn_mcore;
300 break;
301#endif
bd2f2e55
DB
302#ifdef ARCH_mep
303 case bfd_arch_mep:
304 disassemble = print_insn_mep;
305 break;
306#endif
a3c62988
NC
307#ifdef ARCH_metag
308 case bfd_arch_metag:
309 disassemble = print_insn_metag;
310 break;
311#endif
252b5132
RH
312#ifdef ARCH_mips
313 case bfd_arch_mips:
003ca0fd 314 if (big)
252b5132
RH
315 disassemble = print_insn_big_mips;
316 else
317 disassemble = print_insn_little_mips;
318 break;
319#endif
3c3bdf30
NC
320#ifdef ARCH_mmix
321 case bfd_arch_mmix:
322 disassemble = print_insn_mmix;
323 break;
324#endif
252b5132
RH
325#ifdef ARCH_mn10200
326 case bfd_arch_mn10200:
327 disassemble = print_insn_mn10200;
328 break;
329#endif
330#ifdef ARCH_mn10300
331 case bfd_arch_mn10300:
332 disassemble = print_insn_mn10300;
333 break;
334#endif
36591ba1
SL
335#ifdef ARCH_nios2
336 case bfd_arch_nios2:
003ca0fd 337 if (big)
36591ba1
SL
338 disassemble = print_insn_big_nios2;
339 else
340 disassemble = print_insn_little_nios2;
341 break;
342#endif
73589c9d
CS
343#ifdef ARCH_or1k
344 case bfd_arch_or1k:
345 disassemble = print_insn_or1k;
3b16e843
NC
346 break;
347#endif
e135f41b
NC
348#ifdef ARCH_pdp11
349 case bfd_arch_pdp11:
350 disassemble = print_insn_pdp11;
351 break;
352#endif
1e608f98
ILT
353#ifdef ARCH_pj
354 case bfd_arch_pj:
355 disassemble = print_insn_pj;
356 break;
357#endif
252b5132
RH
358#ifdef ARCH_powerpc
359 case bfd_arch_powerpc:
52fe4420
AM
360#endif
361#ifdef ARCH_rs6000
362 case bfd_arch_rs6000:
363#endif
364#if defined ARCH_powerpc || defined ARCH_rs6000
003ca0fd 365 if (big)
252b5132
RH
366 disassemble = print_insn_big_powerpc;
367 else
368 disassemble = print_insn_little_powerpc;
369 break;
370#endif
11146849
DD
371#ifdef ARCH_pru
372 case bfd_arch_pru:
373 disassemble = print_insn_pru;
374 break;
375#endif
e23eba97
NC
376#ifdef ARCH_riscv
377 case bfd_arch_riscv:
378 disassemble = print_insn_riscv;
ae4c0df4 379 break;
e23eba97 380#endif
99c513f6
DD
381#ifdef ARCH_rl78
382 case bfd_arch_rl78:
0952813b 383 disassemble = rl78_get_disassembler (abfd);
99c513f6
DD
384 break;
385#endif
c7927a3c
NC
386#ifdef ARCH_rx
387 case bfd_arch_rx:
388 disassemble = print_insn_rx;
389 break;
390#endif
a85d7ed0
NC
391#ifdef ARCH_s390
392 case bfd_arch_s390:
393 disassemble = print_insn_s390;
394 break;
395#endif
1c0d3aa6
NC
396#ifdef ARCH_score
397 case bfd_arch_score:
003ca0fd 398 if (big)
6ca4eb77 399 disassemble = print_insn_big_score;
1c0d3aa6 400 else
6ca4eb77 401 disassemble = print_insn_little_score;
1c0d3aa6
NC
402 break;
403#endif
252b5132
RH
404#ifdef ARCH_sh
405 case bfd_arch_sh:
1c509ca8 406 disassemble = print_insn_sh;
252b5132
RH
407 break;
408#endif
409#ifdef ARCH_sparc
410 case bfd_arch_sparc:
411 disassemble = print_insn_sparc;
412 break;
413#endif
e9f53129
AM
414#ifdef ARCH_spu
415 case bfd_arch_spu:
416 disassemble = print_insn_spu;
417 break;
418#endif
252b5132
RH
419#ifdef ARCH_tic30
420 case bfd_arch_tic30:
421 disassemble = print_insn_tic30;
422 break;
423#endif
026df7c5
NC
424#ifdef ARCH_tic4x
425 case bfd_arch_tic4x:
426 disassemble = print_insn_tic4x;
427 break;
428#endif
5c84d377
TW
429#ifdef ARCH_tic54x
430 case bfd_arch_tic54x:
431 disassemble = print_insn_tic54x;
432 break;
433#endif
40b36596
JM
434#ifdef ARCH_tic6x
435 case bfd_arch_tic6x:
436 disassemble = print_insn_tic6x;
437 break;
438#endif
252b5132
RH
439#ifdef ARCH_tic80
440 case bfd_arch_tic80:
441 disassemble = print_insn_tic80;
442 break;
443#endif
3f8107ab
AM
444#ifdef ARCH_ft32
445 case bfd_arch_ft32:
446 disassemble = print_insn_ft32;
447 break;
448#endif
252b5132
RH
449#ifdef ARCH_v850
450 case bfd_arch_v850:
de863c74 451 case bfd_arch_v850_rh850:
252b5132
RH
452 disassemble = print_insn_v850;
453 break;
454#endif
455#ifdef ARCH_w65
456 case bfd_arch_w65:
457 disassemble = print_insn_w65;
458 break;
459#endif
62ecb94c
PC
460#ifdef ARCH_wasm32
461 case bfd_arch_wasm32:
462 disassemble = print_insn_wasm32;
463 break;
464#endif
f6c1a2d5
NC
465#ifdef ARCH_xgate
466 case bfd_arch_xgate:
467 disassemble = print_insn_xgate;
468 break;
469#endif
93fbbb04
GK
470#ifdef ARCH_xstormy16
471 case bfd_arch_xstormy16:
472 disassemble = print_insn_xstormy16;
473 break;
474#endif
d70c5fc7
NC
475#ifdef ARCH_xc16x
476 case bfd_arch_xc16x:
477 disassemble = print_insn_xc16x;
478 break;
479#endif
e0001a05
NC
480#ifdef ARCH_xtensa
481 case bfd_arch_xtensa:
482 disassemble = print_insn_xtensa;
483 break;
484#endif
3c9b82ba
NC
485#ifdef ARCH_z80
486 case bfd_arch_z80:
487 disassemble = print_insn_z80;
488 break;
489#endif
252b5132
RH
490#ifdef ARCH_z8k
491 case bfd_arch_z8k:
003ca0fd 492 if (mach == bfd_mach_z8001)
252b5132 493 disassemble = print_insn_z8001;
b7ed8fad 494 else
252b5132
RH
495 disassemble = print_insn_z8002;
496 break;
497#endif
498#ifdef ARCH_vax
499 case bfd_arch_vax:
500 disassemble = print_insn_vax;
501 break;
fd3c93d5 502#endif
1945cfa5
EB
503#ifdef ARCH_visium
504 case bfd_arch_visium:
505 disassemble = print_insn_visium;
506 break;
507#endif
fd3c93d5
DB
508#ifdef ARCH_frv
509 case bfd_arch_frv:
510 disassemble = print_insn_frv;
511 break;
47b1a55a 512#endif
59b1530d
AG
513#ifdef ARCH_moxie
514 case bfd_arch_moxie:
515 disassemble = print_insn_moxie;
516 break;
517#endif
47b1a55a
SC
518#ifdef ARCH_iq2000
519 case bfd_arch_iq2000:
520 disassemble = print_insn_iq2000;
521 break;
49f58d10
JB
522#endif
523#ifdef ARCH_m32c
524 case bfd_arch_m32c:
525 disassemble = print_insn_m32c;
526 break;
aa137e4d
NC
527#endif
528#ifdef ARCH_tilegx
529 case bfd_arch_tilegx:
530 disassemble = print_insn_tilegx;
531 break;
532#endif
533#ifdef ARCH_tilepro
534 case bfd_arch_tilepro:
535 disassemble = print_insn_tilepro;
536 break;
252b5132
RH
537#endif
538 default:
539 return 0;
540 }
541 return disassemble;
542}
94470b23
NC
543
544void
e6c7cdec 545disassembler_usage (FILE *stream ATTRIBUTE_UNUSED)
94470b23 546{
a06ea964
NC
547#ifdef ARCH_aarch64
548 print_aarch64_disassembler_options (stream);
549#endif
37fd5ef3
CZ
550#ifdef ARCH_arc
551 print_arc_disassembler_options (stream);
552#endif
58efb6c0
NC
553#ifdef ARCH_arm
554 print_arm_disassembler_options (stream);
555#endif
640c0ccd
CD
556#ifdef ARCH_mips
557 print_mips_disassembler_options (stream);
558#endif
07dd56a9
NC
559#ifdef ARCH_powerpc
560 print_ppc_disassembler_options (stream);
561#endif
e23eba97
NC
562#ifdef ARCH_riscv
563 print_riscv_disassembler_options (stream);
564#endif
f59a29b9
L
565#ifdef ARCH_i386
566 print_i386_disassembler_options (stream);
567#endif
112b7c50
AK
568#ifdef ARCH_s390
569 print_s390_disassembler_options (stream);
570#endif
62ecb94c
PC
571#ifdef ARCH_wasm32
572 print_wasm32_disassembler_options (stream);
573#endif
b7ed8fad 574
94470b23
NC
575 return;
576}
22a398e1
NC
577
578void
579disassemble_init_for_target (struct disassemble_info * info)
580{
581 if (info == NULL)
582 return;
583
584 switch (info->arch)
585 {
a06ea964
NC
586#ifdef ARCH_aarch64
587 case bfd_arch_aarch64:
588 info->symbol_is_valid = aarch64_symbol_is_valid;
589 info->disassembler_needs_relocs = TRUE;
590 break;
591#endif
22a398e1
NC
592#ifdef ARCH_arm
593 case bfd_arch_arm:
594 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 595 info->disassembler_needs_relocs = TRUE;
22a398e1 596 break;
0bcb06d2
AS
597#endif
598#ifdef ARCH_ia64
599 case bfd_arch_ia64:
600 info->skip_zeroes = 16;
601 break;
602#endif
603#ifdef ARCH_tic4x
604 case bfd_arch_tic4x:
605 info->skip_zeroes = 32;
fb53f5a8 606 break;
49f58d10 607#endif
bd2f2e55
DB
608#ifdef ARCH_mep
609 case bfd_arch_mep:
610 info->skip_zeroes = 256;
611 info->skip_zeroes_at_end = 0;
612 break;
613#endif
a3c62988
NC
614#ifdef ARCH_metag
615 case bfd_arch_metag:
616 info->disassembler_needs_relocs = TRUE;
617 break;
618#endif
49f58d10
JB
619#ifdef ARCH_m32c
620 case bfd_arch_m32c:
6ca4eb77
AM
621 /* This processor in fact is little endian. The value set here
622 reflects the way opcodes are written in the cgen description. */
49f58d10 623 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB
624 if (! info->insn_sets)
625 {
626 info->insn_sets = cgen_bitset_create (ISA_MAX);
627 if (info->mach == bfd_mach_m16c)
628 cgen_bitset_set (info->insn_sets, ISA_M16C);
629 else
630 cgen_bitset_set (info->insn_sets, ISA_M32C);
631 }
49f58d10 632 break;
b240011a 633#endif
024d185c
DD
634#ifdef ARCH_pru
635 case bfd_arch_pru:
636 info->disassembler_needs_relocs = TRUE;
637 break;
638#endif
fbc22555
DD
639#ifdef ARCH_powerpc
640 case bfd_arch_powerpc:
641#endif
b240011a
AM
642#ifdef ARCH_rs6000
643 case bfd_arch_rs6000:
644#endif
645#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
646 disassemble_init_powerpc (info);
647 break;
65b48a81 648#endif
62ecb94c
PC
649#ifdef ARCH_wasm32
650 case bfd_arch_wasm32:
651 disassemble_init_wasm32 (info);
652 break;
653#endif
65b48a81
PB
654#ifdef ARCH_s390
655 case bfd_arch_s390:
656 disassemble_init_s390 (info);
657 break;
22a398e1
NC
658#endif
659 default:
660 break;
661 }
662}
65b48a81
PB
663
664/* Remove whitespace and consecutive commas from OPTIONS. */
665
666char *
667remove_whitespace_and_extra_commas (char *options)
668{
669 char *str;
670 size_t i, len;
671
672 if (options == NULL)
673 return NULL;
674
675 /* Strip off all trailing whitespace and commas. */
676 for (len = strlen (options); len > 0; len--)
677 {
678 if (!ISSPACE (options[len - 1]) && options[len - 1] != ',')
679 break;
680 options[len - 1] = '\0';
681 }
682
683 /* Convert all remaining whitespace to commas. */
684 for (i = 0; options[i] != '\0'; i++)
685 if (ISSPACE (options[i]))
686 options[i] = ',';
687
688 /* Remove consecutive commas. */
689 for (str = options; *str != '\0'; str++)
690 if (*str == ',' && (*(str + 1) == ',' || str == options))
691 {
692 char *next = str + 1;
693 while (*next == ',')
694 next++;
695 len = strlen (next);
696 if (str != options)
697 str++;
698 memmove (str, next, len);
699 next[len - (size_t)(next - str)] = '\0';
700 }
701 return (strlen (options) != 0) ? options : NULL;
702}
703
704/* Like STRCMP, but treat ',' the same as '\0' so that we match
705 strings like "foobar" against "foobar,xxyyzz,...". */
706
707int
708disassembler_options_cmp (const char *s1, const char *s2)
709{
710 unsigned char c1, c2;
711
712 do
713 {
714 c1 = (unsigned char) *s1++;
715 if (c1 == ',')
716 c1 = '\0';
717 c2 = (unsigned char) *s2++;
718 if (c2 == ',')
719 c2 = '\0';
720 if (c1 == '\0')
721 return c1 - c2;
722 }
723 while (c1 == c2);
724
725 return c1 - c2;
726}
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