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Add support for Motorola XGATE embedded CPU
[deliverable/binutils-gdb.git] / opcodes / disassemble.c
CommitLineData
252b5132 1/* Select disassembly routine for specified architecture.
aef6203b 2 Copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
b240011a
AM		 3 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011, 2012
4 Free Software Foundation, Inc.
252b5132 5
9b201bb5
NC		 6 This file is part of the GNU opcodes library.
7
8 This library is free software; you can redistribute it and/or modify
7499d566 9 it under the terms of the GNU General Public License as published by
9b201bb5 10 the Free Software Foundation; either version 3 of the License, or
7499d566 11 (at your option) any later version.
252b5132 12
7499d566
NC		 13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
252b5132 17
7499d566
NC		 18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
9b201bb5
NC		 20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
21 MA 02110-1301, USA. */
252b5132 22
0d8dfecf 23#include "sysdep.h"
252b5132
RH		 24#include "dis-asm.h"
25
26#ifdef ARCH_all
252b5132
RH		 27#define ARCH_alpha
28#define ARCH_arc
29#define ARCH_arm
adde6300 30#define ARCH_avr
4b7f6baa 31#define ARCH_bfin
3d3d428f 32#define ARCH_cr16
6c95a37f 33#define ARCH_cris
1fe1f39c 34#define ARCH_crx
252b5132
RH		 35#define ARCH_d10v
36#define ARCH_d30v
d172d4ba 37#define ARCH_dlx
56b13185 38#define ARCH_epiphany
e729279b
NC		 39#define ARCH_fr30
40#define ARCH_frv
252b5132
RH		 41#define ARCH_h8300
42#define ARCH_h8500
43#define ARCH_hppa
5b93d8bb 44#define ARCH_i370
252b5132 45#define ARCH_i386
9d751335 46#define ARCH_i860
252b5132 47#define ARCH_i960
800eeca4 48#define ARCH_ia64
e729279b
NC		 49#define ARCH_ip2k
50#define ARCH_iq2000
84e94c90 51#define ARCH_lm32
e729279b 52#define ARCH_m32c
252b5132 53#define ARCH_m32r
60bcf0fa
NC		 54#define ARCH_m68hc11
55#define ARCH_m68hc12
e729279b 56#define ARCH_m68k
252b5132
RH		 57#define ARCH_m88k
58#define ARCH_mcore
bd2f2e55 59#define ARCH_mep
7ba29e2a 60#define ARCH_microblaze
252b5132 61#define ARCH_mips
3c3bdf30 62#define ARCH_mmix
252b5132
RH		 63#define ARCH_mn10200
64#define ARCH_mn10300
59b1530d 65#define ARCH_moxie
d031aafb 66#define ARCH_mt
2469cfa2 67#define ARCH_msp430
252b5132 68#define ARCH_ns32k
87e6d782 69#define ARCH_openrisc
3b16e843 70#define ARCH_or32
e135f41b 71#define ARCH_pdp11
1e608f98 72#define ARCH_pj
252b5132
RH		 73#define ARCH_powerpc
74#define ARCH_rs6000
99c513f6 75#define ARCH_rl78
c7927a3c 76#define ARCH_rx
a85d7ed0 77#define ARCH_s390
1c0d3aa6 78#define ARCH_score
252b5132
RH		 79#define ARCH_sh
80#define ARCH_sparc
e9f53129 81#define ARCH_spu
252b5132 82#define ARCH_tic30
026df7c5 83#define ARCH_tic4x
5c84d377 84#define ARCH_tic54x
40b36596 85#define ARCH_tic6x
252b5132 86#define ARCH_tic80
aa137e4d
NC		 87#define ARCH_tilegx
88#define ARCH_tilepro
252b5132
RH		 89#define ARCH_v850
90#define ARCH_vax
91#define ARCH_w65
93fbbb04 92#define ARCH_xstormy16
d70c5fc7 93#define ARCH_xc16x
f6c1a2d5 94#define ARCH_xgate
e0001a05 95#define ARCH_xtensa
3c9b82ba 96#define ARCH_z80
252b5132 97#define ARCH_z8k
d28847ce 98#define INCLUDE_SHMEDIA
252b5132
RH		 99#endif
100
49f58d10
JB		 101#ifdef ARCH_m32c
102#include "m32c-desc.h"
103#endif
252b5132
RH		 104
105disassembler_ftype
106disassembler (abfd)
107 bfd *abfd;
108{
109 enum bfd_architecture a = bfd_get_arch (abfd);
110 disassembler_ftype disassemble;
111
112 switch (a)
113 {
114 /* If you add a case to this table, also add it to the
115 ARCH_all definition right above this function. */
252b5132
RH		 116#ifdef ARCH_alpha
117 case bfd_arch_alpha:
118 disassemble = print_insn_alpha;
119 break;
120#endif
121#ifdef ARCH_arc
122 case bfd_arch_arc:
6ca4eb77
AM		 123 disassemble = arc_get_disassembler (abfd);
124 break;
252b5132
RH		 125#endif
126#ifdef ARCH_arm
127 case bfd_arch_arm:
128 if (bfd_big_endian (abfd))
129 disassemble = print_insn_big_arm;
130 else
131 disassemble = print_insn_little_arm;
132 break;
133#endif
adde6300
AM		 134#ifdef ARCH_avr
135 case bfd_arch_avr:
136 disassemble = print_insn_avr;
137 break;
138#endif
4b7f6baa
CM		 139#ifdef ARCH_bfin
140 case bfd_arch_bfin:
141 disassemble = print_insn_bfin;
142 break;
143#endif
3d3d428f
NC		 144#ifdef ARCH_cr16
145 case bfd_arch_cr16:
146 disassemble = print_insn_cr16;
147 break;
148#endif
6c95a37f
HPN		 149#ifdef ARCH_cris
150 case bfd_arch_cris:
78966507 151 disassemble = cris_get_disassembler (abfd);
6c95a37f 152 break;
1fe1f39c
NC		 153#endif
154#ifdef ARCH_crx
155 case bfd_arch_crx:
156 disassemble = print_insn_crx;
157 break;
6c95a37f 158#endif
252b5132
RH		 159#ifdef ARCH_d10v
160 case bfd_arch_d10v:
161 disassemble = print_insn_d10v;
162 break;
163#endif
164#ifdef ARCH_d30v
165 case bfd_arch_d30v:
166 disassemble = print_insn_d30v;
167 break;
168#endif
d172d4ba
NC		 169#ifdef ARCH_dlx
170 case bfd_arch_dlx:
171 /* As far as I know we only handle big-endian DLX objects. */
172 disassemble = print_insn_dlx;
173 break;
174#endif
252b5132
RH		 175#ifdef ARCH_h8300
176 case bfd_arch_h8300:
049f8936
NC		 177 if (bfd_get_mach (abfd) == bfd_mach_h8300h
178 || bfd_get_mach (abfd) == bfd_mach_h8300hn)
252b5132 179 disassemble = print_insn_h8300h;
049f8936 180 else if (bfd_get_mach (abfd) == bfd_mach_h8300s
d43ff6d2 181 || bfd_get_mach (abfd) == bfd_mach_h8300sn
a53b85e2
AO		 182 || bfd_get_mach (abfd) == bfd_mach_h8300sx
183 || bfd_get_mach (abfd) == bfd_mach_h8300sxn)
252b5132 184 disassemble = print_insn_h8300s;
b7ed8fad 185 else
252b5132
RH		 186 disassemble = print_insn_h8300;
187 break;
188#endif
189#ifdef ARCH_h8500
190 case bfd_arch_h8500:
191 disassemble = print_insn_h8500;
192 break;
193#endif
194#ifdef ARCH_hppa
195 case bfd_arch_hppa:
196 disassemble = print_insn_hppa;
197 break;
198#endif
5b93d8bb
AM		 199#ifdef ARCH_i370
200 case bfd_arch_i370:
201 disassemble = print_insn_i370;
202 break;
203#endif
252b5132
RH		 204#ifdef ARCH_i386
205 case bfd_arch_i386:
8a9036a4 206 case bfd_arch_l1om:
7a9068fe 207 case bfd_arch_k1om:
e396998b 208 disassemble = print_insn_i386;
252b5132
RH		 209 break;
210#endif
9d751335
JE		 211#ifdef ARCH_i860
212 case bfd_arch_i860:
213 disassemble = print_insn_i860;
214 break;
215#endif
252b5132
RH		 216#ifdef ARCH_i960
217 case bfd_arch_i960:
218 disassemble = print_insn_i960;
219 break;
220#endif
800eeca4
JW		 221#ifdef ARCH_ia64
222 case bfd_arch_ia64:
223 disassemble = print_insn_ia64;
224 break;
225#endif
a40cbfa3
NC		 226#ifdef ARCH_ip2k
227 case bfd_arch_ip2k:
228 disassemble = print_insn_ip2k;
229 break;
230#endif
cfb8c092
NC		 231#ifdef ARCH_epiphany
232 case bfd_arch_epiphany:
233 disassemble = print_insn_epiphany;
234 break;
235#endif
252b5132
RH		 236#ifdef ARCH_fr30
237 case bfd_arch_fr30:
238 disassemble = print_insn_fr30;
239 break;
240#endif
84e94c90
NC		 241#ifdef ARCH_lm32
242 case bfd_arch_lm32:
243 disassemble = print_insn_lm32;
244 break;
245#endif
252b5132
RH		 246#ifdef ARCH_m32r
247 case bfd_arch_m32r:
248 disassemble = print_insn_m32r;
249 break;
250#endif
60bcf0fa
NC		 251#if defined(ARCH_m68hc11) || defined(ARCH_m68hc12)
252 case bfd_arch_m68hc11:
253 disassemble = print_insn_m68hc11;
254 break;
255 case bfd_arch_m68hc12:
256 disassemble = print_insn_m68hc12;
257 break;
258#endif
252b5132
RH		 259#ifdef ARCH_m68k
260 case bfd_arch_m68k:
261 disassemble = print_insn_m68k;
262 break;
263#endif
264#ifdef ARCH_m88k
265 case bfd_arch_m88k:
266 disassemble = print_insn_m88k;
267 break;
268#endif
d031aafb
NS		 269#ifdef ARCH_mt
270 case bfd_arch_mt:
271 disassemble = print_insn_mt;
ac188222
DB		 272 break;
273#endif
7ba29e2a
NC		 274#ifdef ARCH_microblaze
275 case bfd_arch_microblaze:
276 disassemble = print_insn_microblaze;
277 break;
278#endif
2469cfa2
NC		 279#ifdef ARCH_msp430
280 case bfd_arch_msp430:
281 disassemble = print_insn_msp430;
282 break;
283#endif
252b5132
RH		 284#ifdef ARCH_ns32k
285 case bfd_arch_ns32k:
286 disassemble = print_insn_ns32k;
287 break;
288#endif
289#ifdef ARCH_mcore
290 case bfd_arch_mcore:
291 disassemble = print_insn_mcore;
292 break;
293#endif
bd2f2e55
DB		 294#ifdef ARCH_mep
295 case bfd_arch_mep:
296 disassemble = print_insn_mep;
297 break;
298#endif
252b5132
RH		 299#ifdef ARCH_mips
300 case bfd_arch_mips:
301 if (bfd_big_endian (abfd))
302 disassemble = print_insn_big_mips;
303 else
304 disassemble = print_insn_little_mips;
305 break;
306#endif
3c3bdf30
NC		 307#ifdef ARCH_mmix
308 case bfd_arch_mmix:
309 disassemble = print_insn_mmix;
310 break;
311#endif
252b5132
RH		 312#ifdef ARCH_mn10200
313 case bfd_arch_mn10200:
314 disassemble = print_insn_mn10200;
315 break;
316#endif
317#ifdef ARCH_mn10300
318 case bfd_arch_mn10300:
319 disassemble = print_insn_mn10300;
320 break;
321#endif
87e6d782
NC		 322#ifdef ARCH_openrisc
323 case bfd_arch_openrisc:
324 disassemble = print_insn_openrisc;
325 break;
326#endif
3b16e843
NC		 327#ifdef ARCH_or32
328 case bfd_arch_or32:
329 if (bfd_big_endian (abfd))
6ca4eb77 330 disassemble = print_insn_big_or32;
3b16e843 331 else
6ca4eb77 332 disassemble = print_insn_little_or32;
3b16e843
NC		 333 break;
334#endif
e135f41b
NC		 335#ifdef ARCH_pdp11
336 case bfd_arch_pdp11:
337 disassemble = print_insn_pdp11;
338 break;
339#endif
1e608f98
ILT		 340#ifdef ARCH_pj
341 case bfd_arch_pj:
342 disassemble = print_insn_pj;
343 break;
344#endif
252b5132
RH		 345#ifdef ARCH_powerpc
346 case bfd_arch_powerpc:
347 if (bfd_big_endian (abfd))
348 disassemble = print_insn_big_powerpc;
349 else
350 disassemble = print_insn_little_powerpc;
351 break;
352#endif
353#ifdef ARCH_rs6000
354 case bfd_arch_rs6000:
39c20e8f 355 if (bfd_get_mach (abfd) == bfd_mach_ppc_620)
7f6d05e8
CP		 356 disassemble = print_insn_big_powerpc;
357 else
358 disassemble = print_insn_rs6000;
252b5132
RH		 359 break;
360#endif
99c513f6
DD		 361#ifdef ARCH_rl78
362 case bfd_arch_rl78:
363 disassemble = print_insn_rl78;
364 break;
365#endif
c7927a3c
NC		 366#ifdef ARCH_rx
367 case bfd_arch_rx:
368 disassemble = print_insn_rx;
369 break;
370#endif
a85d7ed0
NC		 371#ifdef ARCH_s390
372 case bfd_arch_s390:
373 disassemble = print_insn_s390;
374 break;
375#endif
1c0d3aa6
NC		 376#ifdef ARCH_score
377 case bfd_arch_score:
378 if (bfd_big_endian (abfd))
6ca4eb77 379 disassemble = print_insn_big_score;
1c0d3aa6 380 else
6ca4eb77 381 disassemble = print_insn_little_score;
1c0d3aa6
NC		 382 break;
383#endif
252b5132
RH		 384#ifdef ARCH_sh
385 case bfd_arch_sh:
1c509ca8 386 disassemble = print_insn_sh;
252b5132
RH		 387 break;
388#endif
389#ifdef ARCH_sparc
390 case bfd_arch_sparc:
391 disassemble = print_insn_sparc;
392 break;
393#endif
e9f53129
AM		 394#ifdef ARCH_spu
395 case bfd_arch_spu:
396 disassemble = print_insn_spu;
397 break;
398#endif
252b5132
RH		 399#ifdef ARCH_tic30
400 case bfd_arch_tic30:
401 disassemble = print_insn_tic30;
402 break;
403#endif
026df7c5
NC		 404#ifdef ARCH_tic4x
405 case bfd_arch_tic4x:
406 disassemble = print_insn_tic4x;
407 break;
408#endif
5c84d377
TW		 409#ifdef ARCH_tic54x
410 case bfd_arch_tic54x:
411 disassemble = print_insn_tic54x;
412 break;
413#endif
40b36596
JM		 414#ifdef ARCH_tic6x
415 case bfd_arch_tic6x:
416 disassemble = print_insn_tic6x;
417 break;
418#endif
252b5132
RH		 419#ifdef ARCH_tic80
420 case bfd_arch_tic80:
421 disassemble = print_insn_tic80;
422 break;
423#endif
424#ifdef ARCH_v850
425 case bfd_arch_v850:
426 disassemble = print_insn_v850;
427 break;
428#endif
429#ifdef ARCH_w65
430 case bfd_arch_w65:
431 disassemble = print_insn_w65;
432 break;
433#endif
f6c1a2d5
NC		 434#ifdef ARCH_xgate
435 case bfd_arch_xgate:
436 disassemble = print_insn_xgate;
437 break;
438#endif
93fbbb04
GK		 439#ifdef ARCH_xstormy16
440 case bfd_arch_xstormy16:
441 disassemble = print_insn_xstormy16;
442 break;
443#endif
d70c5fc7
NC		 444#ifdef ARCH_xc16x
445 case bfd_arch_xc16x:
446 disassemble = print_insn_xc16x;
447 break;
448#endif
e0001a05
NC		 449#ifdef ARCH_xtensa
450 case bfd_arch_xtensa:
451 disassemble = print_insn_xtensa;
452 break;
453#endif
3c9b82ba
NC		 454#ifdef ARCH_z80
455 case bfd_arch_z80:
456 disassemble = print_insn_z80;
457 break;
458#endif
252b5132
RH		 459#ifdef ARCH_z8k
460 case bfd_arch_z8k:
461 if (bfd_get_mach(abfd) == bfd_mach_z8001)
462 disassemble = print_insn_z8001;
b7ed8fad 463 else
252b5132
RH		 464 disassemble = print_insn_z8002;
465 break;
466#endif
467#ifdef ARCH_vax
468 case bfd_arch_vax:
469 disassemble = print_insn_vax;
470 break;
fd3c93d5
DB		 471#endif
472#ifdef ARCH_frv
473 case bfd_arch_frv:
474 disassemble = print_insn_frv;
475 break;
47b1a55a 476#endif
59b1530d
AG		 477#ifdef ARCH_moxie
478 case bfd_arch_moxie:
479 disassemble = print_insn_moxie;
480 break;
481#endif
47b1a55a
SC		 482#ifdef ARCH_iq2000
483 case bfd_arch_iq2000:
484 disassemble = print_insn_iq2000;
485 break;
49f58d10
JB		 486#endif
487#ifdef ARCH_m32c
488 case bfd_arch_m32c:
489 disassemble = print_insn_m32c;
490 break;
aa137e4d
NC		 491#endif
492#ifdef ARCH_tilegx
493 case bfd_arch_tilegx:
494 disassemble = print_insn_tilegx;
495 break;
496#endif
497#ifdef ARCH_tilepro
498 case bfd_arch_tilepro:
499 disassemble = print_insn_tilepro;
500 break;
252b5132
RH		 501#endif
502 default:
503 return 0;
504 }
505 return disassemble;
506}
94470b23
NC		 507
508void
9aaaa291 509disassembler_usage (stream)
7f32bebc 510 FILE * stream ATTRIBUTE_UNUSED;
94470b23 511{
58efb6c0
NC		 512#ifdef ARCH_arm
513 print_arm_disassembler_options (stream);
514#endif
640c0ccd
CD		 515#ifdef ARCH_mips
516 print_mips_disassembler_options (stream);
517#endif
07dd56a9
NC		 518#ifdef ARCH_powerpc
519 print_ppc_disassembler_options (stream);
520#endif
f59a29b9
L		 521#ifdef ARCH_i386
522 print_i386_disassembler_options (stream);
523#endif
112b7c50
AK		 524#ifdef ARCH_s390
525 print_s390_disassembler_options (stream);
526#endif
b7ed8fad 527
94470b23
NC		 528 return;
529}
22a398e1
NC		 530
531void
532disassemble_init_for_target (struct disassemble_info * info)
533{
534 if (info == NULL)
535 return;
536
537 switch (info->arch)
538 {
539#ifdef ARCH_arm
540 case bfd_arch_arm:
541 info->symbol_is_valid = arm_symbol_is_valid;
d99b6465 542 info->disassembler_needs_relocs = TRUE;
22a398e1 543 break;
0bcb06d2
AS		 544#endif
545#ifdef ARCH_ia64
546 case bfd_arch_ia64:
547 info->skip_zeroes = 16;
548 break;
549#endif
550#ifdef ARCH_tic4x
551 case bfd_arch_tic4x:
552 info->skip_zeroes = 32;
fb53f5a8 553 break;
49f58d10 554#endif
bd2f2e55
DB		 555#ifdef ARCH_mep
556 case bfd_arch_mep:
557 info->skip_zeroes = 256;
558 info->skip_zeroes_at_end = 0;
559 break;
560#endif
49f58d10
JB		 561#ifdef ARCH_m32c
562 case bfd_arch_m32c:
6ca4eb77
AM		 563 /* This processor in fact is little endian. The value set here
564 reflects the way opcodes are written in the cgen description. */
49f58d10 565 info->endian = BFD_ENDIAN_BIG;
fb53f5a8
DB		 566 if (! info->insn_sets)
567 {
568 info->insn_sets = cgen_bitset_create (ISA_MAX);
569 if (info->mach == bfd_mach_m16c)
570 cgen_bitset_set (info->insn_sets, ISA_M16C);
571 else
572 cgen_bitset_set (info->insn_sets, ISA_M32C);
573 }
49f58d10 574 break;
b240011a
AM		 575#endif
576#ifdef ARCH_powerpc
577 case bfd_arch_powerpc:
578#endif
579#ifdef ARCH_rs6000
580 case bfd_arch_rs6000:
581#endif
582#if defined (ARCH_powerpc) || defined (ARCH_rs6000)
583 disassemble_init_powerpc (info);
584 break;
22a398e1
NC		 585#endif
586 default:
587 break;
588 }
589}
GDB Binutils - Deliverables
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