2004-03-12 Michal Ludvig <mludvig@suse.cz>
[deliverable/binutils-gdb.git] / opcodes / fr30-asm.c
CommitLineData
252b5132
RH
1/* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4THIS FILE IS MACHINE GENERATED WITH CGEN.
5- the resultant file is machine generated, cgen-asm.in isn't
6
060d22b0 7Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
252b5132
RH
8
9This file is part of the GNU Binutils and GDB, the GNU debugger.
10
11This program is free software; you can redistribute it and/or modify
12it under the terms of the GNU General Public License as published by
13the Free Software Foundation; either version 2, or (at your option)
14any later version.
15
16This program is distributed in the hope that it will be useful,
17but WITHOUT ANY WARRANTY; without even the implied warranty of
18MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19GNU General Public License for more details.
20
21You should have received a copy of the GNU General Public License
22along with this program; if not, write to the Free Software Foundation, Inc.,
2359 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24
25/* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28#include "sysdep.h"
252b5132
RH
29#include <stdio.h>
30#include "ansidecl.h"
31#include "bfd.h"
32#include "symcat.h"
33#include "fr30-desc.h"
34#include "fr30-opc.h"
35#include "opintl.h"
fc7bc883 36#include "xregex.h"
d5b2f4d6 37#include "libiberty.h"
37111cc7 38#include "safe-ctype.h"
252b5132 39
37111cc7 40#undef min
252b5132 41#define min(a,b) ((a) < (b) ? (a) : (b))
37111cc7 42#undef max
252b5132
RH
43#define max(a,b) ((a) > (b) ? (a) : (b))
44
0e2ee3ca 45static const char * parse_insn_normal
ffead7ae 46 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
252b5132 47\f
37111cc7 48/* -- assembler routines inserted here. */
252b5132
RH
49
50/* -- asm.c */
0e2ee3ca
NC
51/* Handle register lists for LDMx and STMx. */
52
53static int parse_register_number
54 PARAMS ((const char **));
55static const char * parse_register_list
56 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *, int, int));
57static const char * parse_low_register_list_ld
58 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
59static const char * parse_hi_register_list_ld
60 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
61static const char * parse_low_register_list_st
62 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
63static const char * parse_hi_register_list_st
64 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
252b5132
RH
65
66static int
67parse_register_number (strp)
68 const char **strp;
69{
70 int regno;
71 if (**strp < '0' || **strp > '9')
0e2ee3ca 72 return -1; /* error. */
252b5132
RH
73 regno = **strp - '0';
74 ++*strp;
75
76 if (**strp >= '0' && **strp <= '9')
77 {
78 regno = regno * 10 + (**strp - '0');
79 ++*strp;
80 }
81
82 return regno;
83}
84
85static const char *
86parse_register_list (cd, strp, opindex, valuep, high_low, load_store)
d5b2f4d6 87 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
252b5132 88 const char **strp;
d5b2f4d6 89 int opindex ATTRIBUTE_UNUSED;
252b5132
RH
90 unsigned long *valuep;
91 int high_low; /* 0 == high, 1 == low */
92 int load_store; /* 0 == load, 1 == store */
93{
94 int regno;
0e2ee3ca 95
252b5132
RH
96 *valuep = 0;
97 while (**strp && **strp != ')')
98 {
99 if (**strp != 'R' && **strp != 'r')
100 break;
101 ++*strp;
102
103 regno = parse_register_number (strp);
104 if (regno == -1)
105 return "Register number is not valid";
106 if (regno > 7 && !high_low)
107 return "Register must be between r0 and r7";
108 if (regno < 8 && high_low)
109 return "Register must be between r8 and r15";
110
111 if (high_low)
112 regno -= 8;
113
0e2ee3ca 114 if (load_store) /* Mask is reversed for store. */
252b5132
RH
115 *valuep |= 0x80 >> regno;
116 else
117 *valuep |= 1 << regno;
118
119 if (**strp == ',')
120 {
121 if (*(*strp + 1) == ')')
122 break;
123 ++*strp;
124 }
125 }
126
127 if (!*strp || **strp != ')')
128 return "Register list is not valid";
129
130 return NULL;
131}
132
133static const char *
134parse_low_register_list_ld (cd, strp, opindex, valuep)
135 CGEN_CPU_DESC cd;
136 const char **strp;
137 int opindex;
138 unsigned long *valuep;
139{
140 return parse_register_list (cd, strp, opindex, valuep, 0/*low*/, 0/*load*/);
141}
142
143static const char *
144parse_hi_register_list_ld (cd, strp, opindex, valuep)
145 CGEN_CPU_DESC cd;
146 const char **strp;
147 int opindex;
148 unsigned long *valuep;
149{
150 return parse_register_list (cd, strp, opindex, valuep, 1/*high*/, 0/*load*/);
151}
152
153static const char *
154parse_low_register_list_st (cd, strp, opindex, valuep)
155 CGEN_CPU_DESC cd;
156 const char **strp;
157 int opindex;
158 unsigned long *valuep;
159{
160 return parse_register_list (cd, strp, opindex, valuep, 0/*low*/, 1/*store*/);
161}
162
163static const char *
164parse_hi_register_list_st (cd, strp, opindex, valuep)
165 CGEN_CPU_DESC cd;
166 const char **strp;
167 int opindex;
168 unsigned long *valuep;
169{
170 return parse_register_list (cd, strp, opindex, valuep, 1/*high*/, 1/*store*/);
171}
172
173/* -- */
174
0e2ee3ca
NC
175const char * fr30_cgen_parse_operand
176 PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *));
177
252b5132
RH
178/* Main entry point for operand parsing.
179
180 This function is basically just a big switch statement. Earlier versions
181 used tables to look up the function to use, but
182 - if the table contains both assembler and disassembler functions then
183 the disassembler contains much of the assembler and vice-versa,
184 - there's a lot of inlining possibilities as things grow,
185 - using a switch statement avoids the function call overhead.
186
187 This function could be moved into `parse_insn_normal', but keeping it
188 separate makes clear the interface between `parse_insn_normal' and each of
9a2e995d 189 the handlers. */
252b5132
RH
190
191const char *
192fr30_cgen_parse_operand (cd, opindex, strp, fields)
193 CGEN_CPU_DESC cd;
194 int opindex;
195 const char ** strp;
196 CGEN_FIELDS * fields;
197{
eb1b03df
DE
198 const char * errmsg = NULL;
199 /* Used by scalar operands that still need to be parsed. */
0e2ee3ca 200 long junk ATTRIBUTE_UNUSED;
252b5132
RH
201
202 switch (opindex)
203 {
204 case FR30_OPERAND_CRI :
205 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_cr_names, & fields->f_CRi);
206 break;
207 case FR30_OPERAND_CRJ :
208 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_cr_names, & fields->f_CRj);
209 break;
210 case FR30_OPERAND_R13 :
eb1b03df 211 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r13, & junk);
252b5132
RH
212 break;
213 case FR30_OPERAND_R14 :
eb1b03df 214 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r14, & junk);
252b5132
RH
215 break;
216 case FR30_OPERAND_R15 :
eb1b03df 217 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r15, & junk);
252b5132
RH
218 break;
219 case FR30_OPERAND_RI :
220 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Ri);
221 break;
222 case FR30_OPERAND_RIC :
223 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Ric);
224 break;
225 case FR30_OPERAND_RJ :
226 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Rj);
227 break;
228 case FR30_OPERAND_RJC :
229 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Rjc);
230 break;
231 case FR30_OPERAND_RS1 :
232 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_dr_names, & fields->f_Rs1);
233 break;
234 case FR30_OPERAND_RS2 :
235 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_dr_names, & fields->f_Rs2);
236 break;
237 case FR30_OPERAND_CC :
238 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_CC, &fields->f_cc);
239 break;
240 case FR30_OPERAND_CCC :
241 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_CCC, &fields->f_ccc);
242 break;
243 case FR30_OPERAND_DIR10 :
244 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR10, &fields->f_dir10);
245 break;
246 case FR30_OPERAND_DIR8 :
247 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR8, &fields->f_dir8);
248 break;
249 case FR30_OPERAND_DIR9 :
250 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR9, &fields->f_dir9);
251 break;
252 case FR30_OPERAND_DISP10 :
253 errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP10, &fields->f_disp10);
254 break;
255 case FR30_OPERAND_DISP8 :
256 errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP8, &fields->f_disp8);
257 break;
258 case FR30_OPERAND_DISP9 :
259 errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP9, &fields->f_disp9);
260 break;
261 case FR30_OPERAND_I20 :
262 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I20, &fields->f_i20);
263 break;
264 case FR30_OPERAND_I32 :
265 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I32, &fields->f_i32);
266 break;
267 case FR30_OPERAND_I8 :
268 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I8, &fields->f_i8);
269 break;
270 case FR30_OPERAND_LABEL12 :
271 {
272 bfd_vma value;
273 errmsg = cgen_parse_address (cd, strp, FR30_OPERAND_LABEL12, 0, NULL, & value);
274 fields->f_rel12 = value;
275 }
276 break;
277 case FR30_OPERAND_LABEL9 :
278 {
279 bfd_vma value;
280 errmsg = cgen_parse_address (cd, strp, FR30_OPERAND_LABEL9, 0, NULL, & value);
281 fields->f_rel9 = value;
282 }
283 break;
284 case FR30_OPERAND_M4 :
285 errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_M4, &fields->f_m4);
286 break;
287 case FR30_OPERAND_PS :
eb1b03df 288 errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_ps, & junk);
252b5132
RH
289 break;
290 case FR30_OPERAND_REGLIST_HI_LD :
291 errmsg = parse_hi_register_list_ld (cd, strp, FR30_OPERAND_REGLIST_HI_LD, &fields->f_reglist_hi_ld);
292 break;
293 case FR30_OPERAND_REGLIST_HI_ST :
294 errmsg = parse_hi_register_list_st (cd, strp, FR30_OPERAND_REGLIST_HI_ST, &fields->f_reglist_hi_st);
295 break;
296 case FR30_OPERAND_REGLIST_LOW_LD :
297 errmsg = parse_low_register_list_ld (cd, strp, FR30_OPERAND_REGLIST_LOW_LD, &fields->f_reglist_low_ld);
298 break;
299 case FR30_OPERAND_REGLIST_LOW_ST :
300 errmsg = parse_low_register_list_st (cd, strp, FR30_OPERAND_REGLIST_LOW_ST, &fields->f_reglist_low_st);
301 break;
302 case FR30_OPERAND_S10 :
303 errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_S10, &fields->f_s10);
304 break;
305 case FR30_OPERAND_U10 :
306 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U10, &fields->f_u10);
307 break;
308 case FR30_OPERAND_U4 :
309 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U4, &fields->f_u4);
310 break;
311 case FR30_OPERAND_U4C :
312 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U4C, &fields->f_u4c);
313 break;
314 case FR30_OPERAND_U8 :
315 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U8, &fields->f_u8);
316 break;
317 case FR30_OPERAND_UDISP6 :
318 errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_UDISP6, &fields->f_udisp6);
319 break;
320
321 default :
322 /* xgettext:c-format */
323 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
324 abort ();
325 }
326
327 return errmsg;
328}
329
330cgen_parse_fn * const fr30_cgen_parse_handlers[] =
331{
332 parse_insn_normal,
333};
334
335void
336fr30_cgen_init_asm (cd)
337 CGEN_CPU_DESC cd;
338{
339 fr30_cgen_init_opcode_table (cd);
340 fr30_cgen_init_ibld_table (cd);
341 cd->parse_handlers = & fr30_cgen_parse_handlers[0];
342 cd->parse_operand = fr30_cgen_parse_operand;
343}
344
fc7bc883
RH
345\f
346
37111cc7 347/* Regex construction routine.
fc7bc883 348
37111cc7
NC
349 This translates an opcode syntax string into a regex string,
350 by replacing any non-character syntax element (such as an
351 opcode) with the pattern '.*'
fc7bc883 352
37111cc7
NC
353 It then compiles the regex and stores it in the opcode, for
354 later use by fr30_cgen_assemble_insn
fc7bc883 355
37111cc7 356 Returns NULL for success, an error message for failure. */
fc7bc883
RH
357
358char *
ffead7ae 359fr30_cgen_build_insn_regex (CGEN_INSN *insn)
fc7bc883 360{
d5b2f4d6 361 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
fc7bc883 362 const char *mnem = CGEN_INSN_MNEMONIC (insn);
fc7bc883
RH
363 char rxbuf[CGEN_MAX_RX_ELEMENTS];
364 char *rx = rxbuf;
365 const CGEN_SYNTAX_CHAR_TYPE *syn;
366 int reg_err;
367
368 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
369
f3a55c17
NC
370 /* Mnemonics come first in the syntax string. */
371 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
372 return _("missing mnemonic in syntax string");
fc7bc883
RH
373 ++syn;
374
f3a55c17
NC
375 /* Generate a case sensitive regular expression that emulates case
376 insensitive matching in the "C" locale. We cannot generate a case
377 insensitive regular expression because in Turkish locales, 'i' and 'I'
378 are not equal modulo case conversion. */
fc7bc883 379
f3a55c17
NC
380 /* Copy the literal mnemonic out of the insn. */
381 for (; *mnem; mnem++)
382 {
383 char c = *mnem;
384
385 if (ISALPHA (c))
386 {
387 *rx++ = '[';
388 *rx++ = TOLOWER (c);
389 *rx++ = TOUPPER (c);
390 *rx++ = ']';
391 }
392 else
393 *rx++ = c;
394 }
395
396 /* Copy any remaining literals from the syntax string into the rx. */
397 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
fc7bc883
RH
398 {
399 if (CGEN_SYNTAX_CHAR_P (* syn))
400 {
f3a55c17
NC
401 char c = CGEN_SYNTAX_CHAR (* syn);
402
403 switch (c)
404 {
405 /* Escape any regex metacharacters in the syntax. */
406 case '.': case '[': case '\\':
407 case '*': case '^': case '$':
fc7bc883
RH
408
409#ifdef CGEN_ESCAPE_EXTENDED_REGEX
f3a55c17
NC
410 case '?': case '{': case '}':
411 case '(': case ')': case '*':
412 case '|': case '+': case ']':
fc7bc883 413#endif
f3a55c17
NC
414 *rx++ = '\\';
415 *rx++ = c;
416 break;
417
418 default:
419 if (ISALPHA (c))
420 {
421 *rx++ = '[';
422 *rx++ = TOLOWER (c);
423 *rx++ = TOUPPER (c);
424 *rx++ = ']';
425 }
426 else
427 *rx++ = c;
428 break;
429 }
fc7bc883
RH
430 }
431 else
432 {
f3a55c17
NC
433 /* Replace non-syntax fields with globs. */
434 *rx++ = '.';
435 *rx++ = '*';
fc7bc883
RH
436 }
437 }
438
f3a55c17 439 /* Trailing whitespace ok. */
fc7bc883
RH
440 * rx++ = '[';
441 * rx++ = ' ';
442 * rx++ = '\t';
443 * rx++ = ']';
444 * rx++ = '*';
445
f3a55c17 446 /* But anchor it after that. */
fc7bc883
RH
447 * rx++ = '$';
448 * rx = '\0';
449
450 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
f3a55c17 451 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
fc7bc883
RH
452
453 if (reg_err == 0)
454 return NULL;
455 else
456 {
457 static char msg[80];
f3a55c17 458
fc7bc883
RH
459 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
460 regfree ((regex_t *) CGEN_INSN_RX (insn));
461 free (CGEN_INSN_RX (insn));
462 (CGEN_INSN_RX (insn)) = NULL;
37111cc7 463 return msg;
fc7bc883
RH
464 }
465}
466
252b5132
RH
467\f
468/* Default insn parser.
469
470 The syntax string is scanned and operands are parsed and stored in FIELDS.
471 Relocs are queued as we go via other callbacks.
472
473 ??? Note that this is currently an all-or-nothing parser. If we fail to
474 parse the instruction, we return 0 and the caller will start over from
475 the beginning. Backtracking will be necessary in parsing subexpressions,
476 but that can be handled there. Not handling backtracking here may get
477 expensive in the case of the m68k. Deal with later.
478
f3a55c17 479 Returns NULL for success, an error message for failure. */
252b5132
RH
480
481static const char *
ffead7ae
MM
482parse_insn_normal (CGEN_CPU_DESC cd,
483 const CGEN_INSN *insn,
484 const char **strp,
485 CGEN_FIELDS *fields)
252b5132
RH
486{
487 /* ??? Runtime added insns not handled yet. */
488 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
489 const char *str = *strp;
490 const char *errmsg;
491 const char *p;
b3466c39 492 const CGEN_SYNTAX_CHAR_TYPE * syn;
252b5132
RH
493#ifdef CGEN_MNEMONIC_OPERANDS
494 /* FIXME: wip */
495 int past_opcode_p;
496#endif
497
498 /* For now we assume the mnemonic is first (there are no leading operands).
499 We can parse it without needing to set up operand parsing.
500 GAS's input scrubber will ensure mnemonics are lowercase, but we may
501 not be called from GAS. */
502 p = CGEN_INSN_MNEMONIC (insn);
37111cc7 503 while (*p && TOLOWER (*p) == TOLOWER (*str))
252b5132 504 ++p, ++str;
1fa60b5d
DE
505
506 if (* p)
507 return _("unrecognized instruction");
508
509#ifndef CGEN_MNEMONIC_OPERANDS
37111cc7 510 if (* str && ! ISSPACE (* str))
252b5132 511 return _("unrecognized instruction");
1fa60b5d 512#endif
252b5132
RH
513
514 CGEN_INIT_PARSE (cd);
515 cgen_init_parse_operand (cd);
516#ifdef CGEN_MNEMONIC_OPERANDS
517 past_opcode_p = 0;
518#endif
519
520 /* We don't check for (*str != '\0') here because we want to parse
521 any trailing fake arguments in the syntax string. */
522 syn = CGEN_SYNTAX_STRING (syntax);
523
524 /* Mnemonics come first for now, ensure valid string. */
525 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
526 abort ();
527
528 ++syn;
529
530 while (* syn != 0)
531 {
532 /* Non operand chars must match exactly. */
533 if (CGEN_SYNTAX_CHAR_P (* syn))
534 {
1fa60b5d
DE
535 /* FIXME: While we allow for non-GAS callers above, we assume the
536 first char after the mnemonic part is a space. */
537 /* FIXME: We also take inappropriate advantage of the fact that
538 GAS's input scrubber will remove extraneous blanks. */
37111cc7 539 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
252b5132
RH
540 {
541#ifdef CGEN_MNEMONIC_OPERANDS
b3466c39 542 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
252b5132
RH
543 past_opcode_p = 1;
544#endif
545 ++ syn;
546 ++ str;
547 }
b3466c39 548 else if (*str)
252b5132
RH
549 {
550 /* Syntax char didn't match. Can't be this insn. */
6bb95a0f 551 static char msg [80];
f3a55c17 552
6bb95a0f
DB
553 /* xgettext:c-format */
554 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
b3466c39
DB
555 CGEN_SYNTAX_CHAR(*syn), *str);
556 return msg;
557 }
558 else
559 {
560 /* Ran out of input. */
561 static char msg [80];
f3a55c17 562
b3466c39
DB
563 /* xgettext:c-format */
564 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
565 CGEN_SYNTAX_CHAR(*syn));
6bb95a0f 566 return msg;
252b5132
RH
567 }
568 continue;
569 }
570
571 /* We have an operand of some sort. */
a978a3e5 572 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
252b5132
RH
573 &str, fields);
574 if (errmsg)
575 return errmsg;
576
577 /* Done with this operand, continue with next one. */
578 ++ syn;
579 }
580
581 /* If we're at the end of the syntax string, we're done. */
b3466c39 582 if (* syn == 0)
252b5132
RH
583 {
584 /* FIXME: For the moment we assume a valid `str' can only contain
585 blanks now. IE: We needn't try again with a longer version of
586 the insn and it is assumed that longer versions of insns appear
587 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
37111cc7 588 while (ISSPACE (* str))
252b5132
RH
589 ++ str;
590
591 if (* str != '\0')
592 return _("junk at end of line"); /* FIXME: would like to include `str' */
593
594 return NULL;
595 }
596
597 /* We couldn't parse it. */
598 return _("unrecognized instruction");
599}
600\f
601/* Main entry point.
602 This routine is called for each instruction to be assembled.
603 STR points to the insn to be assembled.
604 We assume all necessary tables have been initialized.
605 The assembled instruction, less any fixups, is stored in BUF.
606 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
607 still needs to be converted to target byte order, otherwise BUF is an array
608 of bytes in target byte order.
609 The result is a pointer to the insn's entry in the opcode table,
610 or NULL if an error occured (an error message will have already been
611 printed).
612
613 Note that when processing (non-alias) macro-insns,
614 this function recurses.
615
616 ??? It's possible to make this cpu-independent.
617 One would have to deal with a few minor things.
618 At this point in time doing so would be more of a curiosity than useful
619 [for example this file isn't _that_ big], but keeping the possibility in
620 mind helps keep the design clean. */
621
622const CGEN_INSN *
ffead7ae
MM
623fr30_cgen_assemble_insn (CGEN_CPU_DESC cd,
624 const char *str,
625 CGEN_FIELDS *fields,
626 CGEN_INSN_BYTES_PTR buf,
627 char **errmsg)
252b5132
RH
628{
629 const char *start;
630 CGEN_INSN_LIST *ilist;
b3466c39
DB
631 const char *parse_errmsg = NULL;
632 const char *insert_errmsg = NULL;
fc7bc883 633 int recognized_mnemonic = 0;
252b5132
RH
634
635 /* Skip leading white space. */
37111cc7 636 while (ISSPACE (* str))
252b5132
RH
637 ++ str;
638
639 /* The instructions are stored in hashed lists.
640 Get the first in the list. */
641 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
642
643 /* Keep looking until we find a match. */
252b5132
RH
644 start = str;
645 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
646 {
647 const CGEN_INSN *insn = ilist->insn;
fc7bc883 648 recognized_mnemonic = 1;
252b5132 649
6bb95a0f 650#ifdef CGEN_VALIDATE_INSN_SUPPORTED
f3a55c17
NC
651 /* Not usually needed as unsupported opcodes
652 shouldn't be in the hash lists. */
252b5132
RH
653 /* Is this insn supported by the selected cpu? */
654 if (! fr30_cgen_insn_supported (cd, insn))
655 continue;
656#endif
b11dcf4e 657 /* If the RELAXED attribute is set, this is an insn that shouldn't be
252b5132
RH
658 chosen immediately. Instead, it is used during assembler/linker
659 relaxation if possible. */
b11dcf4e 660 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
252b5132
RH
661 continue;
662
663 str = start;
664
f3a55c17 665 /* Skip this insn if str doesn't look right lexically. */
fc7bc883
RH
666 if (CGEN_INSN_RX (insn) != NULL &&
667 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
668 continue;
669
252b5132
RH
670 /* Allow parse/insert handlers to obtain length of insn. */
671 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
672
b3466c39
DB
673 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
674 if (parse_errmsg != NULL)
6bb95a0f 675 continue;
252b5132 676
f3a55c17 677 /* ??? 0 is passed for `pc'. */
b3466c39
DB
678 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
679 (bfd_vma) 0);
680 if (insert_errmsg != NULL)
6bb95a0f
DB
681 continue;
682
683 /* It is up to the caller to actually output the insn and any
684 queued relocs. */
685 return insn;
252b5132
RH
686 }
687
252b5132 688 {
6bb95a0f 689 static char errbuf[150];
fc7bc883 690#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
b3466c39 691 const char *tmp_errmsg;
6bb95a0f 692
b3466c39 693 /* If requesting verbose error messages, use insert_errmsg.
f3a55c17 694 Failing that, use parse_errmsg. */
b3466c39
DB
695 tmp_errmsg = (insert_errmsg ? insert_errmsg :
696 parse_errmsg ? parse_errmsg :
f3a55c17
NC
697 recognized_mnemonic ?
698 _("unrecognized form of instruction") :
b3466c39
DB
699 _("unrecognized instruction"));
700
6bb95a0f
DB
701 if (strlen (start) > 50)
702 /* xgettext:c-format */
703 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
704 else
705 /* xgettext:c-format */
706 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
707#else
252b5132
RH
708 if (strlen (start) > 50)
709 /* xgettext:c-format */
710 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
711 else
712 /* xgettext:c-format */
713 sprintf (errbuf, _("bad instruction `%.50s'"), start);
6bb95a0f 714#endif
252b5132
RH
715
716 *errmsg = errbuf;
717 return NULL;
718 }
719}
720\f
721#if 0 /* This calls back to GAS which we can't do without care. */
722
723/* Record each member of OPVALS in the assembler's symbol table.
724 This lets GAS parse registers for us.
725 ??? Interesting idea but not currently used. */
726
727/* Record each member of OPVALS in the assembler's symbol table.
728 FIXME: Not currently used. */
729
730void
ffead7ae 731fr30_cgen_asm_hash_keywords (CGEN_CPU_DESC cd, CGEN_KEYWORD *opvals)
252b5132
RH
732{
733 CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
734 const CGEN_KEYWORD_ENTRY * ke;
735
736 while ((ke = cgen_keyword_search_next (& search)) != NULL)
737 {
738#if 0 /* Unnecessary, should be done in the search routine. */
739 if (! fr30_cgen_opval_supported (ke))
740 continue;
741#endif
742 cgen_asm_record_register (cd, ke->name, ke->value);
743 }
744}
745
746#endif /* 0 */
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