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252b5132 RH |
1 | /* Assembler interface for targets using CGEN. -*- C -*- |
2 | CGEN: Cpu tools GENerator | |
3 | ||
4 | THIS FILE IS MACHINE GENERATED WITH CGEN. | |
5 | - the resultant file is machine generated, cgen-asm.in isn't | |
6 | ||
060d22b0 | 7 | Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. |
252b5132 RH |
8 | |
9 | This file is part of the GNU Binutils and GDB, the GNU debugger. | |
10 | ||
11 | This program is free software; you can redistribute it and/or modify | |
12 | it under the terms of the GNU General Public License as published by | |
13 | the Free Software Foundation; either version 2, or (at your option) | |
14 | any later version. | |
15 | ||
16 | This program is distributed in the hope that it will be useful, | |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
22 | along with this program; if not, write to the Free Software Foundation, Inc., | |
23 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | |
24 | ||
25 | /* ??? Eventually more and more of this stuff can go to cpu-independent files. | |
26 | Keep that in mind. */ | |
27 | ||
28 | #include "sysdep.h" | |
0e2ee3ca | 29 | #include <ctype.h> |
252b5132 RH |
30 | #include <stdio.h> |
31 | #include "ansidecl.h" | |
32 | #include "bfd.h" | |
33 | #include "symcat.h" | |
34 | #include "fr30-desc.h" | |
35 | #include "fr30-opc.h" | |
36 | #include "opintl.h" | |
fc7bc883 | 37 | #include "xregex.h" |
d5b2f4d6 | 38 | #include "libiberty.h" |
252b5132 RH |
39 | |
40 | #undef min | |
41 | #define min(a,b) ((a) < (b) ? (a) : (b)) | |
42 | #undef max | |
43 | #define max(a,b) ((a) > (b) ? (a) : (b)) | |
44 | ||
0e2ee3ca NC |
45 | static const char * parse_insn_normal |
46 | PARAMS ((CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *)); | |
252b5132 RH |
47 | \f |
48 | /* -- assembler routines inserted here */ | |
49 | ||
50 | /* -- asm.c */ | |
0e2ee3ca NC |
51 | /* Handle register lists for LDMx and STMx. */ |
52 | ||
53 | static int parse_register_number | |
54 | PARAMS ((const char **)); | |
55 | static const char * parse_register_list | |
56 | PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *, int, int)); | |
57 | static const char * parse_low_register_list_ld | |
58 | PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); | |
59 | static const char * parse_hi_register_list_ld | |
60 | PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); | |
61 | static const char * parse_low_register_list_st | |
62 | PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); | |
63 | static const char * parse_hi_register_list_st | |
64 | PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *)); | |
252b5132 RH |
65 | |
66 | static int | |
67 | parse_register_number (strp) | |
68 | const char **strp; | |
69 | { | |
70 | int regno; | |
71 | if (**strp < '0' || **strp > '9') | |
0e2ee3ca | 72 | return -1; /* error. */ |
252b5132 RH |
73 | regno = **strp - '0'; |
74 | ++*strp; | |
75 | ||
76 | if (**strp >= '0' && **strp <= '9') | |
77 | { | |
78 | regno = regno * 10 + (**strp - '0'); | |
79 | ++*strp; | |
80 | } | |
81 | ||
82 | return regno; | |
83 | } | |
84 | ||
85 | static const char * | |
86 | parse_register_list (cd, strp, opindex, valuep, high_low, load_store) | |
d5b2f4d6 | 87 | CGEN_CPU_DESC cd ATTRIBUTE_UNUSED; |
252b5132 | 88 | const char **strp; |
d5b2f4d6 | 89 | int opindex ATTRIBUTE_UNUSED; |
252b5132 RH |
90 | unsigned long *valuep; |
91 | int high_low; /* 0 == high, 1 == low */ | |
92 | int load_store; /* 0 == load, 1 == store */ | |
93 | { | |
94 | int regno; | |
0e2ee3ca | 95 | |
252b5132 RH |
96 | *valuep = 0; |
97 | while (**strp && **strp != ')') | |
98 | { | |
99 | if (**strp != 'R' && **strp != 'r') | |
100 | break; | |
101 | ++*strp; | |
102 | ||
103 | regno = parse_register_number (strp); | |
104 | if (regno == -1) | |
105 | return "Register number is not valid"; | |
106 | if (regno > 7 && !high_low) | |
107 | return "Register must be between r0 and r7"; | |
108 | if (regno < 8 && high_low) | |
109 | return "Register must be between r8 and r15"; | |
110 | ||
111 | if (high_low) | |
112 | regno -= 8; | |
113 | ||
0e2ee3ca | 114 | if (load_store) /* Mask is reversed for store. */ |
252b5132 RH |
115 | *valuep |= 0x80 >> regno; |
116 | else | |
117 | *valuep |= 1 << regno; | |
118 | ||
119 | if (**strp == ',') | |
120 | { | |
121 | if (*(*strp + 1) == ')') | |
122 | break; | |
123 | ++*strp; | |
124 | } | |
125 | } | |
126 | ||
127 | if (!*strp || **strp != ')') | |
128 | return "Register list is not valid"; | |
129 | ||
130 | return NULL; | |
131 | } | |
132 | ||
133 | static const char * | |
134 | parse_low_register_list_ld (cd, strp, opindex, valuep) | |
135 | CGEN_CPU_DESC cd; | |
136 | const char **strp; | |
137 | int opindex; | |
138 | unsigned long *valuep; | |
139 | { | |
140 | return parse_register_list (cd, strp, opindex, valuep, 0/*low*/, 0/*load*/); | |
141 | } | |
142 | ||
143 | static const char * | |
144 | parse_hi_register_list_ld (cd, strp, opindex, valuep) | |
145 | CGEN_CPU_DESC cd; | |
146 | const char **strp; | |
147 | int opindex; | |
148 | unsigned long *valuep; | |
149 | { | |
150 | return parse_register_list (cd, strp, opindex, valuep, 1/*high*/, 0/*load*/); | |
151 | } | |
152 | ||
153 | static const char * | |
154 | parse_low_register_list_st (cd, strp, opindex, valuep) | |
155 | CGEN_CPU_DESC cd; | |
156 | const char **strp; | |
157 | int opindex; | |
158 | unsigned long *valuep; | |
159 | { | |
160 | return parse_register_list (cd, strp, opindex, valuep, 0/*low*/, 1/*store*/); | |
161 | } | |
162 | ||
163 | static const char * | |
164 | parse_hi_register_list_st (cd, strp, opindex, valuep) | |
165 | CGEN_CPU_DESC cd; | |
166 | const char **strp; | |
167 | int opindex; | |
168 | unsigned long *valuep; | |
169 | { | |
170 | return parse_register_list (cd, strp, opindex, valuep, 1/*high*/, 1/*store*/); | |
171 | } | |
172 | ||
173 | /* -- */ | |
174 | ||
0e2ee3ca NC |
175 | const char * fr30_cgen_parse_operand |
176 | PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *)); | |
177 | ||
252b5132 RH |
178 | /* Main entry point for operand parsing. |
179 | ||
180 | This function is basically just a big switch statement. Earlier versions | |
181 | used tables to look up the function to use, but | |
182 | - if the table contains both assembler and disassembler functions then | |
183 | the disassembler contains much of the assembler and vice-versa, | |
184 | - there's a lot of inlining possibilities as things grow, | |
185 | - using a switch statement avoids the function call overhead. | |
186 | ||
187 | This function could be moved into `parse_insn_normal', but keeping it | |
188 | separate makes clear the interface between `parse_insn_normal' and each of | |
0e2ee3ca NC |
189 | the handlers. |
190 | */ | |
252b5132 RH |
191 | |
192 | const char * | |
193 | fr30_cgen_parse_operand (cd, opindex, strp, fields) | |
194 | CGEN_CPU_DESC cd; | |
195 | int opindex; | |
196 | const char ** strp; | |
197 | CGEN_FIELDS * fields; | |
198 | { | |
eb1b03df DE |
199 | const char * errmsg = NULL; |
200 | /* Used by scalar operands that still need to be parsed. */ | |
0e2ee3ca | 201 | long junk ATTRIBUTE_UNUSED; |
252b5132 RH |
202 | |
203 | switch (opindex) | |
204 | { | |
205 | case FR30_OPERAND_CRI : | |
206 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_cr_names, & fields->f_CRi); | |
207 | break; | |
208 | case FR30_OPERAND_CRJ : | |
209 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_cr_names, & fields->f_CRj); | |
210 | break; | |
211 | case FR30_OPERAND_R13 : | |
eb1b03df | 212 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r13, & junk); |
252b5132 RH |
213 | break; |
214 | case FR30_OPERAND_R14 : | |
eb1b03df | 215 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r14, & junk); |
252b5132 RH |
216 | break; |
217 | case FR30_OPERAND_R15 : | |
eb1b03df | 218 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_r15, & junk); |
252b5132 RH |
219 | break; |
220 | case FR30_OPERAND_RI : | |
221 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Ri); | |
222 | break; | |
223 | case FR30_OPERAND_RIC : | |
224 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Ric); | |
225 | break; | |
226 | case FR30_OPERAND_RJ : | |
227 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Rj); | |
228 | break; | |
229 | case FR30_OPERAND_RJC : | |
230 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_gr_names, & fields->f_Rjc); | |
231 | break; | |
232 | case FR30_OPERAND_RS1 : | |
233 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_dr_names, & fields->f_Rs1); | |
234 | break; | |
235 | case FR30_OPERAND_RS2 : | |
236 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_dr_names, & fields->f_Rs2); | |
237 | break; | |
238 | case FR30_OPERAND_CC : | |
239 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_CC, &fields->f_cc); | |
240 | break; | |
241 | case FR30_OPERAND_CCC : | |
242 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_CCC, &fields->f_ccc); | |
243 | break; | |
244 | case FR30_OPERAND_DIR10 : | |
245 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR10, &fields->f_dir10); | |
246 | break; | |
247 | case FR30_OPERAND_DIR8 : | |
248 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR8, &fields->f_dir8); | |
249 | break; | |
250 | case FR30_OPERAND_DIR9 : | |
251 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_DIR9, &fields->f_dir9); | |
252 | break; | |
253 | case FR30_OPERAND_DISP10 : | |
254 | errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP10, &fields->f_disp10); | |
255 | break; | |
256 | case FR30_OPERAND_DISP8 : | |
257 | errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP8, &fields->f_disp8); | |
258 | break; | |
259 | case FR30_OPERAND_DISP9 : | |
260 | errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_DISP9, &fields->f_disp9); | |
261 | break; | |
262 | case FR30_OPERAND_I20 : | |
263 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I20, &fields->f_i20); | |
264 | break; | |
265 | case FR30_OPERAND_I32 : | |
266 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I32, &fields->f_i32); | |
267 | break; | |
268 | case FR30_OPERAND_I8 : | |
269 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_I8, &fields->f_i8); | |
270 | break; | |
271 | case FR30_OPERAND_LABEL12 : | |
272 | { | |
273 | bfd_vma value; | |
274 | errmsg = cgen_parse_address (cd, strp, FR30_OPERAND_LABEL12, 0, NULL, & value); | |
275 | fields->f_rel12 = value; | |
276 | } | |
277 | break; | |
278 | case FR30_OPERAND_LABEL9 : | |
279 | { | |
280 | bfd_vma value; | |
281 | errmsg = cgen_parse_address (cd, strp, FR30_OPERAND_LABEL9, 0, NULL, & value); | |
282 | fields->f_rel9 = value; | |
283 | } | |
284 | break; | |
285 | case FR30_OPERAND_M4 : | |
286 | errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_M4, &fields->f_m4); | |
287 | break; | |
288 | case FR30_OPERAND_PS : | |
eb1b03df | 289 | errmsg = cgen_parse_keyword (cd, strp, & fr30_cgen_opval_h_ps, & junk); |
252b5132 RH |
290 | break; |
291 | case FR30_OPERAND_REGLIST_HI_LD : | |
292 | errmsg = parse_hi_register_list_ld (cd, strp, FR30_OPERAND_REGLIST_HI_LD, &fields->f_reglist_hi_ld); | |
293 | break; | |
294 | case FR30_OPERAND_REGLIST_HI_ST : | |
295 | errmsg = parse_hi_register_list_st (cd, strp, FR30_OPERAND_REGLIST_HI_ST, &fields->f_reglist_hi_st); | |
296 | break; | |
297 | case FR30_OPERAND_REGLIST_LOW_LD : | |
298 | errmsg = parse_low_register_list_ld (cd, strp, FR30_OPERAND_REGLIST_LOW_LD, &fields->f_reglist_low_ld); | |
299 | break; | |
300 | case FR30_OPERAND_REGLIST_LOW_ST : | |
301 | errmsg = parse_low_register_list_st (cd, strp, FR30_OPERAND_REGLIST_LOW_ST, &fields->f_reglist_low_st); | |
302 | break; | |
303 | case FR30_OPERAND_S10 : | |
304 | errmsg = cgen_parse_signed_integer (cd, strp, FR30_OPERAND_S10, &fields->f_s10); | |
305 | break; | |
306 | case FR30_OPERAND_U10 : | |
307 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U10, &fields->f_u10); | |
308 | break; | |
309 | case FR30_OPERAND_U4 : | |
310 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U4, &fields->f_u4); | |
311 | break; | |
312 | case FR30_OPERAND_U4C : | |
313 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U4C, &fields->f_u4c); | |
314 | break; | |
315 | case FR30_OPERAND_U8 : | |
316 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_U8, &fields->f_u8); | |
317 | break; | |
318 | case FR30_OPERAND_UDISP6 : | |
319 | errmsg = cgen_parse_unsigned_integer (cd, strp, FR30_OPERAND_UDISP6, &fields->f_udisp6); | |
320 | break; | |
321 | ||
322 | default : | |
323 | /* xgettext:c-format */ | |
324 | fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex); | |
325 | abort (); | |
326 | } | |
327 | ||
328 | return errmsg; | |
329 | } | |
330 | ||
331 | cgen_parse_fn * const fr30_cgen_parse_handlers[] = | |
332 | { | |
333 | parse_insn_normal, | |
334 | }; | |
335 | ||
336 | void | |
337 | fr30_cgen_init_asm (cd) | |
338 | CGEN_CPU_DESC cd; | |
339 | { | |
340 | fr30_cgen_init_opcode_table (cd); | |
341 | fr30_cgen_init_ibld_table (cd); | |
342 | cd->parse_handlers = & fr30_cgen_parse_handlers[0]; | |
343 | cd->parse_operand = fr30_cgen_parse_operand; | |
344 | } | |
345 | ||
fc7bc883 RH |
346 | \f |
347 | ||
348 | /* | |
349 | Regex construction routine. | |
350 | ||
351 | This translates an opcode syntax string into a regex string, | |
352 | by replacing any non-character syntax element (such as an | |
353 | opcode) with the pattern '.*' | |
354 | ||
355 | It then compiles the regex and stores it in the opcode, for | |
356 | later use by fr30_cgen_assemble_insn | |
357 | ||
f3a55c17 | 358 | Returns NULL for success, an error message for failure. */ |
fc7bc883 RH |
359 | |
360 | char * | |
361 | fr30_cgen_build_insn_regex (insn) | |
362 | CGEN_INSN *insn; | |
363 | { | |
d5b2f4d6 | 364 | CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); |
fc7bc883 RH |
365 | const char *mnem = CGEN_INSN_MNEMONIC (insn); |
366 | int mnem_len; | |
367 | char rxbuf[CGEN_MAX_RX_ELEMENTS]; | |
368 | char *rx = rxbuf; | |
369 | const CGEN_SYNTAX_CHAR_TYPE *syn; | |
370 | int reg_err; | |
371 | ||
372 | syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); | |
373 | ||
f3a55c17 NC |
374 | /* Mnemonics come first in the syntax string. */ |
375 | if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) | |
376 | return _("missing mnemonic in syntax string"); | |
fc7bc883 RH |
377 | ++syn; |
378 | ||
f3a55c17 NC |
379 | /* Generate a case sensitive regular expression that emulates case |
380 | insensitive matching in the "C" locale. We cannot generate a case | |
381 | insensitive regular expression because in Turkish locales, 'i' and 'I' | |
382 | are not equal modulo case conversion. */ | |
fc7bc883 | 383 | |
f3a55c17 NC |
384 | /* Copy the literal mnemonic out of the insn. */ |
385 | for (; *mnem; mnem++) | |
386 | { | |
387 | char c = *mnem; | |
388 | ||
389 | if (ISALPHA (c)) | |
390 | { | |
391 | *rx++ = '['; | |
392 | *rx++ = TOLOWER (c); | |
393 | *rx++ = TOUPPER (c); | |
394 | *rx++ = ']'; | |
395 | } | |
396 | else | |
397 | *rx++ = c; | |
398 | } | |
399 | ||
400 | /* Copy any remaining literals from the syntax string into the rx. */ | |
401 | for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) | |
fc7bc883 RH |
402 | { |
403 | if (CGEN_SYNTAX_CHAR_P (* syn)) | |
404 | { | |
f3a55c17 NC |
405 | char c = CGEN_SYNTAX_CHAR (* syn); |
406 | ||
407 | switch (c) | |
408 | { | |
409 | /* Escape any regex metacharacters in the syntax. */ | |
410 | case '.': case '[': case '\\': | |
411 | case '*': case '^': case '$': | |
fc7bc883 RH |
412 | |
413 | #ifdef CGEN_ESCAPE_EXTENDED_REGEX | |
f3a55c17 NC |
414 | case '?': case '{': case '}': |
415 | case '(': case ')': case '*': | |
416 | case '|': case '+': case ']': | |
fc7bc883 | 417 | #endif |
f3a55c17 NC |
418 | *rx++ = '\\'; |
419 | *rx++ = c; | |
420 | break; | |
421 | ||
422 | default: | |
423 | if (ISALPHA (c)) | |
424 | { | |
425 | *rx++ = '['; | |
426 | *rx++ = TOLOWER (c); | |
427 | *rx++ = TOUPPER (c); | |
428 | *rx++ = ']'; | |
429 | } | |
430 | else | |
431 | *rx++ = c; | |
432 | break; | |
433 | } | |
fc7bc883 | 434 | |
f3a55c17 NC |
435 | /* Insert syntax char into rx. */ |
436 | *rx++ = c; | |
fc7bc883 RH |
437 | } |
438 | else | |
439 | { | |
f3a55c17 NC |
440 | /* Replace non-syntax fields with globs. */ |
441 | *rx++ = '.'; | |
442 | *rx++ = '*'; | |
fc7bc883 RH |
443 | } |
444 | } | |
445 | ||
f3a55c17 | 446 | /* Trailing whitespace ok. */ |
fc7bc883 RH |
447 | * rx++ = '['; |
448 | * rx++ = ' '; | |
449 | * rx++ = '\t'; | |
450 | * rx++ = ']'; | |
451 | * rx++ = '*'; | |
452 | ||
f3a55c17 | 453 | /* But anchor it after that. */ |
fc7bc883 RH |
454 | * rx++ = '$'; |
455 | * rx = '\0'; | |
456 | ||
457 | CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t)); | |
f3a55c17 | 458 | reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB); |
fc7bc883 RH |
459 | |
460 | if (reg_err == 0) | |
461 | return NULL; | |
462 | else | |
463 | { | |
464 | static char msg[80]; | |
f3a55c17 | 465 | |
fc7bc883 RH |
466 | regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80); |
467 | regfree ((regex_t *) CGEN_INSN_RX (insn)); | |
468 | free (CGEN_INSN_RX (insn)); | |
469 | (CGEN_INSN_RX (insn)) = NULL; | |
470 | return msg; | |
471 | } | |
472 | } | |
473 | ||
252b5132 RH |
474 | \f |
475 | /* Default insn parser. | |
476 | ||
477 | The syntax string is scanned and operands are parsed and stored in FIELDS. | |
478 | Relocs are queued as we go via other callbacks. | |
479 | ||
480 | ??? Note that this is currently an all-or-nothing parser. If we fail to | |
481 | parse the instruction, we return 0 and the caller will start over from | |
482 | the beginning. Backtracking will be necessary in parsing subexpressions, | |
483 | but that can be handled there. Not handling backtracking here may get | |
484 | expensive in the case of the m68k. Deal with later. | |
485 | ||
f3a55c17 | 486 | Returns NULL for success, an error message for failure. */ |
252b5132 RH |
487 | |
488 | static const char * | |
489 | parse_insn_normal (cd, insn, strp, fields) | |
490 | CGEN_CPU_DESC cd; | |
491 | const CGEN_INSN *insn; | |
492 | const char **strp; | |
493 | CGEN_FIELDS *fields; | |
494 | { | |
495 | /* ??? Runtime added insns not handled yet. */ | |
496 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); | |
497 | const char *str = *strp; | |
498 | const char *errmsg; | |
499 | const char *p; | |
b3466c39 | 500 | const CGEN_SYNTAX_CHAR_TYPE * syn; |
252b5132 RH |
501 | #ifdef CGEN_MNEMONIC_OPERANDS |
502 | /* FIXME: wip */ | |
503 | int past_opcode_p; | |
504 | #endif | |
505 | ||
506 | /* For now we assume the mnemonic is first (there are no leading operands). | |
507 | We can parse it without needing to set up operand parsing. | |
508 | GAS's input scrubber will ensure mnemonics are lowercase, but we may | |
509 | not be called from GAS. */ | |
510 | p = CGEN_INSN_MNEMONIC (insn); | |
0e2ee3ca | 511 | while (*p && tolower (*p) == tolower (*str)) |
252b5132 | 512 | ++p, ++str; |
1fa60b5d DE |
513 | |
514 | if (* p) | |
515 | return _("unrecognized instruction"); | |
516 | ||
517 | #ifndef CGEN_MNEMONIC_OPERANDS | |
0e2ee3ca | 518 | if (* str && !isspace (* str)) |
252b5132 | 519 | return _("unrecognized instruction"); |
1fa60b5d | 520 | #endif |
252b5132 RH |
521 | |
522 | CGEN_INIT_PARSE (cd); | |
523 | cgen_init_parse_operand (cd); | |
524 | #ifdef CGEN_MNEMONIC_OPERANDS | |
525 | past_opcode_p = 0; | |
526 | #endif | |
527 | ||
528 | /* We don't check for (*str != '\0') here because we want to parse | |
529 | any trailing fake arguments in the syntax string. */ | |
530 | syn = CGEN_SYNTAX_STRING (syntax); | |
531 | ||
532 | /* Mnemonics come first for now, ensure valid string. */ | |
533 | if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) | |
534 | abort (); | |
535 | ||
536 | ++syn; | |
537 | ||
538 | while (* syn != 0) | |
539 | { | |
540 | /* Non operand chars must match exactly. */ | |
541 | if (CGEN_SYNTAX_CHAR_P (* syn)) | |
542 | { | |
1fa60b5d DE |
543 | /* FIXME: While we allow for non-GAS callers above, we assume the |
544 | first char after the mnemonic part is a space. */ | |
545 | /* FIXME: We also take inappropriate advantage of the fact that | |
546 | GAS's input scrubber will remove extraneous blanks. */ | |
0e2ee3ca | 547 | if (tolower (*str) == tolower (CGEN_SYNTAX_CHAR (* syn))) |
252b5132 RH |
548 | { |
549 | #ifdef CGEN_MNEMONIC_OPERANDS | |
b3466c39 | 550 | if (CGEN_SYNTAX_CHAR(* syn) == ' ') |
252b5132 RH |
551 | past_opcode_p = 1; |
552 | #endif | |
553 | ++ syn; | |
554 | ++ str; | |
555 | } | |
b3466c39 | 556 | else if (*str) |
252b5132 RH |
557 | { |
558 | /* Syntax char didn't match. Can't be this insn. */ | |
6bb95a0f | 559 | static char msg [80]; |
f3a55c17 | 560 | |
6bb95a0f DB |
561 | /* xgettext:c-format */ |
562 | sprintf (msg, _("syntax error (expected char `%c', found `%c')"), | |
b3466c39 DB |
563 | CGEN_SYNTAX_CHAR(*syn), *str); |
564 | return msg; | |
565 | } | |
566 | else | |
567 | { | |
568 | /* Ran out of input. */ | |
569 | static char msg [80]; | |
f3a55c17 | 570 | |
b3466c39 DB |
571 | /* xgettext:c-format */ |
572 | sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"), | |
573 | CGEN_SYNTAX_CHAR(*syn)); | |
6bb95a0f | 574 | return msg; |
252b5132 RH |
575 | } |
576 | continue; | |
577 | } | |
578 | ||
579 | /* We have an operand of some sort. */ | |
580 | errmsg = fr30_cgen_parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), | |
581 | &str, fields); | |
582 | if (errmsg) | |
583 | return errmsg; | |
584 | ||
585 | /* Done with this operand, continue with next one. */ | |
586 | ++ syn; | |
587 | } | |
588 | ||
589 | /* If we're at the end of the syntax string, we're done. */ | |
b3466c39 | 590 | if (* syn == 0) |
252b5132 RH |
591 | { |
592 | /* FIXME: For the moment we assume a valid `str' can only contain | |
593 | blanks now. IE: We needn't try again with a longer version of | |
594 | the insn and it is assumed that longer versions of insns appear | |
595 | before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ | |
0e2ee3ca | 596 | while (isspace (* str)) |
252b5132 RH |
597 | ++ str; |
598 | ||
599 | if (* str != '\0') | |
600 | return _("junk at end of line"); /* FIXME: would like to include `str' */ | |
601 | ||
602 | return NULL; | |
603 | } | |
604 | ||
605 | /* We couldn't parse it. */ | |
606 | return _("unrecognized instruction"); | |
607 | } | |
608 | \f | |
609 | /* Main entry point. | |
610 | This routine is called for each instruction to be assembled. | |
611 | STR points to the insn to be assembled. | |
612 | We assume all necessary tables have been initialized. | |
613 | The assembled instruction, less any fixups, is stored in BUF. | |
614 | Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value | |
615 | still needs to be converted to target byte order, otherwise BUF is an array | |
616 | of bytes in target byte order. | |
617 | The result is a pointer to the insn's entry in the opcode table, | |
618 | or NULL if an error occured (an error message will have already been | |
619 | printed). | |
620 | ||
621 | Note that when processing (non-alias) macro-insns, | |
622 | this function recurses. | |
623 | ||
624 | ??? It's possible to make this cpu-independent. | |
625 | One would have to deal with a few minor things. | |
626 | At this point in time doing so would be more of a curiosity than useful | |
627 | [for example this file isn't _that_ big], but keeping the possibility in | |
628 | mind helps keep the design clean. */ | |
629 | ||
630 | const CGEN_INSN * | |
631 | fr30_cgen_assemble_insn (cd, str, fields, buf, errmsg) | |
632 | CGEN_CPU_DESC cd; | |
633 | const char *str; | |
634 | CGEN_FIELDS *fields; | |
635 | CGEN_INSN_BYTES_PTR buf; | |
636 | char **errmsg; | |
637 | { | |
638 | const char *start; | |
639 | CGEN_INSN_LIST *ilist; | |
b3466c39 DB |
640 | const char *parse_errmsg = NULL; |
641 | const char *insert_errmsg = NULL; | |
fc7bc883 | 642 | int recognized_mnemonic = 0; |
252b5132 RH |
643 | |
644 | /* Skip leading white space. */ | |
0e2ee3ca | 645 | while (isspace (* str)) |
252b5132 RH |
646 | ++ str; |
647 | ||
648 | /* The instructions are stored in hashed lists. | |
649 | Get the first in the list. */ | |
650 | ilist = CGEN_ASM_LOOKUP_INSN (cd, str); | |
651 | ||
652 | /* Keep looking until we find a match. */ | |
252b5132 RH |
653 | start = str; |
654 | for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist)) | |
655 | { | |
656 | const CGEN_INSN *insn = ilist->insn; | |
fc7bc883 | 657 | recognized_mnemonic = 1; |
252b5132 | 658 | |
6bb95a0f | 659 | #ifdef CGEN_VALIDATE_INSN_SUPPORTED |
f3a55c17 NC |
660 | /* Not usually needed as unsupported opcodes |
661 | shouldn't be in the hash lists. */ | |
252b5132 RH |
662 | /* Is this insn supported by the selected cpu? */ |
663 | if (! fr30_cgen_insn_supported (cd, insn)) | |
664 | continue; | |
665 | #endif | |
252b5132 RH |
666 | /* If the RELAX attribute is set, this is an insn that shouldn't be |
667 | chosen immediately. Instead, it is used during assembler/linker | |
668 | relaxation if possible. */ | |
669 | if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAX) != 0) | |
670 | continue; | |
671 | ||
672 | str = start; | |
673 | ||
f3a55c17 | 674 | /* Skip this insn if str doesn't look right lexically. */ |
fc7bc883 RH |
675 | if (CGEN_INSN_RX (insn) != NULL && |
676 | regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH) | |
677 | continue; | |
678 | ||
252b5132 RH |
679 | /* Allow parse/insert handlers to obtain length of insn. */ |
680 | CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); | |
681 | ||
b3466c39 DB |
682 | parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields); |
683 | if (parse_errmsg != NULL) | |
6bb95a0f | 684 | continue; |
252b5132 | 685 | |
f3a55c17 | 686 | /* ??? 0 is passed for `pc'. */ |
b3466c39 DB |
687 | insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, |
688 | (bfd_vma) 0); | |
689 | if (insert_errmsg != NULL) | |
6bb95a0f DB |
690 | continue; |
691 | ||
692 | /* It is up to the caller to actually output the insn and any | |
693 | queued relocs. */ | |
694 | return insn; | |
252b5132 RH |
695 | } |
696 | ||
252b5132 | 697 | { |
6bb95a0f | 698 | static char errbuf[150]; |
fc7bc883 | 699 | #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS |
b3466c39 | 700 | const char *tmp_errmsg; |
6bb95a0f | 701 | |
b3466c39 | 702 | /* If requesting verbose error messages, use insert_errmsg. |
f3a55c17 | 703 | Failing that, use parse_errmsg. */ |
b3466c39 DB |
704 | tmp_errmsg = (insert_errmsg ? insert_errmsg : |
705 | parse_errmsg ? parse_errmsg : | |
f3a55c17 NC |
706 | recognized_mnemonic ? |
707 | _("unrecognized form of instruction") : | |
b3466c39 DB |
708 | _("unrecognized instruction")); |
709 | ||
6bb95a0f DB |
710 | if (strlen (start) > 50) |
711 | /* xgettext:c-format */ | |
712 | sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); | |
713 | else | |
714 | /* xgettext:c-format */ | |
715 | sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); | |
716 | #else | |
252b5132 RH |
717 | if (strlen (start) > 50) |
718 | /* xgettext:c-format */ | |
719 | sprintf (errbuf, _("bad instruction `%.50s...'"), start); | |
720 | else | |
721 | /* xgettext:c-format */ | |
722 | sprintf (errbuf, _("bad instruction `%.50s'"), start); | |
6bb95a0f | 723 | #endif |
252b5132 RH |
724 | |
725 | *errmsg = errbuf; | |
726 | return NULL; | |
727 | } | |
728 | } | |
729 | \f | |
730 | #if 0 /* This calls back to GAS which we can't do without care. */ | |
731 | ||
732 | /* Record each member of OPVALS in the assembler's symbol table. | |
733 | This lets GAS parse registers for us. | |
734 | ??? Interesting idea but not currently used. */ | |
735 | ||
736 | /* Record each member of OPVALS in the assembler's symbol table. | |
737 | FIXME: Not currently used. */ | |
738 | ||
739 | void | |
740 | fr30_cgen_asm_hash_keywords (cd, opvals) | |
741 | CGEN_CPU_DESC cd; | |
742 | CGEN_KEYWORD *opvals; | |
743 | { | |
744 | CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL); | |
745 | const CGEN_KEYWORD_ENTRY * ke; | |
746 | ||
747 | while ((ke = cgen_keyword_search_next (& search)) != NULL) | |
748 | { | |
749 | #if 0 /* Unnecessary, should be done in the search routine. */ | |
750 | if (! fr30_cgen_opval_supported (ke)) | |
751 | continue; | |
752 | #endif | |
753 | cgen_asm_record_register (cd, ke->name, ke->value); | |
754 | } | |
755 | } | |
756 | ||
757 | #endif /* 0 */ |