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* size.c (berkeley_sum): New function.
[deliverable/binutils-gdb.git] / opcodes / hppa-dis.c
CommitLineData
112087ed
KR		 1/* Disassembler for the PA-RISC. Somewhat derived from sparc-pinsn.c.
2 Copyright 1989, 1990, 1992, 1993 Free Software Foundation, Inc.
3
4 Contributed by the Center for Software Science at the
5 University of Utah (pa-gdb-bugs@cs.utah.edu).
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
20
17068960 21#include <ansidecl.h>
112087ed 22#include "sysdep.h"
17068960 23#include "dis-asm.h"
112087ed
KR		 24#include "opcode/hppa.h"
25
18de15d8
JK		 26/* Integer register names, indexed by the numbers which appear in the
27 opcodes. */
28static const char *const reg_names[] =
29 {"flags", "r1", "rp", "r3", "r4", "r5", "r6", "r7", "r8", "r9",
30 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19",
31 "r20", "r21", "r22", "arg3", "arg2", "arg1", "arg0", "dp", "ret0", "ret1",
32 "sp", "r31"}
33
34/* Floating point register names, indexed by the numbers which appear in the
35 opcodes. */
36static const char *const fp_reg_names[] =
37 {"fpsr", "fpe2", "fpe4", "fpe6",
38 "fr4", "fr5", "fr6", "fr7", "fr8",
39 "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
40 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23",
41 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31"};
112087ed
KR		 42
43typedef unsigned int CORE_ADDR;
44
45/* Get at various relevent fields of an instruction word. */
46
47#define MASK_5 0x1f
48#define MASK_11 0x7ff
49#define MASK_14 0x3fff
50#define MASK_21 0x1fffff
51
52/* This macro gets bit fields using HP's numbering (MSB = 0) */
53
54#define GET_FIELD(X, FROM, TO) \
55 ((X) >> (31 - (TO)) & ((1 << ((TO) - (FROM) + 1)) - 1))
56
57/* Some of these have been converted to 2-d arrays because they
58 consume less storage this way. If the maintenance becomes a
59 problem, convert them back to const 1-d pointer arrays. */
60static const char control_reg[][6] = {
61 "rctr", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
62 "pidr1", "pidr2", "ccr", "sar", "pidr3", "pidr4",
63 "iva", "eiem", "itmr", "pcsq", "pcoq", "iir", "isr",
64 "ior", "ipsw", "eirr", "tr0", "tr1", "tr2", "tr3",
65 "tr4", "tr5", "tr6", "tr7"
66};
67
68static const char compare_cond_names[][5] = {
69 "", ",=", ",<", ",<=", ",<<", ",<<=", ",sv",
70 ",od", ",tr", ",<>", ",>=", ",>", ",>>=",
71 ",>>", ",nsv", ",ev"
72};
73static const char add_cond_names[][5] = {
74 "", ",=", ",<", ",<=", ",nuv", ",znv", ",sv",
75 ",od", ",tr", ",<>", ",>=", ",>", ",uv",
76 ",vnz", ",nsv", ",ev"
77};
78static const char *const logical_cond_names[] = {
79 "", ",=", ",<", ",<=", 0, 0, 0, ",od",
80 ",tr", ",<>", ",>=", ",>", 0, 0, 0, ",ev"};
81static const char *const unit_cond_names[] = {
82 "", 0, ",sbz", ",shz", ",sdc", 0, ",sbc", ",shc",
83 ",tr", 0, ",nbz", ",nhz", ",ndc", 0, ",nbc", ",nhc"
84};
85static const char shift_cond_names[][4] = {
86 "", ",=", ",<", ",od", ",tr", ",<>", ",>=", ",ev"
87};
88static const char index_compl_names[][4] = {"", ",m", ",s", ",sm"};
89static const char short_ldst_compl_names[][4] = {"", ",ma", "", ",mb"};
90static const char *const short_bytes_compl_names[] = {
91 "", ",b,m", ",e", ",e,m"
92};
17068960 93static const char *const float_format_names[] = {",sgl", ",dbl", "", ",quad"};
112087ed
KR		 94static const char float_comp_names[][8] =
95{
96 ",false?", ",false", ",?", ",!<=>", ",=", ",=t", ",?=", ",!<>",
97 ",!?>=", ",<", ",?<", ",!>=", ",!?>", ",<=", ",?<=", ",!>",
98 ",!?<=", ",>", ",?>", ",!<=", ",!?<", ",>=", ",?>=", ",!<",
99 ",!?=", ",<>", ",!=", ",!=t", ",!?", ",<=>", ",true?", ",true"
100};
101
102/* For a bunch of different instructions form an index into a
103 completer name table. */
104#define GET_COMPL(insn) (GET_FIELD (insn, 26, 26) | \
105 GET_FIELD (insn, 18, 18) << 1)
106
107#define GET_COND(insn) (GET_FIELD ((insn), 16, 18) + \
108 (GET_FIELD ((insn), 19, 19) ? 8 : 0))
109
110/* Utility function to print registers. Put these first, so gcc's function
111 inlining can do its stuff. */
112
113#define fputs_filtered(STR,F) (*info->fprintf_func) (info->stream, "%s", STR)
114
115static void
116fput_reg (reg, info)
117 unsigned reg;
118 disassemble_info *info;
119{
120 (*info->fprintf_func) (info->stream, reg ? reg_names[reg] : "r0");
121}
122
123static void
18de15d8 124fput_fp_reg (reg, info)
112087ed
KR		 125 unsigned reg;
126 disassemble_info *info;
127{
18de15d8
JK		 128 (*info->fprintf_func) (info->stream, reg ? fp_reg_names[reg] : "fr0");
129}
130
131static void
132fput_fp_reg_r (reg, info)
133 unsigned reg;
134 disassemble_info *info;
135{
136 /* Special case floating point exception registers. */
137 if (reg < 4)
138 (*info->fprintf_func) (info->stream, "fpe%d", reg * 2 + 1);
139 else
140 (*info->fprintf_func) (info->stream, "%sR", reg ? fp_reg_names[reg]
141 : "fr0");
112087ed
KR		 142}
143
144static void
145fput_creg (reg, info)
146 unsigned reg;
147 disassemble_info *info;
148{
149 (*info->fprintf_func) (info->stream, control_reg[reg]);
150}
151
152/* print constants with sign */
153
154static void
155fput_const (num, info)
156 unsigned num;
157 disassemble_info *info;
158{
159 if ((int)num < 0)
160 (*info->fprintf_func) (info->stream, "-%x", -(int)num);
161 else
162 (*info->fprintf_func) (info->stream, "%x", num);
163}
164
165/* Routines to extract various sized constants out of hppa
166 instructions. */
167
168/* This assumes that no garbage lies outside of the lower bits of
169 value. */
170
171static int
172sign_extend (val, bits)
173 unsigned val, bits;
174{
175 return (int)(val >> (bits - 1) ? (-1 << bits) | val : val);
176}
177
178/* For many immediate values the sign bit is the low bit! */
179
180static int
181low_sign_extend (val, bits)
182 unsigned val, bits;
183{
184 return (int)((val & 0x1 ? (-1 << (bits - 1)) : 0) | val >> 1);
185}
186/* extract the immediate field from a ld{bhw}s instruction */
187
188#if 0 /* not used */
189static unsigned
190get_field (val, from, to)
191 unsigned val, from, to;
192{
193 val = val >> (31 - to);
194 return val & ((1 << (32 - from)) - 1);
195}
196
197static unsigned
198set_field (val, from, to, new_val)
199 unsigned *val, from, to, new_val;
200{
201 unsigned mask = ~((1 << (to - from + 1)) << (31 - from));
202 return *val = (*val & mask) | (new_val << (31 - from));
203}
204#endif
205
206/* extract a 3-bit space register number from a be, ble, mtsp or mfsp */
207static int
208extract_3 (word)
209 unsigned word;
210{
211 return GET_FIELD (word, 18, 18) << 2 | GET_FIELD (word, 16, 17);
212}
213
214static int
215extract_5_load (word)
216 unsigned word;
217{
218 return low_sign_extend (word >> 16 & MASK_5, 5);
219}
220
221/* extract the immediate field from a st{bhw}s instruction */
222static int
223extract_5_store (word)
224 unsigned word;
225{
226 return low_sign_extend (word & MASK_5, 5);
227}
228
229/* extract the immediate field from a break instruction */
230static unsigned
231extract_5r_store (word)
232 unsigned word;
233{
234 return (word & MASK_5);
235}
236
237/* extract the immediate field from a {sr}sm instruction */
238static unsigned
239extract_5R_store (word)
240 unsigned word;
241{
242 return (word >> 16 & MASK_5);
243}
244
245/* extract the immediate field from a bb instruction */
246static unsigned
247extract_5Q_store (word)
248 unsigned word;
249{
250 return (word >> 21 & MASK_5);
251}
252
253/* extract an 11 bit immediate field */
254static int
255extract_11 (word)
256 unsigned word;
257{
258 return low_sign_extend (word & MASK_11, 11);
259}
260
261/* extract a 14 bit immediate field */
262static int
263extract_14 (word)
264 unsigned word;
265{
266 return low_sign_extend (word & MASK_14, 14);
267}
268
269#if 0
270/* deposit a 14 bit constant in a word */
271static unsigned
272deposit_14 (opnd, word)
273 int opnd;
274 unsigned word;
275{
276 unsigned sign = (opnd < 0 ? 1 : 0);
277
278 return word | ((unsigned)opnd << 1 & MASK_14) | sign;
279}
280#endif
281
282/* extract a 21 bit constant */
283
284static int
285extract_21 (word)
286 unsigned word;
287{
288 int val;
289
290 word &= MASK_21;
291 word <<= 11;
292 val = GET_FIELD (word, 20, 20);
293 val <<= 11;
294 val |= GET_FIELD (word, 9, 19);
295 val <<= 2;
296 val |= GET_FIELD (word, 5, 6);
297 val <<= 5;
298 val |= GET_FIELD (word, 0, 4);
299 val <<= 2;
300 val |= GET_FIELD (word, 7, 8);
301 return sign_extend (val, 21) << 11;
302}
303
304#if 0
305/* deposit a 21 bit constant in a word. Although 21 bit constants are
306 usually the top 21 bits of a 32 bit constant, we assume that only
307 the low 21 bits of opnd are relevant */
308
309static unsigned
310deposit_21 (opnd, word)
311 unsigned opnd, word;
312{
313 unsigned val = 0;
314
315 val |= GET_FIELD (opnd, 11 + 14, 11 + 18);
316 val <<= 2;
317 val |= GET_FIELD (opnd, 11 + 12, 11 + 13);
318 val <<= 2;
319 val |= GET_FIELD (opnd, 11 + 19, 11 + 20);
320 val <<= 11;
321 val |= GET_FIELD (opnd, 11 + 1, 11 + 11);
322 val <<= 1;
323 val |= GET_FIELD (opnd, 11 + 0, 11 + 0);
324 return word | val;
325}
326#endif
327
328/* extract a 12 bit constant from branch instructions */
329
330static int
331extract_12 (word)
332 unsigned word;
333{
334 return sign_extend (GET_FIELD (word, 19, 28) |
335 GET_FIELD (word, 29, 29) << 10 |
336 (word & 0x1) << 11, 12) << 2;
337}
338
339/* extract a 17 bit constant from branch instructions, returning the
340 19 bit signed value. */
341
342static int
343extract_17 (word)
344 unsigned word;
345{
346 return sign_extend (GET_FIELD (word, 19, 28) |
347 GET_FIELD (word, 29, 29) << 10 |
348 GET_FIELD (word, 11, 15) << 11 |
349 (word & 0x1) << 16, 17) << 2;
350}
351
352/* Print one instruction. */
353int
354print_insn_hppa (memaddr, info)
355 bfd_vma memaddr;
356 disassemble_info *info;
357{
358 unsigned int insn, i, op;
359 FILE *stream = info->stream;
360
361 {
362 int status =
363 (*info->read_memory_func) (memaddr, (bfd_byte*) &insn, sizeof (insn),
364 info);
365 if (status != 0)
366 {
367 (*info->memory_error_func) (status, memaddr, info);
368 return -1;
369 }
370 }
371
372 for (i = 0; i < NUMOPCODES; ++i)
373 {
374 const struct pa_opcode *opcode = &pa_opcodes[i];
375 if ((insn & opcode->mask) == opcode->match)
376 {
377 register const char *s;
378
379 (*info->fprintf_func) (info->stream, "%s", opcode->name);
380
5aef7c67 381 if (!strchr ("cCY<?!@-+&U>~nZFIMad", opcode->args[0]))
112087ed
KR		 382 (*info->fprintf_func) (info->stream, " ");
383 for (s = opcode->args; *s != '\0'; ++s)
384 {
385 switch (*s)
386 {
387 case 'x':
388 fput_reg (GET_FIELD (insn, 11, 15), info);
389 break;
390 case 'X':
391 if (GET_FIELD (insn, 25, 25))
18de15d8 392 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
112087ed 393 else
18de15d8 394 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
112087ed
KR		 395 break;
396 case 'b':
397 fput_reg (GET_FIELD (insn, 6, 10), info);
398 break;
399 case '^':
400 fput_creg (GET_FIELD (insn, 6, 10), info);
401 break;
402 case 'E':
403 if (GET_FIELD (insn, 25, 25))
18de15d8 404 fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
112087ed 405 else
18de15d8 406 fput_fp_reg (GET_FIELD (insn, 6, 10), info);
112087ed
KR		 407 break;
408 case 't':
409 fput_reg (GET_FIELD (insn, 27, 31), info);
410 break;
411 case 'v':
412 if (GET_FIELD (insn, 25, 25))
18de15d8 413 fput_fp_reg_r (GET_FIELD (insn, 27, 31), info);
112087ed 414 else
18de15d8
JK		 415 fput_fp_reg (GET_FIELD (insn, 27, 31), info);
416 break;
417 case 'y':
418 fput_fp_reg (GET_FIELD (insn, 27, 31), info);
112087ed
KR		 419 break;
420 case '4':
18de15d8 421 fput_fp_reg (GET_FIELD (insn, 6, 10), info);
112087ed
KR		 422 break;
423 case '6':
18de15d8 424 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
112087ed
KR		 425 break;
426 case '7':
18de15d8 427 fput_fp_reg (GET_FIELD (insn, 27, 31), info);
112087ed
KR		 428 break;
429 case '8':
18de15d8 430 fput_fp_reg (GET_FIELD (insn, 16, 20), info);
112087ed
KR		 431 break;
432 case '9':
18de15d8 433 fput_fp_reg (GET_FIELD (insn, 21, 25), info);
112087ed
KR		 434 break;
435 case '5':
436 fput_const (extract_5_load (insn), info);
437 break;
438 case 's':
439 fprintf_filtered (stream, "sr%d", GET_FIELD (insn, 16, 17));
440 break;
441 case 'S':
442 (*info->fprintf_func) (info->stream, "sr%d", extract_3 (insn));
443 break;
444 case 'c':
445 (*info->fprintf_func) (info->stream, "%s ",
446 index_compl_names[GET_COMPL (insn)]);
447 break;
448 case 'C':
449 (*info->fprintf_func) (info->stream, "%s ",
450 short_ldst_compl_names[GET_COMPL (insn)]);
451 break;
452 case 'Y':
453 (*info->fprintf_func) (info->stream, "%s ",
454 short_bytes_compl_names[GET_COMPL (insn)]);
455 break;
456 /* these four conditions are for the set of instructions
457 which distinguish true/false conditions by opcode rather
458 than by the 'f' bit (sigh): comb, comib, addb, addib */
459 case '<':
460 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18)],
461 info);
462 break;
463 case '?':
464 fputs_filtered (compare_cond_names[GET_FIELD (insn, 16, 18) + 8],
465 info);
466 break;
467 case '@':
468 fputs_filtered (add_cond_names[GET_FIELD (insn, 16, 18) + 8],
469 info);
470 break;
5aef7c67 471 case 'a':
4d135f1c
JK		 472 (*info->fprintf_func) (info->stream, "%s ",
473 compare_cond_names[GET_COND (insn)]);
112087ed 474 break;
5aef7c67 475 case 'd':
4d135f1c
JK		 476 (*info->fprintf_func) (info->stream, "%s ",
477 add_cond_names[GET_COND (insn)]);
478 break;
112087ed
KR		 479 case '!':
480 (*info->fprintf_func) (info->stream, "%s",
481 add_cond_names[GET_FIELD (insn, 16, 18)]);
482 break;
483
484 case '&':
485 (*info->fprintf_func) (info->stream, "%s ",
486 logical_cond_names[GET_COND (insn)]);
487 break;
488 case 'U':
489 (*info->fprintf_func) (info->stream, "%s ",
490 unit_cond_names[GET_COND (insn)]);
491 break;
492 case '>':
493 case '~':
981b3a27
JK		 494 (*info->fprintf_func)
495 (info->stream, "%s",
496 shift_cond_names[GET_FIELD (insn, 16, 18)]);
497
498 /* If the next character in args is 'n', it will handle
499 putting out the space. */
500 if (s[1] != 'n')
501 (*info->fprintf_func) (info->stream, " ");
112087ed
KR		 502 break;
503 case 'V':
504 fput_const (extract_5_store (insn), info);
505 break;
b2ad2e64
JK		 506 case 'r':
507 fput_const (extract_5r_store (insn), info);
508 break;
112087ed
KR		 509 case 'R':
510 fput_const (extract_5R_store (insn), info);
511 break;
512 case 'Q':
513 fput_const (extract_5Q_store (insn), info);
514 break;
515 case 'i':
516 fput_const (extract_11 (insn), info);
517 break;
518 case 'j':
519 fput_const (extract_14 (insn), info);
520 break;
521 case 'k':
522 fput_const (extract_21 (insn), info);
523 break;
524 case 'n':
525 if (insn & 0x2)
526 (*info->fprintf_func) (info->stream, ",n ");
527 else
528 (*info->fprintf_func) (info->stream, " ");
529 break;
530 case 'w':
531 (*info->print_address_func) (memaddr + 8 + extract_12 (insn),
532 info);
533 break;
534 case 'W':
535 /* don't interpret an address if it's an external branch
536 instruction. */
537 op = GET_FIELD (insn, 0, 5);
538 if (op != 0x38 /* be */ && op != 0x39 /* ble */)
539 (*info->print_address_func) ((memaddr + 8
540 + extract_17 (insn)),
541 info);
542 else
543 fput_const (extract_17 (insn), info);
544 break;
545 case 'p':
546 (*info->fprintf_func) (info->stream, "%d",
547 31 - GET_FIELD (insn, 22, 26));
548 break;
549 case 'P':
550 (*info->fprintf_func) (info->stream, "%d",
551 GET_FIELD (insn, 22, 26));
552 break;
553 case 'T':
554 (*info->fprintf_func) (info->stream, "%d",
555 32 - GET_FIELD (insn, 27, 31));
556 break;
557 case 'A':
558 fput_const (GET_FIELD (insn, 6, 18), info);
559 break;
560 case 'Z':
561 if (GET_FIELD (insn, 26, 26))
562 (*info->fprintf_func) (info->stream, ",m ");
563 else
564 (*info->fprintf_func) (info->stream, " ");
565 break;
566 case 'D':
567 fput_const (GET_FIELD (insn, 6, 31), info);
568 break;
569 case 'f':
570 (*info->fprintf_func) (info->stream, ",%d", GET_FIELD (insn, 23, 25));
571 break;
572 case 'O':
573 fput_const ((GET_FIELD (insn, 6,20) << 5 |
574 GET_FIELD (insn, 27, 31)), info);
575 break;
576 case 'o':
577 fput_const (GET_FIELD (insn, 6, 20), info);
578 break;
579 case '2':
580 fput_const ((GET_FIELD (insn, 6, 22) << 5 |
581 GET_FIELD (insn, 27, 31)), info);
582 break;
583 case '1':
584 fput_const ((GET_FIELD (insn, 11, 20) << 5 |
585 GET_FIELD (insn, 27, 31)), info);
586 break;
587 case '0':
588 fput_const ((GET_FIELD (insn, 16, 20) << 5 |
589 GET_FIELD (insn, 27, 31)), info);
590 break;
591 case 'u':
592 (*info->fprintf_func) (info->stream, "%d", GET_FIELD (insn, 23, 25));
593 break;
594 case 'F':
595 /* if no destination completer, need a space here */
596 if (GET_FIELD (insn, 21, 22) == 1)
597 fputs_filtered (float_format_names[GET_FIELD (insn, 19, 20)],
598 info);
599 else
600 (*info->fprintf_func) (info->stream, "%s ",
601 float_format_names[GET_FIELD
602 (insn, 19, 20)]);
603 break;
604 case 'G':
605 (*info->fprintf_func) (info->stream, "%s ",
606 float_format_names[GET_FIELD (insn,
607 17, 18)]);
608 break;
609 case 'H':
610 fputs_filtered (float_format_names[GET_FIELD
611 (insn, 26, 26)], info);
612 break;
613 case 'I':
614 /* if no destination completer, need a space here */
615 if (GET_FIELD (insn, 21, 22) == 1)
616 fputs_filtered (float_format_names[GET_FIELD (insn, 20, 20)],
617 info);
618 else
619 fprintf_filtered (stream, "%s ",
620 float_format_names[GET_FIELD
621 (insn, 20, 20)]);
622 break;
623 case 'J':
624 if (GET_FIELD (insn, 24, 24))
18de15d8 625 fput_fp_reg_r (GET_FIELD (insn, 6, 10), info);
112087ed 626 else
18de15d8 627 fput_fp_reg (GET_FIELD (insn, 6, 10), info);
112087ed
KR		 628
629 break;
630 case 'K':
631 if (GET_FIELD (insn, 19, 19))
18de15d8 632 fput_fp_reg_r (GET_FIELD (insn, 11, 15), info);
112087ed 633 else
18de15d8 634 fput_fp_reg (GET_FIELD (insn, 11, 15), info);
112087ed
KR		 635 break;
636 case 'M':
637 fputs_filtered (float_comp_names[GET_FIELD (insn, 27, 31)],
638 info);
639 break;
640 default:
641 (*info->fprintf_func) (info->stream, "%c", *s);
642 break;
643 }
644 }
645 return sizeof(insn);
646 }
647 }
648 (*info->fprintf_func) (info->stream, "#%8x", insn);
649 return sizeof(insn);
650}
GDB Binutils - Deliverables
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