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[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
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252b5132 1/* Print i386 instructions for GDB, the GNU debugger.
060d22b0
NC		 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001
252b5132
RH		 4 Free Software Foundation, Inc.
5
6This file is part of GDB.
7
8This program is free software; you can redistribute it and/or modify
9it under the terms of the GNU General Public License as published by
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
12
13This program is distributed in the hope that it will be useful,
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
19along with this program; if not, write to the Free Software
20Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21
22/*
23 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
24 * July 1988
25 * modified by John Hassey (hassey@dg-rtp.dg.com)
52b15da3 26 * x86-64 support added by Jan Hubicka (jh@suse.cz)
252b5132
RH		 27 */
28
29/*
30 * The main tables describing the instructions is essentially a copy
31 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
32 * Programmers Manual. Usually, there is a capital letter, followed
33 * by a small letter. The capital letter tell the addressing mode,
34 * and the small letter tells about the operand size. Refer to
35 * the Intel manual for details.
36 */
37
38#include "dis-asm.h"
39#include "sysdep.h"
40#include "opintl.h"
41
42#define MAXLEN 20
43
44#include <setjmp.h>
45
46#ifndef UNIXWARE_COMPAT
47/* Set non-zero for broken, compatible instructions. Set to zero for
48 non-broken opcodes. */
49#define UNIXWARE_COMPAT 1
50#endif
51
252b5132 52static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *));
6439fc28
AM		 53static void ckprefix PARAMS ((void));
54static const char *prefix_name PARAMS ((int, int));
e396998b 55static int print_insn PARAMS ((bfd_vma, disassemble_info *));
6439fc28
AM		 56static void dofloat PARAMS ((int));
57static void OP_ST PARAMS ((int, int));
58static void OP_STi PARAMS ((int, int));
59static int putop PARAMS ((const char *, int));
60static void oappend PARAMS ((const char *));
61static void append_seg PARAMS ((void));
62static void OP_indirE PARAMS ((int, int));
63static void print_operand_value PARAMS ((char *, int, bfd_vma));
64static void OP_E PARAMS ((int, int));
65static void OP_G PARAMS ((int, int));
66static bfd_vma get64 PARAMS ((void));
67static bfd_signed_vma get32 PARAMS ((void));
68static bfd_signed_vma get32s PARAMS ((void));
69static int get16 PARAMS ((void));
7081ff04 70static void set_op PARAMS ((bfd_vma, int));
6439fc28
AM		 71static void OP_REG PARAMS ((int, int));
72static void OP_IMREG PARAMS ((int, int));
73static void OP_I PARAMS ((int, int));
74static void OP_I64 PARAMS ((int, int));
75static void OP_sI PARAMS ((int, int));
76static void OP_J PARAMS ((int, int));
77static void OP_SEG PARAMS ((int, int));
78static void OP_DIR PARAMS ((int, int));
79static void OP_OFF PARAMS ((int, int));
80static void OP_OFF64 PARAMS ((int, int));
81static void ptr_reg PARAMS ((int, int));
82static void OP_ESreg PARAMS ((int, int));
83static void OP_DSreg PARAMS ((int, int));
84static void OP_C PARAMS ((int, int));
85static void OP_D PARAMS ((int, int));
86static void OP_T PARAMS ((int, int));
87static void OP_Rd PARAMS ((int, int));
88static void OP_MMX PARAMS ((int, int));
89static void OP_XMM PARAMS ((int, int));
90static void OP_EM PARAMS ((int, int));
91static void OP_EX PARAMS ((int, int));
92static void OP_MS PARAMS ((int, int));
93static void OP_XS PARAMS ((int, int));
94static void OP_3DNowSuffix PARAMS ((int, int));
95static void OP_SIMD_Suffix PARAMS ((int, int));
96static void SIMD_Fixup PARAMS ((int, int));
97static void BadOp PARAMS ((void));
252b5132 98
6608db57 99struct dis_private {
252b5132
RH		 100 /* Points to first byte not fetched. */
101 bfd_byte *max_fetched;
102 bfd_byte the_buffer[MAXLEN];
103 bfd_vma insn_start;
e396998b 104 int orig_sizeflag;
252b5132
RH		 105 jmp_buf bailout;
106};
107
5076851f
ILT		 108/* The opcode for the fwait instruction, which we treat as a prefix
109 when we can. */
110#define FWAIT_OPCODE (0x9b)
111
52b15da3
JH		 112/* Set to 1 for 64bit mode disassembly. */
113static int mode_64bit;
114
5076851f
ILT		 115/* Flags for the prefixes for the current instruction. See below. */
116static int prefixes;
117
52b15da3
JH		 118/* REX prefix the current instruction. See below. */
119static int rex;
120/* Bits of REX we've already used. */
121static int rex_used;
122#define REX_MODE64 8
123#define REX_EXTX 4
124#define REX_EXTY 2
125#define REX_EXTZ 1
126/* Mark parts used in the REX prefix. When we are testing for
127 empty prefix (for 8bit register REX extension), just mask it
128 out. Otherwise test for REX bit is excuse for existence of REX
129 only in case value is nonzero. */
130#define USED_REX(value) \
131 { \
132 if (value) \
133 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
134 else \
135 rex_used |= 0x40; \
136 }
137
7d421014
ILT		 138/* Flags for prefixes which we somehow handled when printing the
139 current instruction. */
140static int used_prefixes;
141
5076851f
ILT		 142/* Flags stored in PREFIXES. */
143#define PREFIX_REPZ 1
144#define PREFIX_REPNZ 2
145#define PREFIX_LOCK 4
146#define PREFIX_CS 8
147#define PREFIX_SS 0x10
148#define PREFIX_DS 0x20
149#define PREFIX_ES 0x40
150#define PREFIX_FS 0x80
151#define PREFIX_GS 0x100
152#define PREFIX_DATA 0x200
153#define PREFIX_ADDR 0x400
154#define PREFIX_FWAIT 0x800
155
252b5132
RH		 156/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
157 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
158 on error. */
159#define FETCH_DATA(info, addr) \
6608db57 160 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
252b5132
RH		 161 ? 1 : fetch_data ((info), (addr)))
162
163static int
164fetch_data (info, addr)
165 struct disassemble_info *info;
166 bfd_byte *addr;
167{
168 int status;
6608db57 169 struct dis_private *priv = (struct dis_private *) info->private_data;
252b5132
RH		 170 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
171
172 status = (*info->read_memory_func) (start,
173 priv->max_fetched,
174 addr - priv->max_fetched,
175 info);
176 if (status != 0)
177 {
7d421014
ILT		 178 /* If we did manage to read at least one byte, then
179 print_insn_i386 will do something sensible. Otherwise, print
180 an error. We do that here because this is where we know
181 STATUS. */
182 if (priv->max_fetched == priv->the_buffer)
5076851f 183 (*info->memory_error_func) (status, start, info);
252b5132
RH		 184 longjmp (priv->bailout, 1);
185 }
186 else
187 priv->max_fetched = addr;
188 return 1;
189}
190
57d91c3c
ILT		 191#define XX NULL, 0
192
252b5132 193#define Eb OP_E, b_mode
52b15da3
JH		 194#define Ev OP_E, v_mode
195#define Ed OP_E, d_mode
252b5132 196#define indirEb OP_indirE, b_mode
252b5132
RH		 197#define indirEv OP_indirE, v_mode
198#define Ew OP_E, w_mode
199#define Ma OP_E, v_mode
bcb5558b 200#define M OP_E, 0 /* lea, lgdt, etc. */
2da11e11 201#define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
992aaec9 202#define Gb OP_G, b_mode
252b5132 203#define Gv OP_G, v_mode
992aaec9 204#define Gd OP_G, d_mode
252b5132 205#define Gw OP_G, w_mode
2da11e11 206#define Rd OP_Rd, d_mode
52b15da3 207#define Rm OP_Rd, m_mode
252b5132
RH		 208#define Ib OP_I, b_mode
209#define sIb OP_sI, b_mode /* sign extened byte */
210#define Iv OP_I, v_mode
52b15da3
JH		 211#define Iq OP_I, q_mode
212#define Iv64 OP_I64, v_mode
252b5132
RH		 213#define Iw OP_I, w_mode
214#define Jb OP_J, b_mode
215#define Jv OP_J, v_mode
52b15da3
JH		 216#define Cm OP_C, m_mode
217#define Dm OP_D, m_mode
252b5132
RH		 218#define Td OP_T, d_mode
219
52b15da3
JH		 220#define RMeAX OP_REG, eAX_reg
221#define RMeBX OP_REG, eBX_reg
222#define RMeCX OP_REG, eCX_reg
223#define RMeDX OP_REG, eDX_reg
224#define RMeSP OP_REG, eSP_reg
225#define RMeBP OP_REG, eBP_reg
226#define RMeSI OP_REG, eSI_reg
227#define RMeDI OP_REG, eDI_reg
228#define RMrAX OP_REG, rAX_reg
229#define RMrBX OP_REG, rBX_reg
230#define RMrCX OP_REG, rCX_reg
231#define RMrDX OP_REG, rDX_reg
232#define RMrSP OP_REG, rSP_reg
233#define RMrBP OP_REG, rBP_reg
234#define RMrSI OP_REG, rSI_reg
235#define RMrDI OP_REG, rDI_reg
236#define RMAL OP_REG, al_reg
237#define RMAL OP_REG, al_reg
238#define RMCL OP_REG, cl_reg
239#define RMDL OP_REG, dl_reg
240#define RMBL OP_REG, bl_reg
241#define RMAH OP_REG, ah_reg
242#define RMCH OP_REG, ch_reg
243#define RMDH OP_REG, dh_reg
244#define RMBH OP_REG, bh_reg
245#define RMAX OP_REG, ax_reg
246#define RMDX OP_REG, dx_reg
247
248#define eAX OP_IMREG, eAX_reg
249#define eBX OP_IMREG, eBX_reg
250#define eCX OP_IMREG, eCX_reg
251#define eDX OP_IMREG, eDX_reg
252#define eSP OP_IMREG, eSP_reg
253#define eBP OP_IMREG, eBP_reg
254#define eSI OP_IMREG, eSI_reg
255#define eDI OP_IMREG, eDI_reg
256#define AL OP_IMREG, al_reg
257#define AL OP_IMREG, al_reg
258#define CL OP_IMREG, cl_reg
259#define DL OP_IMREG, dl_reg
260#define BL OP_IMREG, bl_reg
261#define AH OP_IMREG, ah_reg
262#define CH OP_IMREG, ch_reg
263#define DH OP_IMREG, dh_reg
264#define BH OP_IMREG, bh_reg
265#define AX OP_IMREG, ax_reg
266#define DX OP_IMREG, dx_reg
267#define indirDX OP_IMREG, indir_dx_reg
252b5132
RH		 268
269#define Sw OP_SEG, w_mode
c608c12e 270#define Ap OP_DIR, 0
252b5132 271#define Ob OP_OFF, b_mode
52b15da3 272#define Ob64 OP_OFF64, b_mode
252b5132 273#define Ov OP_OFF, v_mode
52b15da3 274#define Ov64 OP_OFF64, v_mode
252b5132
RH		 275#define Xb OP_DSreg, eSI_reg
276#define Xv OP_DSreg, eSI_reg
277#define Yb OP_ESreg, eDI_reg
278#define Yv OP_ESreg, eDI_reg
279#define DSBX OP_DSreg, eBX_reg
280
281#define es OP_REG, es_reg
282#define ss OP_REG, ss_reg
283#define cs OP_REG, cs_reg
284#define ds OP_REG, ds_reg
285#define fs OP_REG, fs_reg
286#define gs OP_REG, gs_reg
287
288#define MX OP_MMX, 0
c608c12e 289#define XM OP_XMM, 0
252b5132 290#define EM OP_EM, v_mode
c608c12e 291#define EX OP_EX, v_mode
2da11e11 292#define MS OP_MS, v_mode
992aaec9 293#define XS OP_XS, v_mode
c608c12e 294#define None OP_E, 0
252b5132 295#define OPSUF OP_3DNowSuffix, 0
c608c12e 296#define OPSIMD OP_SIMD_Suffix, 0
252b5132 297
3ffd33cf
AM		 298#define cond_jump_flag NULL, cond_jump_mode
299#define loop_jcxz_flag NULL, loop_jcxz_mode
300
252b5132 301/* bits in sizeflag */
252b5132 302#define SUFFIX_ALWAYS 4
252b5132
RH		 303#define AFLAG 2
304#define DFLAG 1
305
52b15da3
JH		 306#define b_mode 1 /* byte operand */
307#define v_mode 2 /* operand size depends on prefixes */
308#define w_mode 3 /* word operand */
309#define d_mode 4 /* double word operand */
310#define q_mode 5 /* quad word operand */
311#define x_mode 6
312#define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */
3ffd33cf
AM		 313#define cond_jump_mode 8
314#define loop_jcxz_mode 9
252b5132
RH		 315
316#define es_reg 100
317#define cs_reg 101
318#define ss_reg 102
319#define ds_reg 103
320#define fs_reg 104
321#define gs_reg 105
252b5132 322
c608c12e
AM		 323#define eAX_reg 108
324#define eCX_reg 109
325#define eDX_reg 110
326#define eBX_reg 111
327#define eSP_reg 112
328#define eBP_reg 113
329#define eSI_reg 114
330#define eDI_reg 115
252b5132
RH		 331
332#define al_reg 116
333#define cl_reg 117
334#define dl_reg 118
335#define bl_reg 119
336#define ah_reg 120
337#define ch_reg 121
338#define dh_reg 122
339#define bh_reg 123
340
341#define ax_reg 124
342#define cx_reg 125
343#define dx_reg 126
344#define bx_reg 127
345#define sp_reg 128
346#define bp_reg 129
347#define si_reg 130
348#define di_reg 131
349
52b15da3
JH		 350#define rAX_reg 132
351#define rCX_reg 133
352#define rDX_reg 134
353#define rBX_reg 135
354#define rSP_reg 136
355#define rBP_reg 137
356#define rSI_reg 138
357#define rDI_reg 139
358
252b5132
RH		 359#define indir_dx_reg 150
360
6439fc28
AM		 361#define FLOATCODE 1
362#define USE_GROUPS 2
363#define USE_PREFIX_USER_TABLE 3
364#define X86_64_SPECIAL 4
365
366#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
367
368#define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
369#define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
370#define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
371#define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
372#define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
373#define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
374#define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
375#define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
376#define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
377#define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
378#define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
379#define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
380#define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
381#define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
382#define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
383#define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
384#define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
385#define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
386#define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
387#define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
388#define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
389#define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
390#define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
391
392#define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
393#define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
394#define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
395#define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
396#define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
397#define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
398#define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
399#define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
400#define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
401#define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
402#define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
403#define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
404#define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
405#define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
406#define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
407#define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
408#define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
409#define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
410#define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
411#define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
412#define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
413#define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
414#define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
415#define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
416#define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
417#define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
418#define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
419
420#define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
421
422typedef void (*op_rtn) PARAMS ((int bytemode, int sizeflag));
252b5132
RH		 423
424struct dis386 {
2da11e11 425 const char *name;
252b5132
RH		 426 op_rtn op1;
427 int bytemode1;
428 op_rtn op2;
429 int bytemode2;
430 op_rtn op3;
431 int bytemode3;
432};
433
434/* Upper case letters in the instruction names here are macros.
435 'A' => print 'b' if no register operands or suffix_always is true
436 'B' => print 'b' if suffix_always is true
437 'E' => print 'e' if 32-bit form of jcxz
3ffd33cf 438 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
5dd0794d 439 'H' => print ",pt" or ",pn" branch hint
252b5132
RH		 440 'L' => print 'l' if suffix_always is true
441 'N' => print 'n' if instruction has no wait "prefix"
52b15da3
JH		 442 'O' => print 'd', or 'o'
443 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
e396998b
AM		 444 . or suffix_always is true. print 'q' if rex prefix is present.
445 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
446 . is true
52b15da3
JH		 447 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
448 'S' => print 'w', 'l' or 'q' if suffix_always is true
6439fc28
AM		 449 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
450 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
041bd2e0 451 'X' => print 's', 'd' depending on data16 prefix (for XMM)
10084519 452 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
76f227a5 453 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
52b15da3 454
6439fc28
AM		 455 Many of the above letters print nothing in Intel mode. See "putop"
456 for the details.
52b15da3 457
6439fc28
AM		 458 Braces '{' and '}', and vertical bars '|', indicate alternative
459 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
460 modes. In cases where there are only two alternatives, the X86_64
461 instruction is reserved, and "(bad)" is printed.
462*/
252b5132 463
6439fc28 464static const struct dis386 dis386[] = {
252b5132 465 /* 00 */
6439fc28
AM		 466 { "addB", Eb, Gb, XX },
467 { "addS", Ev, Gv, XX },
468 { "addB", Gb, Eb, XX },
469 { "addS", Gv, Ev, XX },
470 { "addB", AL, Ib, XX },
471 { "addS", eAX, Iv, XX },
472 { "push{T|}", es, XX, XX },
473 { "pop{T|}", es, XX, XX },
252b5132 474 /* 08 */
6439fc28
AM		 475 { "orB", Eb, Gb, XX },
476 { "orS", Ev, Gv, XX },
477 { "orB", Gb, Eb, XX },
478 { "orS", Gv, Ev, XX },
479 { "orB", AL, Ib, XX },
480 { "orS", eAX, Iv, XX },
481 { "push{T|}", cs, XX, XX },
482 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
252b5132 483 /* 10 */
6439fc28
AM		 484 { "adcB", Eb, Gb, XX },
485 { "adcS", Ev, Gv, XX },
486 { "adcB", Gb, Eb, XX },
487 { "adcS", Gv, Ev, XX },
488 { "adcB", AL, Ib, XX },
489 { "adcS", eAX, Iv, XX },
490 { "push{T|}", ss, XX, XX },
491 { "popT|}", ss, XX, XX },
252b5132 492 /* 18 */
6439fc28
AM		 493 { "sbbB", Eb, Gb, XX },
494 { "sbbS", Ev, Gv, XX },
495 { "sbbB", Gb, Eb, XX },
496 { "sbbS", Gv, Ev, XX },
497 { "sbbB", AL, Ib, XX },
498 { "sbbS", eAX, Iv, XX },
499 { "push{T|}", ds, XX, XX },
500 { "pop{T|}", ds, XX, XX },
252b5132 501 /* 20 */
6439fc28
AM		 502 { "andB", Eb, Gb, XX },
503 { "andS", Ev, Gv, XX },
504 { "andB", Gb, Eb, XX },
505 { "andS", Gv, Ev, XX },
506 { "andB", AL, Ib, XX },
507 { "andS", eAX, Iv, XX },
508 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
509 { "daa{|}", XX, XX, XX },
252b5132 510 /* 28 */
6439fc28
AM		 511 { "subB", Eb, Gb, XX },
512 { "subS", Ev, Gv, XX },
513 { "subB", Gb, Eb, XX },
514 { "subS", Gv, Ev, XX },
515 { "subB", AL, Ib, XX },
516 { "subS", eAX, Iv, XX },
517 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
518 { "das{|}", XX, XX, XX },
252b5132 519 /* 30 */
6439fc28
AM		 520 { "xorB", Eb, Gb, XX },
521 { "xorS", Ev, Gv, XX },
522 { "xorB", Gb, Eb, XX },
523 { "xorS", Gv, Ev, XX },
524 { "xorB", AL, Ib, XX },
525 { "xorS", eAX, Iv, XX },
526 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
527 { "aaa{|}", XX, XX, XX },
252b5132 528 /* 38 */
6439fc28
AM		 529 { "cmpB", Eb, Gb, XX },
530 { "cmpS", Ev, Gv, XX },
531 { "cmpB", Gb, Eb, XX },
532 { "cmpS", Gv, Ev, XX },
533 { "cmpB", AL, Ib, XX },
534 { "cmpS", eAX, Iv, XX },
535 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
536 { "aas{|}", XX, XX, XX },
252b5132 537 /* 40 */
6439fc28
AM		 538 { "inc{S|}", RMeAX, XX, XX },
539 { "inc{S|}", RMeCX, XX, XX },
540 { "inc{S|}", RMeDX, XX, XX },
541 { "inc{S|}", RMeBX, XX, XX },
542 { "inc{S|}", RMeSP, XX, XX },
543 { "inc{S|}", RMeBP, XX, XX },
544 { "inc{S|}", RMeSI, XX, XX },
545 { "inc{S|}", RMeDI, XX, XX },
252b5132 546 /* 48 */
6439fc28
AM		 547 { "dec{S|}", RMeAX, XX, XX },
548 { "dec{S|}", RMeCX, XX, XX },
549 { "dec{S|}", RMeDX, XX, XX },
550 { "dec{S|}", RMeBX, XX, XX },
551 { "dec{S|}", RMeSP, XX, XX },
552 { "dec{S|}", RMeBP, XX, XX },
553 { "dec{S|}", RMeSI, XX, XX },
554 { "dec{S|}", RMeDI, XX, XX },
252b5132 555 /* 50 */
6439fc28
AM		 556 { "pushS", RMrAX, XX, XX },
557 { "pushS", RMrCX, XX, XX },
558 { "pushS", RMrDX, XX, XX },
559 { "pushS", RMrBX, XX, XX },
560 { "pushS", RMrSP, XX, XX },
561 { "pushS", RMrBP, XX, XX },
562 { "pushS", RMrSI, XX, XX },
563 { "pushS", RMrDI, XX, XX },
252b5132 564 /* 58 */
6439fc28
AM		 565 { "popS", RMrAX, XX, XX },
566 { "popS", RMrCX, XX, XX },
567 { "popS", RMrDX, XX, XX },
568 { "popS", RMrBX, XX, XX },
569 { "popS", RMrSP, XX, XX },
570 { "popS", RMrBP, XX, XX },
571 { "popS", RMrSI, XX, XX },
572 { "popS", RMrDI, XX, XX },
252b5132 573 /* 60 */
6439fc28
AM		 574 { "pusha{P|}", XX, XX, XX },
575 { "popa{P|}", XX, XX, XX },
576 { "bound{S|}", Gv, Ma, XX },
577 { X86_64_0 },
578 { "(bad)", XX, XX, XX }, /* seg fs */
579 { "(bad)", XX, XX, XX }, /* seg gs */
580 { "(bad)", XX, XX, XX }, /* op size prefix */
581 { "(bad)", XX, XX, XX }, /* adr size prefix */
252b5132 582 /* 68 */
6439fc28
AM		 583 { "pushT", Iq, XX, XX },
584 { "imulS", Gv, Ev, Iv },
585 { "pushT", sIb, XX, XX },
586 { "imulS", Gv, Ev, sIb },
587 { "ins{b||b|}", Yb, indirDX, XX },
588 { "ins{R||R|}", Yv, indirDX, XX },
589 { "outs{b||b|}", indirDX, Xb, XX },
590 { "outs{R||R|}", indirDX, Xv, XX },
252b5132 591 /* 70 */
6439fc28
AM		 592 { "joH", Jb, XX, cond_jump_flag },
593 { "jnoH", Jb, XX, cond_jump_flag },
594 { "jbH", Jb, XX, cond_jump_flag },
595 { "jaeH", Jb, XX, cond_jump_flag },
596 { "jeH", Jb, XX, cond_jump_flag },
597 { "jneH", Jb, XX, cond_jump_flag },
598 { "jbeH", Jb, XX, cond_jump_flag },
599 { "jaH", Jb, XX, cond_jump_flag },
252b5132 600 /* 78 */
6439fc28
AM		 601 { "jsH", Jb, XX, cond_jump_flag },
602 { "jnsH", Jb, XX, cond_jump_flag },
603 { "jpH", Jb, XX, cond_jump_flag },
604 { "jnpH", Jb, XX, cond_jump_flag },
605 { "jlH", Jb, XX, cond_jump_flag },
606 { "jgeH", Jb, XX, cond_jump_flag },
607 { "jleH", Jb, XX, cond_jump_flag },
608 { "jgH", Jb, XX, cond_jump_flag },
252b5132
RH		 609 /* 80 */
610 { GRP1b },
611 { GRP1S },
6439fc28 612 { "(bad)", XX, XX, XX },
252b5132 613 { GRP1Ss },
6439fc28
AM		 614 { "testB", Eb, Gb, XX },
615 { "testS", Ev, Gv, XX },
616 { "xchgB", Eb, Gb, XX },
617 { "xchgS", Ev, Gv, XX },
252b5132 618 /* 88 */
6439fc28
AM		 619 { "movB", Eb, Gb, XX },
620 { "movS", Ev, Gv, XX },
621 { "movB", Gb, Eb, XX },
622 { "movS", Gv, Ev, XX },
623 { "movQ", Ev, Sw, XX },
624 { "leaS", Gv, M, XX },
625 { "movQ", Sw, Ev, XX },
626 { "popU", Ev, XX, XX },
252b5132 627 /* 90 */
6439fc28 628 { "nop", XX, XX, XX },
041bd2e0 629 /* FIXME: NOP with REPz prefix is called PAUSE. */
6439fc28
AM		 630 { "xchgS", RMeCX, eAX, XX },
631 { "xchgS", RMeDX, eAX, XX },
632 { "xchgS", RMeBX, eAX, XX },
633 { "xchgS", RMeSP, eAX, XX },
634 { "xchgS", RMeBP, eAX, XX },
635 { "xchgS", RMeSI, eAX, XX },
636 { "xchgS", RMeDI, eAX, XX },
252b5132 637 /* 98 */
6439fc28
AM		 638 { "cW{tR||tR|}", XX, XX, XX },
639 { "cR{tO||tO|}", XX, XX, XX },
640 { "lcall{T|}", Ap, XX, XX },
641 { "(bad)", XX, XX, XX }, /* fwait */
642 { "pushfT", XX, XX, XX },
643 { "popfT", XX, XX, XX },
644 { "sahf{|}", XX, XX, XX },
645 { "lahf{|}", XX, XX, XX },
252b5132 646 /* a0 */
6439fc28
AM		 647 { "movB", AL, Ob64, XX },
648 { "movS", eAX, Ov64, XX },
649 { "movB", Ob64, AL, XX },
650 { "movS", Ov64, eAX, XX },
651 { "movs{b||b|}", Yb, Xb, XX },
652 { "movs{R||R|}", Yv, Xv, XX },
653 { "cmps{b||b|}", Xb, Yb, XX },
654 { "cmps{R||R|}", Xv, Yv, XX },
252b5132 655 /* a8 */
6439fc28
AM		 656 { "testB", AL, Ib, XX },
657 { "testS", eAX, Iv, XX },
658 { "stosB", Yb, AL, XX },
659 { "stosS", Yv, eAX, XX },
660 { "lodsB", AL, Xb, XX },
661 { "lodsS", eAX, Xv, XX },
662 { "scasB", AL, Yb, XX },
663 { "scasS", eAX, Yv, XX },
252b5132 664 /* b0 */
6439fc28
AM		 665 { "movB", RMAL, Ib, XX },
666 { "movB", RMCL, Ib, XX },
667 { "movB", RMDL, Ib, XX },
668 { "movB", RMBL, Ib, XX },
669 { "movB", RMAH, Ib, XX },
670 { "movB", RMCH, Ib, XX },
671 { "movB", RMDH, Ib, XX },
672 { "movB", RMBH, Ib, XX },
252b5132 673 /* b8 */
6439fc28
AM		 674 { "movS", RMeAX, Iv64, XX },
675 { "movS", RMeCX, Iv64, XX },
676 { "movS", RMeDX, Iv64, XX },
677 { "movS", RMeBX, Iv64, XX },
678 { "movS", RMeSP, Iv64, XX },
679 { "movS", RMeBP, Iv64, XX },
680 { "movS", RMeSI, Iv64, XX },
681 { "movS", RMeDI, Iv64, XX },
252b5132
RH		 682 /* c0 */
683 { GRP2b },
684 { GRP2S },
6439fc28
AM		 685 { "retT", Iw, XX, XX },
686 { "retT", XX, XX, XX },
687 { "les{S|}", Gv, Mp, XX },
688 { "ldsS", Gv, Mp, XX },
689 { "movA", Eb, Ib, XX },
690 { "movQ", Ev, Iv, XX },
252b5132 691 /* c8 */
6439fc28
AM		 692 { "enterT", Iw, Ib, XX },
693 { "leaveT", XX, XX, XX },
694 { "lretP", Iw, XX, XX },
695 { "lretP", XX, XX, XX },
696 { "int3", XX, XX, XX },
697 { "int", Ib, XX, XX },
698 { "into{|}", XX, XX, XX },
699 { "iretP", XX, XX, XX },
252b5132
RH		 700 /* d0 */
701 { GRP2b_one },
702 { GRP2S_one },
703 { GRP2b_cl },
704 { GRP2S_cl },
6439fc28
AM		 705 { "aam{|}", sIb, XX, XX },
706 { "aad{|}", sIb, XX, XX },
707 { "(bad)", XX, XX, XX },
708 { "xlat", DSBX, XX, XX },
252b5132
RH		 709 /* d8 */
710 { FLOAT },
711 { FLOAT },
712 { FLOAT },
713 { FLOAT },
714 { FLOAT },
715 { FLOAT },
716 { FLOAT },
717 { FLOAT },
718 /* e0 */
6439fc28
AM		 719 { "loopneFH", Jb, XX, loop_jcxz_flag },
720 { "loopeFH", Jb, XX, loop_jcxz_flag },
721 { "loopFH", Jb, XX, loop_jcxz_flag },
722 { "jEcxzH", Jb, XX, loop_jcxz_flag },
723 { "inB", AL, Ib, XX },
724 { "inS", eAX, Ib, XX },
725 { "outB", Ib, AL, XX },
726 { "outS", Ib, eAX, XX },
252b5132 727 /* e8 */
6439fc28
AM		 728 { "callT", Jv, XX, XX },
729 { "jmpT", Jv, XX, XX },
730 { "ljmp{T|}", Ap, XX, XX },
731 { "jmp", Jb, XX, XX },
732 { "inB", AL, indirDX, XX },
733 { "inS", eAX, indirDX, XX },
734 { "outB", indirDX, AL, XX },
735 { "outS", indirDX, eAX, XX },
252b5132 736 /* f0 */
6439fc28
AM		 737 { "(bad)", XX, XX, XX }, /* lock prefix */
738 { "(bad)", XX, XX, XX },
739 { "(bad)", XX, XX, XX }, /* repne */
740 { "(bad)", XX, XX, XX }, /* repz */
741 { "hlt", XX, XX, XX },
742 { "cmc", XX, XX, XX },
252b5132
RH		 743 { GRP3b },
744 { GRP3S },
745 /* f8 */
6439fc28
AM		 746 { "clc", XX, XX, XX },
747 { "stc", XX, XX, XX },
748 { "cli", XX, XX, XX },
749 { "sti", XX, XX, XX },
750 { "cld", XX, XX, XX },
751 { "std", XX, XX, XX },
252b5132
RH		 752 { GRP4 },
753 { GRP5 },
754};
755
6439fc28 756static const struct dis386 dis386_twobyte[] = {
252b5132
RH		 757 /* 00 */
758 { GRP6 },
759 { GRP7 },
6439fc28
AM		 760 { "larS", Gv, Ew, XX },
761 { "lslS", Gv, Ew, XX },
762 { "(bad)", XX, XX, XX },
763 { "syscall", XX, XX, XX },
764 { "clts", XX, XX, XX },
765 { "sysretP", XX, XX, XX },
252b5132 766 /* 08 */
6439fc28
AM		 767 { "invd", XX, XX, XX },
768 { "wbinvd", XX, XX, XX },
769 { "(bad)", XX, XX, XX },
770 { "ud2a", XX, XX, XX },
771 { "(bad)", XX, XX, XX },
c608c12e 772 { GRPAMD },
6439fc28 773 { "femms", XX, XX, XX },
6608db57 774 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
252b5132 775 /* 10 */
c608c12e
AM		 776 { PREGRP8 },
777 { PREGRP9 },
6439fc28
AM		 778 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
779 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
780 { "unpcklpX", XM, EX, XX },
781 { "unpckhpX", XM, EX, XX },
782 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
783 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
252b5132 784 /* 18 */
c608c12e 785 { GRP14 },
6439fc28
AM		 786 { "(bad)", XX, XX, XX },
787 { "(bad)", XX, XX, XX },
788 { "(bad)", XX, XX, XX },
789 { "(bad)", XX, XX, XX },
790 { "(bad)", XX, XX, XX },
791 { "(bad)", XX, XX, XX },
792 { "(bad)", XX, XX, XX },
252b5132 793 /* 20 */
6439fc28
AM		 794 { "movL", Rm, Cm, XX },
795 { "movL", Rm, Dm, XX },
796 { "movL", Cm, Rm, XX },
797 { "movL", Dm, Rm, XX },
798 { "movL", Rd, Td, XX },
799 { "(bad)", XX, XX, XX },
800 { "movL", Td, Rd, XX },
801 { "(bad)", XX, XX, XX },
252b5132 802 /* 28 */
6439fc28
AM		 803 { "movapX", XM, EX, XX },
804 { "movapX", EX, XM, XX },
c608c12e 805 { PREGRP2 },
6439fc28 806 { "movntpX", Ev, XM, XX },
2da11e11 807 { PREGRP4 },
c608c12e 808 { PREGRP3 },
6439fc28
AM		 809 { "ucomisX", XM,EX, XX },
810 { "comisX", XM,EX, XX },
252b5132 811 /* 30 */
6439fc28
AM		 812 { "wrmsr", XX, XX, XX },
813 { "rdtsc", XX, XX, XX },
814 { "rdmsr", XX, XX, XX },
815 { "rdpmc", XX, XX, XX },
816 { "sysenter", XX, XX, XX },
817 { "sysexit", XX, XX, XX },
818 { "(bad)", XX, XX, XX },
819 { "(bad)", XX, XX, XX },
252b5132 820 /* 38 */
6439fc28
AM		 821 { "(bad)", XX, XX, XX },
822 { "(bad)", XX, XX, XX },
823 { "(bad)", XX, XX, XX },
824 { "(bad)", XX, XX, XX },
825 { "(bad)", XX, XX, XX },
826 { "(bad)", XX, XX, XX },
827 { "(bad)", XX, XX, XX },
828 { "(bad)", XX, XX, XX },
252b5132 829 /* 40 */
6439fc28
AM		 830 { "cmovo", Gv, Ev, XX },
831 { "cmovno", Gv, Ev, XX },
832 { "cmovb", Gv, Ev, XX },
833 { "cmovae", Gv, Ev, XX },
834 { "cmove", Gv, Ev, XX },
835 { "cmovne", Gv, Ev, XX },
836 { "cmovbe", Gv, Ev, XX },
837 { "cmova", Gv, Ev, XX },
252b5132 838 /* 48 */
6439fc28
AM		 839 { "cmovs", Gv, Ev, XX },
840 { "cmovns", Gv, Ev, XX },
841 { "cmovp", Gv, Ev, XX },
842 { "cmovnp", Gv, Ev, XX },
843 { "cmovl", Gv, Ev, XX },
844 { "cmovge", Gv, Ev, XX },
845 { "cmovle", Gv, Ev, XX },
846 { "cmovg", Gv, Ev, XX },
252b5132 847 /* 50 */
6439fc28 848 { "movmskpX", Gd, XS, XX },
c608c12e
AM		 849 { PREGRP13 },
850 { PREGRP12 },
851 { PREGRP11 },
6439fc28
AM		 852 { "andpX", XM, EX, XX },
853 { "andnpX", XM, EX, XX },
854 { "orpX", XM, EX, XX },
855 { "xorpX", XM, EX, XX },
252b5132 856 /* 58 */
c608c12e
AM		 857 { PREGRP0 },
858 { PREGRP10 },
041bd2e0
JH		 859 { PREGRP17 },
860 { PREGRP16 },
c608c12e
AM		 861 { PREGRP14 },
862 { PREGRP7 },
863 { PREGRP5 },
2da11e11 864 { PREGRP6 },
252b5132 865 /* 60 */
6439fc28
AM		 866 { "punpcklbw", MX, EM, XX },
867 { "punpcklwd", MX, EM, XX },
868 { "punpckldq", MX, EM, XX },
869 { "packsswb", MX, EM, XX },
870 { "pcmpgtb", MX, EM, XX },
871 { "pcmpgtw", MX, EM, XX },
872 { "pcmpgtd", MX, EM, XX },
873 { "packuswb", MX, EM, XX },
252b5132 874 /* 68 */
6439fc28
AM		 875 { "punpckhbw", MX, EM, XX },
876 { "punpckhwd", MX, EM, XX },
877 { "punpckhdq", MX, EM, XX },
878 { "packssdw", MX, EM, XX },
0f17484f 879 { PREGRP26 },
041bd2e0 880 { PREGRP24 },
6439fc28 881 { "movd", MX, Ed, XX },
041bd2e0 882 { PREGRP19 },
252b5132 883 /* 70 */
041bd2e0 884 { PREGRP22 },
252b5132
RH		 885 { GRP10 },
886 { GRP11 },
887 { GRP12 },
6439fc28
AM		 888 { "pcmpeqb", MX, EM, XX },
889 { "pcmpeqw", MX, EM, XX },
890 { "pcmpeqd", MX, EM, XX },
891 { "emms", XX, XX, XX },
252b5132 892 /* 78 */
6439fc28
AM		 893 { "(bad)", XX, XX, XX },
894 { "(bad)", XX, XX, XX },
895 { "(bad)", XX, XX, XX },
896 { "(bad)", XX, XX, XX },
897 { "(bad)", XX, XX, XX },
898 { "(bad)", XX, XX, XX },
041bd2e0
JH		 899 { PREGRP23 },
900 { PREGRP20 },
252b5132 901 /* 80 */
6439fc28
AM		 902 { "joH", Jv, XX, cond_jump_flag },
903 { "jnoH", Jv, XX, cond_jump_flag },
904 { "jbH", Jv, XX, cond_jump_flag },
905 { "jaeH", Jv, XX, cond_jump_flag },
906 { "jeH", Jv, XX, cond_jump_flag },
907 { "jneH", Jv, XX, cond_jump_flag },
908 { "jbeH", Jv, XX, cond_jump_flag },
909 { "jaH", Jv, XX, cond_jump_flag },
252b5132 910 /* 88 */
6439fc28
AM		 911 { "jsH", Jv, XX, cond_jump_flag },
912 { "jnsH", Jv, XX, cond_jump_flag },
913 { "jpH", Jv, XX, cond_jump_flag },
914 { "jnpH", Jv, XX, cond_jump_flag },
915 { "jlH", Jv, XX, cond_jump_flag },
916 { "jgeH", Jv, XX, cond_jump_flag },
917 { "jleH", Jv, XX, cond_jump_flag },
918 { "jgH", Jv, XX, cond_jump_flag },
252b5132 919 /* 90 */
6439fc28
AM		 920 { "seto", Eb, XX, XX },
921 { "setno", Eb, XX, XX },
922 { "setb", Eb, XX, XX },
923 { "setae", Eb, XX, XX },
924 { "sete", Eb, XX, XX },
925 { "setne", Eb, XX, XX },
926 { "setbe", Eb, XX, XX },
927 { "seta", Eb, XX, XX },
252b5132 928 /* 98 */
6439fc28
AM		 929 { "sets", Eb, XX, XX },
930 { "setns", Eb, XX, XX },
931 { "setp", Eb, XX, XX },
932 { "setnp", Eb, XX, XX },
933 { "setl", Eb, XX, XX },
934 { "setge", Eb, XX, XX },
935 { "setle", Eb, XX, XX },
936 { "setg", Eb, XX, XX },
252b5132 937 /* a0 */
6439fc28
AM		 938 { "pushT", fs, XX, XX },
939 { "popT", fs, XX, XX },
940 { "cpuid", XX, XX, XX },
941 { "btS", Ev, Gv, XX },
942 { "shldS", Ev, Gv, Ib },
943 { "shldS", Ev, Gv, CL },
944 { "(bad)", XX, XX, XX },
945 { "(bad)", XX, XX, XX },
252b5132 946 /* a8 */
6439fc28
AM		 947 { "pushT", gs, XX, XX },
948 { "popT", gs, XX, XX },
949 { "rsm", XX, XX, XX },
950 { "btsS", Ev, Gv, XX },
951 { "shrdS", Ev, Gv, Ib },
952 { "shrdS", Ev, Gv, CL },
252b5132 953 { GRP13 },
6439fc28 954 { "imulS", Gv, Ev, XX },
252b5132 955 /* b0 */
6439fc28
AM		 956 { "cmpxchgB", Eb, Gb, XX },
957 { "cmpxchgS", Ev, Gv, XX },
958 { "lssS", Gv, Mp, XX },
959 { "btrS", Ev, Gv, XX },
960 { "lfsS", Gv, Mp, XX },
961 { "lgsS", Gv, Mp, XX },
962 { "movz{bR|x|bR|x}", Gv, Eb, XX },
963 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
252b5132 964 /* b8 */
6439fc28
AM		 965 { "(bad)", XX, XX, XX },
966 { "ud2b", XX, XX, XX },
252b5132 967 { GRP8 },
6439fc28
AM		 968 { "btcS", Ev, Gv, XX },
969 { "bsfS", Gv, Ev, XX },
970 { "bsrS", Gv, Ev, XX },
971 { "movs{bR|x|bR|x}", Gv, Eb, XX },
972 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
252b5132 973 /* c0 */
6439fc28
AM		 974 { "xaddB", Eb, Gb, XX },
975 { "xaddS", Ev, Gv, XX },
c608c12e 976 { PREGRP1 },
6439fc28
AM		 977 { "movntiS", Ev, Gv, XX },
978 { "pinsrw", MX, Ed, Ib },
979 { "pextrw", Gd, MS, Ib },
980 { "shufpX", XM, EX, Ib },
252b5132
RH		 981 { GRP9 },
982 /* c8 */
6439fc28
AM		 983 { "bswap", RMeAX, XX, XX },
984 { "bswap", RMeCX, XX, XX },
985 { "bswap", RMeDX, XX, XX },
986 { "bswap", RMeBX, XX, XX },
987 { "bswap", RMeSP, XX, XX },
988 { "bswap", RMeBP, XX, XX },
989 { "bswap", RMeSI, XX, XX },
990 { "bswap", RMeDI, XX, XX },
252b5132 991 /* d0 */
6439fc28
AM		 992 { "(bad)", XX, XX, XX },
993 { "psrlw", MX, EM, XX },
994 { "psrld", MX, EM, XX },
995 { "psrlq", MX, EM, XX },
996 { "paddq", MX, EM, XX },
997 { "pmullw", MX, EM, XX },
041bd2e0 998 { PREGRP21 },
6439fc28 999 { "pmovmskb", Gd, MS, XX },
252b5132 1000 /* d8 */
6439fc28
AM		 1001 { "psubusb", MX, EM, XX },
1002 { "psubusw", MX, EM, XX },
1003 { "pminub", MX, EM, XX },
1004 { "pand", MX, EM, XX },
1005 { "paddusb", MX, EM, XX },
1006 { "paddusw", MX, EM, XX },
1007 { "pmaxub", MX, EM, XX },
1008 { "pandn", MX, EM, XX },
252b5132 1009 /* e0 */
6439fc28
AM		 1010 { "pavgb", MX, EM, XX },
1011 { "psraw", MX, EM, XX },
1012 { "psrad", MX, EM, XX },
1013 { "pavgw", MX, EM, XX },
1014 { "pmulhuw", MX, EM, XX },
1015 { "pmulhw", MX, EM, XX },
041bd2e0 1016 { PREGRP15 },
0f17484f 1017 { PREGRP25 },
252b5132 1018 /* e8 */
6439fc28
AM		 1019 { "psubsb", MX, EM, XX },
1020 { "psubsw", MX, EM, XX },
1021 { "pminsw", MX, EM, XX },
1022 { "por", MX, EM, XX },
1023 { "paddsb", MX, EM, XX },
1024 { "paddsw", MX, EM, XX },
1025 { "pmaxsw", MX, EM, XX },
1026 { "pxor", MX, EM, XX },
252b5132 1027 /* f0 */
6439fc28
AM		 1028 { "(bad)", XX, XX, XX },
1029 { "psllw", MX, EM, XX },
1030 { "pslld", MX, EM, XX },
1031 { "psllq", MX, EM, XX },
1032 { "pmuludq", MX, EM, XX },
1033 { "pmaddwd", MX, EM, XX },
1034 { "psadbw", MX, EM, XX },
041bd2e0 1035 { PREGRP18 },
252b5132 1036 /* f8 */
6439fc28
AM		 1037 { "psubb", MX, EM, XX },
1038 { "psubw", MX, EM, XX },
1039 { "psubd", MX, EM, XX },
1040 { "psubq", MX, EM, XX },
1041 { "paddb", MX, EM, XX },
1042 { "paddw", MX, EM, XX },
1043 { "paddd", MX, EM, XX },
1044 { "(bad)", XX, XX, XX }
252b5132
RH		 1045};
1046
1047static const unsigned char onebyte_has_modrm[256] = {
c608c12e
AM		 1048 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1049 /* ------------------------------- */
1050 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1051 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1052 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1053 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1054 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1055 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1056 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1057 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1058 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1059 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1060 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1061 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1062 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1063 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1064 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1065 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1066 /* ------------------------------- */
1067 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1068};
1069
1070static const unsigned char twobyte_has_modrm[256] = {
c608c12e
AM		 1071 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1072 /* ------------------------------- */
252b5132 1073 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
c608c12e 1074 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
4bba6815 1075 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
252b5132
RH		 1076 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1077 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
4bba6815
AM		 1078 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1079 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
c608c12e 1080 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */
252b5132
RH		 1081 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1082 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
4bba6815 1083 /* a0 */ 0,0,0,1,1,1,0,0,0,0,0,1,1,1,1,1, /* af */
252b5132
RH		 1084 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1085 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
4bba6815
AM		 1086 /* d0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1087 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1088 /* f0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
c608c12e
AM		 1089 /* ------------------------------- */
1090 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1091};
1092
041bd2e0 1093static const unsigned char twobyte_uses_SSE_prefix[256] = {
c608c12e
AM		 1094 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1095 /* ------------------------------- */
1096 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1097 /* 10 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1098 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1099 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1100 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
041bd2e0
JH		 1101 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1102 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1103 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
c608c12e
AM		 1104 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1105 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1106 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1107 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1108 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
041bd2e0
JH		 1109 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1110 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1111 /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
c608c12e
AM		 1112 /* ------------------------------- */
1113 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 1114};
1115
1116static char obuf[100];
1117static char *obufp;
1118static char scratchbuf[100];
1119static unsigned char *start_codep;
1120static unsigned char *insn_codep;
1121static unsigned char *codep;
1122static disassemble_info *the_info;
1123static int mod;
1124static int rm;
1125static int reg;
4bba6815 1126static unsigned char need_modrm;
252b5132 1127
4bba6815
AM		 1128/* If we are accessing mod/rm/reg without need_modrm set, then the
1129 values are stale. Hitting this abort likely indicates that you
1130 need to update onebyte_has_modrm or twobyte_has_modrm. */
1131#define MODRM_CHECK if (!need_modrm) abort ()
1132
d708bcba
AM		 1133static const char **names64;
1134static const char **names32;
1135static const char **names16;
1136static const char **names8;
1137static const char **names8rex;
1138static const char **names_seg;
1139static const char **index16;
1140
1141static const char *intel_names64[] = {
1142 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1143 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1144};
1145static const char *intel_names32[] = {
1146 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1147 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1148};
1149static const char *intel_names16[] = {
1150 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1151 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1152};
1153static const char *intel_names8[] = {
1154 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1155};
1156static const char *intel_names8rex[] = {
1157 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1158 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1159};
1160static const char *intel_names_seg[] = {
1161 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1162};
1163static const char *intel_index16[] = {
1164 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1165};
1166
1167static const char *att_names64[] = {
1168 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
52b15da3
JH		 1169 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1170};
d708bcba
AM		 1171static const char *att_names32[] = {
1172 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
52b15da3 1173 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
252b5132 1174};
d708bcba
AM		 1175static const char *att_names16[] = {
1176 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
52b15da3 1177 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
252b5132 1178};
d708bcba
AM		 1179static const char *att_names8[] = {
1180 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
252b5132 1181};
d708bcba
AM		 1182static const char *att_names8rex[] = {
1183 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
52b15da3
JH		 1184 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1185};
d708bcba
AM		 1186static const char *att_names_seg[] = {
1187 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
252b5132 1188};
d708bcba
AM		 1189static const char *att_index16[] = {
1190 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
252b5132
RH		 1191};
1192
2da11e11 1193static const struct dis386 grps[][8] = {
252b5132
RH		 1194 /* GRP1b */
1195 {
57d91c3c
ILT		 1196 { "addA", Eb, Ib, XX },
1197 { "orA", Eb, Ib, XX },
1198 { "adcA", Eb, Ib, XX },
1199 { "sbbA", Eb, Ib, XX },
1200 { "andA", Eb, Ib, XX },
1201 { "subA", Eb, Ib, XX },
1202 { "xorA", Eb, Ib, XX },
1203 { "cmpA", Eb, Ib, XX }
252b5132
RH		 1204 },
1205 /* GRP1S */
1206 {
57d91c3c
ILT		 1207 { "addQ", Ev, Iv, XX },
1208 { "orQ", Ev, Iv, XX },
1209 { "adcQ", Ev, Iv, XX },
1210 { "sbbQ", Ev, Iv, XX },
1211 { "andQ", Ev, Iv, XX },
1212 { "subQ", Ev, Iv, XX },
1213 { "xorQ", Ev, Iv, XX },
1214 { "cmpQ", Ev, Iv, XX }
252b5132
RH		 1215 },
1216 /* GRP1Ss */
1217 {
57d91c3c
ILT		 1218 { "addQ", Ev, sIb, XX },
1219 { "orQ", Ev, sIb, XX },
1220 { "adcQ", Ev, sIb, XX },
1221 { "sbbQ", Ev, sIb, XX },
1222 { "andQ", Ev, sIb, XX },
1223 { "subQ", Ev, sIb, XX },
1224 { "xorQ", Ev, sIb, XX },
1225 { "cmpQ", Ev, sIb, XX }
252b5132
RH		 1226 },
1227 /* GRP2b */
1228 {
57d91c3c
ILT		 1229 { "rolA", Eb, Ib, XX },
1230 { "rorA", Eb, Ib, XX },
1231 { "rclA", Eb, Ib, XX },
1232 { "rcrA", Eb, Ib, XX },
1233 { "shlA", Eb, Ib, XX },
1234 { "shrA", Eb, Ib, XX },
1235 { "(bad)", XX, XX, XX },
1236 { "sarA", Eb, Ib, XX },
252b5132
RH		 1237 },
1238 /* GRP2S */
1239 {
57d91c3c
ILT		 1240 { "rolQ", Ev, Ib, XX },
1241 { "rorQ", Ev, Ib, XX },
1242 { "rclQ", Ev, Ib, XX },
1243 { "rcrQ", Ev, Ib, XX },
1244 { "shlQ", Ev, Ib, XX },
1245 { "shrQ", Ev, Ib, XX },
1246 { "(bad)", XX, XX, XX },
1247 { "sarQ", Ev, Ib, XX },
252b5132
RH		 1248 },
1249 /* GRP2b_one */
1250 {
57d91c3c
ILT		 1251 { "rolA", Eb, XX, XX },
1252 { "rorA", Eb, XX, XX },
1253 { "rclA", Eb, XX, XX },
1254 { "rcrA", Eb, XX, XX },
1255 { "shlA", Eb, XX, XX },
1256 { "shrA", Eb, XX, XX },
1257 { "(bad)", XX, XX, XX },
1258 { "sarA", Eb, XX, XX },
252b5132
RH		 1259 },
1260 /* GRP2S_one */
1261 {
57d91c3c
ILT		 1262 { "rolQ", Ev, XX, XX },
1263 { "rorQ", Ev, XX, XX },
1264 { "rclQ", Ev, XX, XX },
1265 { "rcrQ", Ev, XX, XX },
1266 { "shlQ", Ev, XX, XX },
1267 { "shrQ", Ev, XX, XX },
1268 { "(bad)", XX, XX, XX},
1269 { "sarQ", Ev, XX, XX },
252b5132
RH		 1270 },
1271 /* GRP2b_cl */
1272 {
57d91c3c
ILT		 1273 { "rolA", Eb, CL, XX },
1274 { "rorA", Eb, CL, XX },
1275 { "rclA", Eb, CL, XX },
1276 { "rcrA", Eb, CL, XX },
1277 { "shlA", Eb, CL, XX },
1278 { "shrA", Eb, CL, XX },
1279 { "(bad)", XX, XX, XX },
1280 { "sarA", Eb, CL, XX },
252b5132
RH		 1281 },
1282 /* GRP2S_cl */
1283 {
57d91c3c
ILT		 1284 { "rolQ", Ev, CL, XX },
1285 { "rorQ", Ev, CL, XX },
1286 { "rclQ", Ev, CL, XX },
1287 { "rcrQ", Ev, CL, XX },
1288 { "shlQ", Ev, CL, XX },
1289 { "shrQ", Ev, CL, XX },
1290 { "(bad)", XX, XX, XX },
1291 { "sarQ", Ev, CL, XX }
252b5132
RH		 1292 },
1293 /* GRP3b */
1294 {
57d91c3c
ILT		 1295 { "testA", Eb, Ib, XX },
1296 { "(bad)", Eb, XX, XX },
1297 { "notA", Eb, XX, XX },
1298 { "negA", Eb, XX, XX },
8227b51f
AM		 1299 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1300 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1301 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1302 { "idivA", Eb, XX, XX } /* and idiv for consistency. */
252b5132
RH		 1303 },
1304 /* GRP3S */
1305 {
57d91c3c
ILT		 1306 { "testQ", Ev, Iv, XX },
1307 { "(bad)", XX, XX, XX },
1308 { "notQ", Ev, XX, XX },
1309 { "negQ", Ev, XX, XX },
8227b51f
AM		 1310 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1311 { "imulQ", Ev, XX, XX },
1312 { "divQ", Ev, XX, XX },
1313 { "idivQ", Ev, XX, XX },
252b5132
RH		 1314 },
1315 /* GRP4 */
1316 {
57d91c3c
ILT		 1317 { "incA", Eb, XX, XX },
1318 { "decA", Eb, XX, XX },
1319 { "(bad)", XX, XX, XX },
1320 { "(bad)", XX, XX, XX },
1321 { "(bad)", XX, XX, XX },
1322 { "(bad)", XX, XX, XX },
1323 { "(bad)", XX, XX, XX },
1324 { "(bad)", XX, XX, XX },
252b5132
RH		 1325 },
1326 /* GRP5 */
1327 {
57d91c3c
ILT		 1328 { "incQ", Ev, XX, XX },
1329 { "decQ", Ev, XX, XX },
6439fc28
AM		 1330 { "callT", indirEv, XX, XX },
1331 { "lcallT", indirEv, XX, XX },
1332 { "jmpT", indirEv, XX, XX },
1333 { "ljmpT", indirEv, XX, XX },
1334 { "pushU", Ev, XX, XX },
57d91c3c 1335 { "(bad)", XX, XX, XX },
252b5132
RH		 1336 },
1337 /* GRP6 */
1338 {
e5470cdc
AM		 1339 { "sldtQ", Ev, XX, XX },
1340 { "strQ", Ev, XX, XX },
57d91c3c
ILT		 1341 { "lldt", Ew, XX, XX },
1342 { "ltr", Ew, XX, XX },
1343 { "verr", Ew, XX, XX },
1344 { "verw", Ew, XX, XX },
1345 { "(bad)", XX, XX, XX },
1346 { "(bad)", XX, XX, XX }
252b5132
RH		 1347 },
1348 /* GRP7 */
1349 {
bcb5558b
AM		 1350 { "sgdtQ", M, XX, XX },
1351 { "sidtQ", M, XX, XX },
1352 { "lgdtQ", M, XX, XX },
1353 { "lidtQ", M, XX, XX },
e5470cdc 1354 { "smswQ", Ev, XX, XX },
bcb5558b
AM		 1355 { "(bad)", XX, XX, XX },
1356 { "lmsw", Ew, XX, XX },
1357 { "invlpg", Ew, XX, XX },
252b5132
RH		 1358 },
1359 /* GRP8 */
1360 {
57d91c3c
ILT		 1361 { "(bad)", XX, XX, XX },
1362 { "(bad)", XX, XX, XX },
1363 { "(bad)", XX, XX, XX },
1364 { "(bad)", XX, XX, XX },
1365 { "btQ", Ev, Ib, XX },
1366 { "btsQ", Ev, Ib, XX },
1367 { "btrQ", Ev, Ib, XX },
1368 { "btcQ", Ev, Ib, XX },
252b5132
RH		 1369 },
1370 /* GRP9 */
1371 {
57d91c3c
ILT		 1372 { "(bad)", XX, XX, XX },
1373 { "cmpxchg8b", Ev, XX, XX },
1374 { "(bad)", XX, XX, XX },
1375 { "(bad)", XX, XX, XX },
1376 { "(bad)", XX, XX, XX },
1377 { "(bad)", XX, XX, XX },
1378 { "(bad)", XX, XX, XX },
1379 { "(bad)", XX, XX, XX },
252b5132
RH		 1380 },
1381 /* GRP10 */
1382 {
57d91c3c
ILT		 1383 { "(bad)", XX, XX, XX },
1384 { "(bad)", XX, XX, XX },
1385 { "psrlw", MS, Ib, XX },
1386 { "(bad)", XX, XX, XX },
1387 { "psraw", MS, Ib, XX },
1388 { "(bad)", XX, XX, XX },
1389 { "psllw", MS, Ib, XX },
1390 { "(bad)", XX, XX, XX },
252b5132
RH		 1391 },
1392 /* GRP11 */
1393 {
57d91c3c
ILT		 1394 { "(bad)", XX, XX, XX },
1395 { "(bad)", XX, XX, XX },
1396 { "psrld", MS, Ib, XX },
1397 { "(bad)", XX, XX, XX },
1398 { "psrad", MS, Ib, XX },
1399 { "(bad)", XX, XX, XX },
1400 { "pslld", MS, Ib, XX },
1401 { "(bad)", XX, XX, XX },
252b5132
RH		 1402 },
1403 /* GRP12 */
1404 {
57d91c3c
ILT		 1405 { "(bad)", XX, XX, XX },
1406 { "(bad)", XX, XX, XX },
1407 { "psrlq", MS, Ib, XX },
041bd2e0 1408 { "psrldq", MS, Ib, XX },
57d91c3c
ILT		 1409 { "(bad)", XX, XX, XX },
1410 { "(bad)", XX, XX, XX },
1411 { "psllq", MS, Ib, XX },
041bd2e0 1412 { "pslldq", MS, Ib, XX },
252b5132
RH		 1413 },
1414 /* GRP13 */
1415 {
57d91c3c
ILT		 1416 { "fxsave", Ev, XX, XX },
1417 { "fxrstor", Ev, XX, XX },
1418 { "ldmxcsr", Ev, XX, XX },
1419 { "stmxcsr", Ev, XX, XX },
1420 { "(bad)", XX, XX, XX },
041bd2e0
JH		 1421 { "lfence", None, XX, XX },
1422 { "mfence", None, XX, XX },
57d91c3c 1423 { "sfence", None, XX, XX },
6608db57 1424 /* FIXME: the sfence with memory operand is clflush! */
c608c12e
AM		 1425 },
1426 /* GRP14 */
1427 {
57d91c3c
ILT		 1428 { "prefetchnta", Ev, XX, XX },
1429 { "prefetcht0", Ev, XX, XX },
1430 { "prefetcht1", Ev, XX, XX },
1431 { "prefetcht2", Ev, XX, XX },
1432 { "(bad)", XX, XX, XX },
1433 { "(bad)", XX, XX, XX },
1434 { "(bad)", XX, XX, XX },
1435 { "(bad)", XX, XX, XX },
252b5132 1436 },
c608c12e 1437 /* GRPAMD */
252b5132 1438 {
57d91c3c
ILT		 1439 { "prefetch", Eb, XX, XX },
1440 { "prefetchw", Eb, XX, XX },
1441 { "(bad)", XX, XX, XX },
1442 { "(bad)", XX, XX, XX },
1443 { "(bad)", XX, XX, XX },
1444 { "(bad)", XX, XX, XX },
1445 { "(bad)", XX, XX, XX },
1446 { "(bad)", XX, XX, XX },
252b5132 1447 }
252b5132
RH		 1448};
1449
041bd2e0 1450static const struct dis386 prefix_user_table[][4] = {
c608c12e
AM		 1451 /* PREGRP0 */
1452 {
57d91c3c
ILT		 1453 { "addps", XM, EX, XX },
1454 { "addss", XM, EX, XX },
041bd2e0
JH		 1455 { "addpd", XM, EX, XX },
1456 { "addsd", XM, EX, XX },
c608c12e
AM		 1457 },
1458 /* PREGRP1 */
1459 {
6608db57 1460 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
c608c12e 1461 { "", XM, EX, OPSIMD },
041bd2e0
JH		 1462 { "", XM, EX, OPSIMD },
1463 { "", XM, EX, OPSIMD },
c608c12e
AM		 1464 },
1465 /* PREGRP2 */
1466 {
57d91c3c 1467 { "cvtpi2ps", XM, EM, XX },
76f227a5 1468 { "cvtsi2ssY", XM, Ev, XX },
041bd2e0 1469 { "cvtpi2pd", XM, EM, XX },
76f227a5 1470 { "cvtsi2sdY", XM, Ev, XX },
c608c12e
AM		 1471 },
1472 /* PREGRP3 */
1473 {
57d91c3c 1474 { "cvtps2pi", MX, EX, XX },
76f227a5 1475 { "cvtss2siY", Gv, EX, XX },
041bd2e0 1476 { "cvtpd2pi", MX, EX, XX },
76f227a5 1477 { "cvtsd2siY", Gv, EX, XX },
c608c12e
AM		 1478 },
1479 /* PREGRP4 */
1480 {
57d91c3c 1481 { "cvttps2pi", MX, EX, XX },
76f227a5 1482 { "cvttss2siY", Gv, EX, XX },
041bd2e0 1483 { "cvttpd2pi", MX, EX, XX },
76f227a5 1484 { "cvttsd2siY", Gv, EX, XX },
c608c12e
AM		 1485 },
1486 /* PREGRP5 */
1487 {
57d91c3c
ILT		 1488 { "divps", XM, EX, XX },
1489 { "divss", XM, EX, XX },
041bd2e0
JH		 1490 { "divpd", XM, EX, XX },
1491 { "divsd", XM, EX, XX },
c608c12e
AM		 1492 },
1493 /* PREGRP6 */
1494 {
57d91c3c
ILT		 1495 { "maxps", XM, EX, XX },
1496 { "maxss", XM, EX, XX },
041bd2e0
JH		 1497 { "maxpd", XM, EX, XX },
1498 { "maxsd", XM, EX, XX },
c608c12e
AM		 1499 },
1500 /* PREGRP7 */
1501 {
57d91c3c
ILT		 1502 { "minps", XM, EX, XX },
1503 { "minss", XM, EX, XX },
041bd2e0
JH		 1504 { "minpd", XM, EX, XX },
1505 { "minsd", XM, EX, XX },
c608c12e
AM		 1506 },
1507 /* PREGRP8 */
1508 {
57d91c3c
ILT		 1509 { "movups", XM, EX, XX },
1510 { "movss", XM, EX, XX },
041bd2e0
JH		 1511 { "movupd", XM, EX, XX },
1512 { "movsd", XM, EX, XX },
c608c12e
AM		 1513 },
1514 /* PREGRP9 */
1515 {
57d91c3c
ILT		 1516 { "movups", EX, XM, XX },
1517 { "movss", EX, XM, XX },
041bd2e0
JH		 1518 { "movupd", EX, XM, XX },
1519 { "movsd", EX, XM, XX },
c608c12e
AM		 1520 },
1521 /* PREGRP10 */
1522 {
57d91c3c
ILT		 1523 { "mulps", XM, EX, XX },
1524 { "mulss", XM, EX, XX },
041bd2e0
JH		 1525 { "mulpd", XM, EX, XX },
1526 { "mulsd", XM, EX, XX },
c608c12e
AM		 1527 },
1528 /* PREGRP11 */
1529 {
57d91c3c
ILT		 1530 { "rcpps", XM, EX, XX },
1531 { "rcpss", XM, EX, XX },
041bd2e0
JH		 1532 { "(bad)", XM, EX, XX },
1533 { "(bad)", XM, EX, XX },
c608c12e
AM		 1534 },
1535 /* PREGRP12 */
1536 {
57d91c3c
ILT		 1537 { "rsqrtps", XM, EX, XX },
1538 { "rsqrtss", XM, EX, XX },
041bd2e0
JH		 1539 { "(bad)", XM, EX, XX },
1540 { "(bad)", XM, EX, XX },
c608c12e
AM		 1541 },
1542 /* PREGRP13 */
1543 {
57d91c3c
ILT		 1544 { "sqrtps", XM, EX, XX },
1545 { "sqrtss", XM, EX, XX },
041bd2e0
JH		 1546 { "sqrtpd", XM, EX, XX },
1547 { "sqrtsd", XM, EX, XX },
c608c12e
AM		 1548 },
1549 /* PREGRP14 */
1550 {
57d91c3c
ILT		 1551 { "subps", XM, EX, XX },
1552 { "subss", XM, EX, XX },
041bd2e0
JH		 1553 { "subpd", XM, EX, XX },
1554 { "subsd", XM, EX, XX },
1555 },
1556 /* PREGRP15 */
1557 {
1558 { "(bad)", XM, EX, XX },
1559 { "cvtdq2pd", XM, EX, XX },
1560 { "cvttpd2dq", XM, EX, XX },
1561 { "cvtpd2dq", XM, EX, XX },
1562 },
1563 /* PREGRP16 */
1564 {
1565 { "cvtdq2ps", XM, EX, XX },
1566 { "cvttps2dq",XM, EX, XX },
1567 { "cvtps2dq",XM, EX, XX },
1568 { "(bad)", XM, EX, XX },
1569 },
1570 /* PREGRP17 */
1571 {
1572 { "cvtps2pd", XM, EX, XX },
1573 { "cvtss2sd", XM, EX, XX },
1574 { "cvtpd2ps", XM, EX, XX },
1575 { "cvtsd2ss", XM, EX, XX },
1576 },
1577 /* PREGRP18 */
1578 {
992aaec9 1579 { "maskmovq", MX, MS, XX },
041bd2e0 1580 { "(bad)", XM, EX, XX },
0f17484f 1581 { "maskmovdqu", XM, EX, XX },
041bd2e0
JH		 1582 { "(bad)", XM, EX, XX },
1583 },
1584 /* PREGRP19 */
1585 {
1586 { "movq", MX, EM, XX },
1587 { "movdqu", XM, EX, XX },
1588 { "movdqa", XM, EX, XX },
1589 { "(bad)", XM, EX, XX },
1590 },
1591 /* PREGRP20 */
1592 {
1593 { "movq", EM, MX, XX },
1594 { "movdqu", EX, XM, XX },
1595 { "movdqa", EX, XM, XX },
1596 { "(bad)", EX, XM, XX },
1597 },
1598 /* PREGRP21 */
1599 {
1600 { "(bad)", EX, XM, XX },
67d6227d 1601 { "movq2dq", XM, MS, XX },
041bd2e0 1602 { "movq", EX, XM, XX },
67d6227d 1603 { "movdq2q", MX, XS, XX },
041bd2e0
JH		 1604 },
1605 /* PREGRP22 */
1606 {
1607 { "pshufw", MX, EM, Ib },
1608 { "pshufhw", XM, EX, Ib },
1609 { "pshufd", XM, EX, Ib },
1610 { "pshuflw", XM, EX, Ib },
1611 },
1612 /* PREGRP23 */
1613 {
1614 { "movd", Ed, MX, XX },
67d6227d 1615 { "movq", XM, EX, XX },
041bd2e0 1616 { "movd", Ed, XM, XX },
0f17484f 1617 { "(bad)", Ed, XM, XX },
041bd2e0
JH		 1618 },
1619 /* PREGRP24 */
1620 {
0f17484f
AM		 1621 { "(bad)", MX, EX, XX },
1622 { "(bad)", XM, EX, XX },
041bd2e0 1623 { "punpckhqdq", XM, EX, XX },
0f17484f
AM		 1624 { "(bad)", XM, EX, XX },
1625 },
1626 /* PREGRP25 */
1627 {
1628 { "movntq", Ev, MX, XX },
1629 { "(bad)", Ev, XM, XX },
1630 { "movntdq", Ev, XM, XX },
1631 { "(bad)", Ev, XM, XX },
1632 },
1633 /* PREGRP26 */
1634 {
1635 { "(bad)", MX, EX, XX },
1636 { "(bad)", XM, EX, XX },
1637 { "punpcklqdq", XM, EX, XX },
1638 { "(bad)", XM, EX, XX },
041bd2e0 1639 },
c608c12e
AM		 1640};
1641
6439fc28
AM		 1642static const struct dis386 x86_64_table[][2] = {
1643 {
1644 { "arpl", Ew, Gw, XX },
1645 { "movs{||lq|xd}", Gv, Ed, XX },
1646 },
1647};
1648
c608c12e
AM		 1649#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1650
252b5132
RH		 1651static void
1652ckprefix ()
1653{
52b15da3
JH		 1654 int newrex;
1655 rex = 0;
252b5132 1656 prefixes = 0;
7d421014 1657 used_prefixes = 0;
52b15da3 1658 rex_used = 0;
252b5132
RH		 1659 while (1)
1660 {
1661 FETCH_DATA (the_info, codep + 1);
52b15da3 1662 newrex = 0;
252b5132
RH		 1663 switch (*codep)
1664 {
52b15da3
JH		 1665 /* REX prefixes family. */
1666 case 0x40:
1667 case 0x41:
1668 case 0x42:
1669 case 0x43:
1670 case 0x44:
1671 case 0x45:
1672 case 0x46:
1673 case 0x47:
1674 case 0x48:
1675 case 0x49:
1676 case 0x4a:
1677 case 0x4b:
1678 case 0x4c:
1679 case 0x4d:
1680 case 0x4e:
1681 case 0x4f:
1682 if (mode_64bit)
1683 newrex = *codep;
1684 else
1685 return;
1686 break;
252b5132
RH		 1687 case 0xf3:
1688 prefixes |= PREFIX_REPZ;
1689 break;
1690 case 0xf2:
1691 prefixes |= PREFIX_REPNZ;
1692 break;
1693 case 0xf0:
1694 prefixes |= PREFIX_LOCK;
1695 break;
1696 case 0x2e:
1697 prefixes |= PREFIX_CS;
1698 break;
1699 case 0x36:
1700 prefixes |= PREFIX_SS;
1701 break;
1702 case 0x3e:
1703 prefixes |= PREFIX_DS;
1704 break;
1705 case 0x26:
1706 prefixes |= PREFIX_ES;
1707 break;
1708 case 0x64:
1709 prefixes |= PREFIX_FS;
1710 break;
1711 case 0x65:
1712 prefixes |= PREFIX_GS;
1713 break;
1714 case 0x66:
1715 prefixes |= PREFIX_DATA;
1716 break;
1717 case 0x67:
1718 prefixes |= PREFIX_ADDR;
1719 break;
5076851f 1720 case FWAIT_OPCODE:
252b5132
RH		 1721 /* fwait is really an instruction. If there are prefixes
1722 before the fwait, they belong to the fwait, *not* to the
1723 following instruction. */
1724 if (prefixes)
1725 {
1726 prefixes |= PREFIX_FWAIT;
1727 codep++;
1728 return;
1729 }
1730 prefixes = PREFIX_FWAIT;
1731 break;
1732 default:
1733 return;
1734 }
52b15da3
JH		 1735 /* Rex is ignored when followed by another prefix. */
1736 if (rex)
1737 {
1738 oappend (prefix_name (rex, 0));
1739 oappend (" ");
1740 }
1741 rex = newrex;
252b5132
RH		 1742 codep++;
1743 }
1744}
1745
7d421014
ILT		 1746/* Return the name of the prefix byte PREF, or NULL if PREF is not a
1747 prefix byte. */
1748
1749static const char *
1750prefix_name (pref, sizeflag)
1751 int pref;
1752 int sizeflag;
1753{
1754 switch (pref)
1755 {
52b15da3
JH		 1756 /* REX prefixes family. */
1757 case 0x40:
1758 return "rex";
1759 case 0x41:
1760 return "rexZ";
1761 case 0x42:
1762 return "rexY";
1763 case 0x43:
1764 return "rexYZ";
1765 case 0x44:
1766 return "rexX";
1767 case 0x45:
1768 return "rexXZ";
1769 case 0x46:
1770 return "rexXY";
1771 case 0x47:
1772 return "rexXYZ";
1773 case 0x48:
1774 return "rex64";
1775 case 0x49:
1776 return "rex64Z";
1777 case 0x4a:
1778 return "rex64Y";
1779 case 0x4b:
1780 return "rex64YZ";
1781 case 0x4c:
1782 return "rex64X";
1783 case 0x4d:
1784 return "rex64XZ";
1785 case 0x4e:
1786 return "rex64XY";
1787 case 0x4f:
1788 return "rex64XYZ";
7d421014
ILT		 1789 case 0xf3:
1790 return "repz";
1791 case 0xf2:
1792 return "repnz";
1793 case 0xf0:
1794 return "lock";
1795 case 0x2e:
1796 return "cs";
1797 case 0x36:
1798 return "ss";
1799 case 0x3e:
1800 return "ds";
1801 case 0x26:
1802 return "es";
1803 case 0x64:
1804 return "fs";
1805 case 0x65:
1806 return "gs";
1807 case 0x66:
1808 return (sizeflag & DFLAG) ? "data16" : "data32";
1809 case 0x67:
1810 return (sizeflag & AFLAG) ? "addr16" : "addr32";
1811 case FWAIT_OPCODE:
1812 return "fwait";
1813 default:
1814 return NULL;
1815 }
1816}
1817
252b5132
RH		 1818static char op1out[100], op2out[100], op3out[100];
1819static int op_ad, op_index[3];
7081ff04
AJ		 1820static bfd_vma op_address[3];
1821static bfd_vma op_riprel[3];
52b15da3 1822static bfd_vma start_pc;
252b5132
RH		 1823\f
1824/*
1825 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1826 * (see topic "Redundant prefixes" in the "Differences from 8086"
1827 * section of the "Virtual 8086 Mode" chapter.)
1828 * 'pc' should be the address of this instruction, it will
1829 * be used to print the target address if this is a relative jump or call
1830 * The function returns the length of this instruction in bytes.
1831 */
1832
252b5132
RH		 1833static char intel_syntax;
1834static char open_char;
1835static char close_char;
1836static char separator_char;
1837static char scale_char;
1838
e396998b
AM		 1839/* Here for backwards compatibility. When gdb stops using
1840 print_insn_i386_att and print_insn_i386_intel these functions can
1841 disappear, and print_insn_i386 be merged into print_insn. */
252b5132
RH		 1842int
1843print_insn_i386_att (pc, info)
1844 bfd_vma pc;
1845 disassemble_info *info;
1846{
1847 intel_syntax = 0;
e396998b
AM		 1848
1849 return print_insn (pc, info);
252b5132
RH		 1850}
1851
1852int
1853print_insn_i386_intel (pc, info)
1854 bfd_vma pc;
1855 disassemble_info *info;
1856{
1857 intel_syntax = 1;
e396998b
AM		 1858
1859 return print_insn (pc, info);
252b5132
RH		 1860}
1861
e396998b 1862int
252b5132
RH		 1863print_insn_i386 (pc, info)
1864 bfd_vma pc;
1865 disassemble_info *info;
e396998b
AM		 1866{
1867 intel_syntax = -1;
1868
1869 return print_insn (pc, info);
1870}
1871
1872static int
1873print_insn (pc, info)
1874 bfd_vma pc;
1875 disassemble_info *info;
252b5132 1876{
2da11e11 1877 const struct dis386 *dp;
252b5132
RH		 1878 int i;
1879 int two_source_ops;
1880 char *first, *second, *third;
1881 int needcomma;
041bd2e0 1882 unsigned char uses_SSE_prefix;
e396998b
AM		 1883 int sizeflag;
1884 const char *p;
252b5132 1885 struct dis_private priv;
252b5132 1886
52b15da3
JH		 1887 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
1888 || info->mach == bfd_mach_x86_64);
1889
e396998b
AM		 1890 if (intel_syntax == -1)
1891 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
1892 || info->mach == bfd_mach_x86_64_intel_syntax);
1893
2da11e11 1894 if (info->mach == bfd_mach_i386_i386
52b15da3
JH		 1895 || info->mach == bfd_mach_x86_64
1896 || info->mach == bfd_mach_i386_i386_intel_syntax
1897 || info->mach == bfd_mach_x86_64_intel_syntax)
e396998b 1898 priv.orig_sizeflag = AFLAG | DFLAG;
2da11e11 1899 else if (info->mach == bfd_mach_i386_i8086)
e396998b 1900 priv.orig_sizeflag = 0;
2da11e11
AM		 1901 else
1902 abort ();
e396998b
AM		 1903
1904 for (p = info->disassembler_options; p != NULL; )
1905 {
fa405d97 1906 if (strncmp (p, "x86-64", 6) == 0)
e396998b
AM		 1907 {
1908 mode_64bit = 1;
1909 priv.orig_sizeflag = AFLAG | DFLAG;
1910 }
1911 else if (strncmp (p, "i386", 4) == 0)
1912 {
1913 mode_64bit = 0;
1914 priv.orig_sizeflag = AFLAG | DFLAG;
1915 }
1916 else if (strncmp (p, "i8086", 5) == 0)
1917 {
1918 mode_64bit = 0;
1919 priv.orig_sizeflag = 0;
1920 }
1921 else if (strncmp (p, "intel", 5) == 0)
1922 {
1923 intel_syntax = 1;
1924 }
1925 else if (strncmp (p, "att", 3) == 0)
1926 {
1927 intel_syntax = 0;
1928 }
1929 else if (strncmp (p, "addr", 4) == 0)
1930 {
1931 if (p[4] == '1' && p[5] == '6')
1932 priv.orig_sizeflag &= ~AFLAG;
1933 else if (p[4] == '3' && p[5] == '2')
1934 priv.orig_sizeflag |= AFLAG;
1935 }
1936 else if (strncmp (p, "data", 4) == 0)
1937 {
1938 if (p[4] == '1' && p[5] == '6')
1939 priv.orig_sizeflag &= ~DFLAG;
1940 else if (p[4] == '3' && p[5] == '2')
1941 priv.orig_sizeflag |= DFLAG;
1942 }
1943 else if (strncmp (p, "suffix", 6) == 0)
1944 priv.orig_sizeflag |= SUFFIX_ALWAYS;
1945
1946 p = strchr (p, ',');
1947 if (p != NULL)
1948 p++;
1949 }
1950
1951 if (intel_syntax)
1952 {
1953 names64 = intel_names64;
1954 names32 = intel_names32;
1955 names16 = intel_names16;
1956 names8 = intel_names8;
1957 names8rex = intel_names8rex;
1958 names_seg = intel_names_seg;
1959 index16 = intel_index16;
1960 open_char = '[';
1961 close_char = ']';
1962 separator_char = '+';
1963 scale_char = '*';
1964 }
1965 else
1966 {
1967 names64 = att_names64;
1968 names32 = att_names32;
1969 names16 = att_names16;
1970 names8 = att_names8;
1971 names8rex = att_names8rex;
1972 names_seg = att_names_seg;
1973 index16 = att_index16;
1974 open_char = '(';
1975 close_char = ')';
1976 separator_char = ',';
1977 scale_char = ',';
1978 }
2da11e11 1979
4fe53c98 1980 /* The output looks better if we put 7 bytes on a line, since that
c608c12e 1981 puts most long word instructions on a single line. */
4fe53c98 1982 info->bytes_per_line = 7;
252b5132
RH		 1983
1984 info->private_data = (PTR) &priv;
1985 priv.max_fetched = priv.the_buffer;
1986 priv.insn_start = pc;
252b5132
RH		 1987
1988 obuf[0] = 0;
1989 op1out[0] = 0;
1990 op2out[0] = 0;
1991 op3out[0] = 0;
1992
1993 op_index[0] = op_index[1] = op_index[2] = -1;
1994
1995 the_info = info;
1996 start_pc = pc;
e396998b
AM		 1997 start_codep = priv.the_buffer;
1998 codep = priv.the_buffer;
252b5132 1999
5076851f
ILT		 2000 if (setjmp (priv.bailout) != 0)
2001 {
7d421014
ILT		 2002 const char *name;
2003
5076851f 2004 /* Getting here means we tried for data but didn't get it. That
e396998b
AM		 2005 means we have an incomplete instruction of some sort. Just
2006 print the first byte as a prefix or a .byte pseudo-op. */
2007 if (codep > priv.the_buffer)
5076851f 2008 {
e396998b 2009 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 2010 if (name != NULL)
2011 (*info->fprintf_func) (info->stream, "%s", name);
2012 else
5076851f 2013 {
7d421014
ILT		 2014 /* Just print the first byte as a .byte instruction. */
2015 (*info->fprintf_func) (info->stream, ".byte 0x%x",
e396998b 2016 (unsigned int) priv.the_buffer[0]);
5076851f 2017 }
5076851f 2018
7d421014 2019 return 1;
5076851f
ILT		 2020 }
2021
2022 return -1;
2023 }
2024
52b15da3 2025 obufp = obuf;
252b5132
RH		 2026 ckprefix ();
2027
2028 insn_codep = codep;
e396998b 2029 sizeflag = priv.orig_sizeflag;
252b5132
RH		 2030
2031 FETCH_DATA (info, codep + 1);
2032 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2033
252b5132
RH		 2034 if ((prefixes & PREFIX_FWAIT)
2035 && ((*codep < 0xd8) || (*codep > 0xdf)))
2036 {
7d421014
ILT		 2037 const char *name;
2038
2039 /* fwait not followed by floating point instruction. Print the
2040 first prefix, which is probably fwait itself. */
e396998b 2041 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 2042 if (name == NULL)
2043 name = INTERNAL_DISASSEMBLER_ERROR;
2044 (*info->fprintf_func) (info->stream, "%s", name);
2045 return 1;
252b5132
RH		 2046 }
2047
252b5132
RH		 2048 if (*codep == 0x0f)
2049 {
2050 FETCH_DATA (info, codep + 2);
6439fc28 2051 dp = &dis386_twobyte[*++codep];
252b5132 2052 need_modrm = twobyte_has_modrm[*codep];
041bd2e0 2053 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
252b5132
RH		 2054 }
2055 else
2056 {
6439fc28 2057 dp = &dis386[*codep];
252b5132 2058 need_modrm = onebyte_has_modrm[*codep];
041bd2e0 2059 uses_SSE_prefix = 0;
252b5132
RH		 2060 }
2061 codep++;
2062
041bd2e0 2063 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
7d421014
ILT		 2064 {
2065 oappend ("repz ");
2066 used_prefixes |= PREFIX_REPZ;
2067 }
041bd2e0 2068 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
7d421014
ILT		 2069 {
2070 oappend ("repnz ");
2071 used_prefixes |= PREFIX_REPNZ;
2072 }
c608c12e 2073 if (prefixes & PREFIX_LOCK)
7d421014
ILT		 2074 {
2075 oappend ("lock ");
2076 used_prefixes |= PREFIX_LOCK;
2077 }
c608c12e 2078
c608c12e
AM		 2079 if (prefixes & PREFIX_ADDR)
2080 {
2081 sizeflag ^= AFLAG;
6439fc28 2082 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
3ffd33cf
AM		 2083 {
2084 if (sizeflag & AFLAG)
2085 oappend ("addr32 ");
2086 else
2087 oappend ("addr16 ");
2088 used_prefixes |= PREFIX_ADDR;
2089 }
2090 }
2091
2092 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2093 {
2094 sizeflag ^= DFLAG;
6439fc28
AM		 2095 if (dp->bytemode3 == cond_jump_mode
2096 && dp->bytemode1 == v_mode
2097 && !intel_syntax)
3ffd33cf
AM		 2098 {
2099 if (sizeflag & DFLAG)
2100 oappend ("data32 ");
2101 else
2102 oappend ("data16 ");
2103 used_prefixes |= PREFIX_DATA;
2104 }
2105 }
2106
252b5132
RH		 2107 if (need_modrm)
2108 {
2109 FETCH_DATA (info, codep + 1);
2110 mod = (*codep >> 6) & 3;
2111 reg = (*codep >> 3) & 7;
2112 rm = *codep & 7;
2113 }
2114
2115 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2116 {
2117 dofloat (sizeflag);
2118 }
2119 else
2120 {
041bd2e0 2121 int index;
252b5132 2122 if (dp->name == NULL)
c608c12e 2123 {
6439fc28 2124 switch (dp->bytemode1)
c608c12e 2125 {
6439fc28
AM		 2126 case USE_GROUPS:
2127 dp = &grps[dp->bytemode2][reg];
2128 break;
2129
2130 case USE_PREFIX_USER_TABLE:
2131 index = 0;
2132 used_prefixes |= (prefixes & PREFIX_REPZ);
2133 if (prefixes & PREFIX_REPZ)
2134 index = 1;
2135 else
2136 {
2137 used_prefixes |= (prefixes & PREFIX_DATA);
2138 if (prefixes & PREFIX_DATA)
2139 index = 2;
2140 else
2141 {
2142 used_prefixes |= (prefixes & PREFIX_REPNZ);
2143 if (prefixes & PREFIX_REPNZ)
2144 index = 3;
2145 }
2146 }
2147 dp = &prefix_user_table[dp->bytemode2][index];
2148 break;
252b5132 2149
6439fc28
AM		 2150 case X86_64_SPECIAL:
2151 dp = &x86_64_table[dp->bytemode2][mode_64bit];
2152 break;
252b5132 2153
6439fc28
AM		 2154 default:
2155 oappend (INTERNAL_DISASSEMBLER_ERROR);
2156 break;
2157 }
2158 }
252b5132 2159
6439fc28
AM		 2160 if (putop (dp->name, sizeflag) == 0)
2161 {
2162 obufp = op1out;
2163 op_ad = 2;
2164 if (dp->op1)
6608db57 2165 (*dp->op1) (dp->bytemode1, sizeflag);
6439fc28
AM		 2166
2167 obufp = op2out;
2168 op_ad = 1;
2169 if (dp->op2)
6608db57 2170 (*dp->op2) (dp->bytemode2, sizeflag);
6439fc28
AM		 2171
2172 obufp = op3out;
2173 op_ad = 0;
2174 if (dp->op3)
6608db57 2175 (*dp->op3) (dp->bytemode3, sizeflag);
6439fc28 2176 }
252b5132
RH		 2177 }
2178
7d421014
ILT		 2179 /* See if any prefixes were not used. If so, print the first one
2180 separately. If we don't do this, we'll wind up printing an
2181 instruction stream which does not precisely correspond to the
2182 bytes we are disassembling. */
2183 if ((prefixes & ~used_prefixes) != 0)
2184 {
2185 const char *name;
2186
e396998b 2187 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
7d421014
ILT		 2188 if (name == NULL)
2189 name = INTERNAL_DISASSEMBLER_ERROR;
2190 (*info->fprintf_func) (info->stream, "%s", name);
2191 return 1;
2192 }
52b15da3
JH		 2193 if (rex & ~rex_used)
2194 {
2195 const char *name;
e396998b 2196 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
52b15da3
JH		 2197 if (name == NULL)
2198 name = INTERNAL_DISASSEMBLER_ERROR;
2199 (*info->fprintf_func) (info->stream, "%s ", name);
2200 }
7d421014 2201
252b5132
RH		 2202 obufp = obuf + strlen (obuf);
2203 for (i = strlen (obuf); i < 6; i++)
2204 oappend (" ");
2205 oappend (" ");
2206 (*info->fprintf_func) (info->stream, "%s", obuf);
2207
2208 /* The enter and bound instructions are printed with operands in the same
2209 order as the intel book; everything else is printed in reverse order. */
2da11e11 2210 if (intel_syntax || two_source_ops)
252b5132
RH		 2211 {
2212 first = op1out;
2213 second = op2out;
2214 third = op3out;
2215 op_ad = op_index[0];
2216 op_index[0] = op_index[2];
2217 op_index[2] = op_ad;
2218 }
2219 else
2220 {
2221 first = op3out;
2222 second = op2out;
2223 third = op1out;
2224 }
2225 needcomma = 0;
2226 if (*first)
2227 {
52b15da3 2228 if (op_index[0] != -1 && !op_riprel[0])
252b5132
RH		 2229 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2230 else
2231 (*info->fprintf_func) (info->stream, "%s", first);
2232 needcomma = 1;
2233 }
2234 if (*second)
2235 {
2236 if (needcomma)
2237 (*info->fprintf_func) (info->stream, ",");
52b15da3 2238 if (op_index[1] != -1 && !op_riprel[1])
252b5132
RH		 2239 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2240 else
2241 (*info->fprintf_func) (info->stream, "%s", second);
2242 needcomma = 1;
2243 }
2244 if (*third)
2245 {
2246 if (needcomma)
2247 (*info->fprintf_func) (info->stream, ",");
52b15da3 2248 if (op_index[2] != -1 && !op_riprel[2])
252b5132
RH		 2249 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2250 else
2251 (*info->fprintf_func) (info->stream, "%s", third);
2252 }
52b15da3
JH		 2253 for (i = 0; i < 3; i++)
2254 if (op_index[i] != -1 && op_riprel[i])
2255 {
2256 (*info->fprintf_func) (info->stream, " # ");
2257 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2258 + op_address[op_index[i]]), info);
2259 }
e396998b 2260 return codep - priv.the_buffer;
252b5132
RH		 2261}
2262
6439fc28 2263static const char *float_mem[] = {
252b5132 2264 /* d8 */
6439fc28
AM		 2265 "fadd{s||s|}",
2266 "fmul{s||s|}",
2267 "fcom{s||s|}",
2268 "fcomp{s||s|}",
2269 "fsub{s||s|}",
2270 "fsubr{s||s|}",
2271 "fdiv{s||s|}",
2272 "fdivr{s||s|}",
252b5132 2273 /* d9 */
6439fc28 2274 "fld{s||s|}",
252b5132 2275 "(bad)",
6439fc28
AM		 2276 "fst{s||s|}",
2277 "fstp{s||s|}",
252b5132
RH		 2278 "fldenv",
2279 "fldcw",
2280 "fNstenv",
2281 "fNstcw",
2282 /* da */
6439fc28
AM		 2283 "fiadd{l||l|}",
2284 "fimul{l||l|}",
2285 "ficom{l||l|}",
2286 "ficomp{l||l|}",
2287 "fisub{l||l|}",
2288 "fisubr{l||l|}",
2289 "fidiv{l||l|}",
2290 "fidivr{l||l|}",
252b5132 2291 /* db */
6439fc28 2292 "fild{l||l|}",
252b5132 2293 "(bad)",
6439fc28
AM		 2294 "fist{l||l|}",
2295 "fistp{l||l|}",
252b5132 2296 "(bad)",
6439fc28 2297 "fld{t||t|}",
252b5132 2298 "(bad)",
6439fc28 2299 "fstp{t||t|}",
252b5132 2300 /* dc */
6439fc28
AM		 2301 "fadd{l||l|}",
2302 "fmul{l||l|}",
2303 "fcom{l||l|}",
2304 "fcomp{l||l|}",
2305 "fsub{l||l|}",
2306 "fsubr{l||l|}",
2307 "fdiv{l||l|}",
2308 "fdivr{l||l|}",
252b5132 2309 /* dd */
6439fc28 2310 "fld{l||l|}",
252b5132 2311 "(bad)",
6439fc28
AM		 2312 "fst{l||l|}",
2313 "fstp{l||l|}",
252b5132
RH		 2314 "frstor",
2315 "(bad)",
2316 "fNsave",
2317 "fNstsw",
2318 /* de */
2319 "fiadd",
2320 "fimul",
2321 "ficom",
2322 "ficomp",
2323 "fisub",
2324 "fisubr",
2325 "fidiv",
2326 "fidivr",
2327 /* df */
2328 "fild",
2329 "(bad)",
2330 "fist",
2331 "fistp",
2332 "fbld",
6439fc28 2333 "fild{ll||ll|}",
252b5132
RH		 2334 "fbstp",
2335 "fistpll",
2336};
2337
2338#define ST OP_ST, 0
2339#define STi OP_STi, 0
2340
57d91c3c
ILT		 2341#define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2342#define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2343#define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2344#define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2345#define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2346#define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2347#define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2348#define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2349#define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
252b5132 2350
2da11e11 2351static const struct dis386 float_reg[][8] = {
252b5132
RH		 2352 /* d8 */
2353 {
57d91c3c
ILT		 2354 { "fadd", ST, STi, XX },
2355 { "fmul", ST, STi, XX },
2356 { "fcom", STi, XX, XX },
2357 { "fcomp", STi, XX, XX },
2358 { "fsub", ST, STi, XX },
2359 { "fsubr", ST, STi, XX },
2360 { "fdiv", ST, STi, XX },
2361 { "fdivr", ST, STi, XX },
252b5132
RH		 2362 },
2363 /* d9 */
2364 {
57d91c3c
ILT		 2365 { "fld", STi, XX, XX },
2366 { "fxch", STi, XX, XX },
252b5132 2367 { FGRPd9_2 },
57d91c3c 2368 { "(bad)", XX, XX, XX },
252b5132
RH		 2369 { FGRPd9_4 },
2370 { FGRPd9_5 },
2371 { FGRPd9_6 },
2372 { FGRPd9_7 },
2373 },
2374 /* da */
2375 {
57d91c3c
ILT		 2376 { "fcmovb", ST, STi, XX },
2377 { "fcmove", ST, STi, XX },
2378 { "fcmovbe",ST, STi, XX },
2379 { "fcmovu", ST, STi, XX },
2380 { "(bad)", XX, XX, XX },
252b5132 2381 { FGRPda_5 },
57d91c3c
ILT		 2382 { "(bad)", XX, XX, XX },
2383 { "(bad)", XX, XX, XX },
252b5132
RH		 2384 },
2385 /* db */
2386 {
57d91c3c
ILT		 2387 { "fcmovnb",ST, STi, XX },
2388 { "fcmovne",ST, STi, XX },
2389 { "fcmovnbe",ST, STi, XX },
2390 { "fcmovnu",ST, STi, XX },
252b5132 2391 { FGRPdb_4 },
57d91c3c
ILT		 2392 { "fucomi", ST, STi, XX },
2393 { "fcomi", ST, STi, XX },
2394 { "(bad)", XX, XX, XX },
252b5132
RH		 2395 },
2396 /* dc */
2397 {
57d91c3c
ILT		 2398 { "fadd", STi, ST, XX },
2399 { "fmul", STi, ST, XX },
2400 { "(bad)", XX, XX, XX },
2401 { "(bad)", XX, XX, XX },
252b5132 2402#if UNIXWARE_COMPAT
57d91c3c
ILT		 2403 { "fsub", STi, ST, XX },
2404 { "fsubr", STi, ST, XX },
2405 { "fdiv", STi, ST, XX },
2406 { "fdivr", STi, ST, XX },
252b5132 2407#else
57d91c3c
ILT		 2408 { "fsubr", STi, ST, XX },
2409 { "fsub", STi, ST, XX },
2410 { "fdivr", STi, ST, XX },
2411 { "fdiv", STi, ST, XX },
252b5132
RH		 2412#endif
2413 },
2414 /* dd */
2415 {
57d91c3c
ILT		 2416 { "ffree", STi, XX, XX },
2417 { "(bad)", XX, XX, XX },
2418 { "fst", STi, XX, XX },
2419 { "fstp", STi, XX, XX },
2420 { "fucom", STi, XX, XX },
2421 { "fucomp", STi, XX, XX },
2422 { "(bad)", XX, XX, XX },
2423 { "(bad)", XX, XX, XX },
252b5132
RH		 2424 },
2425 /* de */
2426 {
57d91c3c
ILT		 2427 { "faddp", STi, ST, XX },
2428 { "fmulp", STi, ST, XX },
2429 { "(bad)", XX, XX, XX },
252b5132
RH		 2430 { FGRPde_3 },
2431#if UNIXWARE_COMPAT
57d91c3c
ILT		 2432 { "fsubp", STi, ST, XX },
2433 { "fsubrp", STi, ST, XX },
2434 { "fdivp", STi, ST, XX },
2435 { "fdivrp", STi, ST, XX },
252b5132 2436#else
57d91c3c
ILT		 2437 { "fsubrp", STi, ST, XX },
2438 { "fsubp", STi, ST, XX },
2439 { "fdivrp", STi, ST, XX },
2440 { "fdivp", STi, ST, XX },
252b5132
RH		 2441#endif
2442 },
2443 /* df */
2444 {
c2419411 2445 { "ffreep", STi, XX, XX },
57d91c3c
ILT		 2446 { "(bad)", XX, XX, XX },
2447 { "(bad)", XX, XX, XX },
2448 { "(bad)", XX, XX, XX },
252b5132 2449 { FGRPdf_4 },
57d91c3c
ILT		 2450 { "fucomip",ST, STi, XX },
2451 { "fcomip", ST, STi, XX },
2452 { "(bad)", XX, XX, XX },
252b5132
RH		 2453 },
2454};
2455
252b5132
RH		 2456static char *fgrps[][8] = {
2457 /* d9_2 0 */
2458 {
2459 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2460 },
2461
2462 /* d9_4 1 */
2463 {
2464 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2465 },
2466
2467 /* d9_5 2 */
2468 {
2469 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2470 },
2471
2472 /* d9_6 3 */
2473 {
2474 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2475 },
2476
2477 /* d9_7 4 */
2478 {
2479 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2480 },
2481
2482 /* da_5 5 */
2483 {
2484 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2485 },
2486
2487 /* db_4 6 */
2488 {
2489 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2490 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2491 },
2492
2493 /* de_3 7 */
2494 {
2495 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2496 },
2497
2498 /* df_4 8 */
2499 {
2500 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2501 },
2502};
2503
2504static void
2505dofloat (sizeflag)
2506 int sizeflag;
2507{
2da11e11 2508 const struct dis386 *dp;
252b5132
RH		 2509 unsigned char floatop;
2510
2511 floatop = codep[-1];
2512
2513 if (mod != 3)
2514 {
6608db57 2515 putop (float_mem[(floatop - 0xd8) * 8 + reg], sizeflag);
252b5132
RH		 2516 obufp = op1out;
2517 if (floatop == 0xdb)
2518 OP_E (x_mode, sizeflag);
2519 else if (floatop == 0xdd)
2520 OP_E (d_mode, sizeflag);
2da11e11 2521 else
252b5132
RH		 2522 OP_E (v_mode, sizeflag);
2523 return;
2524 }
6608db57 2525 /* Skip mod/rm byte. */
4bba6815 2526 MODRM_CHECK;
252b5132
RH		 2527 codep++;
2528
2529 dp = &float_reg[floatop - 0xd8][reg];
2530 if (dp->name == NULL)
2531 {
2532 putop (fgrps[dp->bytemode1][rm], sizeflag);
2533
6608db57 2534 /* Instruction fnstsw is only one with strange arg. */
252b5132
RH		 2535 if (floatop == 0xdf && codep[-1] == 0xe0)
2536 strcpy (op1out, names16[0]);
2537 }
2538 else
2539 {
2540 putop (dp->name, sizeflag);
2541
2542 obufp = op1out;
2543 if (dp->op1)
6608db57 2544 (*dp->op1) (dp->bytemode1, sizeflag);
252b5132
RH		 2545 obufp = op2out;
2546 if (dp->op2)
6608db57 2547 (*dp->op2) (dp->bytemode2, sizeflag);
252b5132
RH		 2548 }
2549}
2550
252b5132 2551static void
6439fc28
AM		 2552OP_ST (bytemode, sizeflag)
2553 int bytemode ATTRIBUTE_UNUSED;
57d91c3c 2554 int sizeflag ATTRIBUTE_UNUSED;
252b5132
RH		 2555{
2556 oappend ("%st");
2557}
2558
252b5132 2559static void
6439fc28
AM		 2560OP_STi (bytemode, sizeflag)
2561 int bytemode ATTRIBUTE_UNUSED;
57d91c3c 2562 int sizeflag ATTRIBUTE_UNUSED;
252b5132
RH		 2563{
2564 sprintf (scratchbuf, "%%st(%d)", rm);
d708bcba 2565 oappend (scratchbuf + intel_syntax);
252b5132
RH		 2566}
2567
6608db57 2568/* Capital letters in template are macros. */
6439fc28 2569static int
252b5132 2570putop (template, sizeflag)
2da11e11 2571 const char *template;
252b5132
RH		 2572 int sizeflag;
2573{
2da11e11 2574 const char *p;
6439fc28 2575 int alt;
252b5132
RH		 2576
2577 for (p = template; *p; p++)
2578 {
2579 switch (*p)
2580 {
2581 default:
2582 *obufp++ = *p;
2583 break;
6439fc28
AM		 2584 case '{':
2585 alt = 0;
2586 if (intel_syntax)
2587 alt += 1;
2588 if (mode_64bit)
2589 alt += 2;
2590 while (alt != 0)
2591 {
2592 while (*++p != '|')
2593 {
2594 if (*p == '}')
2595 {
2596 /* Alternative not valid. */
2597 strcpy (obuf, "(bad)");
2598 obufp = obuf + 5;
2599 return 1;
2600 }
2601 else if (*p == '\0')
2602 abort ();
2603 }
2604 alt--;
2605 }
2606 break;
2607 case '|':
2608 while (*++p != '}')
2609 {
2610 if (*p == '\0')
2611 abort ();
2612 }
2613 break;
2614 case '}':
2615 break;
252b5132
RH		 2616 case 'A':
2617 if (intel_syntax)
2618 break;
e396998b 2619 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132
RH		 2620 *obufp++ = 'b';
2621 break;
2622 case 'B':
2623 if (intel_syntax)
2624 break;
252b5132
RH		 2625 if (sizeflag & SUFFIX_ALWAYS)
2626 *obufp++ = 'b';
252b5132
RH		 2627 break;
2628 case 'E': /* For jcxz/jecxz */
2629 if (sizeflag & AFLAG)
2630 *obufp++ = 'e';
3ffd33cf
AM		 2631 used_prefixes |= (prefixes & PREFIX_ADDR);
2632 break;
2633 case 'F':
6439fc28
AM		 2634 if (intel_syntax)
2635 break;
e396998b 2636 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
3ffd33cf
AM		 2637 {
2638 if (sizeflag & AFLAG)
2639 *obufp++ = 'l';
2640 else
2641 *obufp++ = 'w';
2642 used_prefixes |= (prefixes & PREFIX_ADDR);
2643 }
252b5132 2644 break;
5dd0794d 2645 case 'H':
6439fc28
AM		 2646 if (intel_syntax)
2647 break;
5dd0794d
AM		 2648 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
2649 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
2650 {
2651 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
2652 *obufp++ = ',';
2653 *obufp++ = 'p';
2654 if (prefixes & PREFIX_DS)
2655 *obufp++ = 't';
2656 else
2657 *obufp++ = 'n';
2658 }
2659 break;
252b5132
RH		 2660 case 'L':
2661 if (intel_syntax)
2662 break;
252b5132
RH		 2663 if (sizeflag & SUFFIX_ALWAYS)
2664 *obufp++ = 'l';
252b5132
RH		 2665 break;
2666 case 'N':
2667 if ((prefixes & PREFIX_FWAIT) == 0)
2668 *obufp++ = 'n';
7d421014
ILT		 2669 else
2670 used_prefixes |= PREFIX_FWAIT;
252b5132 2671 break;
52b15da3
JH		 2672 case 'O':
2673 USED_REX (REX_MODE64);
2674 if (rex & REX_MODE64)
6439fc28 2675 *obufp++ = 'o';
52b15da3
JH		 2676 else
2677 *obufp++ = 'd';
2678 break;
6439fc28
AM		 2679 case 'T':
2680 if (intel_syntax)
2681 break;
2682 if (mode_64bit)
2683 {
2684 *obufp++ = 'q';
2685 break;
2686 }
6608db57 2687 /* Fall through. */
252b5132
RH		 2688 case 'P':
2689 if (intel_syntax)
2690 break;
2691 if ((prefixes & PREFIX_DATA)
52b15da3 2692 || (rex & REX_MODE64)
e396998b 2693 || (sizeflag & SUFFIX_ALWAYS))
252b5132 2694 {
52b15da3
JH		 2695 USED_REX (REX_MODE64);
2696 if (rex & REX_MODE64)
2697 *obufp++ = 'q';
c2419411 2698 else
52b15da3
JH		 2699 {
2700 if (sizeflag & DFLAG)
2701 *obufp++ = 'l';
2702 else
2703 *obufp++ = 'w';
2704 used_prefixes |= (prefixes & PREFIX_DATA);
2705 }
252b5132
RH		 2706 }
2707 break;
6439fc28
AM		 2708 case 'U':
2709 if (intel_syntax)
2710 break;
2711 if (mode_64bit)
2712 {
2713 *obufp++ = 'q';
2714 break;
2715 }
6608db57 2716 /* Fall through. */
252b5132
RH		 2717 case 'Q':
2718 if (intel_syntax)
2719 break;
90530880 2720 USED_REX (REX_MODE64);
e396998b 2721 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
252b5132 2722 {
52b15da3
JH		 2723 if (rex & REX_MODE64)
2724 *obufp++ = 'q';
252b5132 2725 else
52b15da3
JH		 2726 {
2727 if (sizeflag & DFLAG)
2728 *obufp++ = 'l';
2729 else
2730 *obufp++ = 'w';
2731 used_prefixes |= (prefixes & PREFIX_DATA);
2732 }
252b5132
RH		 2733 }
2734 break;
2735 case 'R':
52b15da3 2736 USED_REX (REX_MODE64);
252b5132 2737 if (intel_syntax)
c608c12e 2738 {
52b15da3
JH		 2739 if (rex & REX_MODE64)
2740 {
2741 *obufp++ = 'q';
2742 *obufp++ = 't';
2743 }
2744 else if (sizeflag & DFLAG)
c608c12e
AM		 2745 {
2746 *obufp++ = 'd';
2747 *obufp++ = 'q';
2748 }
2749 else
2750 {
2751 *obufp++ = 'w';
2752 *obufp++ = 'd';
2753 }
2754 }
252b5132 2755 else
c608c12e 2756 {
52b15da3
JH		 2757 if (rex & REX_MODE64)
2758 *obufp++ = 'q';
2759 else if (sizeflag & DFLAG)
c608c12e
AM		 2760 *obufp++ = 'l';
2761 else
2762 *obufp++ = 'w';
2763 }
52b15da3
JH		 2764 if (!(rex & REX_MODE64))
2765 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 2766 break;
2767 case 'S':
2768 if (intel_syntax)
2769 break;
252b5132
RH		 2770 if (sizeflag & SUFFIX_ALWAYS)
2771 {
52b15da3
JH		 2772 if (rex & REX_MODE64)
2773 *obufp++ = 'q';
252b5132 2774 else
52b15da3
JH		 2775 {
2776 if (sizeflag & DFLAG)
2777 *obufp++ = 'l';
2778 else
2779 *obufp++ = 'w';
2780 used_prefixes |= (prefixes & PREFIX_DATA);
2781 }
252b5132 2782 }
252b5132 2783 break;
041bd2e0
JH		 2784 case 'X':
2785 if (prefixes & PREFIX_DATA)
2786 *obufp++ = 'd';
2787 else
2788 *obufp++ = 's';
2789 used_prefixes |= (prefixes & PREFIX_DATA);
2790 break;
76f227a5
JH		 2791 case 'Y':
2792 if (intel_syntax)
2793 break;
2794 if (rex & REX_MODE64)
2795 {
2796 USED_REX (REX_MODE64);
2797 *obufp++ = 'q';
2798 }
2799 break;
52b15da3 2800 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
252b5132 2801 case 'W':
252b5132 2802 /* operand size flag for cwtl, cbtw */
52b15da3
JH		 2803 USED_REX (0);
2804 if (rex)
2805 *obufp++ = 'l';
2806 else if (sizeflag & DFLAG)
252b5132
RH		 2807 *obufp++ = 'w';
2808 else
2809 *obufp++ = 'b';
c608c12e
AM		 2810 if (intel_syntax)
2811 {
52b15da3
JH		 2812 if (rex)
2813 {
2814 *obufp++ = 'q';
2815 *obufp++ = 'e';
2816 }
c608c12e
AM		 2817 if (sizeflag & DFLAG)
2818 {
2819 *obufp++ = 'd';
2820 *obufp++ = 'e';
2821 }
2822 else
2823 {
2824 *obufp++ = 'w';
2825 }
2826 }
52b15da3
JH		 2827 if (!rex)
2828 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 2829 break;
2830 }
2831 }
2832 *obufp = 0;
6439fc28 2833 return 0;
252b5132
RH		 2834}
2835
2836static void
2837oappend (s)
2da11e11 2838 const char *s;
252b5132
RH		 2839{
2840 strcpy (obufp, s);
2841 obufp += strlen (s);
2842}
2843
2844static void
2845append_seg ()
2846{
2847 if (prefixes & PREFIX_CS)
7d421014 2848 {
7d421014 2849 used_prefixes |= PREFIX_CS;
d708bcba 2850 oappend ("%cs:" + intel_syntax);
7d421014 2851 }
252b5132 2852 if (prefixes & PREFIX_DS)
7d421014 2853 {
7d421014 2854 used_prefixes |= PREFIX_DS;
d708bcba 2855 oappend ("%ds:" + intel_syntax);
7d421014 2856 }
252b5132 2857 if (prefixes & PREFIX_SS)
7d421014 2858 {
7d421014 2859 used_prefixes |= PREFIX_SS;
d708bcba 2860 oappend ("%ss:" + intel_syntax);
7d421014 2861 }
252b5132 2862 if (prefixes & PREFIX_ES)
7d421014 2863 {
7d421014 2864 used_prefixes |= PREFIX_ES;
d708bcba 2865 oappend ("%es:" + intel_syntax);
7d421014 2866 }
252b5132 2867 if (prefixes & PREFIX_FS)
7d421014 2868 {
7d421014 2869 used_prefixes |= PREFIX_FS;
d708bcba 2870 oappend ("%fs:" + intel_syntax);
7d421014 2871 }
252b5132 2872 if (prefixes & PREFIX_GS)
7d421014 2873 {
7d421014 2874 used_prefixes |= PREFIX_GS;
d708bcba 2875 oappend ("%gs:" + intel_syntax);
7d421014 2876 }
252b5132
RH		 2877}
2878
2879static void
2880OP_indirE (bytemode, sizeflag)
2881 int bytemode;
2882 int sizeflag;
2883{
2884 if (!intel_syntax)
2885 oappend ("*");
2886 OP_E (bytemode, sizeflag);
2887}
2888
52b15da3
JH		 2889static void
2890print_operand_value (buf, hex, disp)
2891 char *buf;
2892 int hex;
2893 bfd_vma disp;
2894{
2895 if (mode_64bit)
2896 {
2897 if (hex)
2898 {
2899 char tmp[30];
2900 int i;
2901 buf[0] = '0';
2902 buf[1] = 'x';
2903 sprintf_vma (tmp, disp);
6608db57 2904 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
52b15da3
JH		 2905 strcpy (buf + 2, tmp + i);
2906 }
2907 else
2908 {
2909 bfd_signed_vma v = disp;
2910 char tmp[30];
2911 int i;
2912 if (v < 0)
2913 {
2914 *(buf++) = '-';
2915 v = -disp;
6608db57 2916 /* Check for possible overflow on 0x8000000000000000. */
52b15da3
JH		 2917 if (v < 0)
2918 {
2919 strcpy (buf, "9223372036854775808");
2920 return;
2921 }
2922 }
2923 if (!v)
2924 {
2925 strcpy (buf, "0");
2926 return;
2927 }
2928
2929 i = 0;
2930 tmp[29] = 0;
2931 while (v)
2932 {
6608db57 2933 tmp[28 - i] = (v % 10) + '0';
52b15da3
JH		 2934 v /= 10;
2935 i++;
2936 }
2937 strcpy (buf, tmp + 29 - i);
2938 }
2939 }
2940 else
2941 {
2942 if (hex)
2943 sprintf (buf, "0x%x", (unsigned int) disp);
2944 else
2945 sprintf (buf, "%d", (int) disp);
2946 }
2947}
2948
252b5132
RH		 2949static void
2950OP_E (bytemode, sizeflag)
2951 int bytemode;
2952 int sizeflag;
2953{
52b15da3
JH		 2954 bfd_vma disp;
2955 int add = 0;
2956 int riprel = 0;
2957 USED_REX (REX_EXTZ);
2958 if (rex & REX_EXTZ)
2959 add += 8;
252b5132 2960
6608db57 2961 /* Skip mod/rm byte. */
4bba6815 2962 MODRM_CHECK;
252b5132
RH		 2963 codep++;
2964
2965 if (mod == 3)
2966 {
2967 switch (bytemode)
2968 {
2969 case b_mode:
52b15da3
JH		 2970 USED_REX (0);
2971 if (rex)
2972 oappend (names8rex[rm + add]);
2973 else
2974 oappend (names8[rm + add]);
252b5132
RH		 2975 break;
2976 case w_mode:
52b15da3 2977 oappend (names16[rm + add]);
252b5132 2978 break;
2da11e11 2979 case d_mode:
52b15da3
JH		 2980 oappend (names32[rm + add]);
2981 break;
2982 case q_mode:
2983 oappend (names64[rm + add]);
2984 break;
2985 case m_mode:
2986 if (mode_64bit)
2987 oappend (names64[rm + add]);
2988 else
2989 oappend (names32[rm + add]);
2da11e11 2990 break;
252b5132 2991 case v_mode:
52b15da3
JH		 2992 USED_REX (REX_MODE64);
2993 if (rex & REX_MODE64)
2994 oappend (names64[rm + add]);
2995 else if (sizeflag & DFLAG)
2996 oappend (names32[rm + add]);
252b5132 2997 else
52b15da3 2998 oappend (names16[rm + add]);
7d421014 2999 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 3000 break;
2da11e11 3001 case 0:
6608db57 3002 if (!(codep[-2] == 0xAE && codep[-1] == 0xF8 /* sfence */)
041bd2e0
JH		 3003 && !(codep[-2] == 0xAE && codep[-1] == 0xF0 /* mfence */)
3004 && !(codep[-2] == 0xAE && codep[-1] == 0xe8 /* lfence */))
6608db57 3005 BadOp (); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */
c608c12e 3006 break;
252b5132 3007 default:
c608c12e 3008 oappend (INTERNAL_DISASSEMBLER_ERROR);
252b5132
RH		 3009 break;
3010 }
3011 return;
3012 }
3013
3014 disp = 0;
3015 append_seg ();
3016
3017 if (sizeflag & AFLAG) /* 32 bit address mode */
3018 {
3019 int havesib;
3020 int havebase;
3021 int base;
3022 int index = 0;
3023 int scale = 0;
3024
3025 havesib = 0;
3026 havebase = 1;
3027 base = rm;
3028
3029 if (base == 4)
3030 {
3031 havesib = 1;
3032 FETCH_DATA (the_info, codep + 1);
3033 scale = (*codep >> 6) & 3;
3034 index = (*codep >> 3) & 7;
3035 base = *codep & 7;
52b15da3
JH		 3036 USED_REX (REX_EXTY);
3037 USED_REX (REX_EXTZ);
3038 if (rex & REX_EXTY)
3039 index += 8;
3040 if (rex & REX_EXTZ)
3041 base += 8;
252b5132
RH		 3042 codep++;
3043 }
3044
3045 switch (mod)
3046 {
3047 case 0:
52b15da3 3048 if ((base & 7) == 5)
252b5132
RH		 3049 {
3050 havebase = 0;
52b15da3
JH		 3051 if (mode_64bit && !havesib)
3052 riprel = 1;
3053 disp = get32s ();
252b5132
RH		 3054 }
3055 break;
3056 case 1:
3057 FETCH_DATA (the_info, codep + 1);
3058 disp = *codep++;
3059 if ((disp & 0x80) != 0)
3060 disp -= 0x100;
3061 break;
3062 case 2:
52b15da3 3063 disp = get32s ();
252b5132
RH		 3064 break;
3065 }
3066
3067 if (!intel_syntax)
52b15da3 3068 if (mod != 0 || (base & 7) == 5)
252b5132 3069 {
52b15da3 3070 print_operand_value (scratchbuf, !riprel, disp);
252b5132 3071 oappend (scratchbuf);
52b15da3
JH		 3072 if (riprel)
3073 {
3074 set_op (disp, 1);
3075 oappend ("(%rip)");
3076 }
252b5132 3077 }
2da11e11 3078
252b5132
RH		 3079 if (havebase || (havesib && (index != 4 || scale != 0)))
3080 {
3081 if (intel_syntax)
3082 {
3083 switch (bytemode)
3084 {
3085 case b_mode:
52b15da3 3086 oappend ("BYTE PTR ");
252b5132
RH		 3087 break;
3088 case w_mode:
52b15da3 3089 oappend ("WORD PTR ");
252b5132
RH		 3090 break;
3091 case v_mode:
52b15da3 3092 oappend ("DWORD PTR ");
252b5132
RH		 3093 break;
3094 case d_mode:
52b15da3 3095 oappend ("QWORD PTR ");
252b5132 3096 break;
52b15da3
JH		 3097 case m_mode:
3098 if (mode_64bit)
3099 oappend ("DWORD PTR ");
3100 else
3101 oappend ("QWORD PTR ");
3102 break;
252b5132 3103 case x_mode:
52b15da3 3104 oappend ("XWORD PTR ");
252b5132
RH		 3105 break;
3106 default:
3107 break;
3108 }
3109 }
3110 *obufp++ = open_char;
52b15da3
JH		 3111 if (intel_syntax && riprel)
3112 oappend ("rip + ");
252b5132 3113 *obufp = '\0';
52b15da3
JH		 3114 USED_REX (REX_EXTZ);
3115 if (!havesib && (rex & REX_EXTZ))
3116 base += 8;
252b5132 3117 if (havebase)
52b15da3 3118 oappend (mode_64bit ? names64[base] : names32[base]);
252b5132
RH		 3119 if (havesib)
3120 {
3121 if (index != 4)
3122 {
3123 if (intel_syntax)
3124 {
3125 if (havebase)
3126 {
3127 *obufp++ = separator_char;
3128 *obufp = '\0';
3129 }
d708bcba
AM		 3130 sprintf (scratchbuf, "%s",
3131 mode_64bit ? names64[index] : names32[index]);
252b5132
RH		 3132 }
3133 else
d708bcba
AM		 3134 sprintf (scratchbuf, ",%s",
3135 mode_64bit ? names64[index] : names32[index]);
252b5132
RH		 3136 oappend (scratchbuf);
3137 }
3138 if (!intel_syntax
2da11e11 3139 || (intel_syntax
252b5132
RH		 3140 && bytemode != b_mode
3141 && bytemode != w_mode
3142 && bytemode != v_mode))
3143 {
3144 *obufp++ = scale_char;
3145 *obufp = '\0';
3146 sprintf (scratchbuf, "%d", 1 << scale);
3147 oappend (scratchbuf);
3148 }
3149 }
3150 if (intel_syntax)
52b15da3 3151 if (mod != 0 || (base & 7) == 5)
252b5132 3152 {
6608db57 3153 /* Don't print zero displacements. */
52b15da3 3154 if (disp != 0)
252b5132 3155 {
d708bcba
AM		 3156 if ((bfd_signed_vma) disp > 0)
3157 {
3158 *obufp++ = '+';
3159 *obufp = '\0';
3160 }
3161
52b15da3 3162 print_operand_value (scratchbuf, 0, disp);
252b5132
RH		 3163 oappend (scratchbuf);
3164 }
3165 }
3166
3167 *obufp++ = close_char;
3168 *obufp = '\0';
3169 }
3170 else if (intel_syntax)
3171 {
52b15da3 3172 if (mod != 0 || (base & 7) == 5)
252b5132
RH		 3173 {
3174 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3175 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3176 ;
3177 else
3178 {
d708bcba 3179 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 3180 oappend (":");
3181 }
52b15da3 3182 print_operand_value (scratchbuf, 1, disp);
252b5132
RH		 3183 oappend (scratchbuf);
3184 }
3185 }
3186 }
3187 else
3188 { /* 16 bit address mode */
3189 switch (mod)
3190 {
3191 case 0:
52b15da3 3192 if ((rm & 7) == 6)
252b5132
RH		 3193 {
3194 disp = get16 ();
3195 if ((disp & 0x8000) != 0)
3196 disp -= 0x10000;
3197 }
3198 break;
3199 case 1:
3200 FETCH_DATA (the_info, codep + 1);
3201 disp = *codep++;
3202 if ((disp & 0x80) != 0)
3203 disp -= 0x100;
3204 break;
3205 case 2:
3206 disp = get16 ();
3207 if ((disp & 0x8000) != 0)
3208 disp -= 0x10000;
3209 break;
3210 }
3211
3212 if (!intel_syntax)
52b15da3 3213 if (mod != 0 || (rm & 7) == 6)
252b5132 3214 {
52b15da3 3215 print_operand_value (scratchbuf, 0, disp);
252b5132
RH		 3216 oappend (scratchbuf);
3217 }
3218
52b15da3 3219 if (mod != 0 || (rm & 7) != 6)
252b5132
RH		 3220 {
3221 *obufp++ = open_char;
3222 *obufp = '\0';
52b15da3 3223 oappend (index16[rm + add]);
252b5132
RH		 3224 *obufp++ = close_char;
3225 *obufp = '\0';
3226 }
3227 }
3228}
3229
252b5132
RH		 3230static void
3231OP_G (bytemode, sizeflag)
3232 int bytemode;
3233 int sizeflag;
3234{
52b15da3
JH		 3235 int add = 0;
3236 USED_REX (REX_EXTX);
3237 if (rex & REX_EXTX)
3238 add += 8;
252b5132
RH		 3239 switch (bytemode)
3240 {
3241 case b_mode:
52b15da3
JH		 3242 USED_REX (0);
3243 if (rex)
3244 oappend (names8rex[reg + add]);
3245 else
3246 oappend (names8[reg + add]);
252b5132
RH		 3247 break;
3248 case w_mode:
52b15da3 3249 oappend (names16[reg + add]);
252b5132
RH		 3250 break;
3251 case d_mode:
52b15da3
JH		 3252 oappend (names32[reg + add]);
3253 break;
3254 case q_mode:
3255 oappend (names64[reg + add]);
252b5132
RH		 3256 break;
3257 case v_mode:
52b15da3
JH		 3258 USED_REX (REX_MODE64);
3259 if (rex & REX_MODE64)
3260 oappend (names64[reg + add]);
3261 else if (sizeflag & DFLAG)
3262 oappend (names32[reg + add]);
252b5132 3263 else
52b15da3 3264 oappend (names16[reg + add]);
7d421014 3265 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3266 break;
3267 default:
3268 oappend (INTERNAL_DISASSEMBLER_ERROR);
3269 break;
3270 }
3271}
3272
52b15da3
JH		 3273static bfd_vma
3274get64 ()
3275{
5dd0794d 3276 bfd_vma x;
52b15da3 3277#ifdef BFD64
5dd0794d
AM		 3278 unsigned int a;
3279 unsigned int b;
3280
52b15da3
JH		 3281 FETCH_DATA (the_info, codep + 8);
3282 a = *codep++ & 0xff;
3283 a |= (*codep++ & 0xff) << 8;
3284 a |= (*codep++ & 0xff) << 16;
3285 a |= (*codep++ & 0xff) << 24;
5dd0794d 3286 b = *codep++ & 0xff;
52b15da3
JH		 3287 b |= (*codep++ & 0xff) << 8;
3288 b |= (*codep++ & 0xff) << 16;
3289 b |= (*codep++ & 0xff) << 24;
3290 x = a + ((bfd_vma) b << 32);
3291#else
6608db57 3292 abort ();
5dd0794d 3293 x = 0;
52b15da3
JH		 3294#endif
3295 return x;
3296}
3297
3298static bfd_signed_vma
252b5132
RH		 3299get32 ()
3300{
52b15da3 3301 bfd_signed_vma x = 0;
252b5132
RH		 3302
3303 FETCH_DATA (the_info, codep + 4);
52b15da3
JH		 3304 x = *codep++ & (bfd_signed_vma) 0xff;
3305 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3306 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3307 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3308 return x;
3309}
3310
3311static bfd_signed_vma
3312get32s ()
3313{
3314 bfd_signed_vma x = 0;
3315
3316 FETCH_DATA (the_info, codep + 4);
3317 x = *codep++ & (bfd_signed_vma) 0xff;
3318 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3319 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3320 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3321
3322 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3323
252b5132
RH		 3324 return x;
3325}
3326
3327static int
3328get16 ()
3329{
3330 int x = 0;
3331
3332 FETCH_DATA (the_info, codep + 2);
3333 x = *codep++ & 0xff;
3334 x |= (*codep++ & 0xff) << 8;
3335 return x;
3336}
3337
3338static void
52b15da3 3339set_op (op, riprel)
7081ff04 3340 bfd_vma op;
52b15da3 3341 int riprel;
252b5132
RH		 3342{
3343 op_index[op_ad] = op_ad;
7081ff04
AJ		 3344 if (mode_64bit)
3345 {
3346 op_address[op_ad] = op;
3347 op_riprel[op_ad] = riprel;
3348 }
3349 else
3350 {
3351 /* Mask to get a 32-bit address. */
3352 op_address[op_ad] = op & 0xffffffff;
3353 op_riprel[op_ad] = riprel & 0xffffffff;
3354 }
252b5132
RH		 3355}
3356
3357static void
3358OP_REG (code, sizeflag)
3359 int code;
3360 int sizeflag;
3361{
2da11e11 3362 const char *s;
52b15da3
JH		 3363 int add = 0;
3364 USED_REX (REX_EXTZ);
3365 if (rex & REX_EXTZ)
3366 add = 8;
3367
3368 switch (code)
3369 {
3370 case indir_dx_reg:
d708bcba
AM		 3371 if (intel_syntax)
3372 s = "[dx]";
3373 else
3374 s = "(%dx)";
52b15da3
JH		 3375 break;
3376 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3377 case sp_reg: case bp_reg: case si_reg: case di_reg:
3378 s = names16[code - ax_reg + add];
3379 break;
3380 case es_reg: case ss_reg: case cs_reg:
3381 case ds_reg: case fs_reg: case gs_reg:
3382 s = names_seg[code - es_reg + add];
3383 break;
3384 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3385 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3386 USED_REX (0);
3387 if (rex)
3388 s = names8rex[code - al_reg + add];
3389 else
3390 s = names8[code - al_reg];
3391 break;
6439fc28
AM		 3392 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3393 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
3394 if (mode_64bit)
3395 {
3396 s = names64[code - rAX_reg + add];
3397 break;
3398 }
3399 code += eAX_reg - rAX_reg;
6608db57 3400 /* Fall through. */
52b15da3
JH		 3401 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3402 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3403 USED_REX (REX_MODE64);
3404 if (rex & REX_MODE64)
3405 s = names64[code - eAX_reg + add];
3406 else if (sizeflag & DFLAG)
3407 s = names32[code - eAX_reg + add];
3408 else
3409 s = names16[code - eAX_reg + add];
3410 used_prefixes |= (prefixes & PREFIX_DATA);
3411 break;
52b15da3
JH		 3412 default:
3413 s = INTERNAL_DISASSEMBLER_ERROR;
3414 break;
3415 }
3416 oappend (s);
3417}
3418
3419static void
3420OP_IMREG (code, sizeflag)
3421 int code;
3422 int sizeflag;
3423{
3424 const char *s;
252b5132
RH		 3425
3426 switch (code)
3427 {
3428 case indir_dx_reg:
d708bcba
AM		 3429 if (intel_syntax)
3430 s = "[dx]";
3431 else
3432 s = "(%dx)";
252b5132
RH		 3433 break;
3434 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3435 case sp_reg: case bp_reg: case si_reg: case di_reg:
3436 s = names16[code - ax_reg];
3437 break;
3438 case es_reg: case ss_reg: case cs_reg:
3439 case ds_reg: case fs_reg: case gs_reg:
3440 s = names_seg[code - es_reg];
3441 break;
3442 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3443 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
52b15da3
JH		 3444 USED_REX (0);
3445 if (rex)
3446 s = names8rex[code - al_reg];
3447 else
3448 s = names8[code - al_reg];
252b5132
RH		 3449 break;
3450 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3451 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
52b15da3
JH		 3452 USED_REX (REX_MODE64);
3453 if (rex & REX_MODE64)
3454 s = names64[code - eAX_reg];
3455 else if (sizeflag & DFLAG)
252b5132
RH		 3456 s = names32[code - eAX_reg];
3457 else
3458 s = names16[code - eAX_reg];
7d421014 3459 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3460 break;
3461 default:
3462 s = INTERNAL_DISASSEMBLER_ERROR;
3463 break;
3464 }
3465 oappend (s);
3466}
3467
3468static void
3469OP_I (bytemode, sizeflag)
3470 int bytemode;
3471 int sizeflag;
3472{
52b15da3
JH		 3473 bfd_signed_vma op;
3474 bfd_signed_vma mask = -1;
252b5132
RH		 3475
3476 switch (bytemode)
3477 {
3478 case b_mode:
3479 FETCH_DATA (the_info, codep + 1);
52b15da3
JH		 3480 op = *codep++;
3481 mask = 0xff;
3482 break;
3483 case q_mode:
6439fc28
AM		 3484 if (mode_64bit)
3485 {
3486 op = get32s ();
3487 break;
3488 }
6608db57 3489 /* Fall through. */
252b5132 3490 case v_mode:
52b15da3
JH		 3491 USED_REX (REX_MODE64);
3492 if (rex & REX_MODE64)
3493 op = get32s ();
3494 else if (sizeflag & DFLAG)
3495 {
3496 op = get32 ();
3497 mask = 0xffffffff;
3498 }
252b5132 3499 else
52b15da3
JH		 3500 {
3501 op = get16 ();
3502 mask = 0xfffff;
3503 }
7d421014 3504 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3505 break;
3506 case w_mode:
52b15da3 3507 mask = 0xfffff;
252b5132
RH		 3508 op = get16 ();
3509 break;
3510 default:
3511 oappend (INTERNAL_DISASSEMBLER_ERROR);
3512 return;
3513 }
3514
52b15da3
JH		 3515 op &= mask;
3516 scratchbuf[0] = '$';
d708bcba
AM		 3517 print_operand_value (scratchbuf + 1, 1, op);
3518 oappend (scratchbuf + intel_syntax);
52b15da3
JH		 3519 scratchbuf[0] = '\0';
3520}
3521
3522static void
3523OP_I64 (bytemode, sizeflag)
3524 int bytemode;
3525 int sizeflag;
3526{
3527 bfd_signed_vma op;
3528 bfd_signed_vma mask = -1;
3529
6439fc28
AM		 3530 if (!mode_64bit)
3531 {
3532 OP_I (bytemode, sizeflag);
3533 return;
3534 }
3535
52b15da3
JH		 3536 switch (bytemode)
3537 {
3538 case b_mode:
3539 FETCH_DATA (the_info, codep + 1);
3540 op = *codep++;
3541 mask = 0xff;
3542 break;
3543 case v_mode:
3544 USED_REX (REX_MODE64);
3545 if (rex & REX_MODE64)
3546 op = get64 ();
3547 else if (sizeflag & DFLAG)
3548 {
3549 op = get32 ();
3550 mask = 0xffffffff;
3551 }
3552 else
3553 {
3554 op = get16 ();
3555 mask = 0xfffff;
3556 }
3557 used_prefixes |= (prefixes & PREFIX_DATA);
3558 break;
3559 case w_mode:
3560 mask = 0xfffff;
3561 op = get16 ();
3562 break;
3563 default:
3564 oappend (INTERNAL_DISASSEMBLER_ERROR);
3565 return;
3566 }
3567
3568 op &= mask;
3569 scratchbuf[0] = '$';
d708bcba
AM		 3570 print_operand_value (scratchbuf + 1, 1, op);
3571 oappend (scratchbuf + intel_syntax);
252b5132
RH		 3572 scratchbuf[0] = '\0';
3573}
3574
3575static void
3576OP_sI (bytemode, sizeflag)
3577 int bytemode;
3578 int sizeflag;
3579{
52b15da3
JH		 3580 bfd_signed_vma op;
3581 bfd_signed_vma mask = -1;
252b5132
RH		 3582
3583 switch (bytemode)
3584 {
3585 case b_mode:
3586 FETCH_DATA (the_info, codep + 1);
3587 op = *codep++;
3588 if ((op & 0x80) != 0)
3589 op -= 0x100;
52b15da3 3590 mask = 0xffffffff;
252b5132
RH		 3591 break;
3592 case v_mode:
52b15da3
JH		 3593 USED_REX (REX_MODE64);
3594 if (rex & REX_MODE64)
3595 op = get32s ();
3596 else if (sizeflag & DFLAG)
3597 {
3598 op = get32s ();
3599 mask = 0xffffffff;
3600 }
252b5132
RH		 3601 else
3602 {
52b15da3 3603 mask = 0xffffffff;
6608db57 3604 op = get16 ();
252b5132
RH		 3605 if ((op & 0x8000) != 0)
3606 op -= 0x10000;
3607 }
7d421014 3608 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3609 break;
3610 case w_mode:
3611 op = get16 ();
52b15da3 3612 mask = 0xffffffff;
252b5132
RH		 3613 if ((op & 0x8000) != 0)
3614 op -= 0x10000;
3615 break;
3616 default:
3617 oappend (INTERNAL_DISASSEMBLER_ERROR);
3618 return;
3619 }
52b15da3
JH		 3620
3621 scratchbuf[0] = '$';
3622 print_operand_value (scratchbuf + 1, 1, op);
d708bcba 3623 oappend (scratchbuf + intel_syntax);
252b5132
RH		 3624}
3625
3626static void
3627OP_J (bytemode, sizeflag)
3628 int bytemode;
3629 int sizeflag;
3630{
52b15da3 3631 bfd_vma disp;
7081ff04 3632 bfd_vma mask = -1;
252b5132
RH		 3633
3634 switch (bytemode)
3635 {
3636 case b_mode:
3637 FETCH_DATA (the_info, codep + 1);
3638 disp = *codep++;
3639 if ((disp & 0x80) != 0)
3640 disp -= 0x100;
3641 break;
3642 case v_mode:
3643 if (sizeflag & DFLAG)
52b15da3 3644 disp = get32s ();
252b5132
RH		 3645 else
3646 {
3647 disp = get16 ();
6608db57 3648 /* For some reason, a data16 prefix on a jump instruction
252b5132
RH		 3649 means that the pc is masked to 16 bits after the
3650 displacement is added! */
3651 mask = 0xffff;
3652 }
3653 break;
3654 default:
3655 oappend (INTERNAL_DISASSEMBLER_ERROR);
3656 return;
3657 }
3658 disp = (start_pc + codep - start_codep + disp) & mask;
52b15da3
JH		 3659 set_op (disp, 0);
3660 print_operand_value (scratchbuf, 1, disp);
252b5132
RH		 3661 oappend (scratchbuf);
3662}
3663
252b5132
RH		 3664static void
3665OP_SEG (dummy, sizeflag)
57d91c3c
ILT		 3666 int dummy ATTRIBUTE_UNUSED;
3667 int sizeflag ATTRIBUTE_UNUSED;
252b5132 3668{
d708bcba 3669 oappend (names_seg[reg]);
252b5132
RH		 3670}
3671
3672static void
c608c12e 3673OP_DIR (dummy, sizeflag)
57d91c3c 3674 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 3675 int sizeflag;
3676{
3677 int seg, offset;
3678
c608c12e 3679 if (sizeflag & DFLAG)
252b5132 3680 {
c608c12e
AM		 3681 offset = get32 ();
3682 seg = get16 ();
252b5132 3683 }
c608c12e
AM		 3684 else
3685 {
3686 offset = get16 ();
3687 seg = get16 ();
3688 }
7d421014 3689 used_prefixes |= (prefixes & PREFIX_DATA);
d708bcba
AM		 3690 if (intel_syntax)
3691 sprintf (scratchbuf, "0x%x,0x%x", seg, offset);
3692 else
3693 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
c608c12e 3694 oappend (scratchbuf);
252b5132
RH		 3695}
3696
252b5132 3697static void
6439fc28
AM		 3698OP_OFF (bytemode, sizeflag)
3699 int bytemode ATTRIBUTE_UNUSED;
252b5132
RH		 3700 int sizeflag;
3701{
52b15da3 3702 bfd_vma off;
252b5132
RH		 3703
3704 append_seg ();
3705
3706 if (sizeflag & AFLAG)
3707 off = get32 ();
3708 else
3709 off = get16 ();
3710
3711 if (intel_syntax)
3712 {
3713 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3714 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3715 {
d708bcba 3716 oappend (names_seg[ds_reg - es_reg]);
252b5132
RH		 3717 oappend (":");
3718 }
3719 }
52b15da3
JH		 3720 print_operand_value (scratchbuf, 1, off);
3721 oappend (scratchbuf);
3722}
6439fc28 3723
52b15da3 3724static void
6439fc28
AM		 3725OP_OFF64 (bytemode, sizeflag)
3726 int bytemode ATTRIBUTE_UNUSED;
52b15da3
JH		 3727 int sizeflag ATTRIBUTE_UNUSED;
3728{
3729 bfd_vma off;
3730
6439fc28
AM		 3731 if (!mode_64bit)
3732 {
3733 OP_OFF (bytemode, sizeflag);
3734 return;
3735 }
3736
52b15da3
JH		 3737 append_seg ();
3738
6608db57 3739 off = get64 ();
52b15da3
JH		 3740
3741 if (intel_syntax)
3742 {
3743 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3744 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3745 {
d708bcba 3746 oappend (names_seg[ds_reg - es_reg]);
52b15da3
JH		 3747 oappend (":");
3748 }
3749 }
3750 print_operand_value (scratchbuf, 1, off);
252b5132
RH		 3751 oappend (scratchbuf);
3752}
3753
3754static void
3755ptr_reg (code, sizeflag)
3756 int code;
3757 int sizeflag;
3758{
2da11e11 3759 const char *s;
6608db57 3760 if (intel_syntax)
d708bcba
AM		 3761 oappend ("[");
3762 else
3763 oappend ("(");
3764
52b15da3
JH		 3765 USED_REX (REX_MODE64);
3766 if (rex & REX_MODE64)
3767 s = names64[code - eAX_reg];
3768 else if (sizeflag & AFLAG)
252b5132
RH		 3769 s = names32[code - eAX_reg];
3770 else
3771 s = names16[code - eAX_reg];
3772 oappend (s);
6608db57 3773 if (intel_syntax)
d708bcba
AM		 3774 oappend ("]");
3775 else
3776 oappend (")");
252b5132
RH		 3777}
3778
3779static void
3780OP_ESreg (code, sizeflag)
3781 int code;
3782 int sizeflag;
3783{
d708bcba 3784 oappend ("%es:" + intel_syntax);
252b5132
RH		 3785 ptr_reg (code, sizeflag);
3786}
3787
3788static void
3789OP_DSreg (code, sizeflag)
3790 int code;
3791 int sizeflag;
3792{
3793 if ((prefixes
3794 & (PREFIX_CS
3795 | PREFIX_DS
3796 | PREFIX_SS
3797 | PREFIX_ES
3798 | PREFIX_FS
3799 | PREFIX_GS)) == 0)
3800 prefixes |= PREFIX_DS;
6608db57 3801 append_seg ();
252b5132
RH		 3802 ptr_reg (code, sizeflag);
3803}
3804
252b5132
RH		 3805static void
3806OP_C (dummy, sizeflag)
57d91c3c
ILT		 3807 int dummy ATTRIBUTE_UNUSED;
3808 int sizeflag ATTRIBUTE_UNUSED;
252b5132 3809{
52b15da3
JH		 3810 int add = 0;
3811 USED_REX (REX_EXTX);
3812 if (rex & REX_EXTX)
3813 add = 8;
d708bcba
AM		 3814 sprintf (scratchbuf, "%%cr%d", reg + add);
3815 oappend (scratchbuf + intel_syntax);
252b5132
RH		 3816}
3817
252b5132
RH		 3818static void
3819OP_D (dummy, sizeflag)
57d91c3c
ILT		 3820 int dummy ATTRIBUTE_UNUSED;
3821 int sizeflag ATTRIBUTE_UNUSED;
252b5132 3822{
52b15da3
JH		 3823 int add = 0;
3824 USED_REX (REX_EXTX);
3825 if (rex & REX_EXTX)
3826 add = 8;
d708bcba 3827 if (intel_syntax)
6608db57 3828 sprintf (scratchbuf, "db%d", reg + add);
d708bcba 3829 else
6608db57 3830 sprintf (scratchbuf, "%%db%d", reg + add);
252b5132
RH		 3831 oappend (scratchbuf);
3832}
3833
252b5132
RH		 3834static void
3835OP_T (dummy, sizeflag)
57d91c3c
ILT		 3836 int dummy ATTRIBUTE_UNUSED;
3837 int sizeflag ATTRIBUTE_UNUSED;
252b5132 3838{
252b5132 3839 sprintf (scratchbuf, "%%tr%d", reg);
d708bcba 3840 oappend (scratchbuf + intel_syntax);
252b5132
RH		 3841}
3842
3843static void
2da11e11 3844OP_Rd (bytemode, sizeflag)
252b5132
RH		 3845 int bytemode;
3846 int sizeflag;
3847{
2da11e11
AM		 3848 if (mod == 3)
3849 OP_E (bytemode, sizeflag);
3850 else
6608db57 3851 BadOp ();
252b5132
RH		 3852}
3853
3854static void
6439fc28
AM		 3855OP_MMX (bytemode, sizeflag)
3856 int bytemode ATTRIBUTE_UNUSED;
57d91c3c 3857 int sizeflag ATTRIBUTE_UNUSED;
252b5132 3858{
041bd2e0
JH		 3859 int add = 0;
3860 USED_REX (REX_EXTX);
3861 if (rex & REX_EXTX)
3862 add = 8;
3863 used_prefixes |= (prefixes & PREFIX_DATA);
3864 if (prefixes & PREFIX_DATA)
3865 sprintf (scratchbuf, "%%xmm%d", reg + add);
3866 else
3867 sprintf (scratchbuf, "%%mm%d", reg + add);
d708bcba 3868 oappend (scratchbuf + intel_syntax);
252b5132
RH		 3869}
3870
c608c12e
AM		 3871static void
3872OP_XMM (bytemode, sizeflag)
57d91c3c
ILT		 3873 int bytemode ATTRIBUTE_UNUSED;
3874 int sizeflag ATTRIBUTE_UNUSED;
c608c12e 3875{
041bd2e0
JH		 3876 int add = 0;
3877 USED_REX (REX_EXTX);
3878 if (rex & REX_EXTX)
3879 add = 8;
3880 sprintf (scratchbuf, "%%xmm%d", reg + add);
d708bcba 3881 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 3882}
3883
252b5132
RH		 3884static void
3885OP_EM (bytemode, sizeflag)
3886 int bytemode;
3887 int sizeflag;
3888{
041bd2e0 3889 int add = 0;
252b5132
RH		 3890 if (mod != 3)
3891 {
3892 OP_E (bytemode, sizeflag);
3893 return;
3894 }
041bd2e0
JH		 3895 USED_REX (REX_EXTZ);
3896 if (rex & REX_EXTZ)
3897 add = 8;
252b5132 3898
6608db57 3899 /* Skip mod/rm byte. */
4bba6815 3900 MODRM_CHECK;
252b5132 3901 codep++;
041bd2e0
JH		 3902 used_prefixes |= (prefixes & PREFIX_DATA);
3903 if (prefixes & PREFIX_DATA)
3904 sprintf (scratchbuf, "%%xmm%d", rm + add);
3905 else
3906 sprintf (scratchbuf, "%%mm%d", rm + add);
d708bcba 3907 oappend (scratchbuf + intel_syntax);
252b5132
RH		 3908}
3909
c608c12e
AM		 3910static void
3911OP_EX (bytemode, sizeflag)
3912 int bytemode;
3913 int sizeflag;
3914{
041bd2e0 3915 int add = 0;
c608c12e
AM		 3916 if (mod != 3)
3917 {
3918 OP_E (bytemode, sizeflag);
3919 return;
3920 }
041bd2e0
JH		 3921 USED_REX (REX_EXTZ);
3922 if (rex & REX_EXTZ)
3923 add = 8;
c608c12e 3924
6608db57 3925 /* Skip mod/rm byte. */
4bba6815 3926 MODRM_CHECK;
c608c12e 3927 codep++;
041bd2e0 3928 sprintf (scratchbuf, "%%xmm%d", rm + add);
d708bcba 3929 oappend (scratchbuf + intel_syntax);
c608c12e
AM		 3930}
3931
252b5132 3932static void
2da11e11
AM		 3933OP_MS (bytemode, sizeflag)
3934 int bytemode;
252b5132
RH		 3935 int sizeflag;
3936{
2da11e11
AM		 3937 if (mod == 3)
3938 OP_EM (bytemode, sizeflag);
3939 else
6608db57 3940 BadOp ();
252b5132
RH		 3941}
3942
992aaec9
AM		 3943static void
3944OP_XS (bytemode, sizeflag)
3945 int bytemode;
3946 int sizeflag;
3947{
3948 if (mod == 3)
3949 OP_EX (bytemode, sizeflag);
3950 else
6608db57 3951 BadOp ();
992aaec9
AM		 3952}
3953
252b5132
RH		 3954static const char *Suffix3DNow[] = {
3955/* 00 */ NULL, NULL, NULL, NULL,
3956/* 04 */ NULL, NULL, NULL, NULL,
3957/* 08 */ NULL, NULL, NULL, NULL,
9e525108 3958/* 0C */ "pi2fw", "pi2fd", NULL, NULL,
252b5132
RH		 3959/* 10 */ NULL, NULL, NULL, NULL,
3960/* 14 */ NULL, NULL, NULL, NULL,
3961/* 18 */ NULL, NULL, NULL, NULL,
9e525108 3962/* 1C */ "pf2iw", "pf2id", NULL, NULL,
252b5132
RH		 3963/* 20 */ NULL, NULL, NULL, NULL,
3964/* 24 */ NULL, NULL, NULL, NULL,
3965/* 28 */ NULL, NULL, NULL, NULL,
3966/* 2C */ NULL, NULL, NULL, NULL,
3967/* 30 */ NULL, NULL, NULL, NULL,
3968/* 34 */ NULL, NULL, NULL, NULL,
3969/* 38 */ NULL, NULL, NULL, NULL,
3970/* 3C */ NULL, NULL, NULL, NULL,
3971/* 40 */ NULL, NULL, NULL, NULL,
3972/* 44 */ NULL, NULL, NULL, NULL,
3973/* 48 */ NULL, NULL, NULL, NULL,
3974/* 4C */ NULL, NULL, NULL, NULL,
3975/* 50 */ NULL, NULL, NULL, NULL,
3976/* 54 */ NULL, NULL, NULL, NULL,
3977/* 58 */ NULL, NULL, NULL, NULL,
3978/* 5C */ NULL, NULL, NULL, NULL,
3979/* 60 */ NULL, NULL, NULL, NULL,
3980/* 64 */ NULL, NULL, NULL, NULL,
3981/* 68 */ NULL, NULL, NULL, NULL,
3982/* 6C */ NULL, NULL, NULL, NULL,
3983/* 70 */ NULL, NULL, NULL, NULL,
3984/* 74 */ NULL, NULL, NULL, NULL,
3985/* 78 */ NULL, NULL, NULL, NULL,
3986/* 7C */ NULL, NULL, NULL, NULL,
3987/* 80 */ NULL, NULL, NULL, NULL,
3988/* 84 */ NULL, NULL, NULL, NULL,
9e525108
AM		 3989/* 88 */ NULL, NULL, "pfnacc", NULL,
3990/* 8C */ NULL, NULL, "pfpnacc", NULL,
252b5132
RH		 3991/* 90 */ "pfcmpge", NULL, NULL, NULL,
3992/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
3993/* 98 */ NULL, NULL, "pfsub", NULL,
3994/* 9C */ NULL, NULL, "pfadd", NULL,
3995/* A0 */ "pfcmpgt", NULL, NULL, NULL,
3996/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
3997/* A8 */ NULL, NULL, "pfsubr", NULL,
3998/* AC */ NULL, NULL, "pfacc", NULL,
3999/* B0 */ "pfcmpeq", NULL, NULL, NULL,
4000/* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
9e525108 4001/* B8 */ NULL, NULL, NULL, "pswapd",
252b5132
RH		 4002/* BC */ NULL, NULL, NULL, "pavgusb",
4003/* C0 */ NULL, NULL, NULL, NULL,
4004/* C4 */ NULL, NULL, NULL, NULL,
4005/* C8 */ NULL, NULL, NULL, NULL,
4006/* CC */ NULL, NULL, NULL, NULL,
4007/* D0 */ NULL, NULL, NULL, NULL,
4008/* D4 */ NULL, NULL, NULL, NULL,
4009/* D8 */ NULL, NULL, NULL, NULL,
4010/* DC */ NULL, NULL, NULL, NULL,
4011/* E0 */ NULL, NULL, NULL, NULL,
4012/* E4 */ NULL, NULL, NULL, NULL,
4013/* E8 */ NULL, NULL, NULL, NULL,
4014/* EC */ NULL, NULL, NULL, NULL,
4015/* F0 */ NULL, NULL, NULL, NULL,
4016/* F4 */ NULL, NULL, NULL, NULL,
4017/* F8 */ NULL, NULL, NULL, NULL,
4018/* FC */ NULL, NULL, NULL, NULL,
4019};
4020
4021static void
4022OP_3DNowSuffix (bytemode, sizeflag)
57d91c3c
ILT		 4023 int bytemode ATTRIBUTE_UNUSED;
4024 int sizeflag ATTRIBUTE_UNUSED;
252b5132
RH		 4025{
4026 const char *mnemonic;
4027
4028 FETCH_DATA (the_info, codep + 1);
4029 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4030 place where an 8-bit immediate would normally go. ie. the last
4031 byte of the instruction. */
6608db57 4032 obufp = obuf + strlen (obuf);
c608c12e 4033 mnemonic = Suffix3DNow[*codep++ & 0xff];
252b5132 4034 if (mnemonic)
2da11e11 4035 oappend (mnemonic);
252b5132
RH		 4036 else
4037 {
4038 /* Since a variable sized modrm/sib chunk is between the start
4039 of the opcode (0x0f0f) and the opcode suffix, we need to do
4040 all the modrm processing first, and don't know until now that
4041 we have a bad opcode. This necessitates some cleaning up. */
2da11e11
AM		 4042 op1out[0] = '\0';
4043 op2out[0] = '\0';
6608db57 4044 BadOp ();
252b5132
RH		 4045 }
4046}
c608c12e 4047
6608db57 4048static const char *simd_cmp_op[] = {
c608c12e
AM		 4049 "eq",
4050 "lt",
4051 "le",
4052 "unord",
4053 "neq",
4054 "nlt",
4055 "nle",
4056 "ord"
4057};
4058
4059static void
4060OP_SIMD_Suffix (bytemode, sizeflag)
57d91c3c
ILT		 4061 int bytemode ATTRIBUTE_UNUSED;
4062 int sizeflag ATTRIBUTE_UNUSED;
c608c12e
AM		 4063{
4064 unsigned int cmp_type;
4065
4066 FETCH_DATA (the_info, codep + 1);
6608db57 4067 obufp = obuf + strlen (obuf);
c608c12e
AM		 4068 cmp_type = *codep++ & 0xff;
4069 if (cmp_type < 8)
4070 {
041bd2e0
JH		 4071 char suffix1 = 'p', suffix2 = 's';
4072 used_prefixes |= (prefixes & PREFIX_REPZ);
4073 if (prefixes & PREFIX_REPZ)
4074 suffix1 = 's';
4075 else
4076 {
4077 used_prefixes |= (prefixes & PREFIX_DATA);
4078 if (prefixes & PREFIX_DATA)
4079 suffix2 = 'd';
4080 else
4081 {
4082 used_prefixes |= (prefixes & PREFIX_REPNZ);
4083 if (prefixes & PREFIX_REPNZ)
4084 suffix1 = 's', suffix2 = 'd';
4085 }
4086 }
4087 sprintf (scratchbuf, "cmp%s%c%c",
4088 simd_cmp_op[cmp_type], suffix1, suffix2);
7d421014 4089 used_prefixes |= (prefixes & PREFIX_REPZ);
2da11e11 4090 oappend (scratchbuf);
c608c12e
AM		 4091 }
4092 else
4093 {
4094 /* We have a bad extension byte. Clean up. */
2da11e11
AM		 4095 op1out[0] = '\0';
4096 op2out[0] = '\0';
6608db57 4097 BadOp ();
c608c12e
AM		 4098 }
4099}
4100
4101static void
4102SIMD_Fixup (extrachar, sizeflag)
4103 int extrachar;
57d91c3c 4104 int sizeflag ATTRIBUTE_UNUSED;
c608c12e
AM		 4105{
4106 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4107 forms of these instructions. */
4108 if (mod == 3)
4109 {
6608db57
KH		 4110 char *p = obuf + strlen (obuf);
4111 *(p + 1) = '\0';
4112 *p = *(p - 1);
4113 *(p - 1) = *(p - 2);
4114 *(p - 2) = *(p - 3);
4115 *(p - 3) = extrachar;
c608c12e
AM		 4116 }
4117}
2da11e11 4118
6608db57
KH		 4119static void
4120BadOp (void)
2da11e11 4121{
6608db57
KH		 4122 /* Throw away prefixes and 1st. opcode byte. */
4123 codep = insn_codep + 1;
2da11e11
AM		 4124 oappend ("(bad)");
4125}
GDB Binutils - Deliverables
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