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Oops, wrong address for pmuludq insn.
[deliverable/binutils-gdb.git] / opcodes / i386-dis.c
CommitLineData
252b5132 1/* Print i386 instructions for GDB, the GNU debugger.
060d22b0
NC		 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001
252b5132
RH		 4 Free Software Foundation, Inc.
5
6This file is part of GDB.
7
8This program is free software; you can redistribute it and/or modify
9it under the terms of the GNU General Public License as published by
10the Free Software Foundation; either version 2 of the License, or
11(at your option) any later version.
12
13This program is distributed in the hope that it will be useful,
14but WITHOUT ANY WARRANTY; without even the implied warranty of
15MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
19along with this program; if not, write to the Free Software
20Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
21
22/*
23 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
24 * July 1988
25 * modified by John Hassey (hassey@dg-rtp.dg.com)
52b15da3 26 * x86-64 support added by Jan Hubicka (jh@suse.cz)
252b5132
RH		 27 */
28
29/*
30 * The main tables describing the instructions is essentially a copy
31 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
32 * Programmers Manual. Usually, there is a capital letter, followed
33 * by a small letter. The capital letter tell the addressing mode,
34 * and the small letter tells about the operand size. Refer to
35 * the Intel manual for details.
36 */
37
38#include "dis-asm.h"
39#include "sysdep.h"
40#include "opintl.h"
41
42#define MAXLEN 20
43
44#include <setjmp.h>
45
46#ifndef UNIXWARE_COMPAT
47/* Set non-zero for broken, compatible instructions. Set to zero for
48 non-broken opcodes. */
49#define UNIXWARE_COMPAT 1
50#endif
51
252b5132
RH		 52static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *));
53
54struct dis_private
55{
56 /* Points to first byte not fetched. */
57 bfd_byte *max_fetched;
58 bfd_byte the_buffer[MAXLEN];
59 bfd_vma insn_start;
60 jmp_buf bailout;
61};
62
5076851f
ILT		 63/* The opcode for the fwait instruction, which we treat as a prefix
64 when we can. */
65#define FWAIT_OPCODE (0x9b)
66
52b15da3
JH		 67/* Set to 1 for 64bit mode disassembly. */
68static int mode_64bit;
69
5076851f
ILT		 70/* Flags for the prefixes for the current instruction. See below. */
71static int prefixes;
72
52b15da3
JH		 73/* REX prefix the current instruction. See below. */
74static int rex;
75/* Bits of REX we've already used. */
76static int rex_used;
77#define REX_MODE64 8
78#define REX_EXTX 4
79#define REX_EXTY 2
80#define REX_EXTZ 1
81/* Mark parts used in the REX prefix. When we are testing for
82 empty prefix (for 8bit register REX extension), just mask it
83 out. Otherwise test for REX bit is excuse for existence of REX
84 only in case value is nonzero. */
85#define USED_REX(value) \
86 { \
87 if (value) \
88 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
89 else \
90 rex_used |= 0x40; \
91 }
92
7d421014
ILT		 93/* Flags for prefixes which we somehow handled when printing the
94 current instruction. */
95static int used_prefixes;
96
5076851f
ILT		 97/* Flags stored in PREFIXES. */
98#define PREFIX_REPZ 1
99#define PREFIX_REPNZ 2
100#define PREFIX_LOCK 4
101#define PREFIX_CS 8
102#define PREFIX_SS 0x10
103#define PREFIX_DS 0x20
104#define PREFIX_ES 0x40
105#define PREFIX_FS 0x80
106#define PREFIX_GS 0x100
107#define PREFIX_DATA 0x200
108#define PREFIX_ADDR 0x400
109#define PREFIX_FWAIT 0x800
110
252b5132
RH		 111/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
112 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
113 on error. */
114#define FETCH_DATA(info, addr) \
115 ((addr) <= ((struct dis_private *)(info->private_data))->max_fetched \
116 ? 1 : fetch_data ((info), (addr)))
117
118static int
119fetch_data (info, addr)
120 struct disassemble_info *info;
121 bfd_byte *addr;
122{
123 int status;
124 struct dis_private *priv = (struct dis_private *)info->private_data;
125 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
126
127 status = (*info->read_memory_func) (start,
128 priv->max_fetched,
129 addr - priv->max_fetched,
130 info);
131 if (status != 0)
132 {
7d421014
ILT		 133 /* If we did manage to read at least one byte, then
134 print_insn_i386 will do something sensible. Otherwise, print
135 an error. We do that here because this is where we know
136 STATUS. */
137 if (priv->max_fetched == priv->the_buffer)
5076851f 138 (*info->memory_error_func) (status, start, info);
252b5132
RH		 139 longjmp (priv->bailout, 1);
140 }
141 else
142 priv->max_fetched = addr;
143 return 1;
144}
145
57d91c3c
ILT		 146#define XX NULL, 0
147
252b5132 148#define Eb OP_E, b_mode
52b15da3
JH		 149#define Ev OP_E, v_mode
150#define Ed OP_E, d_mode
252b5132 151#define indirEb OP_indirE, b_mode
252b5132
RH		 152#define indirEv OP_indirE, v_mode
153#define Ew OP_E, w_mode
154#define Ma OP_E, v_mode
2da11e11
AM		 155#define M OP_E, 0 /* lea */
156#define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
992aaec9 157#define Gb OP_G, b_mode
252b5132 158#define Gv OP_G, v_mode
992aaec9 159#define Gd OP_G, d_mode
252b5132 160#define Gw OP_G, w_mode
2da11e11 161#define Rd OP_Rd, d_mode
52b15da3 162#define Rm OP_Rd, m_mode
252b5132
RH		 163#define Ib OP_I, b_mode
164#define sIb OP_sI, b_mode /* sign extened byte */
165#define Iv OP_I, v_mode
52b15da3
JH		 166#define Iq OP_I, q_mode
167#define Iv64 OP_I64, v_mode
252b5132
RH		 168#define Iw OP_I, w_mode
169#define Jb OP_J, b_mode
170#define Jv OP_J, v_mode
52b15da3
JH		 171#define Cm OP_C, m_mode
172#define Dm OP_D, m_mode
252b5132
RH		 173#define Td OP_T, d_mode
174
52b15da3
JH		 175#define RMeAX OP_REG, eAX_reg
176#define RMeBX OP_REG, eBX_reg
177#define RMeCX OP_REG, eCX_reg
178#define RMeDX OP_REG, eDX_reg
179#define RMeSP OP_REG, eSP_reg
180#define RMeBP OP_REG, eBP_reg
181#define RMeSI OP_REG, eSI_reg
182#define RMeDI OP_REG, eDI_reg
183#define RMrAX OP_REG, rAX_reg
184#define RMrBX OP_REG, rBX_reg
185#define RMrCX OP_REG, rCX_reg
186#define RMrDX OP_REG, rDX_reg
187#define RMrSP OP_REG, rSP_reg
188#define RMrBP OP_REG, rBP_reg
189#define RMrSI OP_REG, rSI_reg
190#define RMrDI OP_REG, rDI_reg
191#define RMAL OP_REG, al_reg
192#define RMAL OP_REG, al_reg
193#define RMCL OP_REG, cl_reg
194#define RMDL OP_REG, dl_reg
195#define RMBL OP_REG, bl_reg
196#define RMAH OP_REG, ah_reg
197#define RMCH OP_REG, ch_reg
198#define RMDH OP_REG, dh_reg
199#define RMBH OP_REG, bh_reg
200#define RMAX OP_REG, ax_reg
201#define RMDX OP_REG, dx_reg
202
203#define eAX OP_IMREG, eAX_reg
204#define eBX OP_IMREG, eBX_reg
205#define eCX OP_IMREG, eCX_reg
206#define eDX OP_IMREG, eDX_reg
207#define eSP OP_IMREG, eSP_reg
208#define eBP OP_IMREG, eBP_reg
209#define eSI OP_IMREG, eSI_reg
210#define eDI OP_IMREG, eDI_reg
211#define AL OP_IMREG, al_reg
212#define AL OP_IMREG, al_reg
213#define CL OP_IMREG, cl_reg
214#define DL OP_IMREG, dl_reg
215#define BL OP_IMREG, bl_reg
216#define AH OP_IMREG, ah_reg
217#define CH OP_IMREG, ch_reg
218#define DH OP_IMREG, dh_reg
219#define BH OP_IMREG, bh_reg
220#define AX OP_IMREG, ax_reg
221#define DX OP_IMREG, dx_reg
222#define indirDX OP_IMREG, indir_dx_reg
252b5132
RH		 223
224#define Sw OP_SEG, w_mode
c608c12e 225#define Ap OP_DIR, 0
252b5132 226#define Ob OP_OFF, b_mode
52b15da3 227#define Ob64 OP_OFF64, b_mode
252b5132 228#define Ov OP_OFF, v_mode
52b15da3 229#define Ov64 OP_OFF64, v_mode
252b5132
RH		 230#define Xb OP_DSreg, eSI_reg
231#define Xv OP_DSreg, eSI_reg
232#define Yb OP_ESreg, eDI_reg
233#define Yv OP_ESreg, eDI_reg
234#define DSBX OP_DSreg, eBX_reg
235
236#define es OP_REG, es_reg
237#define ss OP_REG, ss_reg
238#define cs OP_REG, cs_reg
239#define ds OP_REG, ds_reg
240#define fs OP_REG, fs_reg
241#define gs OP_REG, gs_reg
242
243#define MX OP_MMX, 0
c608c12e 244#define XM OP_XMM, 0
252b5132 245#define EM OP_EM, v_mode
c608c12e 246#define EX OP_EX, v_mode
2da11e11 247#define MS OP_MS, v_mode
992aaec9 248#define XS OP_XS, v_mode
c608c12e 249#define None OP_E, 0
252b5132 250#define OPSUF OP_3DNowSuffix, 0
c608c12e 251#define OPSIMD OP_SIMD_Suffix, 0
252b5132
RH		 252
253/* bits in sizeflag */
254#if 0 /* leave undefined until someone adds the extra flag to objdump */
255#define SUFFIX_ALWAYS 4
256#endif
257#define AFLAG 2
258#define DFLAG 1
259
2da11e11 260typedef void (*op_rtn) PARAMS ((int bytemode, int sizeflag));
252b5132
RH		 261
262static void OP_E PARAMS ((int, int));
263static void OP_G PARAMS ((int, int));
264static void OP_I PARAMS ((int, int));
52b15da3
JH		 265static void OP_I64 PARAMS ((int, int));
266static void OP_OFF PARAMS ((int, int));
267static void OP_REG PARAMS ((int, int));
268static void OP_IMREG PARAMS ((int, int));
269static void OP_OFF64 PARAMS ((int, int));
252b5132
RH		 270static void OP_indirE PARAMS ((int, int));
271static void OP_sI PARAMS ((int, int));
272static void OP_REG PARAMS ((int, int));
273static void OP_J PARAMS ((int, int));
274static void OP_DIR PARAMS ((int, int));
275static void OP_OFF PARAMS ((int, int));
276static void OP_ESreg PARAMS ((int, int));
277static void OP_DSreg PARAMS ((int, int));
278static void OP_SEG PARAMS ((int, int));
279static void OP_C PARAMS ((int, int));
280static void OP_D PARAMS ((int, int));
281static void OP_T PARAMS ((int, int));
2da11e11 282static void OP_Rd PARAMS ((int, int));
252b5132
RH		 283static void OP_ST PARAMS ((int, int));
284static void OP_STi PARAMS ((int, int));
252b5132 285static void OP_MMX PARAMS ((int, int));
c608c12e 286static void OP_XMM PARAMS ((int, int));
252b5132 287static void OP_EM PARAMS ((int, int));
c608c12e 288static void OP_EX PARAMS ((int, int));
252b5132 289static void OP_MS PARAMS ((int, int));
992aaec9 290static void OP_XS PARAMS ((int, int));
252b5132 291static void OP_3DNowSuffix PARAMS ((int, int));
c608c12e
AM		 292static void OP_SIMD_Suffix PARAMS ((int, int));
293static void SIMD_Fixup PARAMS ((int, int));
252b5132
RH		 294
295static void append_seg PARAMS ((void));
52b15da3 296static void set_op PARAMS ((unsigned int op, int));
2da11e11 297static void putop PARAMS ((const char *template, int sizeflag));
252b5132
RH		 298static void dofloat PARAMS ((int sizeflag));
299static int get16 PARAMS ((void));
52b15da3
JH		 300static bfd_vma get64 PARAMS ((void));
301static bfd_signed_vma get32 PARAMS ((void));
302static bfd_signed_vma get32s PARAMS ((void));
252b5132 303static void ckprefix PARAMS ((void));
7d421014 304static const char *prefix_name PARAMS ((int, int));
252b5132 305static void ptr_reg PARAMS ((int, int));
2da11e11 306static void BadOp PARAMS ((void));
252b5132 307
52b15da3
JH		 308#define b_mode 1 /* byte operand */
309#define v_mode 2 /* operand size depends on prefixes */
310#define w_mode 3 /* word operand */
311#define d_mode 4 /* double word operand */
312#define q_mode 5 /* quad word operand */
313#define x_mode 6
314#define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */
252b5132
RH		 315
316#define es_reg 100
317#define cs_reg 101
318#define ss_reg 102
319#define ds_reg 103
320#define fs_reg 104
321#define gs_reg 105
252b5132 322
c608c12e
AM		 323#define eAX_reg 108
324#define eCX_reg 109
325#define eDX_reg 110
326#define eBX_reg 111
327#define eSP_reg 112
328#define eBP_reg 113
329#define eSI_reg 114
330#define eDI_reg 115
252b5132
RH		 331
332#define al_reg 116
333#define cl_reg 117
334#define dl_reg 118
335#define bl_reg 119
336#define ah_reg 120
337#define ch_reg 121
338#define dh_reg 122
339#define bh_reg 123
340
341#define ax_reg 124
342#define cx_reg 125
343#define dx_reg 126
344#define bx_reg 127
345#define sp_reg 128
346#define bp_reg 129
347#define si_reg 130
348#define di_reg 131
349
52b15da3
JH		 350#define rAX_reg 132
351#define rCX_reg 133
352#define rDX_reg 134
353#define rBX_reg 135
354#define rSP_reg 136
355#define rBP_reg 137
356#define rSI_reg 138
357#define rDI_reg 139
358
252b5132
RH		 359#define indir_dx_reg 150
360
c608c12e
AM		 361#define USE_GROUPS 1
362#define USE_PREFIX_USER_TABLE 2
363
57d91c3c
ILT		 364#define GRP1b NULL, NULL, 0, NULL, USE_GROUPS, NULL, 0
365#define GRP1S NULL, NULL, 1, NULL, USE_GROUPS, NULL, 0
366#define GRP1Ss NULL, NULL, 2, NULL, USE_GROUPS, NULL, 0
367#define GRP2b NULL, NULL, 3, NULL, USE_GROUPS, NULL, 0
368#define GRP2S NULL, NULL, 4, NULL, USE_GROUPS, NULL, 0
369#define GRP2b_one NULL, NULL, 5, NULL, USE_GROUPS, NULL, 0
370#define GRP2S_one NULL, NULL, 6, NULL, USE_GROUPS, NULL, 0
371#define GRP2b_cl NULL, NULL, 7, NULL, USE_GROUPS, NULL, 0
372#define GRP2S_cl NULL, NULL, 8, NULL, USE_GROUPS, NULL, 0
373#define GRP3b NULL, NULL, 9, NULL, USE_GROUPS, NULL, 0
374#define GRP3S NULL, NULL, 10, NULL, USE_GROUPS, NULL, 0
375#define GRP4 NULL, NULL, 11, NULL, USE_GROUPS, NULL, 0
376#define GRP5 NULL, NULL, 12, NULL, USE_GROUPS, NULL, 0
377#define GRP6 NULL, NULL, 13, NULL, USE_GROUPS, NULL, 0
378#define GRP7 NULL, NULL, 14, NULL, USE_GROUPS, NULL, 0
379#define GRP8 NULL, NULL, 15, NULL, USE_GROUPS, NULL, 0
380#define GRP9 NULL, NULL, 16, NULL, USE_GROUPS, NULL, 0
381#define GRP10 NULL, NULL, 17, NULL, USE_GROUPS, NULL, 0
382#define GRP11 NULL, NULL, 18, NULL, USE_GROUPS, NULL, 0
383#define GRP12 NULL, NULL, 19, NULL, USE_GROUPS, NULL, 0
384#define GRP13 NULL, NULL, 20, NULL, USE_GROUPS, NULL, 0
385#define GRP14 NULL, NULL, 21, NULL, USE_GROUPS, NULL, 0
386#define GRPAMD NULL, NULL, 22, NULL, USE_GROUPS, NULL, 0
387
388#define PREGRP0 NULL, NULL, 0, NULL, USE_PREFIX_USER_TABLE, NULL, 0
389#define PREGRP1 NULL, NULL, 1, NULL, USE_PREFIX_USER_TABLE, NULL, 0
390#define PREGRP2 NULL, NULL, 2, NULL, USE_PREFIX_USER_TABLE, NULL, 0
391#define PREGRP3 NULL, NULL, 3, NULL, USE_PREFIX_USER_TABLE, NULL, 0
392#define PREGRP4 NULL, NULL, 4, NULL, USE_PREFIX_USER_TABLE, NULL, 0
393#define PREGRP5 NULL, NULL, 5, NULL, USE_PREFIX_USER_TABLE, NULL, 0
394#define PREGRP6 NULL, NULL, 6, NULL, USE_PREFIX_USER_TABLE, NULL, 0
395#define PREGRP7 NULL, NULL, 7, NULL, USE_PREFIX_USER_TABLE, NULL, 0
396#define PREGRP8 NULL, NULL, 8, NULL, USE_PREFIX_USER_TABLE, NULL, 0
397#define PREGRP9 NULL, NULL, 9, NULL, USE_PREFIX_USER_TABLE, NULL, 0
398#define PREGRP10 NULL, NULL, 10, NULL, USE_PREFIX_USER_TABLE, NULL, 0
399#define PREGRP11 NULL, NULL, 11, NULL, USE_PREFIX_USER_TABLE, NULL, 0
400#define PREGRP12 NULL, NULL, 12, NULL, USE_PREFIX_USER_TABLE, NULL, 0
401#define PREGRP13 NULL, NULL, 13, NULL, USE_PREFIX_USER_TABLE, NULL, 0
402#define PREGRP14 NULL, NULL, 14, NULL, USE_PREFIX_USER_TABLE, NULL, 0
041bd2e0
JH		 403#define PREGRP15 NULL, NULL, 15, NULL, USE_PREFIX_USER_TABLE, NULL, 0
404#define PREGRP16 NULL, NULL, 16, NULL, USE_PREFIX_USER_TABLE, NULL, 0
405#define PREGRP17 NULL, NULL, 17, NULL, USE_PREFIX_USER_TABLE, NULL, 0
406#define PREGRP18 NULL, NULL, 18, NULL, USE_PREFIX_USER_TABLE, NULL, 0
407#define PREGRP19 NULL, NULL, 19, NULL, USE_PREFIX_USER_TABLE, NULL, 0
408#define PREGRP20 NULL, NULL, 20, NULL, USE_PREFIX_USER_TABLE, NULL, 0
409#define PREGRP21 NULL, NULL, 21, NULL, USE_PREFIX_USER_TABLE, NULL, 0
410#define PREGRP22 NULL, NULL, 22, NULL, USE_PREFIX_USER_TABLE, NULL, 0
411#define PREGRP23 NULL, NULL, 23, NULL, USE_PREFIX_USER_TABLE, NULL, 0
412#define PREGRP24 NULL, NULL, 24, NULL, USE_PREFIX_USER_TABLE, NULL, 0
0f17484f
AM		 413#define PREGRP25 NULL, NULL, 25, NULL, USE_PREFIX_USER_TABLE, NULL, 0
414#define PREGRP26 NULL, NULL, 26, NULL, USE_PREFIX_USER_TABLE, NULL, 0
252b5132
RH		 415
416#define FLOATCODE 50
57d91c3c 417#define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
252b5132
RH		 418
419struct dis386 {
2da11e11 420 const char *name;
252b5132
RH		 421 op_rtn op1;
422 int bytemode1;
423 op_rtn op2;
424 int bytemode2;
425 op_rtn op3;
426 int bytemode3;
427};
428
429/* Upper case letters in the instruction names here are macros.
430 'A' => print 'b' if no register operands or suffix_always is true
431 'B' => print 'b' if suffix_always is true
432 'E' => print 'e' if 32-bit form of jcxz
433 'L' => print 'l' if suffix_always is true
434 'N' => print 'n' if instruction has no wait "prefix"
52b15da3
JH		 435 'O' => print 'd', or 'o'
436 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
252b5132 437 or suffix_always is true
52b15da3
JH		 438 print 'q' if rex prefix is present.
439 'I' => print 'q' in 64bit mode and behave as 'P' otherwise
440 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always is true
441 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
442 'S' => print 'w', 'l' or 'q' if suffix_always is true
90530880 443 'T' => print 'q' in 64bit mode and behave as 'I' otherwise
041bd2e0 444 'X' => print 's', 'd' depending on data16 prefix (for XMM)
10084519 445 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
76f227a5 446 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
252b5132
RH		 447*/
448
2da11e11 449static const struct dis386 dis386_att[] = {
252b5132 450 /* 00 */
57d91c3c
ILT		 451 { "addB", Eb, Gb, XX },
452 { "addS", Ev, Gv, XX },
453 { "addB", Gb, Eb, XX },
454 { "addS", Gv, Ev, XX },
455 { "addB", AL, Ib, XX },
456 { "addS", eAX, Iv, XX },
52b15da3
JH		 457 { "pushI", es, XX, XX },
458 { "popI", es, XX, XX },
252b5132 459 /* 08 */
57d91c3c
ILT		 460 { "orB", Eb, Gb, XX },
461 { "orS", Ev, Gv, XX },
462 { "orB", Gb, Eb, XX },
463 { "orS", Gv, Ev, XX },
464 { "orB", AL, Ib, XX },
465 { "orS", eAX, Iv, XX },
52b15da3 466 { "pushI", cs, XX, XX },
57d91c3c 467 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
252b5132 468 /* 10 */
57d91c3c
ILT		 469 { "adcB", Eb, Gb, XX },
470 { "adcS", Ev, Gv, XX },
471 { "adcB", Gb, Eb, XX },
472 { "adcS", Gv, Ev, XX },
473 { "adcB", AL, Ib, XX },
474 { "adcS", eAX, Iv, XX },
52b15da3
JH		 475 { "pushI", ss, XX, XX },
476 { "popI", ss, XX, XX },
252b5132 477 /* 18 */
57d91c3c
ILT		 478 { "sbbB", Eb, Gb, XX },
479 { "sbbS", Ev, Gv, XX },
480 { "sbbB", Gb, Eb, XX },
481 { "sbbS", Gv, Ev, XX },
482 { "sbbB", AL, Ib, XX },
483 { "sbbS", eAX, Iv, XX },
52b15da3
JH		 484 { "pushI", ds, XX, XX },
485 { "popI", ds, XX, XX },
252b5132 486 /* 20 */
57d91c3c
ILT		 487 { "andB", Eb, Gb, XX },
488 { "andS", Ev, Gv, XX },
489 { "andB", Gb, Eb, XX },
490 { "andS", Gv, Ev, XX },
491 { "andB", AL, Ib, XX },
492 { "andS", eAX, Iv, XX },
493 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
494 { "daa", XX, XX, XX },
252b5132 495 /* 28 */
57d91c3c
ILT		 496 { "subB", Eb, Gb, XX },
497 { "subS", Ev, Gv, XX },
498 { "subB", Gb, Eb, XX },
499 { "subS", Gv, Ev, XX },
500 { "subB", AL, Ib, XX },
501 { "subS", eAX, Iv, XX },
502 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
503 { "das", XX, XX, XX },
252b5132 504 /* 30 */
57d91c3c
ILT		 505 { "xorB", Eb, Gb, XX },
506 { "xorS", Ev, Gv, XX },
507 { "xorB", Gb, Eb, XX },
508 { "xorS", Gv, Ev, XX },
509 { "xorB", AL, Ib, XX },
510 { "xorS", eAX, Iv, XX },
511 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
512 { "aaa", XX, XX, XX },
252b5132 513 /* 38 */
57d91c3c
ILT		 514 { "cmpB", Eb, Gb, XX },
515 { "cmpS", Ev, Gv, XX },
516 { "cmpB", Gb, Eb, XX },
517 { "cmpS", Gv, Ev, XX },
518 { "cmpB", AL, Ib, XX },
519 { "cmpS", eAX, Iv, XX },
520 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
521 { "aas", XX, XX, XX },
252b5132 522 /* 40 */
52b15da3
JH		 523 { "incS", RMeAX, XX, XX },
524 { "incS", RMeCX, XX, XX },
525 { "incS", RMeDX, XX, XX },
526 { "incS", RMeBX, XX, XX },
527 { "incS", RMeSP, XX, XX },
528 { "incS", RMeBP, XX, XX },
529 { "incS", RMeSI, XX, XX },
530 { "incS", RMeDI, XX, XX },
252b5132 531 /* 48 */
52b15da3
JH		 532 { "decS", RMeAX, XX, XX },
533 { "decS", RMeCX, XX, XX },
534 { "decS", RMeDX, XX, XX },
535 { "decS", RMeBX, XX, XX },
536 { "decS", RMeSP, XX, XX },
537 { "decS", RMeBP, XX, XX },
538 { "decS", RMeSI, XX, XX },
539 { "decS", RMeDI, XX, XX },
252b5132 540 /* 50 */
52b15da3
JH		 541 { "pushS", RMeAX, XX, XX },
542 { "pushS", RMeCX, XX, XX },
543 { "pushS", RMeDX, XX, XX },
544 { "pushS", RMeBX, XX, XX },
545 { "pushS", RMeSP, XX, XX },
546 { "pushS", RMeBP, XX, XX },
547 { "pushS", RMeSI, XX, XX },
548 { "pushS", RMeDI, XX, XX },
252b5132 549 /* 58 */
52b15da3
JH		 550 { "popS", RMeAX, XX, XX },
551 { "popS", RMeCX, XX, XX },
552 { "popS", RMeDX, XX, XX },
553 { "popS", RMeBX, XX, XX },
554 { "popS", RMeSP, XX, XX },
555 { "popS", RMeBP, XX, XX },
556 { "popS", RMeSI, XX, XX },
557 { "popS", RMeDI, XX, XX },
252b5132 558 /* 60 */
57d91c3c
ILT		 559 { "pushaP", XX, XX, XX },
560 { "popaP", XX, XX, XX },
561 { "boundS", Gv, Ma, XX },
562 { "arpl", Ew, Gw, XX },
563 { "(bad)", XX, XX, XX }, /* seg fs */
564 { "(bad)", XX, XX, XX }, /* seg gs */
565 { "(bad)", XX, XX, XX }, /* op size prefix */
566 { "(bad)", XX, XX, XX }, /* adr size prefix */
252b5132 567 /* 68 */
52b15da3 568 { "pushI", Iv, XX, XX }, /* 386 book wrong */
252b5132 569 { "imulS", Gv, Ev, Iv },
52b15da3 570 { "pushI", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
252b5132 571 { "imulS", Gv, Ev, sIb },
57d91c3c
ILT		 572 { "insb", Yb, indirDX, XX },
573 { "insR", Yv, indirDX, XX },
574 { "outsb", indirDX, Xb, XX },
575 { "outsR", indirDX, Xv, XX },
252b5132 576 /* 70 */
57d91c3c
ILT		 577 { "jo", Jb, XX, XX },
578 { "jno", Jb, XX, XX },
579 { "jb", Jb, XX, XX },
580 { "jae", Jb, XX, XX },
581 { "je", Jb, XX, XX },
582 { "jne", Jb, XX, XX },
583 { "jbe", Jb, XX, XX },
584 { "ja", Jb, XX, XX },
252b5132 585 /* 78 */
57d91c3c
ILT		 586 { "js", Jb, XX, XX },
587 { "jns", Jb, XX, XX },
588 { "jp", Jb, XX, XX },
589 { "jnp", Jb, XX, XX },
590 { "jl", Jb, XX, XX },
591 { "jge", Jb, XX, XX },
592 { "jle", Jb, XX, XX },
593 { "jg", Jb, XX, XX },
252b5132
RH		 594 /* 80 */
595 { GRP1b },
596 { GRP1S },
57d91c3c 597 { "(bad)", XX, XX, XX },
252b5132 598 { GRP1Ss },
57d91c3c
ILT		 599 { "testB", Eb, Gb, XX },
600 { "testS", Ev, Gv, XX },
601 { "xchgB", Eb, Gb, XX },
602 { "xchgS", Ev, Gv, XX },
252b5132 603 /* 88 */
57d91c3c
ILT		 604 { "movB", Eb, Gb, XX },
605 { "movS", Ev, Gv, XX },
606 { "movB", Gb, Eb, XX },
607 { "movS", Gv, Ev, XX },
608 { "movQ", Ev, Sw, XX },
609 { "leaS", Gv, M, XX },
610 { "movQ", Sw, Ev, XX },
90530880 611 { "popT", Ev, XX, XX },
252b5132 612 /* 90 */
57d91c3c 613 { "nop", XX, XX, XX },
041bd2e0 614 /* FIXME: NOP with REPz prefix is called PAUSE. */
52b15da3
JH		 615 { "xchgS", RMeCX, eAX, XX },
616 { "xchgS", RMeDX, eAX, XX },
617 { "xchgS", RMeBX, eAX, XX },
618 { "xchgS", RMeSP, eAX, XX },
619 { "xchgS", RMeBP, eAX, XX },
620 { "xchgS", RMeSI, eAX, XX },
621 { "xchgS", RMeDI, eAX, XX },
252b5132 622 /* 98 */
57d91c3c 623 { "cWtR", XX, XX, XX },
52b15da3
JH		 624 { "cRtO", XX, XX, XX },
625 { "lcallI", Ap, XX, XX },
57d91c3c 626 { "(bad)", XX, XX, XX }, /* fwait */
52b15da3
JH		 627 { "pushfI", XX, XX, XX },
628 { "popfI", XX, XX, XX },
57d91c3c
ILT		 629 { "sahf", XX, XX, XX },
630 { "lahf", XX, XX, XX },
252b5132 631 /* a0 */
57d91c3c
ILT		 632 { "movB", AL, Ob, XX },
633 { "movS", eAX, Ov, XX },
634 { "movB", Ob, AL, XX },
635 { "movS", Ov, eAX, XX },
636 { "movsb", Yb, Xb, XX },
637 { "movsR", Yv, Xv, XX },
638 { "cmpsb", Xb, Yb, XX },
639 { "cmpsR", Xv, Yv, XX },
252b5132 640 /* a8 */
57d91c3c
ILT		 641 { "testB", AL, Ib, XX },
642 { "testS", eAX, Iv, XX },
643 { "stosB", Yb, AL, XX },
644 { "stosS", Yv, eAX, XX },
645 { "lodsB", AL, Xb, XX },
646 { "lodsS", eAX, Xv, XX },
647 { "scasB", AL, Yb, XX },
648 { "scasS", eAX, Yv, XX },
252b5132 649 /* b0 */
52b15da3
JH		 650 { "movB", RMAL, Ib, XX },
651 { "movB", RMCL, Ib, XX },
652 { "movB", RMDL, Ib, XX },
653 { "movB", RMBL, Ib, XX },
654 { "movB", RMAH, Ib, XX },
655 { "movB", RMCH, Ib, XX },
656 { "movB", RMDH, Ib, XX },
657 { "movB", RMBH, Ib, XX },
252b5132 658 /* b8 */
52b15da3
JH		 659 { "movS", RMeAX, Iv, XX },
660 { "movS", RMeCX, Iv, XX },
661 { "movS", RMeDX, Iv, XX },
662 { "movS", RMeBX, Iv, XX },
663 { "movS", RMeSP, Iv, XX },
664 { "movS", RMeBP, Iv, XX },
665 { "movS", RMeSI, Iv, XX },
666 { "movS", RMeDI, Iv, XX },
252b5132
RH		 667 /* c0 */
668 { GRP2b },
669 { GRP2S },
e2914f48
JH		 670 { "retI", Iw, XX, XX },
671 { "retI", XX, XX, XX },
57d91c3c
ILT		 672 { "lesS", Gv, Mp, XX },
673 { "ldsS", Gv, Mp, XX },
674 { "movA", Eb, Ib, XX },
675 { "movQ", Ev, Iv, XX },
252b5132 676 /* c8 */
52b15da3
JH		 677 { "enterI", Iw, Ib, XX },
678 { "leaveI", XX, XX, XX },
e2914f48
JH		 679 { "lretP", Iw, XX, XX },
680 { "lretP", XX, XX, XX },
52b15da3
JH		 681 { "int3", XX, XX, XX },
682 { "int", Ib, XX, XX },
683 { "into", XX, XX, XX},
e2914f48 684 { "iretP", XX, XX, XX },
52b15da3
JH		 685 /* d0 */
686 { GRP2b_one },
687 { GRP2S_one },
688 { GRP2b_cl },
689 { GRP2S_cl },
690 { "aam", sIb, XX, XX },
691 { "aad", sIb, XX, XX },
692 { "(bad)", XX, XX, XX },
693 { "xlat", DSBX, XX, XX },
694 /* d8 */
695 { FLOAT },
696 { FLOAT },
697 { FLOAT },
698 { FLOAT },
699 { FLOAT },
700 { FLOAT },
701 { FLOAT },
702 { FLOAT },
703 /* e0 */
704 { "loopne", Jb, XX, XX },
705 { "loope", Jb, XX, XX },
706 { "loop", Jb, XX, XX },
707 { "jEcxz", Jb, XX, XX },
708 { "inB", AL, Ib, XX },
709 { "inS", eAX, Ib, XX },
710 { "outB", Ib, AL, XX },
711 { "outS", Ib, eAX, XX },
712 /* e8 */
713 { "callI", Jv, XX, XX },
714 { "jmpI", Jv, XX, XX },
715 { "ljmpI", Ap, XX, XX },
716 { "jmp", Jb, XX, XX },
717 { "inB", AL, indirDX, XX },
718 { "inS", eAX, indirDX, XX },
719 { "outB", indirDX, AL, XX },
720 { "outS", indirDX, eAX, XX },
721 /* f0 */
722 { "(bad)", XX, XX, XX }, /* lock prefix */
723 { "(bad)", XX, XX, XX },
724 { "(bad)", XX, XX, XX }, /* repne */
725 { "(bad)", XX, XX, XX }, /* repz */
726 { "hlt", XX, XX, XX },
727 { "cmc", XX, XX, XX },
728 { GRP3b },
729 { GRP3S },
730 /* f8 */
731 { "clc", XX, XX, XX },
732 { "stc", XX, XX, XX },
733 { "cli", XX, XX, XX },
734 { "sti", XX, XX, XX },
735 { "cld", XX, XX, XX },
736 { "std", XX, XX, XX },
737 { GRP4 },
738 { GRP5 },
739};
740
741static const struct dis386 dis386_intel[] = {
742 /* 00 */
743 { "add", Eb, Gb, XX },
744 { "add", Ev, Gv, XX },
745 { "add", Gb, Eb, XX },
746 { "add", Gv, Ev, XX },
747 { "add", AL, Ib, XX },
748 { "add", eAX, Iv, XX },
749 { "push", es, XX, XX },
750 { "pop", es, XX, XX },
751 /* 08 */
752 { "or", Eb, Gb, XX },
753 { "or", Ev, Gv, XX },
754 { "or", Gb, Eb, XX },
755 { "or", Gv, Ev, XX },
756 { "or", AL, Ib, XX },
757 { "or", eAX, Iv, XX },
758 { "push", cs, XX, XX },
759 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
760 /* 10 */
761 { "adc", Eb, Gb, XX },
762 { "adc", Ev, Gv, XX },
763 { "adc", Gb, Eb, XX },
764 { "adc", Gv, Ev, XX },
765 { "adc", AL, Ib, XX },
766 { "adc", eAX, Iv, XX },
767 { "push", ss, XX, XX },
768 { "pop", ss, XX, XX },
769 /* 18 */
770 { "sbb", Eb, Gb, XX },
771 { "sbb", Ev, Gv, XX },
772 { "sbb", Gb, Eb, XX },
773 { "sbb", Gv, Ev, XX },
774 { "sbb", AL, Ib, XX },
775 { "sbb", eAX, Iv, XX },
776 { "push", ds, XX, XX },
777 { "pop", ds, XX, XX },
778 /* 20 */
779 { "and", Eb, Gb, XX },
780 { "and", Ev, Gv, XX },
781 { "and", Gb, Eb, XX },
782 { "and", Gv, Ev, XX },
783 { "and", AL, Ib, XX },
784 { "and", eAX, Iv, XX },
785 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
786 { "daa", XX, XX, XX },
787 /* 28 */
788 { "sub", Eb, Gb, XX },
789 { "sub", Ev, Gv, XX },
790 { "sub", Gb, Eb, XX },
791 { "sub", Gv, Ev, XX },
792 { "sub", AL, Ib, XX },
793 { "sub", eAX, Iv, XX },
794 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
795 { "das", XX, XX, XX },
796 /* 30 */
797 { "xor", Eb, Gb, XX },
798 { "xor", Ev, Gv, XX },
799 { "xor", Gb, Eb, XX },
800 { "xor", Gv, Ev, XX },
801 { "xor", AL, Ib, XX },
802 { "xor", eAX, Iv, XX },
803 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
804 { "aaa", XX, XX, XX },
805 /* 38 */
806 { "cmp", Eb, Gb, XX },
807 { "cmp", Ev, Gv, XX },
808 { "cmp", Gb, Eb, XX },
809 { "cmp", Gv, Ev, XX },
810 { "cmp", AL, Ib, XX },
811 { "cmp", eAX, Iv, XX },
812 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
813 { "aas", XX, XX, XX },
814 /* 40 */
815 { "inc", RMeAX, XX, XX },
816 { "inc", RMeCX, XX, XX },
817 { "inc", RMeDX, XX, XX },
818 { "inc", RMeBX, XX, XX },
819 { "inc", RMeSP, XX, XX },
820 { "inc", RMeBP, XX, XX },
821 { "inc", RMeSI, XX, XX },
822 { "inc", RMeDI, XX, XX },
823 /* 48 */
824 { "dec", RMeAX, XX, XX },
825 { "dec", RMeCX, XX, XX },
826 { "dec", RMeDX, XX, XX },
827 { "dec", RMeBX, XX, XX },
828 { "dec", RMeSP, XX, XX },
829 { "dec", RMeBP, XX, XX },
830 { "dec", RMeSI, XX, XX },
831 { "dec", RMeDI, XX, XX },
832 /* 50 */
833 { "push", RMeAX, XX, XX },
834 { "push", RMeCX, XX, XX },
835 { "push", RMeDX, XX, XX },
836 { "push", RMeBX, XX, XX },
837 { "push", RMeSP, XX, XX },
838 { "push", RMeBP, XX, XX },
839 { "push", RMeSI, XX, XX },
840 { "push", RMeDI, XX, XX },
841 /* 58 */
842 { "pop", RMeAX, XX, XX },
843 { "pop", RMeCX, XX, XX },
844 { "pop", RMeDX, XX, XX },
845 { "pop", RMeBX, XX, XX },
846 { "pop", RMeSP, XX, XX },
847 { "pop", RMeBP, XX, XX },
848 { "pop", RMeSI, XX, XX },
849 { "pop", RMeDI, XX, XX },
850 /* 60 */
851 { "pusha", XX, XX, XX },
852 { "popa", XX, XX, XX },
853 { "bound", Gv, Ma, XX },
854 { "arpl", Ew, Gw, XX },
855 { "(bad)", XX, XX, XX }, /* seg fs */
856 { "(bad)", XX, XX, XX }, /* seg gs */
857 { "(bad)", XX, XX, XX }, /* op size prefix */
858 { "(bad)", XX, XX, XX }, /* adr size prefix */
859 /* 68 */
860 { "push", Iv, XX, XX }, /* 386 book wrong */
861 { "imul", Gv, Ev, Iv },
862 { "push", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
863 { "imul", Gv, Ev, sIb },
864 { "ins", Yb, indirDX, XX },
865 { "ins", Yv, indirDX, XX },
866 { "outs", indirDX, Xb, XX },
867 { "outs", indirDX, Xv, XX },
868 /* 70 */
869 { "jo", Jb, XX, XX },
870 { "jno", Jb, XX, XX },
871 { "jb", Jb, XX, XX },
872 { "jae", Jb, XX, XX },
873 { "je", Jb, XX, XX },
874 { "jne", Jb, XX, XX },
875 { "jbe", Jb, XX, XX },
876 { "ja", Jb, XX, XX },
877 /* 78 */
878 { "js", Jb, XX, XX },
879 { "jns", Jb, XX, XX },
880 { "jp", Jb, XX, XX },
881 { "jnp", Jb, XX, XX },
882 { "jl", Jb, XX, XX },
883 { "jge", Jb, XX, XX },
884 { "jle", Jb, XX, XX },
885 { "jg", Jb, XX, XX },
886 /* 80 */
887 { GRP1b },
888 { GRP1S },
889 { "(bad)", XX, XX, XX },
890 { GRP1Ss },
891 { "test", Eb, Gb, XX },
892 { "test", Ev, Gv, XX },
893 { "xchg", Eb, Gb, XX },
894 { "xchg", Ev, Gv, XX },
895 /* 88 */
896 { "mov", Eb, Gb, XX },
897 { "mov", Ev, Gv, XX },
898 { "mov", Gb, Eb, XX },
899 { "mov", Gv, Ev, XX },
900 { "mov", Ev, Sw, XX },
901 { "lea", Gv, M, XX },
902 { "mov", Sw, Ev, XX },
903 { "pop", Ev, XX, XX },
904 /* 90 */
905 { "nop", XX, XX, XX },
041bd2e0 906 /* FIXME: NOP with REPz prefix is called PAUSE. */
52b15da3
JH		 907 { "xchg", RMeCX, eAX, XX },
908 { "xchg", RMeDX, eAX, XX },
909 { "xchg", RMeBX, eAX, XX },
910 { "xchg", RMeSP, eAX, XX },
911 { "xchg", RMeBP, eAX, XX },
912 { "xchg", RMeSI, eAX, XX },
913 { "xchg", RMeDI, eAX, XX },
914 /* 98 */
915 { "cW", XX, XX, XX }, /* cwde and cbw */
916 { "cR", XX, XX, XX }, /* cdq and cwd */
917 { "lcall", Ap, XX, XX },
918 { "(bad)", XX, XX, XX }, /* fwait */
919 { "pushf", XX, XX, XX },
920 { "popf", XX, XX, XX },
921 { "sahf", XX, XX, XX },
922 { "lahf", XX, XX, XX },
923 /* a0 */
924 { "mov", AL, Ob, XX },
925 { "mov", eAX, Ov, XX },
926 { "mov", Ob, AL, XX },
927 { "mov", Ov, eAX, XX },
928 { "movs", Yb, Xb, XX },
929 { "movs", Yv, Xv, XX },
930 { "cmps", Xb, Yb, XX },
931 { "cmps", Xv, Yv, XX },
932 /* a8 */
933 { "test", AL, Ib, XX },
934 { "test", eAX, Iv, XX },
935 { "stos", Yb, AL, XX },
936 { "stos", Yv, eAX, XX },
937 { "lods", AL, Xb, XX },
938 { "lods", eAX, Xv, XX },
939 { "scas", AL, Yb, XX },
940 { "scas", eAX, Yv, XX },
941 /* b0 */
942 { "mov", RMAL, Ib, XX },
943 { "mov", RMCL, Ib, XX },
944 { "mov", RMDL, Ib, XX },
945 { "mov", RMBL, Ib, XX },
946 { "mov", RMAH, Ib, XX },
947 { "mov", RMCH, Ib, XX },
948 { "mov", RMDH, Ib, XX },
949 { "mov", RMBH, Ib, XX },
950 /* b8 */
951 { "mov", RMeAX, Iv, XX },
952 { "mov", RMeCX, Iv, XX },
953 { "mov", RMeDX, Iv, XX },
954 { "mov", RMeBX, Iv, XX },
955 { "mov", RMeSP, Iv, XX },
956 { "mov", RMeBP, Iv, XX },
957 { "mov", RMeSI, Iv, XX },
958 { "mov", RMeDI, Iv, XX },
959 /* c0 */
960 { GRP2b },
961 { GRP2S },
962 { "ret", Iw, XX, XX },
963 { "ret", XX, XX, XX },
964 { "les", Gv, Mp, XX },
965 { "lds", Gv, Mp, XX },
966 { "mov", Eb, Ib, XX },
967 { "mov", Ev, Iv, XX },
968 /* c8 */
969 { "enter", Iw, Ib, XX },
970 { "leave", XX, XX, XX },
971 { "lret", Iw, XX, XX },
972 { "lret", XX, XX, XX },
973 { "int3", XX, XX, XX },
974 { "int", Ib, XX, XX },
975 { "into", XX, XX, XX },
976 { "iret", XX, XX, XX },
977 /* d0 */
978 { GRP2b_one },
979 { GRP2S_one },
980 { GRP2b_cl },
981 { GRP2S_cl },
982 { "aam", sIb, XX, XX },
983 { "aad", sIb, XX, XX },
984 { "(bad)", XX, XX, XX },
985 { "xlat", DSBX, XX, XX },
986 /* d8 */
987 { FLOAT },
988 { FLOAT },
989 { FLOAT },
990 { FLOAT },
991 { FLOAT },
992 { FLOAT },
993 { FLOAT },
994 { FLOAT },
995 /* e0 */
996 { "loopne", Jb, XX, XX },
997 { "loope", Jb, XX, XX },
998 { "loop", Jb, XX, XX },
999 { "jEcxz", Jb, XX, XX },
1000 { "in", AL, Ib, XX },
1001 { "in", eAX, Ib, XX },
1002 { "out", Ib, AL, XX },
1003 { "out", Ib, eAX, XX },
1004 /* e8 */
1005 { "call", Jv, XX, XX },
1006 { "jmp", Jv, XX, XX },
1007 { "ljmp", Ap, XX, XX },
1008 { "jmp", Jb, XX, XX },
1009 { "in", AL, indirDX, XX },
1010 { "in", eAX, indirDX, XX },
1011 { "out", indirDX, AL, XX },
1012 { "out", indirDX, eAX, XX },
1013 /* f0 */
1014 { "(bad)", XX, XX, XX }, /* lock prefix */
1015 { "(bad)", XX, XX, XX },
1016 { "(bad)", XX, XX, XX }, /* repne */
1017 { "(bad)", XX, XX, XX }, /* repz */
1018 { "hlt", XX, XX, XX },
1019 { "cmc", XX, XX, XX },
1020 { GRP3b },
1021 { GRP3S },
1022 /* f8 */
1023 { "clc", XX, XX, XX },
1024 { "stc", XX, XX, XX },
1025 { "cli", XX, XX, XX },
1026 { "sti", XX, XX, XX },
1027 { "cld", XX, XX, XX },
1028 { "std", XX, XX, XX },
1029 { GRP4 },
1030 { GRP5 },
1031};
1032
1033/* 64bit mode is having some instruction set differences, so separate table is
1034 needed. */
1035static const struct dis386 disx86_64_att[] = {
1036 /* 00 */
1037 { "addB", Eb, Gb, XX },
1038 { "addS", Ev, Gv, XX },
1039 { "addB", Gb, Eb, XX },
1040 { "addS", Gv, Ev, XX },
1041 { "addB", AL, Ib, XX },
1042 { "addS", eAX, Iv, XX },
1043 { "(bad)", XX, XX, XX }, /* Reserved. */
1044 { "(bad)", XX, XX, XX }, /* Reserved. */
1045 /* 08 */
1046 { "orB", Eb, Gb, XX },
1047 { "orS", Ev, Gv, XX },
1048 { "orB", Gb, Eb, XX },
1049 { "orS", Gv, Ev, XX },
1050 { "orB", AL, Ib, XX },
1051 { "orS", eAX, Iv, XX },
1052 { "(bad)", XX, XX, XX }, /* Reserved. */
1053 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
1054 /* 10 */
1055 { "adcB", Eb, Gb, XX },
1056 { "adcS", Ev, Gv, XX },
1057 { "adcB", Gb, Eb, XX },
1058 { "adcS", Gv, Ev, XX },
1059 { "adcB", AL, Ib, XX },
1060 { "adcS", eAX, Iv, XX },
1061 { "(bad)", XX, XX, XX }, /* Reserved. */
1062 { "(bad)", XX, XX, XX }, /* Reserved. */
1063 /* 18 */
1064 { "sbbB", Eb, Gb, XX },
1065 { "sbbS", Ev, Gv, XX },
1066 { "sbbB", Gb, Eb, XX },
1067 { "sbbS", Gv, Ev, XX },
1068 { "sbbB", AL, Ib, XX },
1069 { "sbbS", eAX, Iv, XX },
1070 { "(bad)", XX, XX, XX }, /* Reserved. */
1071 { "(bad)", XX, XX, XX }, /* Reserved. */
1072 /* 20 */
1073 { "andB", Eb, Gb, XX },
1074 { "andS", Ev, Gv, XX },
1075 { "andB", Gb, Eb, XX },
1076 { "andS", Gv, Ev, XX },
1077 { "andB", AL, Ib, XX },
1078 { "andS", eAX, Iv, XX },
1079 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
1080 { "(bad)", XX, XX, XX }, /* Reserved. */
1081 /* 28 */
1082 { "subB", Eb, Gb, XX },
1083 { "subS", Ev, Gv, XX },
1084 { "subB", Gb, Eb, XX },
1085 { "subS", Gv, Ev, XX },
1086 { "subB", AL, Ib, XX },
1087 { "subS", eAX, Iv, XX },
1088 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
1089 { "(bad)", XX, XX, XX }, /* Reserved. */
1090 /* 30 */
1091 { "xorB", Eb, Gb, XX },
1092 { "xorS", Ev, Gv, XX },
1093 { "xorB", Gb, Eb, XX },
1094 { "xorS", Gv, Ev, XX },
1095 { "xorB", AL, Ib, XX },
1096 { "xorS", eAX, Iv, XX },
1097 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
1098 { "(bad)", XX, XX, XX }, /* Reserved. */
1099 /* 38 */
1100 { "cmpB", Eb, Gb, XX },
1101 { "cmpS", Ev, Gv, XX },
1102 { "cmpB", Gb, Eb, XX },
1103 { "cmpS", Gv, Ev, XX },
1104 { "cmpB", AL, Ib, XX },
1105 { "cmpS", eAX, Iv, XX },
1106 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
1107 { "(bad)", XX, XX, XX }, /* Reserved. */
1108 /* 40 */
1109 { "(bad)", XX, XX, XX }, /* REX prefix area. */
1110 { "(bad)", XX, XX, XX },
1111 { "(bad)", XX, XX, XX },
1112 { "(bad)", XX, XX, XX },
1113 { "(bad)", XX, XX, XX },
1114 { "(bad)", XX, XX, XX },
1115 { "(bad)", XX, XX, XX },
1116 { "(bad)", XX, XX, XX },
1117 /* 48 */
1118 { "(bad)", XX, XX, XX },
1119 { "(bad)", XX, XX, XX },
1120 { "(bad)", XX, XX, XX },
1121 { "(bad)", XX, XX, XX },
1122 { "(bad)", XX, XX, XX },
1123 { "(bad)", XX, XX, XX },
1124 { "(bad)", XX, XX, XX },
1125 { "(bad)", XX, XX, XX },
1126 /* 50 */
1127 { "pushI", RMrAX, XX, XX },
1128 { "pushI", RMrCX, XX, XX },
1129 { "pushI", RMrDX, XX, XX },
1130 { "pushI", RMrBX, XX, XX },
1131 { "pushI", RMrSP, XX, XX },
1132 { "pushI", RMrBP, XX, XX },
1133 { "pushI", RMrSI, XX, XX },
1134 { "pushI", RMrDI, XX, XX },
1135 /* 58 */
1136 { "popI", RMrAX, XX, XX },
1137 { "popI", RMrCX, XX, XX },
1138 { "popI", RMrDX, XX, XX },
1139 { "popI", RMrBX, XX, XX },
1140 { "popI", RMrSP, XX, XX },
1141 { "popI", RMrBP, XX, XX },
1142 { "popI", RMrSI, XX, XX },
1143 { "popI", RMrDI, XX, XX },
1144 /* 60 */
1145 { "(bad)", XX, XX, XX }, /* reserved. */
1146 { "(bad)", XX, XX, XX }, /* reserved. */
1147 { "(bad)", XX, XX, XX }, /* reserved. */
1148 { "movslR", Gv, Ed, XX },
1149 { "(bad)", XX, XX, XX }, /* seg fs */
1150 { "(bad)", XX, XX, XX }, /* seg gs */
1151 { "(bad)", XX, XX, XX }, /* op size prefix */
1152 { "(bad)", XX, XX, XX }, /* adr size prefix */
1153 /* 68 */
1154 { "pushI", Iq, XX, XX }, /* 386 book wrong */
1155 { "imulS", Gv, Ev, Iv },
1156 { "pushI", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
1157 { "imulS", Gv, Ev, sIb },
1158 { "insb", Yb, indirDX, XX },
1159 { "insR", Yv, indirDX, XX },
1160 { "outsb", indirDX, Xb, XX },
1161 { "outsR", indirDX, Xv, XX },
1162 /* 70 */
1163 { "jo", Jb, XX, XX },
1164 { "jno", Jb, XX, XX },
1165 { "jb", Jb, XX, XX },
1166 { "jae", Jb, XX, XX },
1167 { "je", Jb, XX, XX },
1168 { "jne", Jb, XX, XX },
1169 { "jbe", Jb, XX, XX },
1170 { "ja", Jb, XX, XX },
1171 /* 78 */
1172 { "js", Jb, XX, XX },
1173 { "jns", Jb, XX, XX },
1174 { "jp", Jb, XX, XX },
1175 { "jnp", Jb, XX, XX },
1176 { "jl", Jb, XX, XX },
1177 { "jge", Jb, XX, XX },
1178 { "jle", Jb, XX, XX },
1179 { "jg", Jb, XX, XX },
1180 /* 80 */
1181 { GRP1b },
1182 { GRP1S },
1183 { "(bad)", XX, XX, XX },
1184 { GRP1Ss },
1185 { "testB", Eb, Gb, XX },
1186 { "testS", Ev, Gv, XX },
1187 { "xchgB", Eb, Gb, XX },
1188 { "xchgS", Ev, Gv, XX },
1189 /* 88 */
1190 { "movB", Eb, Gb, XX },
1191 { "movS", Ev, Gv, XX },
1192 { "movB", Gb, Eb, XX },
1193 { "movS", Gv, Ev, XX },
1194 { "movQ", Ev, Sw, XX },
1195 { "leaS", Gv, M, XX },
1196 { "movQ", Sw, Ev, XX },
1197 { "popI", Ev, XX, XX },
1198 /* 90 */
1199 { "nop", XX, XX, XX },
041bd2e0 1200 /* FIXME: NOP with REPz prefix is called PAUSE. */
52b15da3
JH		 1201 { "xchgS", RMeCX, eAX, XX },
1202 { "xchgS", RMeDX, eAX, XX },
1203 { "xchgS", RMeBX, eAX, XX },
1204 { "xchgS", RMeSP, eAX, XX },
1205 { "xchgS", RMeBP, eAX, XX },
1206 { "xchgS", RMeSI, eAX, XX },
1207 { "xchgS", RMeDI, eAX, XX },
1208 /* 98 */
1209 { "cWtR", XX, XX, XX },
1210 { "cRtO", XX, XX, XX },
1211 { "(bad)", XX, XX, XX }, /* reserved. */
1212 { "(bad)", XX, XX, XX }, /* fwait */
1213 { "pushfI", XX, XX, XX },
1214 { "popfI", XX, XX, XX },
1215 { "(bad)", XX, XX, XX }, /* reserved. */
1216 { "(bad)", XX, XX, XX }, /* reserved. */
1217 /* a0 */
1218 { "movB", AL, Ob64, XX },
1219 { "movS", eAX, Ov64, XX },
1220 { "movB", Ob64, AL, XX },
1221 { "movS", Ov64, eAX, XX },
1222 { "movsb", Yb, Xb, XX },
1223 { "movsR", Yv, Xv, XX },
1224 { "cmpsb", Xb, Yb, XX },
1225 { "cmpsR", Xv, Yv, XX },
1226 /* a8 */
1227 { "testB", AL, Ib, XX },
1228 { "testS", eAX, Iv, XX },
1229 { "stosB", Yb, AL, XX },
1230 { "stosS", Yv, eAX, XX },
1231 { "lodsB", AL, Xb, XX },
1232 { "lodsS", eAX, Xv, XX },
1233 { "scasB", AL, Yb, XX },
1234 { "scasS", eAX, Yv, XX },
1235 /* b0 */
1236 { "movB", RMAL, Ib, XX },
1237 { "movB", RMCL, Ib, XX },
1238 { "movB", RMDL, Ib, XX },
1239 { "movB", RMBL, Ib, XX },
1240 { "movB", RMAH, Ib, XX },
1241 { "movB", RMCH, Ib, XX },
1242 { "movB", RMDH, Ib, XX },
1243 { "movB", RMBH, Ib, XX },
1244 /* b8 */
1245 { "movS", RMeAX, Iv64, XX },
1246 { "movS", RMeCX, Iv64, XX },
1247 { "movS", RMeDX, Iv64, XX },
1248 { "movS", RMeBX, Iv64, XX },
1249 { "movS", RMeSP, Iv64, XX },
1250 { "movS", RMeBP, Iv64, XX },
1251 { "movS", RMeSI, Iv64, XX },
1252 { "movS", RMeDI, Iv64, XX },
1253 /* c0 */
1254 { GRP2b },
1255 { GRP2S },
1256 { "retI", Iw, XX, XX },
1257 { "retI", XX, XX, XX },
1258 { "(bad)", XX, XX, XX }, /* reserved. */
1259 { "ldsS", Gv, Mp, XX },
1260 { "movA", Eb, Ib, XX },
1261 { "movQ", Ev, Iv, XX },
1262 /* c8 */
1263 { "enterI", Iw, Ib, XX },
1264 { "leaveI", XX, XX, XX },
e2914f48
JH		 1265 { "lretP", Iw, XX, XX },
1266 { "lretP", XX, XX, XX },
57d91c3c
ILT		 1267 { "int3", XX, XX, XX },
1268 { "int", Ib, XX, XX },
52b15da3 1269 { "(bad)", XX, XX, XX }, /* reserved. */
e2914f48 1270 { "iretP", XX, XX, XX },
252b5132
RH		 1271 /* d0 */
1272 { GRP2b_one },
1273 { GRP2S_one },
1274 { GRP2b_cl },
1275 { GRP2S_cl },
52b15da3
JH		 1276 { "(bad)", XX, XX, XX }, /* reserved. */
1277 { "(bad)", XX, XX, XX }, /* reserved. */
041bd2e0 1278 { "(bad)", XX, XX, XX }, /* reserved. */
57d91c3c 1279 { "xlat", DSBX, XX, XX },
252b5132
RH		 1280 /* d8 */
1281 { FLOAT },
1282 { FLOAT },
1283 { FLOAT },
1284 { FLOAT },
1285 { FLOAT },
1286 { FLOAT },
1287 { FLOAT },
1288 { FLOAT },
1289 /* e0 */
57d91c3c
ILT		 1290 { "loopne", Jb, XX, XX },
1291 { "loope", Jb, XX, XX },
1292 { "loop", Jb, XX, XX },
1293 { "jEcxz", Jb, XX, XX },
1294 { "inB", AL, Ib, XX },
1295 { "inS", eAX, Ib, XX },
1296 { "outB", Ib, AL, XX },
1297 { "outS", Ib, eAX, XX },
252b5132 1298 /* e8 */
52b15da3
JH		 1299 { "callI", Jv, XX, XX },
1300 { "jmpI", Jv, XX, XX },
1301 { "(bad)", XX, XX, XX }, /* reserved. */
57d91c3c
ILT		 1302 { "jmp", Jb, XX, XX },
1303 { "inB", AL, indirDX, XX },
1304 { "inS", eAX, indirDX, XX },
1305 { "outB", indirDX, AL, XX },
1306 { "outS", indirDX, eAX, XX },
252b5132 1307 /* f0 */
57d91c3c
ILT		 1308 { "(bad)", XX, XX, XX }, /* lock prefix */
1309 { "(bad)", XX, XX, XX },
1310 { "(bad)", XX, XX, XX }, /* repne */
1311 { "(bad)", XX, XX, XX }, /* repz */
1312 { "hlt", XX, XX, XX },
1313 { "cmc", XX, XX, XX },
252b5132
RH		 1314 { GRP3b },
1315 { GRP3S },
1316 /* f8 */
57d91c3c
ILT		 1317 { "clc", XX, XX, XX },
1318 { "stc", XX, XX, XX },
1319 { "cli", XX, XX, XX },
1320 { "sti", XX, XX, XX },
1321 { "cld", XX, XX, XX },
1322 { "std", XX, XX, XX },
252b5132
RH		 1323 { GRP4 },
1324 { GRP5 },
1325};
1326
52b15da3 1327static const struct dis386 dis386_64_intel[] = {
252b5132 1328 /* 00 */
57d91c3c
ILT		 1329 { "add", Eb, Gb, XX },
1330 { "add", Ev, Gv, XX },
1331 { "add", Gb, Eb, XX },
1332 { "add", Gv, Ev, XX },
1333 { "add", AL, Ib, XX },
1334 { "add", eAX, Iv, XX },
52b15da3
JH		 1335 { "(bad)", XX, XX, XX }, /* Reserved. */
1336 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1337 /* 08 */
57d91c3c
ILT		 1338 { "or", Eb, Gb, XX },
1339 { "or", Ev, Gv, XX },
1340 { "or", Gb, Eb, XX },
1341 { "or", Gv, Ev, XX },
1342 { "or", AL, Ib, XX },
1343 { "or", eAX, Iv, XX },
52b15da3 1344 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c 1345 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
252b5132 1346 /* 10 */
57d91c3c
ILT		 1347 { "adc", Eb, Gb, XX },
1348 { "adc", Ev, Gv, XX },
1349 { "adc", Gb, Eb, XX },
1350 { "adc", Gv, Ev, XX },
1351 { "adc", AL, Ib, XX },
1352 { "adc", eAX, Iv, XX },
52b15da3
JH		 1353 { "(bad)", XX, XX, XX }, /* Reserved. */
1354 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1355 /* 18 */
57d91c3c
ILT		 1356 { "sbb", Eb, Gb, XX },
1357 { "sbb", Ev, Gv, XX },
1358 { "sbb", Gb, Eb, XX },
1359 { "sbb", Gv, Ev, XX },
1360 { "sbb", AL, Ib, XX },
1361 { "sbb", eAX, Iv, XX },
52b15da3
JH		 1362 { "(bad)", XX, XX, XX }, /* Reserved. */
1363 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1364 /* 20 */
57d91c3c
ILT		 1365 { "and", Eb, Gb, XX },
1366 { "and", Ev, Gv, XX },
1367 { "and", Gb, Eb, XX },
1368 { "and", Gv, Ev, XX },
1369 { "and", AL, Ib, XX },
1370 { "and", eAX, Iv, XX },
1371 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
52b15da3 1372 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1373 /* 28 */
57d91c3c
ILT		 1374 { "sub", Eb, Gb, XX },
1375 { "sub", Ev, Gv, XX },
1376 { "sub", Gb, Eb, XX },
1377 { "sub", Gv, Ev, XX },
1378 { "sub", AL, Ib, XX },
1379 { "sub", eAX, Iv, XX },
1380 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
52b15da3 1381 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1382 /* 30 */
57d91c3c
ILT		 1383 { "xor", Eb, Gb, XX },
1384 { "xor", Ev, Gv, XX },
1385 { "xor", Gb, Eb, XX },
1386 { "xor", Gv, Ev, XX },
1387 { "xor", AL, Ib, XX },
1388 { "xor", eAX, Iv, XX },
1389 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
52b15da3 1390 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1391 /* 38 */
57d91c3c
ILT		 1392 { "cmp", Eb, Gb, XX },
1393 { "cmp", Ev, Gv, XX },
1394 { "cmp", Gb, Eb, XX },
1395 { "cmp", Gv, Ev, XX },
1396 { "cmp", AL, Ib, XX },
1397 { "cmp", eAX, Iv, XX },
1398 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
52b15da3 1399 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1400 /* 40 */
52b15da3
JH		 1401 { "(bad)", XX, XX, XX }, /* REX prefix area. */
1402 { "(bad)", XX, XX, XX },
1403 { "(bad)", XX, XX, XX },
1404 { "(bad)", XX, XX, XX },
1405 { "(bad)", XX, XX, XX },
1406 { "(bad)", XX, XX, XX },
1407 { "(bad)", XX, XX, XX },
1408 { "(bad)", XX, XX, XX },
252b5132 1409 /* 48 */
52b15da3
JH		 1410 { "(bad)", XX, XX, XX },
1411 { "(bad)", XX, XX, XX },
1412 { "(bad)", XX, XX, XX },
1413 { "(bad)", XX, XX, XX },
1414 { "(bad)", XX, XX, XX },
1415 { "(bad)", XX, XX, XX },
1416 { "(bad)", XX, XX, XX },
1417 { "(bad)", XX, XX, XX },
252b5132 1418 /* 50 */
52b15da3
JH		 1419 { "push", RMrAX, XX, XX },
1420 { "push", RMrCX, XX, XX },
1421 { "push", RMrDX, XX, XX },
1422 { "push", RMrBX, XX, XX },
1423 { "push", RMrSP, XX, XX },
1424 { "push", RMrBP, XX, XX },
1425 { "push", RMrSI, XX, XX },
1426 { "push", RMrDI, XX, XX },
252b5132 1427 /* 58 */
52b15da3
JH		 1428 { "pop", RMrAX, XX, XX },
1429 { "pop", RMrCX, XX, XX },
1430 { "pop", RMrDX, XX, XX },
1431 { "pop", RMrBX, XX, XX },
1432 { "pop", RMrSP, XX, XX },
1433 { "pop", RMrBP, XX, XX },
1434 { "pop", RMrSI, XX, XX },
1435 { "pop", RMrDI, XX, XX },
252b5132 1436 /* 60 */
52b15da3
JH		 1437 { "(bad)", XX, XX, XX }, /* Reserved. */
1438 { "(bad)", XX, XX, XX }, /* Reserved. */
1439 { "(bad)", XX, XX, XX }, /* Reserved. */
1440 { "movsx", Gv, Ed, XX },
57d91c3c
ILT		 1441 { "(bad)", XX, XX, XX }, /* seg fs */
1442 { "(bad)", XX, XX, XX }, /* seg gs */
1443 { "(bad)", XX, XX, XX }, /* op size prefix */
1444 { "(bad)", XX, XX, XX }, /* adr size prefix */
252b5132 1445 /* 68 */
52b15da3 1446 { "push", Iq, XX, XX }, /* 386 book wrong */
c608c12e 1447 { "imul", Gv, Ev, Iv },
57d91c3c 1448 { "push", sIb, XX, XX }, /* push of byte really pushes 2 or 4 bytes */
c608c12e 1449 { "imul", Gv, Ev, sIb },
57d91c3c
ILT		 1450 { "ins", Yb, indirDX, XX },
1451 { "ins", Yv, indirDX, XX },
1452 { "outs", indirDX, Xb, XX },
1453 { "outs", indirDX, Xv, XX },
252b5132 1454 /* 70 */
57d91c3c
ILT		 1455 { "jo", Jb, XX, XX },
1456 { "jno", Jb, XX, XX },
1457 { "jb", Jb, XX, XX },
1458 { "jae", Jb, XX, XX },
1459 { "je", Jb, XX, XX },
1460 { "jne", Jb, XX, XX },
1461 { "jbe", Jb, XX, XX },
1462 { "ja", Jb, XX, XX },
252b5132 1463 /* 78 */
57d91c3c
ILT		 1464 { "js", Jb, XX, XX },
1465 { "jns", Jb, XX, XX },
1466 { "jp", Jb, XX, XX },
1467 { "jnp", Jb, XX, XX },
1468 { "jl", Jb, XX, XX },
1469 { "jge", Jb, XX, XX },
1470 { "jle", Jb, XX, XX },
1471 { "jg", Jb, XX, XX },
252b5132
RH		 1472 /* 80 */
1473 { GRP1b },
1474 { GRP1S },
57d91c3c 1475 { "(bad)", XX, XX, XX },
252b5132 1476 { GRP1Ss },
57d91c3c
ILT		 1477 { "test", Eb, Gb, XX },
1478 { "test", Ev, Gv, XX },
1479 { "xchg", Eb, Gb, XX },
1480 { "xchg", Ev, Gv, XX },
252b5132 1481 /* 88 */
57d91c3c
ILT		 1482 { "mov", Eb, Gb, XX },
1483 { "mov", Ev, Gv, XX },
1484 { "mov", Gb, Eb, XX },
1485 { "mov", Gv, Ev, XX },
1486 { "mov", Ev, Sw, XX },
1487 { "lea", Gv, M, XX },
1488 { "mov", Sw, Ev, XX },
1489 { "pop", Ev, XX, XX },
252b5132 1490 /* 90 */
57d91c3c 1491 { "nop", XX, XX, XX },
041bd2e0 1492 /* FIXME: NOP with REPz prefix is called PAUSE. */
52b15da3
JH		 1493 { "xchg", RMeCX, eAX, XX },
1494 { "xchg", RMeDX, eAX, XX },
1495 { "xchg", RMeBX, eAX, XX },
1496 { "xchg", RMeSP, eAX, XX },
1497 { "xchg", RMeBP, eAX, XX },
1498 { "xchg", RMeSI, eAX, XX },
1499 { "xchg", RMeDI, eAX, XX },
252b5132 1500 /* 98 */
57d91c3c
ILT		 1501 { "cW", XX, XX, XX }, /* cwde and cbw */
1502 { "cR", XX, XX, XX }, /* cdq and cwd */
52b15da3 1503 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c
ILT		 1504 { "(bad)", XX, XX, XX }, /* fwait */
1505 { "pushf", XX, XX, XX },
1506 { "popf", XX, XX, XX },
52b15da3
JH		 1507 { "(bad)", XX, XX, XX }, /* Reserved. */
1508 { "(bad)", XX, XX, XX }, /* Reserved. */
252b5132 1509 /* a0 */
57d91c3c
ILT		 1510 { "mov", AL, Ob, XX },
1511 { "mov", eAX, Ov, XX },
1512 { "mov", Ob, AL, XX },
1513 { "mov", Ov, eAX, XX },
1514 { "movs", Yb, Xb, XX },
1515 { "movs", Yv, Xv, XX },
1516 { "cmps", Xb, Yb, XX },
1517 { "cmps", Xv, Yv, XX },
252b5132 1518 /* a8 */
57d91c3c
ILT		 1519 { "test", AL, Ib, XX },
1520 { "test", eAX, Iv, XX },
1521 { "stos", Yb, AL, XX },
1522 { "stos", Yv, eAX, XX },
1523 { "lods", AL, Xb, XX },
1524 { "lods", eAX, Xv, XX },
1525 { "scas", AL, Yb, XX },
1526 { "scas", eAX, Yv, XX },
252b5132 1527 /* b0 */
52b15da3
JH		 1528 { "mov", RMAL, Ib, XX },
1529 { "mov", RMCL, Ib, XX },
1530 { "mov", RMDL, Ib, XX },
1531 { "mov", RMBL, Ib, XX },
1532 { "mov", RMAH, Ib, XX },
1533 { "mov", RMCH, Ib, XX },
1534 { "mov", RMDH, Ib, XX },
1535 { "mov", RMBH, Ib, XX },
252b5132 1536 /* b8 */
52b15da3
JH		 1537 { "mov", RMeAX, Iv, XX },
1538 { "mov", RMeCX, Iv, XX },
1539 { "mov", RMeDX, Iv, XX },
1540 { "mov", RMeBX, Iv, XX },
1541 { "mov", RMeSP, Iv, XX },
1542 { "mov", RMeBP, Iv, XX },
1543 { "mov", RMeSI, Iv, XX },
1544 { "mov", RMeDI, Iv, XX },
252b5132
RH		 1545 /* c0 */
1546 { GRP2b },
1547 { GRP2S },
57d91c3c
ILT		 1548 { "ret", Iw, XX, XX },
1549 { "ret", XX, XX, XX },
52b15da3 1550 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c
ILT		 1551 { "lds", Gv, Mp, XX },
1552 { "mov", Eb, Ib, XX },
1553 { "mov", Ev, Iv, XX },
252b5132 1554 /* c8 */
57d91c3c
ILT		 1555 { "enter", Iw, Ib, XX },
1556 { "leave", XX, XX, XX },
1557 { "lret", Iw, XX, XX },
1558 { "lret", XX, XX, XX },
1559 { "int3", XX, XX, XX },
1560 { "int", Ib, XX, XX },
52b15da3 1561 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c 1562 { "iret", XX, XX, XX },
252b5132
RH		 1563 /* d0 */
1564 { GRP2b_one },
1565 { GRP2S_one },
1566 { GRP2b_cl },
1567 { GRP2S_cl },
52b15da3
JH		 1568 { "(bad)", XX, XX, XX }, /* Reserved. */
1569 { "(bad)", XX, XX, XX }, /* Reserved. */
041bd2e0 1570 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c 1571 { "xlat", DSBX, XX, XX },
252b5132
RH		 1572 /* d8 */
1573 { FLOAT },
1574 { FLOAT },
1575 { FLOAT },
1576 { FLOAT },
1577 { FLOAT },
1578 { FLOAT },
1579 { FLOAT },
1580 { FLOAT },
1581 /* e0 */
57d91c3c
ILT		 1582 { "loopne", Jb, XX, XX },
1583 { "loope", Jb, XX, XX },
1584 { "loop", Jb, XX, XX },
1585 { "jEcxz", Jb, XX, XX },
1586 { "in", AL, Ib, XX },
1587 { "in", eAX, Ib, XX },
1588 { "out", Ib, AL, XX },
1589 { "out", Ib, eAX, XX },
252b5132 1590 /* e8 */
57d91c3c
ILT		 1591 { "call", Jv, XX, XX },
1592 { "jmp", Jv, XX, XX },
52b15da3 1593 { "(bad)", XX, XX, XX }, /* Reserved. */
57d91c3c
ILT		 1594 { "jmp", Jb, XX, XX },
1595 { "in", AL, indirDX, XX },
1596 { "in", eAX, indirDX, XX },
1597 { "out", indirDX, AL, XX },
1598 { "out", indirDX, eAX, XX },
252b5132 1599 /* f0 */
57d91c3c
ILT		 1600 { "(bad)", XX, XX, XX }, /* lock prefix */
1601 { "(bad)", XX, XX, XX },
1602 { "(bad)", XX, XX, XX }, /* repne */
1603 { "(bad)", XX, XX, XX }, /* repz */
1604 { "hlt", XX, XX, XX },
1605 { "cmc", XX, XX, XX },
252b5132
RH		 1606 { GRP3b },
1607 { GRP3S },
1608 /* f8 */
57d91c3c
ILT		 1609 { "clc", XX, XX, XX },
1610 { "stc", XX, XX, XX },
1611 { "cli", XX, XX, XX },
1612 { "sti", XX, XX, XX },
1613 { "cld", XX, XX, XX },
1614 { "std", XX, XX, XX },
252b5132
RH		 1615 { GRP4 },
1616 { GRP5 },
1617};
1618
2da11e11 1619static const struct dis386 dis386_twobyte_att[] = {
252b5132
RH		 1620 /* 00 */
1621 { GRP6 },
1622 { GRP7 },
57d91c3c
ILT		 1623 { "larS", Gv, Ew, XX },
1624 { "lslS", Gv, Ew, XX },
1625 { "(bad)", XX, XX, XX },
52b15da3 1626 { "syscall", XX, XX, XX },
57d91c3c 1627 { "clts", XX, XX, XX },
52b15da3 1628 { "sysretP", XX, XX, XX },
252b5132 1629 /* 08 */
57d91c3c
ILT		 1630 { "invd", XX, XX, XX },
1631 { "wbinvd", XX, XX, XX },
1632 { "(bad)", XX, XX, XX },
1633 { "ud2a", XX, XX, XX },
1634 { "(bad)", XX, XX, XX },
c608c12e 1635 { GRPAMD },
57d91c3c 1636 { "femms", XX, XX, XX },
252b5132
RH		 1637 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix */
1638 /* 10 */
c608c12e
AM		 1639 { PREGRP8 },
1640 { PREGRP9 },
041bd2e0
JH		 1641 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1642 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
1643 { "unpcklpX", XM, EX, XX },
1644 { "unpckhpX", XM, EX, XX },
1645 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1646 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
252b5132 1647 /* 18 */
c608c12e 1648 { GRP14 },
57d91c3c
ILT		 1649 { "(bad)", XX, XX, XX },
1650 { "(bad)", XX, XX, XX },
1651 { "(bad)", XX, XX, XX },
1652 { "(bad)", XX, XX, XX },
1653 { "(bad)", XX, XX, XX },
1654 { "(bad)", XX, XX, XX },
1655 { "(bad)", XX, XX, XX },
252b5132
RH		 1656 /* 20 */
1657 /* these are all backward in appendix A of the intel book */
52b15da3
JH		 1658 { "movL", Rm, Cm, XX },
1659 { "movL", Rm, Dm, XX },
1660 { "movL", Cm, Rm, XX },
1661 { "movL", Dm, Rm, XX },
57d91c3c
ILT		 1662 { "movL", Rd, Td, XX },
1663 { "(bad)", XX, XX, XX },
1664 { "movL", Td, Rd, XX },
1665 { "(bad)", XX, XX, XX },
252b5132 1666 /* 28 */
041bd2e0
JH		 1667 { "movapX", XM, EX, XX },
1668 { "movapX", EX, XM, XX },
c608c12e 1669 { PREGRP2 },
041bd2e0 1670 { "movntpX", Ev, XM, XX },
2da11e11 1671 { PREGRP4 },
c608c12e 1672 { PREGRP3 },
041bd2e0
JH		 1673 { "ucomisX", XM,EX, XX },
1674 { "comisX", XM,EX, XX },
252b5132 1675 /* 30 */
57d91c3c
ILT		 1676 { "wrmsr", XX, XX, XX },
1677 { "rdtsc", XX, XX, XX },
1678 { "rdmsr", XX, XX, XX },
1679 { "rdpmc", XX, XX, XX },
1680 { "sysenter", XX, XX, XX },
1681 { "sysexit", XX, XX, XX },
1682 { "(bad)", XX, XX, XX },
1683 { "(bad)", XX, XX, XX },
252b5132 1684 /* 38 */
57d91c3c
ILT		 1685 { "(bad)", XX, XX, XX },
1686 { "(bad)", XX, XX, XX },
1687 { "(bad)", XX, XX, XX },
1688 { "(bad)", XX, XX, XX },
1689 { "(bad)", XX, XX, XX },
1690 { "(bad)", XX, XX, XX },
1691 { "(bad)", XX, XX, XX },
1692 { "(bad)", XX, XX, XX },
252b5132 1693 /* 40 */
57d91c3c
ILT		 1694 { "cmovo", Gv, Ev, XX },
1695 { "cmovno", Gv, Ev, XX },
1696 { "cmovb", Gv, Ev, XX },
1697 { "cmovae", Gv, Ev, XX },
1698 { "cmove", Gv, Ev, XX },
1699 { "cmovne", Gv, Ev, XX },
1700 { "cmovbe", Gv, Ev, XX },
1701 { "cmova", Gv, Ev, XX },
252b5132 1702 /* 48 */
57d91c3c
ILT		 1703 { "cmovs", Gv, Ev, XX },
1704 { "cmovns", Gv, Ev, XX },
1705 { "cmovp", Gv, Ev, XX },
1706 { "cmovnp", Gv, Ev, XX },
1707 { "cmovl", Gv, Ev, XX },
1708 { "cmovge", Gv, Ev, XX },
1709 { "cmovle", Gv, Ev, XX },
1710 { "cmovg", Gv, Ev, XX },
252b5132 1711 /* 50 */
992aaec9 1712 { "movmskpX", Gd, XS, XX },
c608c12e
AM		 1713 { PREGRP13 },
1714 { PREGRP12 },
1715 { PREGRP11 },
041bd2e0
JH		 1716 { "andpX", XM, EX, XX },
1717 { "andnpX", XM, EX, XX },
1718 { "orpX", XM, EX, XX },
1719 { "xorpX", XM, EX, XX },
252b5132 1720 /* 58 */
c608c12e
AM		 1721 { PREGRP0 },
1722 { PREGRP10 },
041bd2e0
JH		 1723 { PREGRP17 },
1724 { PREGRP16 },
c608c12e
AM		 1725 { PREGRP14 },
1726 { PREGRP7 },
1727 { PREGRP5 },
2da11e11 1728 { PREGRP6 },
252b5132 1729 /* 60 */
57d91c3c
ILT		 1730 { "punpcklbw", MX, EM, XX },
1731 { "punpcklwd", MX, EM, XX },
1732 { "punpckldq", MX, EM, XX },
1733 { "packsswb", MX, EM, XX },
1734 { "pcmpgtb", MX, EM, XX },
1735 { "pcmpgtw", MX, EM, XX },
1736 { "pcmpgtd", MX, EM, XX },
1737 { "packuswb", MX, EM, XX },
252b5132 1738 /* 68 */
57d91c3c
ILT		 1739 { "punpckhbw", MX, EM, XX },
1740 { "punpckhwd", MX, EM, XX },
1741 { "punpckhdq", MX, EM, XX },
1742 { "packssdw", MX, EM, XX },
0f17484f 1743 { PREGRP26 },
041bd2e0 1744 { PREGRP24 },
57d91c3c 1745 { "movd", MX, Ed, XX },
041bd2e0 1746 { PREGRP19 },
252b5132 1747 /* 70 */
041bd2e0 1748 { PREGRP22 },
252b5132
RH		 1749 { GRP10 },
1750 { GRP11 },
1751 { GRP12 },
57d91c3c
ILT		 1752 { "pcmpeqb", MX, EM, XX },
1753 { "pcmpeqw", MX, EM, XX },
1754 { "pcmpeqd", MX, EM, XX },
1755 { "emms", XX, XX, XX },
252b5132 1756 /* 78 */
57d91c3c
ILT		 1757 { "(bad)", XX, XX, XX },
1758 { "(bad)", XX, XX, XX },
1759 { "(bad)", XX, XX, XX },
1760 { "(bad)", XX, XX, XX },
1761 { "(bad)", XX, XX, XX },
1762 { "(bad)", XX, XX, XX },
041bd2e0
JH		 1763 { PREGRP23 },
1764 { PREGRP20 },
252b5132 1765 /* 80 */
57d91c3c
ILT		 1766 { "jo", Jv, XX, XX },
1767 { "jno", Jv, XX, XX },
1768 { "jb", Jv, XX, XX },
1769 { "jae", Jv, XX, XX },
1770 { "je", Jv, XX, XX },
1771 { "jne", Jv, XX, XX },
1772 { "jbe", Jv, XX, XX },
1773 { "ja", Jv, XX, XX },
252b5132 1774 /* 88 */
57d91c3c
ILT		 1775 { "js", Jv, XX, XX },
1776 { "jns", Jv, XX, XX },
1777 { "jp", Jv, XX, XX },
1778 { "jnp", Jv, XX, XX },
1779 { "jl", Jv, XX, XX },
1780 { "jge", Jv, XX, XX },
1781 { "jle", Jv, XX, XX },
1782 { "jg", Jv, XX, XX },
252b5132 1783 /* 90 */
57d91c3c
ILT		 1784 { "seto", Eb, XX, XX },
1785 { "setno", Eb, XX, XX },
1786 { "setb", Eb, XX, XX },
1787 { "setae", Eb, XX, XX },
1788 { "sete", Eb, XX, XX },
1789 { "setne", Eb, XX, XX },
1790 { "setbe", Eb, XX, XX },
1791 { "seta", Eb, XX, XX },
252b5132 1792 /* 98 */
57d91c3c
ILT		 1793 { "sets", Eb, XX, XX },
1794 { "setns", Eb, XX, XX },
1795 { "setp", Eb, XX, XX },
1796 { "setnp", Eb, XX, XX },
1797 { "setl", Eb, XX, XX },
1798 { "setge", Eb, XX, XX },
1799 { "setle", Eb, XX, XX },
1800 { "setg", Eb, XX, XX },
252b5132 1801 /* a0 */
52b15da3
JH		 1802 { "pushI", fs, XX, XX },
1803 { "popI", fs, XX, XX },
57d91c3c
ILT		 1804 { "cpuid", XX, XX, XX },
1805 { "btS", Ev, Gv, XX },
252b5132
RH		 1806 { "shldS", Ev, Gv, Ib },
1807 { "shldS", Ev, Gv, CL },
57d91c3c
ILT		 1808 { "(bad)", XX, XX, XX },
1809 { "(bad)", XX, XX, XX },
252b5132 1810 /* a8 */
52b15da3
JH		 1811 { "pushI", gs, XX, XX },
1812 { "popI", gs, XX, XX },
57d91c3c
ILT		 1813 { "rsm", XX, XX, XX },
1814 { "btsS", Ev, Gv, XX },
252b5132
RH		 1815 { "shrdS", Ev, Gv, Ib },
1816 { "shrdS", Ev, Gv, CL },
1817 { GRP13 },
57d91c3c 1818 { "imulS", Gv, Ev, XX },
252b5132 1819 /* b0 */
57d91c3c
ILT		 1820 { "cmpxchgB", Eb, Gb, XX },
1821 { "cmpxchgS", Ev, Gv, XX },
1822 { "lssS", Gv, Mp, XX },
1823 { "btrS", Ev, Gv, XX },
1824 { "lfsS", Gv, Mp, XX },
1825 { "lgsS", Gv, Mp, XX },
1826 { "movzbR", Gv, Eb, XX },
1827 { "movzwR", Gv, Ew, XX }, /* yes, there really is movzww ! */
252b5132 1828 /* b8 */
57d91c3c
ILT		 1829 { "(bad)", XX, XX, XX },
1830 { "ud2b", XX, XX, XX },
252b5132 1831 { GRP8 },
57d91c3c
ILT		 1832 { "btcS", Ev, Gv, XX },
1833 { "bsfS", Gv, Ev, XX },
1834 { "bsrS", Gv, Ev, XX },
1835 { "movsbR", Gv, Eb, XX },
1836 { "movswR", Gv, Ew, XX }, /* yes, there really is movsww ! */
252b5132 1837 /* c0 */
57d91c3c
ILT		 1838 { "xaddB", Eb, Gb, XX },
1839 { "xaddS", Ev, Gv, XX },
c608c12e 1840 { PREGRP1 },
041bd2e0 1841 { "movntiS", Ev, Gv, XX },
992aaec9
AM		 1842 { "pinsrw", MX, Ed, Ib },
1843 { "pextrw", Gd, MS, Ib },
041bd2e0 1844 { "shufpX", XM, EX, Ib },
252b5132
RH		 1845 { GRP9 },
1846 /* c8 */
52b15da3
JH		 1847 { "bswap", RMeAX, XX, XX }, /* bswap doesn't support 16 bit regs */
1848 { "bswap", RMeCX, XX, XX },
1849 { "bswap", RMeDX, XX, XX },
1850 { "bswap", RMeBX, XX, XX },
1851 { "bswap", RMeSP, XX, XX },
1852 { "bswap", RMeBP, XX, XX },
1853 { "bswap", RMeSI, XX, XX },
1854 { "bswap", RMeDI, XX, XX },
252b5132 1855 /* d0 */
57d91c3c
ILT		 1856 { "(bad)", XX, XX, XX },
1857 { "psrlw", MX, EM, XX },
1858 { "psrld", MX, EM, XX },
1859 { "psrlq", MX, EM, XX },
87890af0 1860 { "paddq", MX, EM, XX },
57d91c3c 1861 { "pmullw", MX, EM, XX },
041bd2e0 1862 { PREGRP21 },
992aaec9 1863 { "pmovmskb", Gd, MS, XX },
252b5132 1864 /* d8 */
57d91c3c
ILT		 1865 { "psubusb", MX, EM, XX },
1866 { "psubusw", MX, EM, XX },
1867 { "pminub", MX, EM, XX },
1868 { "pand", MX, EM, XX },
1869 { "paddusb", MX, EM, XX },
1870 { "paddusw", MX, EM, XX },
1871 { "pmaxub", MX, EM, XX },
1872 { "pandn", MX, EM, XX },
252b5132 1873 /* e0 */
57d91c3c
ILT		 1874 { "pavgb", MX, EM, XX },
1875 { "psraw", MX, EM, XX },
1876 { "psrad", MX, EM, XX },
1877 { "pavgw", MX, EM, XX },
1878 { "pmulhuw", MX, EM, XX },
1879 { "pmulhw", MX, EM, XX },
041bd2e0 1880 { PREGRP15 },
0f17484f 1881 { PREGRP25 },
252b5132 1882 /* e8 */
57d91c3c
ILT		 1883 { "psubsb", MX, EM, XX },
1884 { "psubsw", MX, EM, XX },
1885 { "pminsw", MX, EM, XX },
1886 { "por", MX, EM, XX },
1887 { "paddsb", MX, EM, XX },
1888 { "paddsw", MX, EM, XX },
1889 { "pmaxsw", MX, EM, XX },
1890 { "pxor", MX, EM, XX },
252b5132 1891 /* f0 */
57d91c3c
ILT		 1892 { "(bad)", XX, XX, XX },
1893 { "psllw", MX, EM, XX },
1894 { "pslld", MX, EM, XX },
1895 { "psllq", MX, EM, XX },
041bd2e0 1896 { "pmuludq", MX, EM, XX },
57d91c3c
ILT		 1897 { "pmaddwd", MX, EM, XX },
1898 { "psadbw", MX, EM, XX },
041bd2e0 1899 { PREGRP18 },
252b5132 1900 /* f8 */
57d91c3c
ILT		 1901 { "psubb", MX, EM, XX },
1902 { "psubw", MX, EM, XX },
1903 { "psubd", MX, EM, XX },
87890af0 1904 { "psubq", MX, EM, XX },
57d91c3c
ILT		 1905 { "paddb", MX, EM, XX },
1906 { "paddw", MX, EM, XX },
1907 { "paddd", MX, EM, XX },
1908 { "(bad)", XX, XX, XX }
252b5132
RH		 1909};
1910
2da11e11 1911static const struct dis386 dis386_twobyte_intel[] = {
252b5132
RH		 1912 /* 00 */
1913 { GRP6 },
1914 { GRP7 },
57d91c3c
ILT		 1915 { "lar", Gv, Ew, XX },
1916 { "lsl", Gv, Ew, XX },
1917 { "(bad)", XX, XX, XX },
52b15da3 1918 { "syscall", XX, XX, XX },
57d91c3c 1919 { "clts", XX, XX, XX },
52b15da3 1920 { "sysretP", XX, XX, XX },
252b5132 1921 /* 08 */
57d91c3c
ILT		 1922 { "invd", XX, XX, XX },
1923 { "wbinvd", XX, XX, XX },
1924 { "(bad)", XX, XX, XX },
1925 { "ud2a", XX, XX, XX },
1926 { "(bad)", XX, XX, XX },
c608c12e 1927 { GRPAMD },
57d91c3c 1928 { "femms" , XX, XX, XX},
252b5132
RH		 1929 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix */
1930 /* 10 */
c2419411
AJ		 1931 { PREGRP8 },
1932 { PREGRP9 },
041bd2e0
JH		 1933 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1934 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
1935 { "unpcklpX", XM, EX, XX },
1936 { "unpckhpX", XM, EX, XX },
1937 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1938 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
252b5132 1939 /* 18 */
c608c12e 1940 { GRP14 },
57d91c3c
ILT		 1941 { "(bad)", XX, XX, XX },
1942 { "(bad)", XX, XX, XX },
1943 { "(bad)", XX, XX, XX },
1944 { "(bad)", XX, XX, XX },
1945 { "(bad)", XX, XX, XX },
1946 { "(bad)", XX, XX, XX },
1947 { "(bad)", XX, XX, XX },
252b5132
RH		 1948 /* 20 */
1949 /* these are all backward in appendix A of the intel book */
52b15da3
JH		 1950 { "mov", Rm, Cm, XX },
1951 { "mov", Rm, Dm, XX },
1952 { "mov", Cm, Rm, XX },
1953 { "mov", Dm, Rm, XX },
57d91c3c
ILT		 1954 { "mov", Rd, Td, XX },
1955 { "(bad)", XX, XX, XX },
1956 { "mov", Td, Rd, XX },
1957 { "(bad)", XX, XX, XX },
252b5132 1958 /* 28 */
041bd2e0
JH		 1959 { "movapX", XM, EX, XX },
1960 { "movapX", EX, XM, XX },
c608c12e 1961 { PREGRP2 },
041bd2e0 1962 { "movntpX", Ev, XM, XX },
2da11e11 1963 { PREGRP4 },
c608c12e 1964 { PREGRP3 },
041bd2e0
JH		 1965 { "ucomisX", XM,EX, XX },
1966 { "comisX", XM,EX, XX },
252b5132 1967 /* 30 */
57d91c3c
ILT		 1968 { "wrmsr", XX, XX, XX },
1969 { "rdtsc", XX, XX, XX },
1970 { "rdmsr", XX, XX, XX },
1971 { "rdpmc", XX, XX, XX },
1972 { "sysenter", XX, XX, XX },
1973 { "sysexit", XX, XX, XX },
1974 { "(bad)", XX, XX, XX },
1975 { "(bad)", XX, XX, XX },
252b5132 1976 /* 38 */
57d91c3c
ILT		 1977 { "(bad)", XX, XX, XX },
1978 { "(bad)", XX, XX, XX },
1979 { "(bad)", XX, XX, XX },
1980 { "(bad)", XX, XX, XX },
1981 { "(bad)", XX, XX, XX },
1982 { "(bad)", XX, XX, XX },
1983 { "(bad)", XX, XX, XX },
1984 { "(bad)", XX, XX, XX },
252b5132 1985 /* 40 */
57d91c3c
ILT		 1986 { "cmovo", Gv, Ev, XX },
1987 { "cmovno", Gv, Ev, XX },
1988 { "cmovb", Gv, Ev, XX },
1989 { "cmovae", Gv, Ev, XX },
1990 { "cmove", Gv, Ev, XX },
1991 { "cmovne", Gv, Ev, XX },
1992 { "cmovbe", Gv, Ev, XX },
1993 { "cmova", Gv, Ev, XX },
252b5132 1994 /* 48 */
57d91c3c
ILT		 1995 { "cmovs", Gv, Ev, XX },
1996 { "cmovns", Gv, Ev, XX },
1997 { "cmovp", Gv, Ev, XX },
1998 { "cmovnp", Gv, Ev, XX },
1999 { "cmovl", Gv, Ev, XX },
2000 { "cmovge", Gv, Ev, XX },
2001 { "cmovle", Gv, Ev, XX },
2002 { "cmovg", Gv, Ev, XX },
252b5132 2003 /* 50 */
992aaec9 2004 { "movmskpX", Gd, XS, XX },
c608c12e
AM		 2005 { PREGRP13 },
2006 { PREGRP12 },
2007 { PREGRP11 },
041bd2e0
JH		 2008 { "andpX", XM, EX, XX },
2009 { "andnpX", XM, EX, XX },
2010 { "orpX", XM, EX, XX },
2011 { "xorpX", XM, EX, XX },
252b5132 2012 /* 58 */
c608c12e
AM		 2013 { PREGRP0 },
2014 { PREGRP10 },
041bd2e0
JH		 2015 { PREGRP17 },
2016 { PREGRP16 },
c608c12e
AM		 2017 { PREGRP14 },
2018 { PREGRP7 },
2019 { PREGRP5 },
2da11e11 2020 { PREGRP6 },
252b5132 2021 /* 60 */
57d91c3c
ILT		 2022 { "punpcklbw", MX, EM, XX },
2023 { "punpcklwd", MX, EM, XX },
2024 { "punpckldq", MX, EM, XX },
2025 { "packsswb", MX, EM, XX },
2026 { "pcmpgtb", MX, EM, XX },
2027 { "pcmpgtw", MX, EM, XX },
2028 { "pcmpgtd", MX, EM, XX },
2029 { "packuswb", MX, EM, XX },
252b5132 2030 /* 68 */
57d91c3c
ILT		 2031 { "punpckhbw", MX, EM, XX },
2032 { "punpckhwd", MX, EM, XX },
2033 { "punpckhdq", MX, EM, XX },
2034 { "packssdw", MX, EM, XX },
0f17484f 2035 { PREGRP26 },
041bd2e0 2036 { PREGRP24 },
57d91c3c 2037 { "movd", MX, Ed, XX },
041bd2e0 2038 { PREGRP19 },
252b5132 2039 /* 70 */
041bd2e0 2040 { PREGRP22 },
252b5132
RH		 2041 { GRP10 },
2042 { GRP11 },
2043 { GRP12 },
57d91c3c
ILT		 2044 { "pcmpeqb", MX, EM, XX },
2045 { "pcmpeqw", MX, EM, XX },
2046 { "pcmpeqd", MX, EM, XX },
2047 { "emms", XX, XX, XX },
252b5132 2048 /* 78 */
57d91c3c
ILT		 2049 { "(bad)", XX, XX, XX },
2050 { "(bad)", XX, XX, XX },
2051 { "(bad)", XX, XX, XX },
2052 { "(bad)", XX, XX, XX },
2053 { "(bad)", XX, XX, XX },
2054 { "(bad)", XX, XX, XX },
041bd2e0
JH		 2055 { PREGRP23 },
2056 { PREGRP20 },
252b5132 2057 /* 80 */
57d91c3c
ILT		 2058 { "jo", Jv, XX, XX },
2059 { "jno", Jv, XX, XX },
2060 { "jb", Jv, XX, XX },
2061 { "jae", Jv, XX, XX },
2062 { "je", Jv, XX, XX },
2063 { "jne", Jv, XX, XX },
2064 { "jbe", Jv, XX, XX },
2065 { "ja", Jv, XX, XX },
252b5132 2066 /* 88 */
57d91c3c
ILT		 2067 { "js", Jv, XX, XX },
2068 { "jns", Jv, XX, XX },
2069 { "jp", Jv, XX, XX },
2070 { "jnp", Jv, XX, XX },
2071 { "jl", Jv, XX, XX },
2072 { "jge", Jv, XX, XX },
2073 { "jle", Jv, XX, XX },
2074 { "jg", Jv, XX, XX },
252b5132 2075 /* 90 */
57d91c3c
ILT		 2076 { "seto", Eb, XX, XX },
2077 { "setno", Eb, XX, XX },
2078 { "setb", Eb, XX, XX },
2079 { "setae", Eb, XX, XX },
2080 { "sete", Eb, XX, XX },
2081 { "setne", Eb, XX, XX },
2082 { "setbe", Eb, XX, XX },
2083 { "seta", Eb, XX, XX },
252b5132 2084 /* 98 */
57d91c3c
ILT		 2085 { "sets", Eb, XX, XX },
2086 { "setns", Eb, XX, XX },
2087 { "setp", Eb, XX, XX },
2088 { "setnp", Eb, XX, XX },
2089 { "setl", Eb, XX, XX },
2090 { "setge", Eb, XX, XX },
2091 { "setle", Eb, XX, XX },
2092 { "setg", Eb, XX, XX },
252b5132 2093 /* a0 */
57d91c3c
ILT		 2094 { "push", fs, XX, XX },
2095 { "pop", fs, XX, XX },
2096 { "cpuid", XX, XX, XX },
2097 { "bt", Ev, Gv, XX },
c608c12e
AM		 2098 { "shld", Ev, Gv, Ib },
2099 { "shld", Ev, Gv, CL },
57d91c3c
ILT		 2100 { "(bad)", XX, XX, XX },
2101 { "(bad)", XX, XX, XX },
252b5132 2102 /* a8 */
57d91c3c
ILT		 2103 { "push", gs, XX, XX },
2104 { "pop", gs, XX, XX },
2105 { "rsm" , XX, XX, XX},
2106 { "bts", Ev, Gv, XX },
c608c12e
AM		 2107 { "shrd", Ev, Gv, Ib },
2108 { "shrd", Ev, Gv, CL },
252b5132 2109 { GRP13 },
57d91c3c 2110 { "imul", Gv, Ev, XX },
252b5132 2111 /* b0 */
57d91c3c
ILT		 2112 { "cmpxchg", Eb, Gb, XX },
2113 { "cmpxchg", Ev, Gv, XX },
2114 { "lss", Gv, Mp, XX },
2115 { "btr", Ev, Gv, XX },
2116 { "lfs", Gv, Mp, XX },
2117 { "lgs", Gv, Mp, XX },
2118 { "movzx", Gv, Eb, XX },
2119 { "movzx", Gv, Ew, XX },
252b5132 2120 /* b8 */
57d91c3c
ILT		 2121 { "(bad)", XX, XX, XX },
2122 { "ud2b", XX, XX, XX },
252b5132 2123 { GRP8 },
57d91c3c
ILT		 2124 { "btc", Ev, Gv, XX },
2125 { "bsf", Gv, Ev, XX },
2126 { "bsr", Gv, Ev, XX },
2127 { "movsx", Gv, Eb, XX },
2128 { "movsx", Gv, Ew, XX },
252b5132 2129 /* c0 */
57d91c3c
ILT		 2130 { "xadd", Eb, Gb, XX },
2131 { "xadd", Ev, Gv, XX },
c608c12e 2132 { PREGRP1 },
041bd2e0 2133 { "movnti", Ev, Gv, XX },
992aaec9
AM		 2134 { "pinsrw", MX, Ed, Ib },
2135 { "pextrw", Gd, MS, Ib },
041bd2e0 2136 { "shufpX", XM, EX, Ib },
252b5132
RH		 2137 { GRP9 },
2138 /* c8 */
52b15da3
JH		 2139 { "bswap", RMeAX, XX, XX }, /* bswap doesn't support 16 bit regs */
2140 { "bswap", RMeCX, XX, XX },
2141 { "bswap", RMeDX, XX, XX },
2142 { "bswap", RMeBX, XX, XX },
2143 { "bswap", RMeSP, XX, XX },
2144 { "bswap", RMeBP, XX, XX },
2145 { "bswap", RMeSI, XX, XX },
2146 { "bswap", RMeDI, XX, XX },
252b5132 2147 /* d0 */
57d91c3c
ILT		 2148 { "(bad)", XX, XX, XX },
2149 { "psrlw", MX, EM, XX },
2150 { "psrld", MX, EM, XX },
2151 { "psrlq", MX, EM, XX },
87890af0 2152 { "paddq", MX, EM, XX },
57d91c3c 2153 { "pmullw", MX, EM, XX },
041bd2e0 2154 { PREGRP21 },
992aaec9 2155 { "pmovmskb", Gd, MS, XX },
252b5132 2156 /* d8 */
57d91c3c
ILT		 2157 { "psubusb", MX, EM, XX },
2158 { "psubusw", MX, EM, XX },
2159 { "pminub", MX, EM, XX },
2160 { "pand", MX, EM, XX },
2161 { "paddusb", MX, EM, XX },
2162 { "paddusw", MX, EM, XX },
2163 { "pmaxub", MX, EM, XX },
2164 { "pandn", MX, EM, XX },
252b5132 2165 /* e0 */
57d91c3c
ILT		 2166 { "pavgb", MX, EM, XX },
2167 { "psraw", MX, EM, XX },
2168 { "psrad", MX, EM, XX },
2169 { "pavgw", MX, EM, XX },
2170 { "pmulhuw", MX, EM, XX },
2171 { "pmulhw", MX, EM, XX },
041bd2e0 2172 { PREGRP15 },
0f17484f 2173 { PREGRP25 },
252b5132 2174 /* e8 */
57d91c3c
ILT		 2175 { "psubsb", MX, EM, XX },
2176 { "psubsw", MX, EM, XX },
2177 { "pminsw", MX, EM, XX },
2178 { "por", MX, EM, XX },
2179 { "paddsb", MX, EM, XX },
2180 { "paddsw", MX, EM, XX },
2181 { "pmaxsw", MX, EM, XX },
2182 { "pxor", MX, EM, XX },
252b5132 2183 /* f0 */
57d91c3c
ILT		 2184 { "(bad)", XX, XX, XX },
2185 { "psllw", MX, EM, XX },
2186 { "pslld", MX, EM, XX },
2187 { "psllq", MX, EM, XX },
041bd2e0 2188 { "pmuludq", MX, EM, XX },
57d91c3c
ILT		 2189 { "pmaddwd", MX, EM, XX },
2190 { "psadbw", MX, EM, XX },
041bd2e0 2191 { PREGRP18 },
252b5132 2192 /* f8 */
57d91c3c
ILT		 2193 { "psubb", MX, EM, XX },
2194 { "psubw", MX, EM, XX },
2195 { "psubd", MX, EM, XX },
87890af0 2196 { "psubq", MX, EM, XX },
57d91c3c
ILT		 2197 { "paddb", MX, EM, XX },
2198 { "paddw", MX, EM, XX },
2199 { "paddd", MX, EM, XX },
2200 { "(bad)", XX, XX, XX }
252b5132
RH		 2201};
2202
2203static const unsigned char onebyte_has_modrm[256] = {
c608c12e
AM		 2204 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2205 /* ------------------------------- */
2206 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
2207 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
2208 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
2209 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
2210 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
2211 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
2212 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
2213 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
2214 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
2215 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
2216 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
2217 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
2218 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
2219 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
2220 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
2221 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
2222 /* ------------------------------- */
2223 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 2224};
2225
2226static const unsigned char twobyte_has_modrm[256] = {
c608c12e
AM		 2227 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2228 /* ------------------------------- */
252b5132 2229 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
c608c12e
AM		 2230 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
2231 /* 20 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 2f */
252b5132
RH		 2232 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
2233 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
c608c12e 2234 /* 50 */ 1,1,1,1,1,1,1,1,1,1,0,0,1,1,1,1, /* 5f */
252b5132 2235 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,1,1, /* 6f */
c608c12e 2236 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */
252b5132
RH		 2237 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
2238 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
2239 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
2240 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
2241 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
87890af0 2242 /* d0 */ 0,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* df */
c608c12e 2243 /* e0 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* ef */
87890af0 2244 /* f0 */ 0,1,1,1,0,1,1,1,1,1,1,1,1,1,1,0 /* ff */
c608c12e
AM		 2245 /* ------------------------------- */
2246 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2247};
2248
041bd2e0 2249static const unsigned char twobyte_uses_SSE_prefix[256] = {
c608c12e
AM		 2250 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
2251 /* ------------------------------- */
2252 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
2253 /* 10 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
2254 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
2255 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
2256 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
041bd2e0
JH		 2257 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
2258 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
2259 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
c608c12e
AM		 2260 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
2261 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
2262 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
2263 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
2264 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
041bd2e0
JH		 2265 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
2266 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
2267 /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
c608c12e
AM		 2268 /* ------------------------------- */
2269 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
252b5132
RH		 2270};
2271
2272static char obuf[100];
2273static char *obufp;
2274static char scratchbuf[100];
2275static unsigned char *start_codep;
2276static unsigned char *insn_codep;
2277static unsigned char *codep;
2278static disassemble_info *the_info;
2279static int mod;
2280static int rm;
2281static int reg;
2da11e11 2282static void oappend PARAMS ((const char *s));
252b5132 2283
52b15da3
JH		 2284static const char *names64[] = {
2285 "%rax","%rcx","%rdx","%rbx", "%rsp","%rbp","%rsi","%rdi",
2286 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
2287};
2288static const char *names32[] = {
252b5132 2289 "%eax","%ecx","%edx","%ebx", "%esp","%ebp","%esi","%edi",
52b15da3 2290 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
252b5132 2291};
2da11e11 2292static const char *names16[] = {
252b5132 2293 "%ax","%cx","%dx","%bx","%sp","%bp","%si","%di",
52b15da3 2294 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
252b5132 2295};
2da11e11 2296static const char *names8[] = {
252b5132
RH		 2297 "%al","%cl","%dl","%bl","%ah","%ch","%dh","%bh",
2298};
52b15da3 2299static const char *names8rex[] = {
c2419411 2300 "%al","%cl","%dl","%bl","%spl", "%bpl", "%sil", "%dil",
52b15da3
JH		 2301 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
2302};
2da11e11 2303static const char *names_seg[] = {
252b5132
RH		 2304 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
2305};
2da11e11 2306static const char *index16[] = {
252b5132
RH		 2307 "%bx,%si","%bx,%di","%bp,%si","%bp,%di","%si","%di","%bp","%bx"
2308};
2309
2da11e11 2310static const struct dis386 grps[][8] = {
252b5132
RH		 2311 /* GRP1b */
2312 {
57d91c3c
ILT		 2313 { "addA", Eb, Ib, XX },
2314 { "orA", Eb, Ib, XX },
2315 { "adcA", Eb, Ib, XX },
2316 { "sbbA", Eb, Ib, XX },
2317 { "andA", Eb, Ib, XX },
2318 { "subA", Eb, Ib, XX },
2319 { "xorA", Eb, Ib, XX },
2320 { "cmpA", Eb, Ib, XX }
252b5132
RH		 2321 },
2322 /* GRP1S */
2323 {
57d91c3c
ILT		 2324 { "addQ", Ev, Iv, XX },
2325 { "orQ", Ev, Iv, XX },
2326 { "adcQ", Ev, Iv, XX },
2327 { "sbbQ", Ev, Iv, XX },
2328 { "andQ", Ev, Iv, XX },
2329 { "subQ", Ev, Iv, XX },
2330 { "xorQ", Ev, Iv, XX },
2331 { "cmpQ", Ev, Iv, XX }
252b5132
RH		 2332 },
2333 /* GRP1Ss */
2334 {
57d91c3c
ILT		 2335 { "addQ", Ev, sIb, XX },
2336 { "orQ", Ev, sIb, XX },
2337 { "adcQ", Ev, sIb, XX },
2338 { "sbbQ", Ev, sIb, XX },
2339 { "andQ", Ev, sIb, XX },
2340 { "subQ", Ev, sIb, XX },
2341 { "xorQ", Ev, sIb, XX },
2342 { "cmpQ", Ev, sIb, XX }
252b5132
RH		 2343 },
2344 /* GRP2b */
2345 {
57d91c3c
ILT		 2346 { "rolA", Eb, Ib, XX },
2347 { "rorA", Eb, Ib, XX },
2348 { "rclA", Eb, Ib, XX },
2349 { "rcrA", Eb, Ib, XX },
2350 { "shlA", Eb, Ib, XX },
2351 { "shrA", Eb, Ib, XX },
2352 { "(bad)", XX, XX, XX },
2353 { "sarA", Eb, Ib, XX },
252b5132
RH		 2354 },
2355 /* GRP2S */
2356 {
57d91c3c
ILT		 2357 { "rolQ", Ev, Ib, XX },
2358 { "rorQ", Ev, Ib, XX },
2359 { "rclQ", Ev, Ib, XX },
2360 { "rcrQ", Ev, Ib, XX },
2361 { "shlQ", Ev, Ib, XX },
2362 { "shrQ", Ev, Ib, XX },
2363 { "(bad)", XX, XX, XX },
2364 { "sarQ", Ev, Ib, XX },
252b5132
RH		 2365 },
2366 /* GRP2b_one */
2367 {
57d91c3c
ILT		 2368 { "rolA", Eb, XX, XX },
2369 { "rorA", Eb, XX, XX },
2370 { "rclA", Eb, XX, XX },
2371 { "rcrA", Eb, XX, XX },
2372 { "shlA", Eb, XX, XX },
2373 { "shrA", Eb, XX, XX },
2374 { "(bad)", XX, XX, XX },
2375 { "sarA", Eb, XX, XX },
252b5132
RH		 2376 },
2377 /* GRP2S_one */
2378 {
57d91c3c
ILT		 2379 { "rolQ", Ev, XX, XX },
2380 { "rorQ", Ev, XX, XX },
2381 { "rclQ", Ev, XX, XX },
2382 { "rcrQ", Ev, XX, XX },
2383 { "shlQ", Ev, XX, XX },
2384 { "shrQ", Ev, XX, XX },
2385 { "(bad)", XX, XX, XX},
2386 { "sarQ", Ev, XX, XX },
252b5132
RH		 2387 },
2388 /* GRP2b_cl */
2389 {
57d91c3c
ILT		 2390 { "rolA", Eb, CL, XX },
2391 { "rorA", Eb, CL, XX },
2392 { "rclA", Eb, CL, XX },
2393 { "rcrA", Eb, CL, XX },
2394 { "shlA", Eb, CL, XX },
2395 { "shrA", Eb, CL, XX },
2396 { "(bad)", XX, XX, XX },
2397 { "sarA", Eb, CL, XX },
252b5132
RH		 2398 },
2399 /* GRP2S_cl */
2400 {
57d91c3c
ILT		 2401 { "rolQ", Ev, CL, XX },
2402 { "rorQ", Ev, CL, XX },
2403 { "rclQ", Ev, CL, XX },
2404 { "rcrQ", Ev, CL, XX },
2405 { "shlQ", Ev, CL, XX },
2406 { "shrQ", Ev, CL, XX },
2407 { "(bad)", XX, XX, XX },
2408 { "sarQ", Ev, CL, XX }
252b5132
RH		 2409 },
2410 /* GRP3b */
2411 {
57d91c3c
ILT		 2412 { "testA", Eb, Ib, XX },
2413 { "(bad)", Eb, XX, XX },
2414 { "notA", Eb, XX, XX },
2415 { "negA", Eb, XX, XX },
2416 { "mulB", AL, Eb, XX },
2417 { "imulB", AL, Eb, XX },
2418 { "divB", AL, Eb, XX },
2419 { "idivB", AL, Eb, XX }
252b5132
RH		 2420 },
2421 /* GRP3S */
2422 {
57d91c3c
ILT		 2423 { "testQ", Ev, Iv, XX },
2424 { "(bad)", XX, XX, XX },
2425 { "notQ", Ev, XX, XX },
2426 { "negQ", Ev, XX, XX },
2427 { "mulS", eAX, Ev, XX },
2428 { "imulS", eAX, Ev, XX },
2429 { "divS", eAX, Ev, XX },
2430 { "idivS", eAX, Ev, XX },
252b5132
RH		 2431 },
2432 /* GRP4 */
2433 {
57d91c3c
ILT		 2434 { "incA", Eb, XX, XX },
2435 { "decA", Eb, XX, XX },
2436 { "(bad)", XX, XX, XX },
2437 { "(bad)", XX, XX, XX },
2438 { "(bad)", XX, XX, XX },
2439 { "(bad)", XX, XX, XX },
2440 { "(bad)", XX, XX, XX },
2441 { "(bad)", XX, XX, XX },
252b5132
RH		 2442 },
2443 /* GRP5 */
2444 {
57d91c3c
ILT		 2445 { "incQ", Ev, XX, XX },
2446 { "decQ", Ev, XX, XX },
52b15da3
JH		 2447 { "callI", indirEv, XX, XX },
2448 { "lcallI", indirEv, XX, XX },
2449 { "jmpI", indirEv, XX, XX },
2450 { "ljmpI", indirEv, XX, XX },
90530880 2451 { "pushT", Ev, XX, XX },
57d91c3c 2452 { "(bad)", XX, XX, XX },
252b5132
RH		 2453 },
2454 /* GRP6 */
2455 {
57d91c3c
ILT		 2456 { "sldt", Ew, XX, XX },
2457 { "str", Ew, XX, XX },
2458 { "lldt", Ew, XX, XX },
2459 { "ltr", Ew, XX, XX },
2460 { "verr", Ew, XX, XX },
2461 { "verw", Ew, XX, XX },
2462 { "(bad)", XX, XX, XX },
2463 { "(bad)", XX, XX, XX }
252b5132
RH		 2464 },
2465 /* GRP7 */
2466 {
57d91c3c
ILT		 2467 { "sgdt", Ew, XX, XX },
2468 { "sidt", Ew, XX, XX },
2469 { "lgdt", Ew, XX, XX },
2470 { "lidt", Ew, XX, XX },
2471 { "smsw", Ew, XX, XX },
2472 { "(bad)", XX, XX, XX },
2473 { "lmsw", Ew, XX, XX },
2474 { "invlpg", Ew, XX, XX },
252b5132
RH		 2475 },
2476 /* GRP8 */
2477 {
57d91c3c
ILT		 2478 { "(bad)", XX, XX, XX },
2479 { "(bad)", XX, XX, XX },
2480 { "(bad)", XX, XX, XX },
2481 { "(bad)", XX, XX, XX },
2482 { "btQ", Ev, Ib, XX },
2483 { "btsQ", Ev, Ib, XX },
2484 { "btrQ", Ev, Ib, XX },
2485 { "btcQ", Ev, Ib, XX },
252b5132
RH		 2486 },
2487 /* GRP9 */
2488 {
57d91c3c
ILT		 2489 { "(bad)", XX, XX, XX },
2490 { "cmpxchg8b", Ev, XX, XX },
2491 { "(bad)", XX, XX, XX },
2492 { "(bad)", XX, XX, XX },
2493 { "(bad)", XX, XX, XX },
2494 { "(bad)", XX, XX, XX },
2495 { "(bad)", XX, XX, XX },
2496 { "(bad)", XX, XX, XX },
252b5132
RH		 2497 },
2498 /* GRP10 */
2499 {
57d91c3c
ILT		 2500 { "(bad)", XX, XX, XX },
2501 { "(bad)", XX, XX, XX },
2502 { "psrlw", MS, Ib, XX },
2503 { "(bad)", XX, XX, XX },
2504 { "psraw", MS, Ib, XX },
2505 { "(bad)", XX, XX, XX },
2506 { "psllw", MS, Ib, XX },
2507 { "(bad)", XX, XX, XX },
252b5132
RH		 2508 },
2509 /* GRP11 */
2510 {
57d91c3c
ILT		 2511 { "(bad)", XX, XX, XX },
2512 { "(bad)", XX, XX, XX },
2513 { "psrld", MS, Ib, XX },
2514 { "(bad)", XX, XX, XX },
2515 { "psrad", MS, Ib, XX },
2516 { "(bad)", XX, XX, XX },
2517 { "pslld", MS, Ib, XX },
2518 { "(bad)", XX, XX, XX },
252b5132
RH		 2519 },
2520 /* GRP12 */
2521 {
57d91c3c
ILT		 2522 { "(bad)", XX, XX, XX },
2523 { "(bad)", XX, XX, XX },
2524 { "psrlq", MS, Ib, XX },
041bd2e0 2525 { "psrldq", MS, Ib, XX },
57d91c3c
ILT		 2526 { "(bad)", XX, XX, XX },
2527 { "(bad)", XX, XX, XX },
2528 { "psllq", MS, Ib, XX },
041bd2e0 2529 { "pslldq", MS, Ib, XX },
252b5132
RH		 2530 },
2531 /* GRP13 */
2532 {
57d91c3c
ILT		 2533 { "fxsave", Ev, XX, XX },
2534 { "fxrstor", Ev, XX, XX },
2535 { "ldmxcsr", Ev, XX, XX },
2536 { "stmxcsr", Ev, XX, XX },
2537 { "(bad)", XX, XX, XX },
041bd2e0
JH		 2538 { "lfence", None, XX, XX },
2539 { "mfence", None, XX, XX },
57d91c3c 2540 { "sfence", None, XX, XX },
041bd2e0 2541 /* FIXME: the sfence with memory operand is clflush! */
c608c12e
AM		 2542 },
2543 /* GRP14 */
2544 {
57d91c3c
ILT		 2545 { "prefetchnta", Ev, XX, XX },
2546 { "prefetcht0", Ev, XX, XX },
2547 { "prefetcht1", Ev, XX, XX },
2548 { "prefetcht2", Ev, XX, XX },
2549 { "(bad)", XX, XX, XX },
2550 { "(bad)", XX, XX, XX },
2551 { "(bad)", XX, XX, XX },
2552 { "(bad)", XX, XX, XX },
252b5132 2553 },
c608c12e 2554 /* GRPAMD */
252b5132 2555 {
57d91c3c
ILT		 2556 { "prefetch", Eb, XX, XX },
2557 { "prefetchw", Eb, XX, XX },
2558 { "(bad)", XX, XX, XX },
2559 { "(bad)", XX, XX, XX },
2560 { "(bad)", XX, XX, XX },
2561 { "(bad)", XX, XX, XX },
2562 { "(bad)", XX, XX, XX },
2563 { "(bad)", XX, XX, XX },
252b5132
RH		 2564 }
2565
2566};
2567
041bd2e0 2568static const struct dis386 prefix_user_table[][4] = {
c608c12e
AM		 2569 /* PREGRP0 */
2570 {
57d91c3c
ILT		 2571 { "addps", XM, EX, XX },
2572 { "addss", XM, EX, XX },
041bd2e0
JH		 2573 { "addpd", XM, EX, XX },
2574 { "addsd", XM, EX, XX },
c608c12e
AM		 2575 },
2576 /* PREGRP1 */
2577 {
2578 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX */
2579 { "", XM, EX, OPSIMD },
041bd2e0
JH		 2580 { "", XM, EX, OPSIMD },
2581 { "", XM, EX, OPSIMD },
c608c12e
AM		 2582 },
2583 /* PREGRP2 */
2584 {
57d91c3c 2585 { "cvtpi2ps", XM, EM, XX },
76f227a5 2586 { "cvtsi2ssY", XM, Ev, XX },
041bd2e0 2587 { "cvtpi2pd", XM, EM, XX },
76f227a5 2588 { "cvtsi2sdY", XM, Ev, XX },
c608c12e
AM		 2589 },
2590 /* PREGRP3 */
2591 {
57d91c3c 2592 { "cvtps2pi", MX, EX, XX },
76f227a5 2593 { "cvtss2siY", Gv, EX, XX },
041bd2e0 2594 { "cvtpd2pi", MX, EX, XX },
76f227a5 2595 { "cvtsd2siY", Gv, EX, XX },
c608c12e
AM		 2596 },
2597 /* PREGRP4 */
2598 {
57d91c3c 2599 { "cvttps2pi", MX, EX, XX },
76f227a5 2600 { "cvttss2siY", Gv, EX, XX },
041bd2e0 2601 { "cvttpd2pi", MX, EX, XX },
76f227a5 2602 { "cvttsd2siY", Gv, EX, XX },
c608c12e
AM		 2603 },
2604 /* PREGRP5 */
2605 {
57d91c3c
ILT		 2606 { "divps", XM, EX, XX },
2607 { "divss", XM, EX, XX },
041bd2e0
JH		 2608 { "divpd", XM, EX, XX },
2609 { "divsd", XM, EX, XX },
c608c12e
AM		 2610 },
2611 /* PREGRP6 */
2612 {
57d91c3c
ILT		 2613 { "maxps", XM, EX, XX },
2614 { "maxss", XM, EX, XX },
041bd2e0
JH		 2615 { "maxpd", XM, EX, XX },
2616 { "maxsd", XM, EX, XX },
c608c12e
AM		 2617 },
2618 /* PREGRP7 */
2619 {
57d91c3c
ILT		 2620 { "minps", XM, EX, XX },
2621 { "minss", XM, EX, XX },
041bd2e0
JH		 2622 { "minpd", XM, EX, XX },
2623 { "minsd", XM, EX, XX },
c608c12e
AM		 2624 },
2625 /* PREGRP8 */
2626 {
57d91c3c
ILT		 2627 { "movups", XM, EX, XX },
2628 { "movss", XM, EX, XX },
041bd2e0
JH		 2629 { "movupd", XM, EX, XX },
2630 { "movsd", XM, EX, XX },
c608c12e
AM		 2631 },
2632 /* PREGRP9 */
2633 {
57d91c3c
ILT		 2634 { "movups", EX, XM, XX },
2635 { "movss", EX, XM, XX },
041bd2e0
JH		 2636 { "movupd", EX, XM, XX },
2637 { "movsd", EX, XM, XX },
c608c12e
AM		 2638 },
2639 /* PREGRP10 */
2640 {
57d91c3c
ILT		 2641 { "mulps", XM, EX, XX },
2642 { "mulss", XM, EX, XX },
041bd2e0
JH		 2643 { "mulpd", XM, EX, XX },
2644 { "mulsd", XM, EX, XX },
c608c12e
AM		 2645 },
2646 /* PREGRP11 */
2647 {
57d91c3c
ILT		 2648 { "rcpps", XM, EX, XX },
2649 { "rcpss", XM, EX, XX },
041bd2e0
JH		 2650 { "(bad)", XM, EX, XX },
2651 { "(bad)", XM, EX, XX },
c608c12e
AM		 2652 },
2653 /* PREGRP12 */
2654 {
57d91c3c
ILT		 2655 { "rsqrtps", XM, EX, XX },
2656 { "rsqrtss", XM, EX, XX },
041bd2e0
JH		 2657 { "(bad)", XM, EX, XX },
2658 { "(bad)", XM, EX, XX },
c608c12e
AM		 2659 },
2660 /* PREGRP13 */
2661 {
57d91c3c
ILT		 2662 { "sqrtps", XM, EX, XX },
2663 { "sqrtss", XM, EX, XX },
041bd2e0
JH		 2664 { "sqrtpd", XM, EX, XX },
2665 { "sqrtsd", XM, EX, XX },
c608c12e
AM		 2666 },
2667 /* PREGRP14 */
2668 {
57d91c3c
ILT		 2669 { "subps", XM, EX, XX },
2670 { "subss", XM, EX, XX },
041bd2e0
JH		 2671 { "subpd", XM, EX, XX },
2672 { "subsd", XM, EX, XX },
2673 },
2674 /* PREGRP15 */
2675 {
2676 { "(bad)", XM, EX, XX },
2677 { "cvtdq2pd", XM, EX, XX },
2678 { "cvttpd2dq", XM, EX, XX },
2679 { "cvtpd2dq", XM, EX, XX },
2680 },
2681 /* PREGRP16 */
2682 {
2683 { "cvtdq2ps", XM, EX, XX },
2684 { "cvttps2dq",XM, EX, XX },
2685 { "cvtps2dq",XM, EX, XX },
2686 { "(bad)", XM, EX, XX },
2687 },
2688 /* PREGRP17 */
2689 {
2690 { "cvtps2pd", XM, EX, XX },
2691 { "cvtss2sd", XM, EX, XX },
2692 { "cvtpd2ps", XM, EX, XX },
2693 { "cvtsd2ss", XM, EX, XX },
2694 },
2695 /* PREGRP18 */
2696 {
992aaec9 2697 { "maskmovq", MX, MS, XX },
041bd2e0 2698 { "(bad)", XM, EX, XX },
0f17484f 2699 { "maskmovdqu", XM, EX, XX },
041bd2e0
JH		 2700 { "(bad)", XM, EX, XX },
2701 },
2702 /* PREGRP19 */
2703 {
2704 { "movq", MX, EM, XX },
2705 { "movdqu", XM, EX, XX },
2706 { "movdqa", XM, EX, XX },
2707 { "(bad)", XM, EX, XX },
2708 },
2709 /* PREGRP20 */
2710 {
2711 { "movq", EM, MX, XX },
2712 { "movdqu", EX, XM, XX },
2713 { "movdqa", EX, XM, XX },
2714 { "(bad)", EX, XM, XX },
2715 },
2716 /* PREGRP21 */
2717 {
2718 { "(bad)", EX, XM, XX },
67d6227d 2719 { "movq2dq", XM, MS, XX },
041bd2e0 2720 { "movq", EX, XM, XX },
67d6227d 2721 { "movdq2q", MX, XS, XX },
041bd2e0
JH		 2722 },
2723 /* PREGRP22 */
2724 {
2725 { "pshufw", MX, EM, Ib },
2726 { "pshufhw", XM, EX, Ib },
2727 { "pshufd", XM, EX, Ib },
2728 { "pshuflw", XM, EX, Ib },
2729 },
2730 /* PREGRP23 */
2731 {
2732 { "movd", Ed, MX, XX },
67d6227d 2733 { "movq", XM, EX, XX },
041bd2e0 2734 { "movd", Ed, XM, XX },
0f17484f 2735 { "(bad)", Ed, XM, XX },
041bd2e0
JH		 2736 },
2737 /* PREGRP24 */
2738 {
0f17484f
AM		 2739 { "(bad)", MX, EX, XX },
2740 { "(bad)", XM, EX, XX },
041bd2e0 2741 { "punpckhqdq", XM, EX, XX },
0f17484f
AM		 2742 { "(bad)", XM, EX, XX },
2743 },
2744 /* PREGRP25 */
2745 {
2746 { "movntq", Ev, MX, XX },
2747 { "(bad)", Ev, XM, XX },
2748 { "movntdq", Ev, XM, XX },
2749 { "(bad)", Ev, XM, XX },
2750 },
2751 /* PREGRP26 */
2752 {
2753 { "(bad)", MX, EX, XX },
2754 { "(bad)", XM, EX, XX },
2755 { "punpcklqdq", XM, EX, XX },
2756 { "(bad)", XM, EX, XX },
041bd2e0 2757 },
c608c12e
AM		 2758};
2759
2760#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
2761
252b5132
RH		 2762static void
2763ckprefix ()
2764{
52b15da3
JH		 2765 int newrex;
2766 rex = 0;
252b5132 2767 prefixes = 0;
7d421014 2768 used_prefixes = 0;
52b15da3 2769 rex_used = 0;
252b5132
RH		 2770 while (1)
2771 {
2772 FETCH_DATA (the_info, codep + 1);
52b15da3 2773 newrex = 0;
252b5132
RH		 2774 switch (*codep)
2775 {
52b15da3
JH		 2776 /* REX prefixes family. */
2777 case 0x40:
2778 case 0x41:
2779 case 0x42:
2780 case 0x43:
2781 case 0x44:
2782 case 0x45:
2783 case 0x46:
2784 case 0x47:
2785 case 0x48:
2786 case 0x49:
2787 case 0x4a:
2788 case 0x4b:
2789 case 0x4c:
2790 case 0x4d:
2791 case 0x4e:
2792 case 0x4f:
2793 if (mode_64bit)
2794 newrex = *codep;
2795 else
2796 return;
2797 break;
252b5132
RH		 2798 case 0xf3:
2799 prefixes |= PREFIX_REPZ;
2800 break;
2801 case 0xf2:
2802 prefixes |= PREFIX_REPNZ;
2803 break;
2804 case 0xf0:
2805 prefixes |= PREFIX_LOCK;
2806 break;
2807 case 0x2e:
2808 prefixes |= PREFIX_CS;
2809 break;
2810 case 0x36:
2811 prefixes |= PREFIX_SS;
2812 break;
2813 case 0x3e:
2814 prefixes |= PREFIX_DS;
2815 break;
2816 case 0x26:
2817 prefixes |= PREFIX_ES;
2818 break;
2819 case 0x64:
2820 prefixes |= PREFIX_FS;
2821 break;
2822 case 0x65:
2823 prefixes |= PREFIX_GS;
2824 break;
2825 case 0x66:
2826 prefixes |= PREFIX_DATA;
2827 break;
2828 case 0x67:
2829 prefixes |= PREFIX_ADDR;
2830 break;
5076851f 2831 case FWAIT_OPCODE:
252b5132
RH		 2832 /* fwait is really an instruction. If there are prefixes
2833 before the fwait, they belong to the fwait, *not* to the
2834 following instruction. */
2835 if (prefixes)
2836 {
2837 prefixes |= PREFIX_FWAIT;
2838 codep++;
2839 return;
2840 }
2841 prefixes = PREFIX_FWAIT;
2842 break;
2843 default:
2844 return;
2845 }
52b15da3
JH		 2846 /* Rex is ignored when followed by another prefix. */
2847 if (rex)
2848 {
2849 oappend (prefix_name (rex, 0));
2850 oappend (" ");
2851 }
2852 rex = newrex;
252b5132
RH		 2853 codep++;
2854 }
2855}
2856
7d421014
ILT		 2857/* Return the name of the prefix byte PREF, or NULL if PREF is not a
2858 prefix byte. */
2859
2860static const char *
2861prefix_name (pref, sizeflag)
2862 int pref;
2863 int sizeflag;
2864{
2865 switch (pref)
2866 {
52b15da3
JH		 2867 /* REX prefixes family. */
2868 case 0x40:
2869 return "rex";
2870 case 0x41:
2871 return "rexZ";
2872 case 0x42:
2873 return "rexY";
2874 case 0x43:
2875 return "rexYZ";
2876 case 0x44:
2877 return "rexX";
2878 case 0x45:
2879 return "rexXZ";
2880 case 0x46:
2881 return "rexXY";
2882 case 0x47:
2883 return "rexXYZ";
2884 case 0x48:
2885 return "rex64";
2886 case 0x49:
2887 return "rex64Z";
2888 case 0x4a:
2889 return "rex64Y";
2890 case 0x4b:
2891 return "rex64YZ";
2892 case 0x4c:
2893 return "rex64X";
2894 case 0x4d:
2895 return "rex64XZ";
2896 case 0x4e:
2897 return "rex64XY";
2898 case 0x4f:
2899 return "rex64XYZ";
7d421014
ILT		 2900 case 0xf3:
2901 return "repz";
2902 case 0xf2:
2903 return "repnz";
2904 case 0xf0:
2905 return "lock";
2906 case 0x2e:
2907 return "cs";
2908 case 0x36:
2909 return "ss";
2910 case 0x3e:
2911 return "ds";
2912 case 0x26:
2913 return "es";
2914 case 0x64:
2915 return "fs";
2916 case 0x65:
2917 return "gs";
2918 case 0x66:
2919 return (sizeflag & DFLAG) ? "data16" : "data32";
2920 case 0x67:
2921 return (sizeflag & AFLAG) ? "addr16" : "addr32";
2922 case FWAIT_OPCODE:
2923 return "fwait";
2924 default:
2925 return NULL;
2926 }
2927}
2928
252b5132
RH		 2929static char op1out[100], op2out[100], op3out[100];
2930static int op_ad, op_index[3];
2931static unsigned int op_address[3];
52b15da3
JH		 2932static unsigned int op_riprel[3];
2933static bfd_vma start_pc;
252b5132
RH		 2934
2935\f
2936/*
2937 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
2938 * (see topic "Redundant prefixes" in the "Differences from 8086"
2939 * section of the "Virtual 8086 Mode" chapter.)
2940 * 'pc' should be the address of this instruction, it will
2941 * be used to print the target address if this is a relative jump or call
2942 * The function returns the length of this instruction in bytes.
2943 */
2944
252b5132
RH		 2945static int print_insn_i386
2946 PARAMS ((bfd_vma pc, disassemble_info *info));
2947
2948static char intel_syntax;
2949static char open_char;
2950static char close_char;
2951static char separator_char;
2952static char scale_char;
2953
2954int
2955print_insn_i386_att (pc, info)
2956 bfd_vma pc;
2957 disassemble_info *info;
2958{
2959 intel_syntax = 0;
2960 open_char = '(';
2961 close_char = ')';
2962 separator_char = ',';
2963 scale_char = ',';
2964
2965 return print_insn_i386 (pc, info);
2966}
2967
2968int
2969print_insn_i386_intel (pc, info)
2970 bfd_vma pc;
2971 disassemble_info *info;
2972{
2973 intel_syntax = 1;
2974 open_char = '[';
2975 close_char = ']';
2976 separator_char = '+';
2977 scale_char = '*';
2978
2979 return print_insn_i386 (pc, info);
2980}
2981
2982static int
2983print_insn_i386 (pc, info)
2984 bfd_vma pc;
2985 disassemble_info *info;
2986{
2da11e11 2987 const struct dis386 *dp;
252b5132
RH		 2988 int i;
2989 int two_source_ops;
2990 char *first, *second, *third;
2991 int needcomma;
2992 unsigned char need_modrm;
041bd2e0 2993 unsigned char uses_SSE_prefix;
57d91c3c
ILT		 2994 VOLATILE int sizeflag;
2995 VOLATILE int orig_sizeflag;
252b5132
RH		 2996
2997 struct dis_private priv;
2998 bfd_byte *inbuf = priv.the_buffer;
2999
52b15da3
JH		 3000 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
3001 || info->mach == bfd_mach_x86_64);
3002
2da11e11 3003 if (info->mach == bfd_mach_i386_i386
52b15da3
JH		 3004 || info->mach == bfd_mach_x86_64
3005 || info->mach == bfd_mach_i386_i386_intel_syntax
3006 || info->mach == bfd_mach_x86_64_intel_syntax)
2da11e11
AM		 3007 sizeflag = AFLAG|DFLAG;
3008 else if (info->mach == bfd_mach_i386_i8086)
3009 sizeflag = 0;
3010 else
3011 abort ();
7d421014 3012 orig_sizeflag = sizeflag;
2da11e11 3013
4fe53c98 3014 /* The output looks better if we put 7 bytes on a line, since that
c608c12e 3015 puts most long word instructions on a single line. */
4fe53c98 3016 info->bytes_per_line = 7;
252b5132
RH		 3017
3018 info->private_data = (PTR) &priv;
3019 priv.max_fetched = priv.the_buffer;
3020 priv.insn_start = pc;
252b5132
RH		 3021
3022 obuf[0] = 0;
3023 op1out[0] = 0;
3024 op2out[0] = 0;
3025 op3out[0] = 0;
3026
3027 op_index[0] = op_index[1] = op_index[2] = -1;
3028
3029 the_info = info;
3030 start_pc = pc;
3031 start_codep = inbuf;
3032 codep = inbuf;
3033
5076851f
ILT		 3034 if (setjmp (priv.bailout) != 0)
3035 {
7d421014
ILT		 3036 const char *name;
3037
5076851f 3038 /* Getting here means we tried for data but didn't get it. That
7d421014
ILT		 3039 means we have an incomplete instruction of some sort. Just
3040 print the first byte as a prefix or a .byte pseudo-op. */
3041 if (codep > inbuf)
5076851f 3042 {
7d421014
ILT		 3043 name = prefix_name (inbuf[0], orig_sizeflag);
3044 if (name != NULL)
3045 (*info->fprintf_func) (info->stream, "%s", name);
3046 else
5076851f 3047 {
7d421014
ILT		 3048 /* Just print the first byte as a .byte instruction. */
3049 (*info->fprintf_func) (info->stream, ".byte 0x%x",
3050 (unsigned int) inbuf[0]);
5076851f 3051 }
5076851f 3052
7d421014 3053 return 1;
5076851f
ILT		 3054 }
3055
3056 return -1;
3057 }
3058
52b15da3 3059 obufp = obuf;
252b5132
RH		 3060 ckprefix ();
3061
3062 insn_codep = codep;
3063
3064 FETCH_DATA (info, codep + 1);
3065 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3066
252b5132
RH		 3067 if ((prefixes & PREFIX_FWAIT)
3068 && ((*codep < 0xd8) || (*codep > 0xdf)))
3069 {
7d421014
ILT		 3070 const char *name;
3071
3072 /* fwait not followed by floating point instruction. Print the
3073 first prefix, which is probably fwait itself. */
3074 name = prefix_name (inbuf[0], orig_sizeflag);
3075 if (name == NULL)
3076 name = INTERNAL_DISASSEMBLER_ERROR;
3077 (*info->fprintf_func) (info->stream, "%s", name);
3078 return 1;
252b5132
RH		 3079 }
3080
252b5132
RH		 3081 if (*codep == 0x0f)
3082 {
3083 FETCH_DATA (info, codep + 2);
3084 if (intel_syntax)
3085 dp = &dis386_twobyte_intel[*++codep];
3086 else
3087 dp = &dis386_twobyte_att[*++codep];
3088 need_modrm = twobyte_has_modrm[*codep];
041bd2e0 3089 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
252b5132
RH		 3090 }
3091 else
3092 {
3093 if (intel_syntax)
52b15da3
JH		 3094 if (mode_64bit)
3095 dp = &dis386_64_intel[*codep];
3096 else
3097 dp = &dis386_intel[*codep];
252b5132 3098 else
52b15da3
JH		 3099 if (mode_64bit)
3100 dp = &disx86_64_att[*codep];
3101 else
3102 dp = &dis386_att[*codep];
252b5132 3103 need_modrm = onebyte_has_modrm[*codep];
041bd2e0 3104 uses_SSE_prefix = 0;
252b5132
RH		 3105 }
3106 codep++;
3107
041bd2e0 3108 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
7d421014
ILT		 3109 {
3110 oappend ("repz ");
3111 used_prefixes |= PREFIX_REPZ;
3112 }
041bd2e0 3113 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
7d421014
ILT		 3114 {
3115 oappend ("repnz ");
3116 used_prefixes |= PREFIX_REPNZ;
3117 }
c608c12e 3118 if (prefixes & PREFIX_LOCK)
7d421014
ILT		 3119 {
3120 oappend ("lock ");
3121 used_prefixes |= PREFIX_LOCK;
3122 }
c608c12e 3123
041bd2e0 3124 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
c608c12e
AM		 3125 sizeflag ^= DFLAG;
3126
3127 if (prefixes & PREFIX_ADDR)
3128 {
3129 sizeflag ^= AFLAG;
3130 if (sizeflag & AFLAG)
3131 oappend ("addr32 ");
3132 else
3133 oappend ("addr16 ");
7d421014 3134 used_prefixes |= PREFIX_ADDR;
c608c12e
AM		 3135 }
3136
252b5132
RH		 3137 if (need_modrm)
3138 {
3139 FETCH_DATA (info, codep + 1);
3140 mod = (*codep >> 6) & 3;
3141 reg = (*codep >> 3) & 7;
3142 rm = *codep & 7;
3143 }
3144
3145 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
3146 {
3147 dofloat (sizeflag);
3148 }
3149 else
3150 {
041bd2e0 3151 int index;
252b5132 3152 if (dp->name == NULL)
c608c12e
AM		 3153 {
3154 switch(dp->bytemode2)
3155 {
3156 case USE_GROUPS:
3157 dp = &grps[dp->bytemode1][reg];
3158 break;
3159 case USE_PREFIX_USER_TABLE:
041bd2e0 3160 index = 0;
7d421014 3161 used_prefixes |= (prefixes & PREFIX_REPZ);
041bd2e0
JH		 3162 if (prefixes & PREFIX_REPZ)
3163 index = 1;
3164 else
3165 {
3166 used_prefixes |= (prefixes & PREFIX_DATA);
3167 if (prefixes & PREFIX_DATA)
3168 index = 2;
3169 else
3170 {
3171 used_prefixes |= (prefixes & PREFIX_REPNZ);
3172 if (prefixes & PREFIX_REPNZ)
3173 index = 3;
041bd2e0
JH		 3174 }
3175 }
3176 dp = &prefix_user_table[dp->bytemode1][index];
c608c12e
AM		 3177 break;
3178 default:
3179 oappend (INTERNAL_DISASSEMBLER_ERROR);
3180 break;
3181 }
3182 }
252b5132
RH		 3183
3184 putop (dp->name, sizeflag);
3185
3186 obufp = op1out;
3187 op_ad = 2;
3188 if (dp->op1)
3189 (*dp->op1)(dp->bytemode1, sizeflag);
3190
3191 obufp = op2out;
3192 op_ad = 1;
3193 if (dp->op2)
3194 (*dp->op2)(dp->bytemode2, sizeflag);
3195
3196 obufp = op3out;
3197 op_ad = 0;
3198 if (dp->op3)
3199 (*dp->op3)(dp->bytemode3, sizeflag);
3200 }
3201
7d421014
ILT		 3202 /* See if any prefixes were not used. If so, print the first one
3203 separately. If we don't do this, we'll wind up printing an
3204 instruction stream which does not precisely correspond to the
3205 bytes we are disassembling. */
3206 if ((prefixes & ~used_prefixes) != 0)
3207 {
3208 const char *name;
3209
3210 name = prefix_name (inbuf[0], orig_sizeflag);
3211 if (name == NULL)
3212 name = INTERNAL_DISASSEMBLER_ERROR;
3213 (*info->fprintf_func) (info->stream, "%s", name);
3214 return 1;
3215 }
52b15da3
JH		 3216 if (rex & ~rex_used)
3217 {
3218 const char *name;
3219 name = prefix_name (rex | 0x40, orig_sizeflag);
3220 if (name == NULL)
3221 name = INTERNAL_DISASSEMBLER_ERROR;
3222 (*info->fprintf_func) (info->stream, "%s ", name);
3223 }
7d421014 3224
252b5132
RH		 3225 obufp = obuf + strlen (obuf);
3226 for (i = strlen (obuf); i < 6; i++)
3227 oappend (" ");
3228 oappend (" ");
3229 (*info->fprintf_func) (info->stream, "%s", obuf);
3230
3231 /* The enter and bound instructions are printed with operands in the same
3232 order as the intel book; everything else is printed in reverse order. */
2da11e11 3233 if (intel_syntax || two_source_ops)
252b5132
RH		 3234 {
3235 first = op1out;
3236 second = op2out;
3237 third = op3out;
3238 op_ad = op_index[0];
3239 op_index[0] = op_index[2];
3240 op_index[2] = op_ad;
3241 }
3242 else
3243 {
3244 first = op3out;
3245 second = op2out;
3246 third = op1out;
3247 }
3248 needcomma = 0;
3249 if (*first)
3250 {
52b15da3 3251 if (op_index[0] != -1 && !op_riprel[0])
252b5132
RH		 3252 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
3253 else
3254 (*info->fprintf_func) (info->stream, "%s", first);
3255 needcomma = 1;
3256 }
3257 if (*second)
3258 {
3259 if (needcomma)
3260 (*info->fprintf_func) (info->stream, ",");
52b15da3 3261 if (op_index[1] != -1 && !op_riprel[1])
252b5132
RH		 3262 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
3263 else
3264 (*info->fprintf_func) (info->stream, "%s", second);
3265 needcomma = 1;
3266 }
3267 if (*third)
3268 {
3269 if (needcomma)
3270 (*info->fprintf_func) (info->stream, ",");
52b15da3 3271 if (op_index[2] != -1 && !op_riprel[2])
252b5132
RH		 3272 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
3273 else
3274 (*info->fprintf_func) (info->stream, "%s", third);
3275 }
52b15da3
JH		 3276 for (i = 0; i < 3; i++)
3277 if (op_index[i] != -1 && op_riprel[i])
3278 {
3279 (*info->fprintf_func) (info->stream, " # ");
3280 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
3281 + op_address[op_index[i]]), info);
3282 }
252b5132
RH		 3283 return codep - inbuf;
3284}
3285
2da11e11 3286static const char *float_mem_att[] = {
252b5132
RH		 3287 /* d8 */
3288 "fadds",
3289 "fmuls",
3290 "fcoms",
3291 "fcomps",
3292 "fsubs",
3293 "fsubrs",
3294 "fdivs",
3295 "fdivrs",
3296 /* d9 */
3297 "flds",
3298 "(bad)",
3299 "fsts",
3300 "fstps",
3301 "fldenv",
3302 "fldcw",
3303 "fNstenv",
3304 "fNstcw",
3305 /* da */
3306 "fiaddl",
3307 "fimull",
3308 "ficoml",
3309 "ficompl",
3310 "fisubl",
3311 "fisubrl",
3312 "fidivl",
3313 "fidivrl",
3314 /* db */
3315 "fildl",
3316 "(bad)",
3317 "fistl",
3318 "fistpl",
3319 "(bad)",
3320 "fldt",
3321 "(bad)",
3322 "fstpt",
3323 /* dc */
3324 "faddl",
3325 "fmull",
3326 "fcoml",
3327 "fcompl",
3328 "fsubl",
3329 "fsubrl",
3330 "fdivl",
3331 "fdivrl",
3332 /* dd */
3333 "fldl",
3334 "(bad)",
3335 "fstl",
3336 "fstpl",
3337 "frstor",
3338 "(bad)",
3339 "fNsave",
3340 "fNstsw",
3341 /* de */
3342 "fiadd",
3343 "fimul",
3344 "ficom",
3345 "ficomp",
3346 "fisub",
3347 "fisubr",
3348 "fidiv",
3349 "fidivr",
3350 /* df */
3351 "fild",
3352 "(bad)",
3353 "fist",
3354 "fistp",
3355 "fbld",
3356 "fildll",
3357 "fbstp",
3358 "fistpll",
3359};
3360
2da11e11 3361static const char *float_mem_intel[] = {
252b5132
RH		 3362 /* d8 */
3363 "fadd",
3364 "fmul",
3365 "fcom",
3366 "fcomp",
3367 "fsub",
3368 "fsubr",
3369 "fdiv",
3370 "fdivr",
3371 /* d9 */
3372 "fld",
3373 "(bad)",
3374 "fst",
3375 "fstp",
3376 "fldenv",
3377 "fldcw",
3378 "fNstenv",
3379 "fNstcw",
3380 /* da */
3381 "fiadd",
3382 "fimul",
3383 "ficom",
3384 "ficomp",
3385 "fisub",
3386 "fisubr",
3387 "fidiv",
3388 "fidivr",
3389 /* db */
3390 "fild",
3391 "(bad)",
3392 "fist",
3393 "fistp",
3394 "(bad)",
3395 "fld",
3396 "(bad)",
3397 "fstp",
3398 /* dc */
3399 "fadd",
3400 "fmul",
3401 "fcom",
3402 "fcomp",
3403 "fsub",
3404 "fsubr",
3405 "fdiv",
3406 "fdivr",
3407 /* dd */
3408 "fld",
3409 "(bad)",
3410 "fst",
3411 "fstp",
3412 "frstor",
3413 "(bad)",
3414 "fNsave",
3415 "fNstsw",
3416 /* de */
3417 "fiadd",
3418 "fimul",
3419 "ficom",
3420 "ficomp",
3421 "fisub",
3422 "fisubr",
3423 "fidiv",
3424 "fidivr",
3425 /* df */
3426 "fild",
3427 "(bad)",
3428 "fist",
3429 "fistp",
3430 "fbld",
3431 "fild",
3432 "fbstp",
3433 "fistpll",
3434};
3435
3436#define ST OP_ST, 0
3437#define STi OP_STi, 0
3438
57d91c3c
ILT		 3439#define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
3440#define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
3441#define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
3442#define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
3443#define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
3444#define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
3445#define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
3446#define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
3447#define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
252b5132 3448
2da11e11 3449static const struct dis386 float_reg[][8] = {
252b5132
RH		 3450 /* d8 */
3451 {
57d91c3c
ILT		 3452 { "fadd", ST, STi, XX },
3453 { "fmul", ST, STi, XX },
3454 { "fcom", STi, XX, XX },
3455 { "fcomp", STi, XX, XX },
3456 { "fsub", ST, STi, XX },
3457 { "fsubr", ST, STi, XX },
3458 { "fdiv", ST, STi, XX },
3459 { "fdivr", ST, STi, XX },
252b5132
RH		 3460 },
3461 /* d9 */
3462 {
57d91c3c
ILT		 3463 { "fld", STi, XX, XX },
3464 { "fxch", STi, XX, XX },
252b5132 3465 { FGRPd9_2 },
57d91c3c 3466 { "(bad)", XX, XX, XX },
252b5132
RH		 3467 { FGRPd9_4 },
3468 { FGRPd9_5 },
3469 { FGRPd9_6 },
3470 { FGRPd9_7 },
3471 },
3472 /* da */
3473 {
57d91c3c
ILT		 3474 { "fcmovb", ST, STi, XX },
3475 { "fcmove", ST, STi, XX },
3476 { "fcmovbe",ST, STi, XX },
3477 { "fcmovu", ST, STi, XX },
3478 { "(bad)", XX, XX, XX },
252b5132 3479 { FGRPda_5 },
57d91c3c
ILT		 3480 { "(bad)", XX, XX, XX },
3481 { "(bad)", XX, XX, XX },
252b5132
RH		 3482 },
3483 /* db */
3484 {
57d91c3c
ILT		 3485 { "fcmovnb",ST, STi, XX },
3486 { "fcmovne",ST, STi, XX },
3487 { "fcmovnbe",ST, STi, XX },
3488 { "fcmovnu",ST, STi, XX },
252b5132 3489 { FGRPdb_4 },
57d91c3c
ILT		 3490 { "fucomi", ST, STi, XX },
3491 { "fcomi", ST, STi, XX },
3492 { "(bad)", XX, XX, XX },
252b5132
RH		 3493 },
3494 /* dc */
3495 {
57d91c3c
ILT		 3496 { "fadd", STi, ST, XX },
3497 { "fmul", STi, ST, XX },
3498 { "(bad)", XX, XX, XX },
3499 { "(bad)", XX, XX, XX },
252b5132 3500#if UNIXWARE_COMPAT
57d91c3c
ILT		 3501 { "fsub", STi, ST, XX },
3502 { "fsubr", STi, ST, XX },
3503 { "fdiv", STi, ST, XX },
3504 { "fdivr", STi, ST, XX },
252b5132 3505#else
57d91c3c
ILT		 3506 { "fsubr", STi, ST, XX },
3507 { "fsub", STi, ST, XX },
3508 { "fdivr", STi, ST, XX },
3509 { "fdiv", STi, ST, XX },
252b5132
RH		 3510#endif
3511 },
3512 /* dd */
3513 {
57d91c3c
ILT		 3514 { "ffree", STi, XX, XX },
3515 { "(bad)", XX, XX, XX },
3516 { "fst", STi, XX, XX },
3517 { "fstp", STi, XX, XX },
3518 { "fucom", STi, XX, XX },
3519 { "fucomp", STi, XX, XX },
3520 { "(bad)", XX, XX, XX },
3521 { "(bad)", XX, XX, XX },
252b5132
RH		 3522 },
3523 /* de */
3524 {
57d91c3c
ILT		 3525 { "faddp", STi, ST, XX },
3526 { "fmulp", STi, ST, XX },
3527 { "(bad)", XX, XX, XX },
252b5132
RH		 3528 { FGRPde_3 },
3529#if UNIXWARE_COMPAT
57d91c3c
ILT		 3530 { "fsubp", STi, ST, XX },
3531 { "fsubrp", STi, ST, XX },
3532 { "fdivp", STi, ST, XX },
3533 { "fdivrp", STi, ST, XX },
252b5132 3534#else
57d91c3c
ILT		 3535 { "fsubrp", STi, ST, XX },
3536 { "fsubp", STi, ST, XX },
3537 { "fdivrp", STi, ST, XX },
3538 { "fdivp", STi, ST, XX },
252b5132
RH		 3539#endif
3540 },
3541 /* df */
3542 {
c2419411 3543 { "ffreep", STi, XX, XX },
57d91c3c
ILT		 3544 { "(bad)", XX, XX, XX },
3545 { "(bad)", XX, XX, XX },
3546 { "(bad)", XX, XX, XX },
252b5132 3547 { FGRPdf_4 },
57d91c3c
ILT		 3548 { "fucomip",ST, STi, XX },
3549 { "fcomip", ST, STi, XX },
3550 { "(bad)", XX, XX, XX },
252b5132
RH		 3551 },
3552};
3553
3554
3555static char *fgrps[][8] = {
3556 /* d9_2 0 */
3557 {
3558 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3559 },
3560
3561 /* d9_4 1 */
3562 {
3563 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
3564 },
3565
3566 /* d9_5 2 */
3567 {
3568 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
3569 },
3570
3571 /* d9_6 3 */
3572 {
3573 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
3574 },
3575
3576 /* d9_7 4 */
3577 {
3578 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
3579 },
3580
3581 /* da_5 5 */
3582 {
3583 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3584 },
3585
3586 /* db_4 6 */
3587 {
3588 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
3589 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
3590 },
3591
3592 /* de_3 7 */
3593 {
3594 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3595 },
3596
3597 /* df_4 8 */
3598 {
3599 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
3600 },
3601};
3602
3603static void
3604dofloat (sizeflag)
3605 int sizeflag;
3606{
2da11e11 3607 const struct dis386 *dp;
252b5132
RH		 3608 unsigned char floatop;
3609
3610 floatop = codep[-1];
3611
3612 if (mod != 3)
3613 {
3614 if (intel_syntax)
3615 putop (float_mem_intel[(floatop - 0xd8 ) * 8 + reg], sizeflag);
3616 else
3617 putop (float_mem_att[(floatop - 0xd8 ) * 8 + reg], sizeflag);
3618 obufp = op1out;
3619 if (floatop == 0xdb)
3620 OP_E (x_mode, sizeflag);
3621 else if (floatop == 0xdd)
3622 OP_E (d_mode, sizeflag);
2da11e11 3623 else
252b5132
RH		 3624 OP_E (v_mode, sizeflag);
3625 return;
3626 }
3627 codep++;
3628
3629 dp = &float_reg[floatop - 0xd8][reg];
3630 if (dp->name == NULL)
3631 {
3632 putop (fgrps[dp->bytemode1][rm], sizeflag);
3633
3634 /* instruction fnstsw is only one with strange arg */
3635 if (floatop == 0xdf && codep[-1] == 0xe0)
3636 strcpy (op1out, names16[0]);
3637 }
3638 else
3639 {
3640 putop (dp->name, sizeflag);
3641
3642 obufp = op1out;
3643 if (dp->op1)
3644 (*dp->op1)(dp->bytemode1, sizeflag);
3645 obufp = op2out;
3646 if (dp->op2)
3647 (*dp->op2)(dp->bytemode2, sizeflag);
3648 }
3649}
3650
3651/* ARGSUSED */
3652static void
3653OP_ST (ignore, sizeflag)
57d91c3c
ILT		 3654 int ignore ATTRIBUTE_UNUSED;
3655 int sizeflag ATTRIBUTE_UNUSED;
252b5132
RH		 3656{
3657 oappend ("%st");
3658}
3659
3660/* ARGSUSED */
3661static void
3662OP_STi (ignore, sizeflag)
57d91c3c
ILT		 3663 int ignore ATTRIBUTE_UNUSED;
3664 int sizeflag ATTRIBUTE_UNUSED;
252b5132
RH		 3665{
3666 sprintf (scratchbuf, "%%st(%d)", rm);
3667 oappend (scratchbuf);
3668}
3669
3670
3671/* capital letters in template are macros */
3672static void
3673putop (template, sizeflag)
2da11e11 3674 const char *template;
252b5132
RH		 3675 int sizeflag;
3676{
2da11e11 3677 const char *p;
252b5132
RH		 3678
3679 for (p = template; *p; p++)
3680 {
3681 switch (*p)
3682 {
3683 default:
3684 *obufp++ = *p;
3685 break;
3686 case 'A':
3687 if (intel_syntax)
3688 break;
3689 if (mod != 3
3690#ifdef SUFFIX_ALWAYS
3691 || (sizeflag & SUFFIX_ALWAYS)
3692#endif
3693 )
3694 *obufp++ = 'b';
3695 break;
3696 case 'B':
3697 if (intel_syntax)
3698 break;
3699#ifdef SUFFIX_ALWAYS
3700 if (sizeflag & SUFFIX_ALWAYS)
3701 *obufp++ = 'b';
3702#endif
3703 break;
3704 case 'E': /* For jcxz/jecxz */
3705 if (sizeflag & AFLAG)
3706 *obufp++ = 'e';
3707 break;
90530880
JH		 3708 case 'I':
3709 if (intel_syntax)
3710 break;
3711 if (mode_64bit)
3712 *obufp++ = 'q';
3713 else
3714 {
3715 if ((prefixes & PREFIX_DATA)
3716#ifdef SUFFIX_ALWAYS
3717 || (sizeflag & SUFFIX_ALWAYS)
3718#endif
3719 )
3720 {
3721 if (sizeflag & DFLAG)
3722 *obufp++ = 'l';
3723 else
3724 *obufp++ = 'w';
3725 used_prefixes |= (prefixes & PREFIX_DATA);
3726 }
3727 }
3728 break;
252b5132
RH		 3729 case 'L':
3730 if (intel_syntax)
3731 break;
3732#ifdef SUFFIX_ALWAYS
3733 if (sizeflag & SUFFIX_ALWAYS)
3734 *obufp++ = 'l';
3735#endif
3736 break;
3737 case 'N':
3738 if ((prefixes & PREFIX_FWAIT) == 0)
3739 *obufp++ = 'n';
7d421014
ILT		 3740 else
3741 used_prefixes |= PREFIX_FWAIT;
252b5132 3742 break;
52b15da3
JH		 3743 case 'O':
3744 USED_REX (REX_MODE64);
3745 if (rex & REX_MODE64)
3746 *obufp++ = 'o';
3747 else
3748 *obufp++ = 'd';
3749 break;
252b5132
RH		 3750 case 'P':
3751 if (intel_syntax)
3752 break;
3753 if ((prefixes & PREFIX_DATA)
52b15da3 3754 || (rex & REX_MODE64)
252b5132
RH		 3755#ifdef SUFFIX_ALWAYS
3756 || (sizeflag & SUFFIX_ALWAYS)
3757#endif
3758 )
3759 {
52b15da3
JH		 3760 USED_REX (REX_MODE64);
3761 if (rex & REX_MODE64)
3762 *obufp++ = 'q';
c2419411 3763 else
52b15da3
JH		 3764 {
3765 if (sizeflag & DFLAG)
3766 *obufp++ = 'l';
3767 else
3768 *obufp++ = 'w';
3769 used_prefixes |= (prefixes & PREFIX_DATA);
3770 }
252b5132
RH		 3771 }
3772 break;
3773 case 'Q':
3774 if (intel_syntax)
3775 break;
90530880 3776 USED_REX (REX_MODE64);
252b5132
RH		 3777 if (mod != 3
3778#ifdef SUFFIX_ALWAYS
3779 || (sizeflag & SUFFIX_ALWAYS)
3780#endif
3781 )
3782 {
52b15da3
JH		 3783 if (rex & REX_MODE64)
3784 *obufp++ = 'q';
252b5132 3785 else
52b15da3
JH		 3786 {
3787 if (sizeflag & DFLAG)
3788 *obufp++ = 'l';
3789 else
3790 *obufp++ = 'w';
3791 used_prefixes |= (prefixes & PREFIX_DATA);
3792 }
252b5132
RH		 3793 }
3794 break;
3795 case 'R':
52b15da3 3796 USED_REX (REX_MODE64);
252b5132 3797 if (intel_syntax)
c608c12e 3798 {
52b15da3
JH		 3799 if (rex & REX_MODE64)
3800 {
3801 *obufp++ = 'q';
3802 *obufp++ = 't';
3803 }
3804 else if (sizeflag & DFLAG)
c608c12e
AM		 3805 {
3806 *obufp++ = 'd';
3807 *obufp++ = 'q';
3808 }
3809 else
3810 {
3811 *obufp++ = 'w';
3812 *obufp++ = 'd';
3813 }
3814 }
252b5132 3815 else
c608c12e 3816 {
52b15da3
JH		 3817 if (rex & REX_MODE64)
3818 *obufp++ = 'q';
3819 else if (sizeflag & DFLAG)
c608c12e
AM		 3820 *obufp++ = 'l';
3821 else
3822 *obufp++ = 'w';
3823 }
52b15da3
JH		 3824 if (!(rex & REX_MODE64))
3825 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3826 break;
3827 case 'S':
3828 if (intel_syntax)
3829 break;
3830#ifdef SUFFIX_ALWAYS
3831 if (sizeflag & SUFFIX_ALWAYS)
3832 {
52b15da3
JH		 3833 if (rex & REX_MODE64)
3834 *obufp++ = 'q';
252b5132 3835 else
52b15da3
JH		 3836 {
3837 if (sizeflag & DFLAG)
3838 *obufp++ = 'l';
3839 else
3840 *obufp++ = 'w';
3841 used_prefixes |= (prefixes & PREFIX_DATA);
3842 }
252b5132
RH		 3843 }
3844#endif
3845 break;
90530880
JH		 3846 case 'T':
3847 if (intel_syntax)
3848 break;
3849 if (mode_64bit)
3850 *obufp++ = 'q';
3851 else if (mod != 3
3852#ifdef SUFFIX_ALWAYS
3853 || (sizeflag & SUFFIX_ALWAYS)
3854#endif
3855 )
3856 {
3857 if (sizeflag & DFLAG)
3858 *obufp++ = 'l';
3859 else
3860 *obufp++ = 'w';
3861 used_prefixes |= (prefixes & PREFIX_DATA);
3862 }
3863 break;
041bd2e0
JH		 3864 case 'X':
3865 if (prefixes & PREFIX_DATA)
3866 *obufp++ = 'd';
3867 else
3868 *obufp++ = 's';
3869 used_prefixes |= (prefixes & PREFIX_DATA);
3870 break;
76f227a5
JH		 3871 case 'Y':
3872 if (intel_syntax)
3873 break;
3874 if (rex & REX_MODE64)
3875 {
3876 USED_REX (REX_MODE64);
3877 *obufp++ = 'q';
3878 }
3879 break;
52b15da3 3880 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
252b5132 3881 case 'W':
252b5132 3882 /* operand size flag for cwtl, cbtw */
52b15da3
JH		 3883 USED_REX (0);
3884 if (rex)
3885 *obufp++ = 'l';
3886 else if (sizeflag & DFLAG)
252b5132
RH		 3887 *obufp++ = 'w';
3888 else
3889 *obufp++ = 'b';
c608c12e
AM		 3890 if (intel_syntax)
3891 {
52b15da3
JH		 3892 if (rex)
3893 {
3894 *obufp++ = 'q';
3895 *obufp++ = 'e';
3896 }
c608c12e
AM		 3897 if (sizeflag & DFLAG)
3898 {
3899 *obufp++ = 'd';
3900 *obufp++ = 'e';
3901 }
3902 else
3903 {
3904 *obufp++ = 'w';
3905 }
3906 }
52b15da3
JH		 3907 if (!rex)
3908 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 3909 break;
3910 }
3911 }
3912 *obufp = 0;
3913}
3914
3915static void
3916oappend (s)
2da11e11 3917 const char *s;
252b5132
RH		 3918{
3919 strcpy (obufp, s);
3920 obufp += strlen (s);
3921}
3922
3923static void
3924append_seg ()
3925{
3926 if (prefixes & PREFIX_CS)
7d421014
ILT		 3927 {
3928 oappend ("%cs:");
3929 used_prefixes |= PREFIX_CS;
3930 }
252b5132 3931 if (prefixes & PREFIX_DS)
7d421014
ILT		 3932 {
3933 oappend ("%ds:");
3934 used_prefixes |= PREFIX_DS;
3935 }
252b5132 3936 if (prefixes & PREFIX_SS)
7d421014
ILT		 3937 {
3938 oappend ("%ss:");
3939 used_prefixes |= PREFIX_SS;
3940 }
252b5132 3941 if (prefixes & PREFIX_ES)
7d421014
ILT		 3942 {
3943 oappend ("%es:");
3944 used_prefixes |= PREFIX_ES;
3945 }
252b5132 3946 if (prefixes & PREFIX_FS)
7d421014
ILT		 3947 {
3948 oappend ("%fs:");
3949 used_prefixes |= PREFIX_FS;
3950 }
252b5132 3951 if (prefixes & PREFIX_GS)
7d421014
ILT		 3952 {
3953 oappend ("%gs:");
3954 used_prefixes |= PREFIX_GS;
3955 }
252b5132
RH		 3956}
3957
3958static void
3959OP_indirE (bytemode, sizeflag)
3960 int bytemode;
3961 int sizeflag;
3962{
3963 if (!intel_syntax)
3964 oappend ("*");
3965 OP_E (bytemode, sizeflag);
3966}
3967
52b15da3
JH		 3968static void
3969print_operand_value (buf, hex, disp)
3970 char *buf;
3971 int hex;
3972 bfd_vma disp;
3973{
3974 if (mode_64bit)
3975 {
3976 if (hex)
3977 {
3978 char tmp[30];
3979 int i;
3980 buf[0] = '0';
3981 buf[1] = 'x';
3982 sprintf_vma (tmp, disp);
3983 for (i = 0; tmp[i] == '0' && tmp[i+1]; i++);
3984 strcpy (buf + 2, tmp + i);
3985 }
3986 else
3987 {
3988 bfd_signed_vma v = disp;
3989 char tmp[30];
3990 int i;
3991 if (v < 0)
3992 {
3993 *(buf++) = '-';
3994 v = -disp;
3995 /* Check for possible overflow on 0x8000000000000000 */
3996 if (v < 0)
3997 {
3998 strcpy (buf, "9223372036854775808");
3999 return;
4000 }
4001 }
4002 if (!v)
4003 {
4004 strcpy (buf, "0");
4005 return;
4006 }
4007
4008 i = 0;
4009 tmp[29] = 0;
4010 while (v)
4011 {
4012 tmp[28-i] = (v % 10) + '0';
4013 v /= 10;
4014 i++;
4015 }
4016 strcpy (buf, tmp + 29 - i);
4017 }
4018 }
4019 else
4020 {
4021 if (hex)
4022 sprintf (buf, "0x%x", (unsigned int) disp);
4023 else
4024 sprintf (buf, "%d", (int) disp);
4025 }
4026}
4027
252b5132
RH		 4028static void
4029OP_E (bytemode, sizeflag)
4030 int bytemode;
4031 int sizeflag;
4032{
52b15da3
JH		 4033 bfd_vma disp;
4034 int add = 0;
4035 int riprel = 0;
4036 USED_REX (REX_EXTZ);
4037 if (rex & REX_EXTZ)
4038 add += 8;
252b5132
RH		 4039
4040 /* skip mod/rm byte */
4041 codep++;
4042
4043 if (mod == 3)
4044 {
4045 switch (bytemode)
4046 {
4047 case b_mode:
52b15da3
JH		 4048 USED_REX (0);
4049 if (rex)
4050 oappend (names8rex[rm + add]);
4051 else
4052 oappend (names8[rm + add]);
252b5132
RH		 4053 break;
4054 case w_mode:
52b15da3 4055 oappend (names16[rm + add]);
252b5132 4056 break;
2da11e11 4057 case d_mode:
52b15da3
JH		 4058 oappend (names32[rm + add]);
4059 break;
4060 case q_mode:
4061 oappend (names64[rm + add]);
4062 break;
4063 case m_mode:
4064 if (mode_64bit)
4065 oappend (names64[rm + add]);
4066 else
4067 oappend (names32[rm + add]);
2da11e11 4068 break;
252b5132 4069 case v_mode:
52b15da3
JH		 4070 USED_REX (REX_MODE64);
4071 if (rex & REX_MODE64)
4072 oappend (names64[rm + add]);
4073 else if (sizeflag & DFLAG)
4074 oappend (names32[rm + add]);
252b5132 4075 else
52b15da3 4076 oappend (names16[rm + add]);
7d421014 4077 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132 4078 break;
2da11e11 4079 case 0:
041bd2e0
JH		 4080 if ( !(codep[-2] == 0xAE && codep[-1] == 0xF8 /* sfence */)
4081 && !(codep[-2] == 0xAE && codep[-1] == 0xF0 /* mfence */)
4082 && !(codep[-2] == 0xAE && codep[-1] == 0xe8 /* lfence */))
2da11e11 4083 BadOp(); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */
c608c12e 4084 break;
252b5132 4085 default:
c608c12e 4086 oappend (INTERNAL_DISASSEMBLER_ERROR);
252b5132
RH		 4087 break;
4088 }
4089 return;
4090 }
4091
4092 disp = 0;
4093 append_seg ();
4094
4095 if (sizeflag & AFLAG) /* 32 bit address mode */
4096 {
4097 int havesib;
4098 int havebase;
4099 int base;
4100 int index = 0;
4101 int scale = 0;
4102
4103 havesib = 0;
4104 havebase = 1;
4105 base = rm;
4106
4107 if (base == 4)
4108 {
4109 havesib = 1;
4110 FETCH_DATA (the_info, codep + 1);
4111 scale = (*codep >> 6) & 3;
4112 index = (*codep >> 3) & 7;
4113 base = *codep & 7;
52b15da3
JH		 4114 USED_REX (REX_EXTY);
4115 USED_REX (REX_EXTZ);
4116 if (rex & REX_EXTY)
4117 index += 8;
4118 if (rex & REX_EXTZ)
4119 base += 8;
252b5132
RH		 4120 codep++;
4121 }
4122
4123 switch (mod)
4124 {
4125 case 0:
52b15da3 4126 if ((base & 7) == 5)
252b5132
RH		 4127 {
4128 havebase = 0;
52b15da3
JH		 4129 if (mode_64bit && !havesib)
4130 riprel = 1;
4131 disp = get32s ();
252b5132
RH		 4132 }
4133 break;
4134 case 1:
4135 FETCH_DATA (the_info, codep + 1);
4136 disp = *codep++;
4137 if ((disp & 0x80) != 0)
4138 disp -= 0x100;
4139 break;
4140 case 2:
52b15da3 4141 disp = get32s ();
252b5132
RH		 4142 break;
4143 }
4144
4145 if (!intel_syntax)
52b15da3 4146 if (mod != 0 || (base & 7) == 5)
252b5132 4147 {
52b15da3 4148 print_operand_value (scratchbuf, !riprel, disp);
252b5132 4149 oappend (scratchbuf);
52b15da3
JH		 4150 if (riprel)
4151 {
4152 set_op (disp, 1);
4153 oappend ("(%rip)");
4154 }
252b5132 4155 }
2da11e11 4156
252b5132
RH		 4157 if (havebase || (havesib && (index != 4 || scale != 0)))
4158 {
4159 if (intel_syntax)
4160 {
4161 switch (bytemode)
4162 {
4163 case b_mode:
52b15da3 4164 oappend ("BYTE PTR ");
252b5132
RH		 4165 break;
4166 case w_mode:
52b15da3 4167 oappend ("WORD PTR ");
252b5132
RH		 4168 break;
4169 case v_mode:
52b15da3 4170 oappend ("DWORD PTR ");
252b5132
RH		 4171 break;
4172 case d_mode:
52b15da3 4173 oappend ("QWORD PTR ");
252b5132 4174 break;
52b15da3
JH		 4175 case m_mode:
4176 if (mode_64bit)
4177 oappend ("DWORD PTR ");
4178 else
4179 oappend ("QWORD PTR ");
4180 break;
252b5132 4181 case x_mode:
52b15da3 4182 oappend ("XWORD PTR ");
252b5132
RH		 4183 break;
4184 default:
4185 break;
4186 }
4187 }
4188 *obufp++ = open_char;
52b15da3
JH		 4189 if (intel_syntax && riprel)
4190 oappend ("rip + ");
252b5132 4191 *obufp = '\0';
52b15da3
JH		 4192 USED_REX (REX_EXTZ);
4193 if (!havesib && (rex & REX_EXTZ))
4194 base += 8;
252b5132 4195 if (havebase)
52b15da3 4196 oappend (mode_64bit ? names64[base] : names32[base]);
252b5132
RH		 4197 if (havesib)
4198 {
4199 if (index != 4)
4200 {
4201 if (intel_syntax)
4202 {
4203 if (havebase)
4204 {
4205 *obufp++ = separator_char;
4206 *obufp = '\0';
4207 }
52b15da3 4208 sprintf (scratchbuf, "%s", mode_64bit ? names64[index] : names32[index]);
252b5132
RH		 4209 }
4210 else
52b15da3 4211 sprintf (scratchbuf, ",%s", mode_64bit ? names64[index] : names32[index]);
252b5132
RH		 4212 oappend (scratchbuf);
4213 }
4214 if (!intel_syntax
2da11e11 4215 || (intel_syntax
252b5132
RH		 4216 && bytemode != b_mode
4217 && bytemode != w_mode
4218 && bytemode != v_mode))
4219 {
4220 *obufp++ = scale_char;
4221 *obufp = '\0';
4222 sprintf (scratchbuf, "%d", 1 << scale);
4223 oappend (scratchbuf);
4224 }
4225 }
4226 if (intel_syntax)
52b15da3 4227 if (mod != 0 || (base & 7) == 5)
252b5132
RH		 4228 {
4229 /* Don't print zero displacements */
52b15da3 4230 if (disp != 0)
252b5132 4231 {
52b15da3 4232 print_operand_value (scratchbuf, 0, disp);
252b5132
RH		 4233 oappend (scratchbuf);
4234 }
4235 }
4236
4237 *obufp++ = close_char;
4238 *obufp = '\0';
4239 }
4240 else if (intel_syntax)
4241 {
52b15da3 4242 if (mod != 0 || (base & 7) == 5)
252b5132
RH		 4243 {
4244 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4245 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
4246 ;
4247 else
4248 {
4249 oappend (names_seg[3]);
4250 oappend (":");
4251 }
52b15da3 4252 print_operand_value (scratchbuf, 1, disp);
252b5132
RH		 4253 oappend (scratchbuf);
4254 }
4255 }
4256 }
4257 else
4258 { /* 16 bit address mode */
4259 switch (mod)
4260 {
4261 case 0:
52b15da3 4262 if ((rm & 7) == 6)
252b5132
RH		 4263 {
4264 disp = get16 ();
4265 if ((disp & 0x8000) != 0)
4266 disp -= 0x10000;
4267 }
4268 break;
4269 case 1:
4270 FETCH_DATA (the_info, codep + 1);
4271 disp = *codep++;
4272 if ((disp & 0x80) != 0)
4273 disp -= 0x100;
4274 break;
4275 case 2:
4276 disp = get16 ();
4277 if ((disp & 0x8000) != 0)
4278 disp -= 0x10000;
4279 break;
4280 }
4281
4282 if (!intel_syntax)
52b15da3 4283 if (mod != 0 || (rm & 7) == 6)
252b5132 4284 {
52b15da3 4285 print_operand_value (scratchbuf, 0, disp);
252b5132
RH		 4286 oappend (scratchbuf);
4287 }
4288
52b15da3 4289 if (mod != 0 || (rm & 7) != 6)
252b5132
RH		 4290 {
4291 *obufp++ = open_char;
4292 *obufp = '\0';
52b15da3 4293 oappend (index16[rm + add]);
252b5132
RH		 4294 *obufp++ = close_char;
4295 *obufp = '\0';
4296 }
4297 }
4298}
4299
252b5132
RH		 4300static void
4301OP_G (bytemode, sizeflag)
4302 int bytemode;
4303 int sizeflag;
4304{
52b15da3
JH		 4305 int add = 0;
4306 USED_REX (REX_EXTX);
4307 if (rex & REX_EXTX)
4308 add += 8;
252b5132
RH		 4309 switch (bytemode)
4310 {
4311 case b_mode:
52b15da3
JH		 4312 USED_REX (0);
4313 if (rex)
4314 oappend (names8rex[reg + add]);
4315 else
4316 oappend (names8[reg + add]);
252b5132
RH		 4317 break;
4318 case w_mode:
52b15da3 4319 oappend (names16[reg + add]);
252b5132
RH		 4320 break;
4321 case d_mode:
52b15da3
JH		 4322 oappend (names32[reg + add]);
4323 break;
4324 case q_mode:
4325 oappend (names64[reg + add]);
252b5132
RH		 4326 break;
4327 case v_mode:
52b15da3
JH		 4328 USED_REX (REX_MODE64);
4329 if (rex & REX_MODE64)
4330 oappend (names64[reg + add]);
4331 else if (sizeflag & DFLAG)
4332 oappend (names32[reg + add]);
252b5132 4333 else
52b15da3 4334 oappend (names16[reg + add]);
7d421014 4335 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4336 break;
4337 default:
4338 oappend (INTERNAL_DISASSEMBLER_ERROR);
4339 break;
4340 }
4341}
4342
52b15da3
JH		 4343static bfd_vma
4344get64 ()
4345{
4346 unsigned int a = 0;
4347 unsigned int b = 0;
4348 bfd_vma x = 0;
4349
4350#ifdef BFD64
4351 FETCH_DATA (the_info, codep + 8);
4352 a = *codep++ & 0xff;
4353 a |= (*codep++ & 0xff) << 8;
4354 a |= (*codep++ & 0xff) << 16;
4355 a |= (*codep++ & 0xff) << 24;
4356 b |= (*codep++ & 0xff);
4357 b |= (*codep++ & 0xff) << 8;
4358 b |= (*codep++ & 0xff) << 16;
4359 b |= (*codep++ & 0xff) << 24;
4360 x = a + ((bfd_vma) b << 32);
4361#else
4362 abort();
4363#endif
4364 return x;
4365}
4366
4367static bfd_signed_vma
252b5132
RH		 4368get32 ()
4369{
52b15da3 4370 bfd_signed_vma x = 0;
252b5132
RH		 4371
4372 FETCH_DATA (the_info, codep + 4);
52b15da3
JH		 4373 x = *codep++ & (bfd_signed_vma) 0xff;
4374 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
4375 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
4376 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
4377 return x;
4378}
4379
4380static bfd_signed_vma
4381get32s ()
4382{
4383 bfd_signed_vma x = 0;
4384
4385 FETCH_DATA (the_info, codep + 4);
4386 x = *codep++ & (bfd_signed_vma) 0xff;
4387 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
4388 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
4389 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
4390
4391 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
4392
252b5132
RH		 4393 return x;
4394}
4395
4396static int
4397get16 ()
4398{
4399 int x = 0;
4400
4401 FETCH_DATA (the_info, codep + 2);
4402 x = *codep++ & 0xff;
4403 x |= (*codep++ & 0xff) << 8;
4404 return x;
4405}
4406
4407static void
52b15da3 4408set_op (op, riprel)
252b5132 4409 unsigned int op;
52b15da3 4410 int riprel;
252b5132
RH		 4411{
4412 op_index[op_ad] = op_ad;
4413 op_address[op_ad] = op;
52b15da3 4414 op_riprel[op_ad] = riprel;
252b5132
RH		 4415}
4416
4417static void
4418OP_REG (code, sizeflag)
4419 int code;
4420 int sizeflag;
4421{
2da11e11 4422 const char *s;
52b15da3
JH		 4423 int add = 0;
4424 USED_REX (REX_EXTZ);
4425 if (rex & REX_EXTZ)
4426 add = 8;
4427
4428 switch (code)
4429 {
4430 case indir_dx_reg:
4431 s = "(%dx)";
4432 break;
4433 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
4434 case sp_reg: case bp_reg: case si_reg: case di_reg:
4435 s = names16[code - ax_reg + add];
4436 break;
4437 case es_reg: case ss_reg: case cs_reg:
4438 case ds_reg: case fs_reg: case gs_reg:
4439 s = names_seg[code - es_reg + add];
4440 break;
4441 case al_reg: case ah_reg: case cl_reg: case ch_reg:
4442 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
4443 USED_REX (0);
4444 if (rex)
4445 s = names8rex[code - al_reg + add];
4446 else
4447 s = names8[code - al_reg];
4448 break;
4449 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
4450 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
4451 USED_REX (REX_MODE64);
4452 if (rex & REX_MODE64)
4453 s = names64[code - eAX_reg + add];
4454 else if (sizeflag & DFLAG)
4455 s = names32[code - eAX_reg + add];
4456 else
4457 s = names16[code - eAX_reg + add];
4458 used_prefixes |= (prefixes & PREFIX_DATA);
4459 break;
4460 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
4461 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
4462 s = names64[code - rAX_reg + add];
4463 break;
4464 default:
4465 s = INTERNAL_DISASSEMBLER_ERROR;
4466 break;
4467 }
4468 oappend (s);
4469}
4470
4471static void
4472OP_IMREG (code, sizeflag)
4473 int code;
4474 int sizeflag;
4475{
4476 const char *s;
252b5132
RH		 4477
4478 switch (code)
4479 {
4480 case indir_dx_reg:
4481 s = "(%dx)";
4482 break;
4483 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
4484 case sp_reg: case bp_reg: case si_reg: case di_reg:
4485 s = names16[code - ax_reg];
4486 break;
4487 case es_reg: case ss_reg: case cs_reg:
4488 case ds_reg: case fs_reg: case gs_reg:
4489 s = names_seg[code - es_reg];
4490 break;
4491 case al_reg: case ah_reg: case cl_reg: case ch_reg:
4492 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
52b15da3
JH		 4493 USED_REX (0);
4494 if (rex)
4495 s = names8rex[code - al_reg];
4496 else
4497 s = names8[code - al_reg];
252b5132
RH		 4498 break;
4499 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
4500 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
52b15da3
JH		 4501 USED_REX (REX_MODE64);
4502 if (rex & REX_MODE64)
4503 s = names64[code - eAX_reg];
4504 else if (sizeflag & DFLAG)
252b5132
RH		 4505 s = names32[code - eAX_reg];
4506 else
4507 s = names16[code - eAX_reg];
7d421014 4508 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4509 break;
4510 default:
4511 s = INTERNAL_DISASSEMBLER_ERROR;
4512 break;
4513 }
4514 oappend (s);
4515}
4516
4517static void
4518OP_I (bytemode, sizeflag)
4519 int bytemode;
4520 int sizeflag;
4521{
52b15da3
JH		 4522 bfd_signed_vma op;
4523 bfd_signed_vma mask = -1;
252b5132
RH		 4524
4525 switch (bytemode)
4526 {
4527 case b_mode:
4528 FETCH_DATA (the_info, codep + 1);
52b15da3
JH		 4529 op = *codep++;
4530 mask = 0xff;
4531 break;
4532 case q_mode:
4533 op = get32s ();
252b5132
RH		 4534 break;
4535 case v_mode:
52b15da3
JH		 4536 USED_REX (REX_MODE64);
4537 if (rex & REX_MODE64)
4538 op = get32s ();
4539 else if (sizeflag & DFLAG)
4540 {
4541 op = get32 ();
4542 mask = 0xffffffff;
4543 }
252b5132 4544 else
52b15da3
JH		 4545 {
4546 op = get16 ();
4547 mask = 0xfffff;
4548 }
7d421014 4549 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4550 break;
4551 case w_mode:
52b15da3 4552 mask = 0xfffff;
252b5132
RH		 4553 op = get16 ();
4554 break;
4555 default:
4556 oappend (INTERNAL_DISASSEMBLER_ERROR);
4557 return;
4558 }
4559
52b15da3
JH		 4560 op &= mask;
4561 scratchbuf[0] = '$';
4562 print_operand_value (scratchbuf + !intel_syntax, 1, op);
4563 oappend (scratchbuf);
4564 scratchbuf[0] = '\0';
4565}
4566
4567static void
4568OP_I64 (bytemode, sizeflag)
4569 int bytemode;
4570 int sizeflag;
4571{
4572 bfd_signed_vma op;
4573 bfd_signed_vma mask = -1;
4574
4575 switch (bytemode)
4576 {
4577 case b_mode:
4578 FETCH_DATA (the_info, codep + 1);
4579 op = *codep++;
4580 mask = 0xff;
4581 break;
4582 case v_mode:
4583 USED_REX (REX_MODE64);
4584 if (rex & REX_MODE64)
4585 op = get64 ();
4586 else if (sizeflag & DFLAG)
4587 {
4588 op = get32 ();
4589 mask = 0xffffffff;
4590 }
4591 else
4592 {
4593 op = get16 ();
4594 mask = 0xfffff;
4595 }
4596 used_prefixes |= (prefixes & PREFIX_DATA);
4597 break;
4598 case w_mode:
4599 mask = 0xfffff;
4600 op = get16 ();
4601 break;
4602 default:
4603 oappend (INTERNAL_DISASSEMBLER_ERROR);
4604 return;
4605 }
4606
4607 op &= mask;
4608 scratchbuf[0] = '$';
4609 print_operand_value (scratchbuf + !intel_syntax, 1, op);
252b5132
RH		 4610 oappend (scratchbuf);
4611 scratchbuf[0] = '\0';
4612}
4613
4614static void
4615OP_sI (bytemode, sizeflag)
4616 int bytemode;
4617 int sizeflag;
4618{
52b15da3
JH		 4619 bfd_signed_vma op;
4620 bfd_signed_vma mask = -1;
252b5132
RH		 4621
4622 switch (bytemode)
4623 {
4624 case b_mode:
4625 FETCH_DATA (the_info, codep + 1);
4626 op = *codep++;
4627 if ((op & 0x80) != 0)
4628 op -= 0x100;
52b15da3 4629 mask = 0xffffffff;
252b5132
RH		 4630 break;
4631 case v_mode:
52b15da3
JH		 4632 USED_REX (REX_MODE64);
4633 if (rex & REX_MODE64)
4634 op = get32s ();
4635 else if (sizeflag & DFLAG)
4636 {
4637 op = get32s ();
4638 mask = 0xffffffff;
4639 }
252b5132
RH		 4640 else
4641 {
52b15da3 4642 mask = 0xffffffff;
252b5132
RH		 4643 op = get16();
4644 if ((op & 0x8000) != 0)
4645 op -= 0x10000;
4646 }
7d421014 4647 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4648 break;
4649 case w_mode:
4650 op = get16 ();
52b15da3 4651 mask = 0xffffffff;
252b5132
RH		 4652 if ((op & 0x8000) != 0)
4653 op -= 0x10000;
4654 break;
4655 default:
4656 oappend (INTERNAL_DISASSEMBLER_ERROR);
4657 return;
4658 }
52b15da3
JH		 4659
4660 scratchbuf[0] = '$';
4661 print_operand_value (scratchbuf + 1, 1, op);
252b5132
RH		 4662 oappend (scratchbuf);
4663}
4664
4665static void
4666OP_J (bytemode, sizeflag)
4667 int bytemode;
4668 int sizeflag;
4669{
52b15da3 4670 bfd_vma disp;
252b5132
RH		 4671 int mask = -1;
4672
4673 switch (bytemode)
4674 {
4675 case b_mode:
4676 FETCH_DATA (the_info, codep + 1);
4677 disp = *codep++;
4678 if ((disp & 0x80) != 0)
4679 disp -= 0x100;
4680 break;
4681 case v_mode:
4682 if (sizeflag & DFLAG)
52b15da3 4683 disp = get32s ();
252b5132
RH		 4684 else
4685 {
4686 disp = get16 ();
4687 /* for some reason, a data16 prefix on a jump instruction
4688 means that the pc is masked to 16 bits after the
4689 displacement is added! */
4690 mask = 0xffff;
4691 }
7d421014 4692 used_prefixes |= (prefixes & PREFIX_DATA);
252b5132
RH		 4693 break;
4694 default:
4695 oappend (INTERNAL_DISASSEMBLER_ERROR);
4696 return;
4697 }
4698 disp = (start_pc + codep - start_codep + disp) & mask;
52b15da3
JH		 4699 set_op (disp, 0);
4700 print_operand_value (scratchbuf, 1, disp);
252b5132
RH		 4701 oappend (scratchbuf);
4702}
4703
4704/* ARGSUSED */
4705static void
4706OP_SEG (dummy, sizeflag)
57d91c3c
ILT		 4707 int dummy ATTRIBUTE_UNUSED;
4708 int sizeflag ATTRIBUTE_UNUSED;
252b5132
RH		 4709{
4710 static char *sreg[] = {
4711 "%es","%cs","%ss","%ds","%fs","%gs","%?","%?",
4712 };
4713
4714 oappend (sreg[reg]);
4715}
4716
c608c12e 4717/* ARGSUSED */
252b5132 4718static void
c608c12e 4719OP_DIR (dummy, sizeflag)
57d91c3c 4720 int dummy ATTRIBUTE_UNUSED;
252b5132
RH		 4721 int sizeflag;
4722{
4723 int seg, offset;
4724
c608c12e 4725 if (sizeflag & DFLAG)
252b5132 4726 {
c608c12e
AM		 4727 offset = get32 ();
4728 seg = get16 ();
252b5132 4729 }
c608c12e
AM		 4730 else
4731 {
4732 offset = get16 ();
4733 seg = get16 ();
4734 }
7d421014 4735 used_prefixes |= (prefixes & PREFIX_DATA);
c608c12e
AM		 4736 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
4737 oappend (scratchbuf);
252b5132
RH		 4738}
4739
4740/* ARGSUSED */
4741static void
52b15da3
JH		 4742OP_OFF (ignored, sizeflag)
4743 int ignored ATTRIBUTE_UNUSED;
252b5132
RH		 4744 int sizeflag;
4745{
52b15da3 4746 bfd_vma off;
252b5132
RH		 4747
4748 append_seg ();
4749
4750 if (sizeflag & AFLAG)
4751 off = get32 ();
4752 else
4753 off = get16 ();
4754
4755 if (intel_syntax)
4756 {
4757 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4758 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
4759 {
4760 oappend (names_seg[3]);
4761 oappend (":");
4762 }
4763 }
52b15da3
JH		 4764 print_operand_value (scratchbuf, 1, off);
4765 oappend (scratchbuf);
4766}
4767/* ARGSUSED */
4768static void
4769OP_OFF64 (ignored, sizeflag)
4770 int ignored ATTRIBUTE_UNUSED;
4771 int sizeflag ATTRIBUTE_UNUSED;
4772{
4773 bfd_vma off;
4774
4775 append_seg ();
4776
4777 off = get64();
4778
4779 if (intel_syntax)
4780 {
4781 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
4782 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
4783 {
4784 oappend (names_seg[3]);
4785 oappend (":");
4786 }
4787 }
4788 print_operand_value (scratchbuf, 1, off);
252b5132
RH		 4789 oappend (scratchbuf);
4790}
4791
4792static void
4793ptr_reg (code, sizeflag)
4794 int code;
4795 int sizeflag;
4796{
2da11e11 4797 const char *s;
252b5132 4798 oappend ("(");
52b15da3
JH		 4799 USED_REX (REX_MODE64);
4800 if (rex & REX_MODE64)
4801 s = names64[code - eAX_reg];
4802 else if (sizeflag & AFLAG)
252b5132
RH		 4803 s = names32[code - eAX_reg];
4804 else
4805 s = names16[code - eAX_reg];
4806 oappend (s);
4807 oappend (")");
4808}
4809
4810static void
4811OP_ESreg (code, sizeflag)
4812 int code;
4813 int sizeflag;
4814{
4815 oappend ("%es:");
4816 ptr_reg (code, sizeflag);
4817}
4818
4819static void
4820OP_DSreg (code, sizeflag)
4821 int code;
4822 int sizeflag;
4823{
4824 if ((prefixes
4825 & (PREFIX_CS
4826 | PREFIX_DS
4827 | PREFIX_SS
4828 | PREFIX_ES
4829 | PREFIX_FS
4830 | PREFIX_GS)) == 0)
4831 prefixes |= PREFIX_DS;
4832 append_seg();
4833 ptr_reg (code, sizeflag);
4834}
4835
252b5132
RH		 4836/* ARGSUSED */
4837static void
4838OP_C (dummy, sizeflag)
57d91c3c
ILT		 4839 int dummy ATTRIBUTE_UNUSED;
4840 int sizeflag ATTRIBUTE_UNUSED;
252b5132 4841{
52b15da3
JH		 4842 int add = 0;
4843 USED_REX (REX_EXTX);
4844 if (rex & REX_EXTX)
4845 add = 8;
4846 sprintf (scratchbuf, "%%cr%d", reg+add);
252b5132
RH		 4847 oappend (scratchbuf);
4848}
4849
4850/* ARGSUSED */
4851static void
4852OP_D (dummy, sizeflag)
57d91c3c
ILT		 4853 int dummy ATTRIBUTE_UNUSED;
4854 int sizeflag ATTRIBUTE_UNUSED;
252b5132 4855{
52b15da3
JH		 4856 int add = 0;
4857 USED_REX (REX_EXTX);
4858 if (rex & REX_EXTX)
4859 add = 8;
4860 sprintf (scratchbuf, "%%db%d", reg+add);
252b5132
RH		 4861 oappend (scratchbuf);
4862}
4863
4864/* ARGSUSED */
4865static void
4866OP_T (dummy, sizeflag)
57d91c3c
ILT		 4867 int dummy ATTRIBUTE_UNUSED;
4868 int sizeflag ATTRIBUTE_UNUSED;
252b5132 4869{
252b5132
RH		 4870 sprintf (scratchbuf, "%%tr%d", reg);
4871 oappend (scratchbuf);
4872}
4873
4874static void
2da11e11 4875OP_Rd (bytemode, sizeflag)
252b5132
RH		 4876 int bytemode;
4877 int sizeflag;
4878{
2da11e11
AM		 4879 if (mod == 3)
4880 OP_E (bytemode, sizeflag);
4881 else
4882 BadOp();
252b5132
RH		 4883}
4884
4885static void
4886OP_MMX (ignore, sizeflag)
57d91c3c
ILT		 4887 int ignore ATTRIBUTE_UNUSED;
4888 int sizeflag ATTRIBUTE_UNUSED;
252b5132 4889{
041bd2e0
JH		 4890 int add = 0;
4891 USED_REX (REX_EXTX);
4892 if (rex & REX_EXTX)
4893 add = 8;
4894 used_prefixes |= (prefixes & PREFIX_DATA);
4895 if (prefixes & PREFIX_DATA)
4896 sprintf (scratchbuf, "%%xmm%d", reg + add);
4897 else
4898 sprintf (scratchbuf, "%%mm%d", reg + add);
252b5132
RH		 4899 oappend (scratchbuf);
4900}
4901
c608c12e
AM		 4902static void
4903OP_XMM (bytemode, sizeflag)
57d91c3c
ILT		 4904 int bytemode ATTRIBUTE_UNUSED;
4905 int sizeflag ATTRIBUTE_UNUSED;
c608c12e 4906{
041bd2e0
JH		 4907 int add = 0;
4908 USED_REX (REX_EXTX);
4909 if (rex & REX_EXTX)
4910 add = 8;
4911 sprintf (scratchbuf, "%%xmm%d", reg + add);
c608c12e
AM		 4912 oappend (scratchbuf);
4913}
4914
252b5132
RH		 4915static void
4916OP_EM (bytemode, sizeflag)
4917 int bytemode;
4918 int sizeflag;
4919{
041bd2e0 4920 int add = 0;
252b5132
RH		 4921 if (mod != 3)
4922 {
4923 OP_E (bytemode, sizeflag);
4924 return;
4925 }
041bd2e0
JH		 4926 USED_REX (REX_EXTZ);
4927 if (rex & REX_EXTZ)
4928 add = 8;
252b5132
RH		 4929
4930 codep++;
041bd2e0
JH		 4931 used_prefixes |= (prefixes & PREFIX_DATA);
4932 if (prefixes & PREFIX_DATA)
4933 sprintf (scratchbuf, "%%xmm%d", rm + add);
4934 else
4935 sprintf (scratchbuf, "%%mm%d", rm + add);
252b5132
RH		 4936 oappend (scratchbuf);
4937}
4938
c608c12e
AM		 4939static void
4940OP_EX (bytemode, sizeflag)
4941 int bytemode;
4942 int sizeflag;
4943{
041bd2e0 4944 int add = 0;
c608c12e
AM		 4945 if (mod != 3)
4946 {
4947 OP_E (bytemode, sizeflag);
4948 return;
4949 }
041bd2e0
JH		 4950 USED_REX (REX_EXTZ);
4951 if (rex & REX_EXTZ)
4952 add = 8;
c608c12e
AM		 4953
4954 codep++;
041bd2e0 4955 sprintf (scratchbuf, "%%xmm%d", rm + add);
c608c12e
AM		 4956 oappend (scratchbuf);
4957}
4958
252b5132 4959static void
2da11e11
AM		 4960OP_MS (bytemode, sizeflag)
4961 int bytemode;
252b5132
RH		 4962 int sizeflag;
4963{
2da11e11
AM		 4964 if (mod == 3)
4965 OP_EM (bytemode, sizeflag);
4966 else
4967 BadOp();
252b5132
RH		 4968}
4969
992aaec9
AM		 4970static void
4971OP_XS (bytemode, sizeflag)
4972 int bytemode;
4973 int sizeflag;
4974{
4975 if (mod == 3)
4976 OP_EX (bytemode, sizeflag);
4977 else
4978 BadOp();
4979}
4980
252b5132
RH		 4981static const char *Suffix3DNow[] = {
4982/* 00 */ NULL, NULL, NULL, NULL,
4983/* 04 */ NULL, NULL, NULL, NULL,
4984/* 08 */ NULL, NULL, NULL, NULL,
9e525108 4985/* 0C */ "pi2fw", "pi2fd", NULL, NULL,
252b5132
RH		 4986/* 10 */ NULL, NULL, NULL, NULL,
4987/* 14 */ NULL, NULL, NULL, NULL,
4988/* 18 */ NULL, NULL, NULL, NULL,
9e525108 4989/* 1C */ "pf2iw", "pf2id", NULL, NULL,
252b5132
RH		 4990/* 20 */ NULL, NULL, NULL, NULL,
4991/* 24 */ NULL, NULL, NULL, NULL,
4992/* 28 */ NULL, NULL, NULL, NULL,
4993/* 2C */ NULL, NULL, NULL, NULL,
4994/* 30 */ NULL, NULL, NULL, NULL,
4995/* 34 */ NULL, NULL, NULL, NULL,
4996/* 38 */ NULL, NULL, NULL, NULL,
4997/* 3C */ NULL, NULL, NULL, NULL,
4998/* 40 */ NULL, NULL, NULL, NULL,
4999/* 44 */ NULL, NULL, NULL, NULL,
5000/* 48 */ NULL, NULL, NULL, NULL,
5001/* 4C */ NULL, NULL, NULL, NULL,
5002/* 50 */ NULL, NULL, NULL, NULL,
5003/* 54 */ NULL, NULL, NULL, NULL,
5004/* 58 */ NULL, NULL, NULL, NULL,
5005/* 5C */ NULL, NULL, NULL, NULL,
5006/* 60 */ NULL, NULL, NULL, NULL,
5007/* 64 */ NULL, NULL, NULL, NULL,
5008/* 68 */ NULL, NULL, NULL, NULL,
5009/* 6C */ NULL, NULL, NULL, NULL,
5010/* 70 */ NULL, NULL, NULL, NULL,
5011/* 74 */ NULL, NULL, NULL, NULL,
5012/* 78 */ NULL, NULL, NULL, NULL,
5013/* 7C */ NULL, NULL, NULL, NULL,
5014/* 80 */ NULL, NULL, NULL, NULL,
5015/* 84 */ NULL, NULL, NULL, NULL,
9e525108
AM		 5016/* 88 */ NULL, NULL, "pfnacc", NULL,
5017/* 8C */ NULL, NULL, "pfpnacc", NULL,
252b5132
RH		 5018/* 90 */ "pfcmpge", NULL, NULL, NULL,
5019/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
5020/* 98 */ NULL, NULL, "pfsub", NULL,
5021/* 9C */ NULL, NULL, "pfadd", NULL,
5022/* A0 */ "pfcmpgt", NULL, NULL, NULL,
5023/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
5024/* A8 */ NULL, NULL, "pfsubr", NULL,
5025/* AC */ NULL, NULL, "pfacc", NULL,
5026/* B0 */ "pfcmpeq", NULL, NULL, NULL,
5027/* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
9e525108 5028/* B8 */ NULL, NULL, NULL, "pswapd",
252b5132
RH		 5029/* BC */ NULL, NULL, NULL, "pavgusb",
5030/* C0 */ NULL, NULL, NULL, NULL,
5031/* C4 */ NULL, NULL, NULL, NULL,
5032/* C8 */ NULL, NULL, NULL, NULL,
5033/* CC */ NULL, NULL, NULL, NULL,
5034/* D0 */ NULL, NULL, NULL, NULL,
5035/* D4 */ NULL, NULL, NULL, NULL,
5036/* D8 */ NULL, NULL, NULL, NULL,
5037/* DC */ NULL, NULL, NULL, NULL,
5038/* E0 */ NULL, NULL, NULL, NULL,
5039/* E4 */ NULL, NULL, NULL, NULL,
5040/* E8 */ NULL, NULL, NULL, NULL,
5041/* EC */ NULL, NULL, NULL, NULL,
5042/* F0 */ NULL, NULL, NULL, NULL,
5043/* F4 */ NULL, NULL, NULL, NULL,
5044/* F8 */ NULL, NULL, NULL, NULL,
5045/* FC */ NULL, NULL, NULL, NULL,
5046};
5047
5048static void
5049OP_3DNowSuffix (bytemode, sizeflag)
57d91c3c
ILT		 5050 int bytemode ATTRIBUTE_UNUSED;
5051 int sizeflag ATTRIBUTE_UNUSED;
252b5132
RH		 5052{
5053 const char *mnemonic;
5054
5055 FETCH_DATA (the_info, codep + 1);
5056 /* AMD 3DNow! instructions are specified by an opcode suffix in the
5057 place where an 8-bit immediate would normally go. ie. the last
5058 byte of the instruction. */
2da11e11 5059 obufp = obuf + strlen(obuf);
c608c12e 5060 mnemonic = Suffix3DNow[*codep++ & 0xff];
252b5132 5061 if (mnemonic)
2da11e11 5062 oappend (mnemonic);
252b5132
RH		 5063 else
5064 {
5065 /* Since a variable sized modrm/sib chunk is between the start
5066 of the opcode (0x0f0f) and the opcode suffix, we need to do
5067 all the modrm processing first, and don't know until now that
5068 we have a bad opcode. This necessitates some cleaning up. */
2da11e11
AM		 5069 op1out[0] = '\0';
5070 op2out[0] = '\0';
5071 BadOp();
252b5132
RH		 5072 }
5073}
c608c12e
AM		 5074
5075
5076static const char *simd_cmp_op [] = {
5077 "eq",
5078 "lt",
5079 "le",
5080 "unord",
5081 "neq",
5082 "nlt",
5083 "nle",
5084 "ord"
5085};
5086
5087static void
5088OP_SIMD_Suffix (bytemode, sizeflag)
57d91c3c
ILT		 5089 int bytemode ATTRIBUTE_UNUSED;
5090 int sizeflag ATTRIBUTE_UNUSED;
c608c12e
AM		 5091{
5092 unsigned int cmp_type;
5093
5094 FETCH_DATA (the_info, codep + 1);
2da11e11 5095 obufp = obuf + strlen(obuf);
c608c12e
AM		 5096 cmp_type = *codep++ & 0xff;
5097 if (cmp_type < 8)
5098 {
041bd2e0
JH		 5099 char suffix1 = 'p', suffix2 = 's';
5100 used_prefixes |= (prefixes & PREFIX_REPZ);
5101 if (prefixes & PREFIX_REPZ)
5102 suffix1 = 's';
5103 else
5104 {
5105 used_prefixes |= (prefixes & PREFIX_DATA);
5106 if (prefixes & PREFIX_DATA)
5107 suffix2 = 'd';
5108 else
5109 {
5110 used_prefixes |= (prefixes & PREFIX_REPNZ);
5111 if (prefixes & PREFIX_REPNZ)
5112 suffix1 = 's', suffix2 = 'd';
5113 }
5114 }
5115 sprintf (scratchbuf, "cmp%s%c%c",
5116 simd_cmp_op[cmp_type], suffix1, suffix2);
7d421014 5117 used_prefixes |= (prefixes & PREFIX_REPZ);
2da11e11 5118 oappend (scratchbuf);
c608c12e
AM		 5119 }
5120 else
5121 {
5122 /* We have a bad extension byte. Clean up. */
2da11e11
AM		 5123 op1out[0] = '\0';
5124 op2out[0] = '\0';
5125 BadOp();
c608c12e
AM		 5126 }
5127}
5128
5129static void
5130SIMD_Fixup (extrachar, sizeflag)
5131 int extrachar;
57d91c3c 5132 int sizeflag ATTRIBUTE_UNUSED;
c608c12e
AM		 5133{
5134 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
5135 forms of these instructions. */
5136 if (mod == 3)
5137 {
5138 char *p = obuf + strlen(obuf);
5139 *(p+1) = '\0';
5140 *p = *(p-1);
5141 *(p-1) = *(p-2);
5142 *(p-2) = *(p-3);
5143 *(p-3) = extrachar;
5144 }
5145}
2da11e11
AM		 5146
5147static void BadOp (void)
5148{
5149 codep = insn_codep + 1; /* throw away prefixes and 1st. opcode byte */
5150 oappend ("(bad)");
5151}
GDB Binutils - Deliverables
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