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* mn10300-linux-tdep.c (am33_linux_sigframe_cache_init): Find
[deliverable/binutils-gdb.git] / opcodes / i386-init.h
CommitLineData
40fb9820 1/* This file is automatically generated by i386-gen. Do not edit! */
6f143e4d 2/* Copyright 2007, 2008 Free Software Foundation, Inc.
40fb9820
L		 3
4 This file is part of the GNU opcodes library.
5
6 This library is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
9 any later version.
10
11 It is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 MA 02110-1301, USA. */
20
21#define CPU_UNKNOWN_FLAGS \
22 { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
3629bb00 23 1, 1, 1, 1, 1, 1, 1, 0, 1, 1 } }
40fb9820
L		 24
25#define CPU_GENERIC32_FLAGS \
26 { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
3629bb00 27 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
40fb9820
L		 28
29#define CPU_GENERIC64_FLAGS \
30 { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
3629bb00 31 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
40fb9820
L		 32
33#define CPU_NONE_FLAGS \
34 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
3629bb00 35 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
40fb9820
L		 36
37#define CPU_I186_FLAGS \
38 { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
3629bb00 39 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
40fb9820
L		 40
41#define CPU_I286_FLAGS \
42 { { 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
3629bb00 43 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
40fb9820
L		 44
45#define CPU_I386_FLAGS \
46 { { 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
3629bb00 47 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
40fb9820
L		 48
49#define CPU_I486_FLAGS \
50 { { 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
3629bb00 51 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
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L		 52
53#define CPU_I586_FLAGS \
54 { { 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
3629bb00 55 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
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L		 56
57#define CPU_I686_FLAGS \
58 { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
3629bb00 59 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
40fb9820
L		 60
61#define CPU_P2_FLAGS \
62 { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
3629bb00 63 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
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L		 64
65#define CPU_P3_FLAGS \
66 { { 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
3629bb00 67 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
40fb9820
L		 68
69#define CPU_P4_FLAGS \
70 { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
3629bb00 71 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
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L		 72
73#define CPU_NOCONA_FLAGS \
74 { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, \
3629bb00 75 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }
40fb9820
L		 76
77#define CPU_CORE_FLAGS \
78 { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, \
3629bb00 79 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
40fb9820
L		 80
81#define CPU_CORE2_FLAGS \
47dd174c 82 { { 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, \
3629bb00 83 1, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }
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L		 84
85#define CPU_K6_FLAGS \
86 { { 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
3629bb00 87 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
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L		 88
89#define CPU_K6_2_FLAGS \
90 { { 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
3629bb00 91 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
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L		 92
93#define CPU_ATHLON_FLAGS \
94 { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, \
3629bb00 95 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
40fb9820
L		 96
97#define CPU_K8_FLAGS \
98 { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, \
3629bb00 99 0, 0, 0, 0, 0, 0, 1, 0, 0, 0 } }
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L		 100
101#define CPU_AMDFAM10_FLAGS \
102 { { 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, \
3629bb00 103 0, 1, 1, 0, 0, 0, 1, 0, 0, 0 } }
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L		 104
105#define CPU_MMX_FLAGS \
106 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
3629bb00 107 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
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L		 108
109#define CPU_SSE_FLAGS \
110 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
3629bb00 111 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
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L		 112
113#define CPU_SSE2_FLAGS \
114 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
3629bb00 115 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
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L		 116
117#define CPU_SSE3_FLAGS \
118 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, \
3629bb00 119 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
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L		 120
121#define CPU_SSSE3_FLAGS \
47dd174c 122 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, \
3629bb00 123 1, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
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L		 124
125#define CPU_SSE4_1_FLAGS \
47dd174c 126 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, \
3629bb00 127 1, 0, 0, 1, 0, 0, 0, 0, 0, 0 } }
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L		 128
129#define CPU_SSE4_2_FLAGS \
47dd174c 130 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, \
3629bb00 131 1, 0, 0, 1, 1, 0, 0, 0, 0, 0 } }
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L		 132
133#define CPU_3DNOW_FLAGS \
134 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
3629bb00 135 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
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L		 136
137#define CPU_3DNOWA_FLAGS \
138 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 1, 1, 0, 0, 0, 0, 0, \
3629bb00 139 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
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L		 140
141#define CPU_PADLOCK_FLAGS \
142 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
3629bb00 143 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
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L		 144
145#define CPU_SVME_FLAGS \
146 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
3629bb00 147 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
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L		 148
149#define CPU_SSE4A_FLAGS \
150 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, \
3629bb00 151 0, 1, 0, 0, 0, 0, 0, 0, 0, 0 } }
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L		 152
153#define CPU_ABM_FLAGS \
154 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
3629bb00 155 0, 0, 1, 0, 0, 0, 0, 0, 0, 0 } }
85f10a01
MM		 156
157#define CPU_SSE5_FLAGS \
158 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, \
3629bb00 159 0, 1, 1, 0, 0, 1, 0, 0, 0, 0 } }
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L		 160
161
162#define OPERAND_TYPE_NONE \
163 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
7d5e4556 164 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 165 0, 0, 0 } }
40fb9820
L		 166
167#define OPERAND_TYPE_REG8 \
168 { { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
7d5e4556 169 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 170 0, 0, 0 } }
40fb9820
L		 171
172#define OPERAND_TYPE_REG16 \
173 { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
7d5e4556 174 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 175 0, 0, 0 } }
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L		 176
177#define OPERAND_TYPE_REG32 \
178 { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
7d5e4556 179 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 180 0, 0, 0 } }
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L		 181
182#define OPERAND_TYPE_REG64 \
183 { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
7d5e4556 184 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 185 0, 0, 0 } }
40fb9820
L		 186
187#define OPERAND_TYPE_IMM1 \
7d5e4556
L		 188 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, \
189 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 190 0, 0, 0 } }
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L		 191
192#define OPERAND_TYPE_IMM8 \
7d5e4556
L		 193 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, \
194 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 195 0, 0, 0 } }
40fb9820
L		 196
197#define OPERAND_TYPE_IMM8S \
7d5e4556
L		 198 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, \
199 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 200 0, 0, 0 } }
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L		 201
202#define OPERAND_TYPE_IMM16 \
7d5e4556
L		 203 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
204 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 205 0, 0, 0 } }
40fb9820
L		 206
207#define OPERAND_TYPE_IMM32 \
7d5e4556
L		 208 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, \
209 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 210 0, 0, 0 } }
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L		 211
212#define OPERAND_TYPE_IMM32S \
7d5e4556
L		 213 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
214 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 215 0, 0, 0 } }
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L		 216
217#define OPERAND_TYPE_IMM64 \
7d5e4556
L		 218 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
219 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 220 0, 0, 0 } }
40fb9820
L		 221
222#define OPERAND_TYPE_BASEINDEX \
7d5e4556
L		 223 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
224 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 225 0, 0, 0 } }
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L		 226
227#define OPERAND_TYPE_DISP8 \
7d5e4556
L		 228 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
229 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 230 0, 0, 0 } }
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L		 231
232#define OPERAND_TYPE_DISP16 \
7d5e4556
L		 233 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
234 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 235 0, 0, 0 } }
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L		 236
237#define OPERAND_TYPE_DISP32 \
7d5e4556
L		 238 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
239 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 240 0, 0, 0 } }
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L		 241
242#define OPERAND_TYPE_DISP32S \
7d5e4556
L		 243 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
244 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 245 0, 0, 0 } }
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L		 246
247#define OPERAND_TYPE_DISP64 \
7d5e4556
L		 248 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
249 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 250 0, 0, 0 } }
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L		 251
252#define OPERAND_TYPE_INOUTPORTREG \
7d5e4556
L		 253 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
254 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 255 0, 0, 0 } }
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L		 256
257#define OPERAND_TYPE_SHIFTCOUNT \
7d5e4556
L		 258 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
259 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 260 0, 0, 0 } }
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L		 261
262#define OPERAND_TYPE_CONTROL \
7d5e4556
L		 263 { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
264 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 265 0, 0, 0 } }
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L		 266
267#define OPERAND_TYPE_TEST \
7d5e4556
L		 268 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
269 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 270 0, 0, 0 } }
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L		 271
272#define OPERAND_TYPE_DEBUG \
7d5e4556
L		 273 { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
274 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 275 0, 0, 0 } }
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L		 276
277#define OPERAND_TYPE_FLOATREG \
7d5e4556
L		 278 { { 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
279 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 280 0, 0, 0 } }
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L		 281
282#define OPERAND_TYPE_FLOATACC \
283 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
7d5e4556 284 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 285 0, 0, 0 } }
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L		 286
287#define OPERAND_TYPE_SREG2 \
7d5e4556
L		 288 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
289 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 290 0, 0, 0 } }
40fb9820
L		 291
292#define OPERAND_TYPE_SREG3 \
7d5e4556
L		 293 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \
294 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 295 0, 0, 0 } }
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L		 296
297#define OPERAND_TYPE_ACC \
298 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
7d5e4556 299 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 300 0, 0, 0 } }
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L		 301
302#define OPERAND_TYPE_JUMPABSOLUTE \
303 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
7d5e4556 304 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 305 0, 0, 0 } }
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L		 306
307#define OPERAND_TYPE_REGMMX \
7d5e4556
L		 308 { { 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
309 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 310 0, 0, 0 } }
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L		 311
312#define OPERAND_TYPE_REGXMM \
7d5e4556
L		 313 { { 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
314 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 315 0, 0, 0 } }
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L		 316
317#define OPERAND_TYPE_ESSEG \
318 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
7d5e4556 319 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 320 0, 0, 0 } }
40fb9820
L		 321
322#define OPERAND_TYPE_ACC32 \
323 { { 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc
L		 324 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, \
325 0, 0, 0 } }
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L		 326
327#define OPERAND_TYPE_ACC64 \
328 { { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc
L		 329 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, \
330 0, 0, 0 } }
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L		 331
332#define OPERAND_TYPE_REG16_INOUTPORTREG \
7d5e4556
L		 333 { { 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
334 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 335 0, 0, 0 } }
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L		 336
337#define OPERAND_TYPE_DISP16_32 \
7d5e4556
L		 338 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
339 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 340 0, 0, 0 } }
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L		 341
342#define OPERAND_TYPE_ANYDISP \
7d5e4556
L		 343 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, \
344 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 345 0, 0, 0 } }
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L		 346
347#define OPERAND_TYPE_IMM16_32 \
7d5e4556
L		 348 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, \
349 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 350 0, 0, 0 } }
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L		 351
352#define OPERAND_TYPE_IMM16_32S \
7d5e4556
L		 353 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 0, 0, \
354 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 355 0, 0, 0 } }
40fb9820
L		 356
357#define OPERAND_TYPE_IMM16_32_32S \
7d5e4556
L		 358 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, \
359 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 360 0, 0, 0 } }
40fb9820
L		 361
362#define OPERAND_TYPE_IMM32_32S_DISP32 \
7d5e4556
L		 363 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
364 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 365 0, 0, 0 } }
40fb9820
L		 366
367#define OPERAND_TYPE_IMM64_DISP64 \
7d5e4556
L		 368 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, \
369 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 370 0, 0, 0 } }
40fb9820
L		 371
372#define OPERAND_TYPE_IMM32_32S_64_DISP32 \
7d5e4556
L		 373 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, \
374 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 375 0, 0, 0 } }
40fb9820
L		 376
377#define OPERAND_TYPE_IMM32_32S_64_DISP32_64 \
7d5e4556
L		 378 { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, \
379 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
5c07affc 380 0, 0, 0 } }
GDB Binutils - Deliverables
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