Commit | Line | Data |
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bde78a07 | 1 | /* This file is automatically generated by ia64-gen. Do not edit! */ |
9b201bb5 NC |
2 | /* Copyright 2007 Free Software Foundation, Inc. |
3 | ||
4 | This file is part of the GNU opcodes library. | |
5 | ||
6 | This library is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 3, or (at your option) | |
9 | any later version. | |
10 | ||
11 | It is distributed in the hope that it will be useful, but WITHOUT | |
12 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
13 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
14 | License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; see the file COPYING. If not, write to the | |
18 | Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA | |
19 | 02110-1301, USA. */ | |
bde78a07 | 20 | static const char * const ia64_strings[] = { |
800eeca4 JW |
21 | "", "0", "1", "a", "acq", "add", "addl", "addp4", "adds", "alloc", "and", |
22 | "andcm", "b", "bias", "br", "break", "brl", "brp", "bsw", "c", "call", | |
c10d9d8f JW |
23 | "cexit", "chk", "cloop", "clr", "clrrrb", "cmp", "cmp4", "cmp8xchg16", |
24 | "cmpxchg1", "cmpxchg2", "cmpxchg4", "cmpxchg8", "cond", "cover", "ctop", | |
25 | "czx1", "czx2", "d", "dep", "dpnt", "dptk", "e", "epc", "eq", "excl", | |
26 | "exit", "exp", "extr", "f", "fabs", "fadd", "famax", "famin", "fand", | |
27 | "fandcm", "fault", "fc", "fchkf", "fclass", "fclrf", "fcmp", "fcvt", | |
28 | "fetchadd4", "fetchadd8", "few", "fill", "flushrs", "fma", "fmax", | |
29 | "fmerge", "fmin", "fmix", "fmpy", "fms", "fneg", "fnegabs", "fnma", | |
30 | "fnmpy", "fnorm", "for", "fpabs", "fpack", "fpamax", "fpamin", "fpcmp", | |
31 | "fpcvt", "fpma", "fpmax", "fpmerge", "fpmin", "fpmpy", "fpms", "fpneg", | |
32 | "fpnegabs", "fpnma", "fpnmpy", "fprcpa", "fprsqrta", "frcpa", "frsqrta", | |
33 | "fselect", "fsetc", "fsub", "fswap", "fsxt", "fwb", "fx", "fxor", "fxu", | |
34 | "g", "ga", "ge", "getf", "geu", "gt", "gtu", "h", "hint", "hu", "i", "ia", | |
35 | "imp", "invala", "itc", "itr", "l", "ld1", "ld16", "ld2", "ld4", "ld8", | |
36 | "ldf", "ldf8", "ldfd", "ldfe", "ldfp8", "ldfpd", "ldfps", "ldfs", "le", | |
37 | "leu", "lfetch", "loadrs", "loop", "lr", "lt", "ltu", "lu", "m", "many", | |
38 | "mf", "mix1", "mix2", "mix4", "mov", "movl", "mux1", "mux2", "nc", "ne", | |
39 | "neq", "nge", "ngt", "nl", "nle", "nlt", "nm", "nop", "nr", "ns", "nt1", | |
40 | "nt2", "nta", "nz", "or", "orcm", "ord", "pack2", "pack4", "padd1", | |
41 | "padd2", "padd4", "pavg1", "pavg2", "pavgsub1", "pavgsub2", "pcmp1", | |
42 | "pcmp2", "pcmp4", "pmax1", "pmax2", "pmin1", "pmin2", "pmpy2", "pmpyshr2", | |
43 | "popcnt", "pr", "probe", "psad1", "pshl2", "pshl4", "pshladd2", "pshr2", | |
44 | "pshr4", "pshradd2", "psub1", "psub2", "psub4", "ptc", "ptr", "r", "raz", | |
45 | "rel", "ret", "rfi", "rsm", "rum", "rw", "s", "s0", "s1", "s2", "s3", | |
46 | "sa", "se", "setf", "shl", "shladd", "shladdp4", "shr", "shrp", "sig", | |
47 | "spill", "spnt", "sptk", "srlz", "ssm", "sss", "st1", "st16", "st2", | |
48 | "st4", "st8", "stf", "stf8", "stfd", "stfe", "stfs", "sub", "sum", "sxt1", | |
59cf82fe L |
49 | "sxt2", "sxt4", "sync", "tak", "tbit", "tf", "thash", "tnat", "tpa", |
50 | "trunc", "ttag", "u", "unc", "unord", "unpack1", "unpack2", "unpack4", | |
51 | "uss", "uus", "uuu", "vmsw", "w", "wexit", "wtop", "x", "xchg1", "xchg2", | |
7f3dfb9c L |
52 | "xchg4", "xchg8", "xf", "xma", "xmpy", "xor", "xuf", "z", "zxt1", "zxt2", |
53 | "zxt4", | |
800eeca4 JW |
54 | }; |
55 | ||
56 | static const struct ia64_dependency | |
57 | dependencies[] = { | |
514829c3 | 58 | { "ALAT", 0, 0, 0, -1, NULL, }, |
1ca35711 L |
59 | { "AR[BSP]", 27, 0, 2, 17, NULL, }, |
60 | { "AR[BSPSTORE]", 27, 0, 2, 18, NULL, }, | |
61 | { "AR[CCV]", 27, 0, 2, 32, NULL, }, | |
62 | { "AR[CFLG]", 27, 0, 2, 27, NULL, }, | |
63 | { "AR[CSD]", 27, 0, 2, 25, NULL, }, | |
64 | { "AR[EC]", 27, 0, 2, 66, NULL, }, | |
65 | { "AR[EFLAG]", 27, 0, 2, 24, NULL, }, | |
66 | { "AR[FCR]", 27, 0, 2, 21, NULL, }, | |
67 | { "AR[FDR]", 27, 0, 2, 30, NULL, }, | |
68 | { "AR[FIR]", 27, 0, 2, 29, NULL, }, | |
69 | { "AR[FPSR].sf0.controls", 31, 0, 2, -1, NULL, }, | |
70 | { "AR[FPSR].sf1.controls", 31, 0, 2, -1, NULL, }, | |
71 | { "AR[FPSR].sf2.controls", 31, 0, 2, -1, NULL, }, | |
72 | { "AR[FPSR].sf3.controls", 31, 0, 2, -1, NULL, }, | |
73 | { "AR[FPSR].sf0.flags", 31, 0, 2, -1, NULL, }, | |
74 | { "AR[FPSR].sf1.flags", 31, 0, 2, -1, NULL, }, | |
75 | { "AR[FPSR].sf2.flags", 31, 0, 2, -1, NULL, }, | |
76 | { "AR[FPSR].sf3.flags", 31, 0, 2, -1, NULL, }, | |
77 | { "AR[FPSR].traps", 31, 0, 2, -1, NULL, }, | |
78 | { "AR[FPSR].rv", 31, 0, 2, -1, NULL, }, | |
79 | { "AR[FSR]", 27, 0, 2, 28, NULL, }, | |
80 | { "AR[ITC]", 27, 0, 2, 44, NULL, }, | |
514829c3 | 81 | { "AR[K%], % in 0 - 7", 1, 0, 2, -1, NULL, }, |
1ca35711 L |
82 | { "AR[LC]", 27, 0, 2, 65, NULL, }, |
83 | { "AR[PFS]", 27, 0, 2, 64, NULL, }, | |
84 | { "AR[PFS]", 27, 0, 2, 64, NULL, }, | |
85 | { "AR[PFS]", 27, 0, 0, 64, NULL, }, | |
86 | { "AR[RNAT]", 27, 0, 2, 19, NULL, }, | |
87 | { "AR[RSC]", 27, 0, 2, 16, NULL, }, | |
88 | { "AR[RUC]", 27, 0, 2, 45, NULL, }, | |
89 | { "AR[SSD]", 27, 0, 2, 26, NULL, }, | |
514829c3 | 90 | { "AR[UNAT]{%}, % in 0 - 63", 2, 0, 2, -1, NULL, }, |
4f8631b1 | 91 | { "AR%, % in 8-15, 20, 22-23, 31, 33-35, 37-39, 41-43, 46-47, 67-111", 3, 0, 0, -1, NULL, }, |
514829c3 JW |
92 | { "AR%, % in 48-63, 112-127", 4, 0, 2, -1, NULL, }, |
93 | { "BR%, % in 0 - 7", 5, 0, 2, -1, NULL, }, | |
94 | { "BR%, % in 0 - 7", 5, 0, 0, -1, NULL, }, | |
95 | { "BR%, % in 0 - 7", 5, 0, 2, -1, NULL, }, | |
96 | { "CFM", 6, 0, 2, -1, NULL, }, | |
97 | { "CFM", 6, 0, 2, -1, NULL, }, | |
98 | { "CFM", 6, 0, 2, -1, NULL, }, | |
99 | { "CFM", 6, 0, 2, -1, NULL, }, | |
100 | { "CFM", 6, 0, 0, -1, NULL, }, | |
101 | { "CPUID#", 7, 0, 5, -1, NULL, }, | |
1ca35711 L |
102 | { "CR[CMCV]", 28, 0, 3, 74, NULL, }, |
103 | { "CR[DCR]", 28, 0, 3, 0, NULL, }, |