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800eeca4 | 1 | /* ia64-opc.h -- IA-64 opcode table. |
219d1afa | 2 | Copyright (C) 1998-2018 Free Software Foundation, Inc. |
800eeca4 JW |
3 | Contributed by David Mosberger-Tang <davidm@hpl.hp.com> |
4 | ||
9b201bb5 | 5 | This file is part of the GNU opcodes library. |
800eeca4 | 6 | |
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7 | This library is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3, or (at your option) | |
10 | any later version. | |
800eeca4 | 11 | |
9b201bb5 NC |
12 | It is distributed in the hope that it will be useful, but WITHOUT |
13 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
14 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
15 | License for more details. | |
800eeca4 JW |
16 | |
17 | You should have received a copy of the GNU General Public License | |
18 | along with this file; see the file COPYING. If not, write to the | |
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19 | Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, |
20 | MA 02110-1301, USA. */ | |
800eeca4 JW |
21 | |
22 | #ifndef IA64_OPC_H | |
23 | #define IA64_OPC_H | |
24 | ||
25 | #include "opcode/ia64.h" | |
26 | ||
27 | /* define a couple of abbreviations: */ | |
28 | ||
29 | #define bOp(x) (((ia64_insn) ((x) & 0xf)) << 37) | |
30 | #define mOp bOp (-1) | |
31 | #define Op(x) bOp (x), mOp | |
32 | ||
33 | #define FIRST IA64_OPCODE_FIRST | |
34 | #define X_IN_MLX IA64_OPCODE_X_IN_MLX | |
35 | #define LAST IA64_OPCODE_LAST | |
36 | #define PRIV IA64_OPCODE_PRIV | |
37 | #define NO_PRED IA64_OPCODE_NO_PRED | |
38 | #define SLOT2 IA64_OPCODE_SLOT2 | |
39 | #define PSEUDO IA64_OPCODE_PSEUDO | |
40 | #define F2_EQ_F3 IA64_OPCODE_F2_EQ_F3 | |
41 | #define LEN_EQ_64MCNT IA64_OPCODE_LEN_EQ_64MCNT | |
42 | #define MOD_RRBS IA64_OPCODE_MOD_RRBS | |
50b81f19 | 43 | #define POSTINC IA64_OPCODE_POSTINC |
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44 | |
45 | #define AR_CCV IA64_OPND_AR_CCV | |
46 | #define AR_PFS IA64_OPND_AR_PFS | |
c10d9d8f | 47 | #define AR_CSD IA64_OPND_AR_CSD |
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48 | #define C1 IA64_OPND_C1 |
49 | #define C8 IA64_OPND_C8 | |
50 | #define C16 IA64_OPND_C16 | |
51 | #define GR0 IA64_OPND_GR0 | |
52 | #define IP IA64_OPND_IP | |
53 | #define PR IA64_OPND_PR | |
54 | #define PR_ROT IA64_OPND_PR_ROT | |
55 | #define PSR IA64_OPND_PSR | |
56 | #define PSR_L IA64_OPND_PSR_L | |
57 | #define PSR_UM IA64_OPND_PSR_UM | |
58 | ||
59 | #define AR3 IA64_OPND_AR3 | |
60 | #define B1 IA64_OPND_B1 | |
61 | #define B2 IA64_OPND_B2 | |
62 | #define CR3 IA64_OPND_CR3 | |
63 | #define F1 IA64_OPND_F1 | |
64 | #define F2 IA64_OPND_F2 | |
65 | #define F3 IA64_OPND_F3 | |
66 | #define F4 IA64_OPND_F4 | |
67 | #define P1 IA64_OPND_P1 | |
68 | #define P2 IA64_OPND_P2 | |
69 | #define R1 IA64_OPND_R1 | |
70 | #define R2 IA64_OPND_R2 | |
71 | #define R3 IA64_OPND_R3 | |
72 | #define R3_2 IA64_OPND_R3_2 | |
b3e14eda | 73 | #define DAHR IA64_OPND_DAHR3 |
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74 | |
75 | #define CPUID_R3 IA64_OPND_CPUID_R3 | |
76 | #define DBR_R3 IA64_OPND_DBR_R3 | |
77 | #define DTR_R3 IA64_OPND_DTR_R3 | |
78 | #define ITR_R3 IA64_OPND_ITR_R3 | |
79 | #define IBR_R3 IA64_OPND_IBR_R3 | |
80 | #define MR3 IA64_OPND_MR3 | |
81 | #define MSR_R3 IA64_OPND_MSR_R3 | |
82 | #define PKR_R3 IA64_OPND_PKR_R3 | |
83 | #define PMC_R3 IA64_OPND_PMC_R3 | |
84 | #define PMD_R3 IA64_OPND_PMD_R3 | |
b3e14eda | 85 | #define DAHR_R3 IA64_OPND_DAHR_R3 |
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86 | #define RR_R3 IA64_OPND_RR_R3 |
87 | ||
88 | #define CCNT5 IA64_OPND_CCNT5 | |
89 | #define CNT2a IA64_OPND_CNT2a | |
90 | #define CNT2b IA64_OPND_CNT2b | |
91 | #define CNT2c IA64_OPND_CNT2c | |
92 | #define CNT5 IA64_OPND_CNT5 | |
93 | #define CNT6 IA64_OPND_CNT6 | |
94 | #define CPOS6a IA64_OPND_CPOS6a | |
95 | #define CPOS6b IA64_OPND_CPOS6b | |
96 | #define CPOS6c IA64_OPND_CPOS6c | |
97 | #define IMM1 IA64_OPND_IMM1 | |
98 | #define IMM14 IA64_OPND_IMM14 | |
99 | #define IMM17 IA64_OPND_IMM17 | |
100 | #define IMM22 IA64_OPND_IMM22 | |
101 | #define IMM44 IA64_OPND_IMM44 | |
102 | #define SOF IA64_OPND_SOF | |
103 | #define SOL IA64_OPND_SOL | |
104 | #define SOR IA64_OPND_SOR | |
105 | #define IMM8 IA64_OPND_IMM8 | |
106 | #define IMM8U4 IA64_OPND_IMM8U4 | |
107 | #define IMM8M1 IA64_OPND_IMM8M1 | |
108 | #define IMM8M1U4 IA64_OPND_IMM8M1U4 | |
109 | #define IMM8M1U8 IA64_OPND_IMM8M1U8 | |
110 | #define IMM9a IA64_OPND_IMM9a | |
111 | #define IMM9b IA64_OPND_IMM9b | |
112 | #define IMMU2 IA64_OPND_IMMU2 | |
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113 | #define IMMU16 IA64_OPND_IMMU16 |
114 | #define IMMU19 IA64_OPND_IMMU19 | |
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115 | #define IMMU21 IA64_OPND_IMMU21 |
116 | #define IMMU24 IA64_OPND_IMMU24 | |
117 | #define IMMU62 IA64_OPND_IMMU62 | |
118 | #define IMMU64 IA64_OPND_IMMU64 | |
59cf82fe | 119 | #define IMMU5b IA64_OPND_IMMU5b |
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120 | #define IMMU7a IA64_OPND_IMMU7a |
121 | #define IMMU7b IA64_OPND_IMMU7b | |
122 | #define IMMU9 IA64_OPND_IMMU9 | |
123 | #define INC3 IA64_OPND_INC3 | |
124 | #define LEN4 IA64_OPND_LEN4 | |
125 | #define LEN6 IA64_OPND_LEN6 | |
126 | #define MBTYPE4 IA64_OPND_MBTYPE4 | |
127 | #define MHTYPE8 IA64_OPND_MHTYPE8 | |
128 | #define POS6 IA64_OPND_POS6 | |
129 | #define TAG13 IA64_OPND_TAG13 | |
130 | #define TAG13b IA64_OPND_TAG13b | |
131 | #define TGT25 IA64_OPND_TGT25 | |
132 | #define TGT25b IA64_OPND_TGT25b | |
133 | #define TGT25c IA64_OPND_TGT25c | |
134 | #define TGT64 IA64_OPND_TGT64 | |
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135 | #define CNT6a IA64_OPND_CNT6a |
136 | #define STRD5b IA64_OPND_STRD5b | |
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137 | |
138 | #endif |