* opncls.c (_bfd_id_counter): Rename to bfd_id_counter.
[deliverable/binutils-gdb.git] / opcodes / ip2k-ibld.c
CommitLineData
a40cbfa3
NC
1/* Instruction building/extraction support for ip2k. -*- C -*-
2
47b0e7ad
NC
3 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
4 - the resultant file is machine generated, cgen-ibld.in isn't
a40cbfa3 5
6f3b91a6 6 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005, 2006, 2007,
05994f45 7 2008, 2010 Free Software Foundation, Inc.
a40cbfa3 8
9b201bb5 9 This file is part of libopcodes.
a40cbfa3 10
9b201bb5 11 This library is free software; you can redistribute it and/or modify
47b0e7ad 12 it under the terms of the GNU General Public License as published by
9b201bb5 13 the Free Software Foundation; either version 3, or (at your option)
47b0e7ad 14 any later version.
a40cbfa3 15
9b201bb5
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16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
a40cbfa3 20
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21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
a40cbfa3
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24
25/* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28#include "sysdep.h"
29#include <stdio.h>
30#include "ansidecl.h"
31#include "dis-asm.h"
32#include "bfd.h"
33#include "symcat.h"
34#include "ip2k-desc.h"
35#include "ip2k-opc.h"
fe8afbc4 36#include "cgen/basic-modes.h"
a40cbfa3
NC
37#include "opintl.h"
38#include "safe-ctype.h"
39
47b0e7ad 40#undef min
a40cbfa3 41#define min(a,b) ((a) < (b) ? (a) : (b))
47b0e7ad 42#undef max
a40cbfa3
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43#define max(a,b) ((a) > (b) ? (a) : (b))
44
45/* Used by the ifield rtx function. */
46#define FLD(f) (fields->f)
47
48static const char * insert_normal
ffead7ae
MM
49 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
50 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
a40cbfa3 51static const char * insert_insn_normal
ffead7ae
MM
52 (CGEN_CPU_DESC, const CGEN_INSN *,
53 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
a40cbfa3 54static int extract_normal
ffead7ae
MM
55 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
56 unsigned int, unsigned int, unsigned int, unsigned int,
57 unsigned int, unsigned int, bfd_vma, long *);
a40cbfa3 58static int extract_insn_normal
ffead7ae
MM
59 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
60 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
a40cbfa3
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61#if CGEN_INT_INSN_P
62static void put_insn_int_value
ffead7ae 63 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
a40cbfa3
NC
64#endif
65#if ! CGEN_INT_INSN_P
66static CGEN_INLINE void insert_1
ffead7ae 67 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
a40cbfa3 68static CGEN_INLINE int fill_cache
ffead7ae 69 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
a40cbfa3 70static CGEN_INLINE long extract_1
ffead7ae 71 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
a40cbfa3
NC
72#endif
73\f
74/* Operand insertion. */
75
76#if ! CGEN_INT_INSN_P
77
78/* Subroutine of insert_normal. */
79
80static CGEN_INLINE void
ffead7ae
MM
81insert_1 (CGEN_CPU_DESC cd,
82 unsigned long value,
83 int start,
84 int length,
85 int word_length,
86 unsigned char *bufp)
a40cbfa3
NC
87{
88 unsigned long x,mask;
89 int shift;
90
91 x = cgen_get_insn_value (cd, bufp, word_length);
92
93 /* Written this way to avoid undefined behaviour. */
94 mask = (((1L << (length - 1)) - 1) << 1) | 1;
95 if (CGEN_INSN_LSB0_P)
96 shift = (start + 1) - length;
97 else
98 shift = (word_length - (start + length));
99 x = (x & ~(mask << shift)) | ((value & mask) << shift);
100
101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
102}
103
104#endif /* ! CGEN_INT_INSN_P */
105
106/* Default insertion routine.
107
108 ATTRS is a mask of the boolean attributes.
109 WORD_OFFSET is the offset in bits from the start of the insn of the value.
110 WORD_LENGTH is the length of the word in bits in which the value resides.
111 START is the starting bit number in the word, architecture origin.
112 LENGTH is the length of VALUE in bits.
113 TOTAL_LENGTH is the total length of the insn in bits.
114
115 The result is an error message or NULL if success. */
116
117/* ??? This duplicates functionality with bfd's howto table and
118 bfd_install_relocation. */
119/* ??? This doesn't handle bfd_vma's. Create another function when
120 necessary. */
121
122static const char *
ffead7ae
MM
123insert_normal (CGEN_CPU_DESC cd,
124 long value,
125 unsigned int attrs,
126 unsigned int word_offset,
127 unsigned int start,
128 unsigned int length,
129 unsigned int word_length,
130 unsigned int total_length,
131 CGEN_INSN_BYTES_PTR buffer)
a40cbfa3
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132{
133 static char errbuf[100];
134 /* Written this way to avoid undefined behaviour. */
135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
136
137 /* If LENGTH is zero, this operand doesn't contribute to the value. */
138 if (length == 0)
139 return NULL;
140
b7cd1872 141 if (word_length > 8 * sizeof (CGEN_INSN_INT))
a40cbfa3
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142 abort ();
143
144 /* For architectures with insns smaller than the base-insn-bitsize,
145 word_length may be too big. */
146 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
147 {
148 if (word_offset == 0
149 && word_length > total_length)
150 word_length = total_length;
151 }
152
153 /* Ensure VALUE will fit. */
154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
155 {
156 long minval = - (1L << (length - 1));
157 unsigned long maxval = mask;
158
159 if ((value > 0 && (unsigned long) value > maxval)
160 || value < minval)
161 {
162 /* xgettext:c-format */
163 sprintf (errbuf,
164 _("operand out of range (%ld not between %ld and %lu)"),
165 value, minval, maxval);
166 return errbuf;
167 }
168 }
169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
170 {
171 unsigned long maxval = mask;
ed963e2d
NC
172 unsigned long val = (unsigned long) value;
173
174 /* For hosts with a word size > 32 check to see if value has been sign
175 extended beyond 32 bits. If so then ignore these higher sign bits
176 as the user is attempting to store a 32-bit signed value into an
177 unsigned 32-bit field which is allowed. */
178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
179 val &= 0xFFFFFFFF;
180
181 if (val > maxval)
a40cbfa3
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182 {
183 /* xgettext:c-format */
184 sprintf (errbuf,
ed963e2d
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185 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
186 val, maxval);
a40cbfa3
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187 return errbuf;
188 }
189 }
190 else
191 {
192 if (! cgen_signed_overflow_ok_p (cd))
193 {
194 long minval = - (1L << (length - 1));
195 long maxval = (1L << (length - 1)) - 1;
196
197 if (value < minval || value > maxval)
198 {
199 sprintf
200 /* xgettext:c-format */
201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
202 value, minval, maxval);
203 return errbuf;
204 }
205 }
206 }
207
208#if CGEN_INT_INSN_P
209
210 {
211 int shift;
212
213 if (CGEN_INSN_LSB0_P)
214 shift = (word_offset + start + 1) - length;
215 else
216 shift = total_length - (word_offset + start + length);
217 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
218 }
219
220#else /* ! CGEN_INT_INSN_P */
221
222 {
223 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
224
225 insert_1 (cd, value, start, length, word_length, bufp);
226 }
227
228#endif /* ! CGEN_INT_INSN_P */
229
230 return NULL;
231}
232
233/* Default insn builder (insert handler).
234 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
235 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
236 recorded in host byte order, otherwise BUFFER is an array of bytes
237 and the value is recorded in target byte order).
238 The result is an error message or NULL if success. */
239
240static const char *
ffead7ae
MM
241insert_insn_normal (CGEN_CPU_DESC cd,
242 const CGEN_INSN * insn,
243 CGEN_FIELDS * fields,
244 CGEN_INSN_BYTES_PTR buffer,
245 bfd_vma pc)
a40cbfa3
NC
246{
247 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
248 unsigned long value;
249 const CGEN_SYNTAX_CHAR_TYPE * syn;
250
251 CGEN_INIT_INSERT (cd);
252 value = CGEN_INSN_BASE_VALUE (insn);
253
254 /* If we're recording insns as numbers (rather than a string of bytes),
255 target byte order handling is deferred until later. */
256
257#if CGEN_INT_INSN_P
258
259 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
260 CGEN_FIELDS_BITSIZE (fields), value);
261
262#else
263
264 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
265 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
266 value);
267
268#endif /* ! CGEN_INT_INSN_P */
269
270 /* ??? It would be better to scan the format's fields.
271 Still need to be able to insert a value based on the operand though;
272 e.g. storing a branch displacement that got resolved later.
273 Needs more thought first. */
274
275 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
276 {
277 const char *errmsg;
278
279 if (CGEN_SYNTAX_CHAR_P (* syn))
280 continue;
281
282 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
283 fields, buffer, pc);
284 if (errmsg)
285 return errmsg;
286 }
287
288 return NULL;
289}
290
291#if CGEN_INT_INSN_P
292/* Cover function to store an insn value into an integral insn. Must go here
47b0e7ad 293 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
a40cbfa3
NC
294
295static void
ffead7ae
MM
296put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
297 CGEN_INSN_BYTES_PTR buf,
298 int length,
299 int insn_length,
300 CGEN_INSN_INT value)
a40cbfa3
NC
301{
302 /* For architectures with insns smaller than the base-insn-bitsize,
303 length may be too big. */
304 if (length > insn_length)
305 *buf = value;
306 else
307 {
308 int shift = insn_length - length;
309 /* Written this way to avoid undefined behaviour. */
310 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
47b0e7ad 311
a40cbfa3
NC
312 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
313 }
314}
315#endif
316\f
317/* Operand extraction. */
318
319#if ! CGEN_INT_INSN_P
320
321/* Subroutine of extract_normal.
322 Ensure sufficient bytes are cached in EX_INFO.
323 OFFSET is the offset in bytes from the start of the insn of the value.
324 BYTES is the length of the needed value.
325 Returns 1 for success, 0 for failure. */
326
327static CGEN_INLINE int
ffead7ae
MM
328fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
329 CGEN_EXTRACT_INFO *ex_info,
330 int offset,
331 int bytes,
332 bfd_vma pc)
a40cbfa3
NC
333{
334 /* It's doubtful that the middle part has already been fetched so
335 we don't optimize that case. kiss. */
336 unsigned int mask;
337 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
338
339 /* First do a quick check. */
340 mask = (1 << bytes) - 1;
341 if (((ex_info->valid >> offset) & mask) == mask)
342 return 1;
343
344 /* Search for the first byte we need to read. */
345 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
346 if (! (mask & ex_info->valid))
347 break;
348
349 if (bytes)
350 {
351 int status;
352
353 pc += offset;
354 status = (*info->read_memory_func)
355 (pc, ex_info->insn_bytes + offset, bytes, info);
356
357 if (status != 0)
358 {
359 (*info->memory_error_func) (status, pc, info);
360 return 0;
361 }
362
363 ex_info->valid |= ((1 << bytes) - 1) << offset;
364 }
365
366 return 1;
367}
368
369/* Subroutine of extract_normal. */
370
371static CGEN_INLINE long
ffead7ae
MM
372extract_1 (CGEN_CPU_DESC cd,
373 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
374 int start,
375 int length,
376 int word_length,
377 unsigned char *bufp,
378 bfd_vma pc ATTRIBUTE_UNUSED)
a40cbfa3
NC
379{
380 unsigned long x;
381 int shift;
47b0e7ad 382
a40cbfa3
NC
383 x = cgen_get_insn_value (cd, bufp, word_length);
384
385 if (CGEN_INSN_LSB0_P)
386 shift = (start + 1) - length;
387 else
388 shift = (word_length - (start + length));
389 return x >> shift;
390}
391
392#endif /* ! CGEN_INT_INSN_P */
393
394/* Default extraction routine.
395
396 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
397 or sometimes less for cases like the m32r where the base insn size is 32
398 but some insns are 16 bits.
399 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
400 but for generality we take a bitmask of all of them.
401 WORD_OFFSET is the offset in bits from the start of the insn of the value.
402 WORD_LENGTH is the length of the word in bits in which the value resides.
403 START is the starting bit number in the word, architecture origin.
404 LENGTH is the length of VALUE in bits.
405 TOTAL_LENGTH is the total length of the insn in bits.
406
407 Returns 1 for success, 0 for failure. */
408
409/* ??? The return code isn't properly used. wip. */
410
411/* ??? This doesn't handle bfd_vma's. Create another function when
412 necessary. */
413
414static int
ffead7ae 415extract_normal (CGEN_CPU_DESC cd,
a40cbfa3 416#if ! CGEN_INT_INSN_P
ffead7ae 417 CGEN_EXTRACT_INFO *ex_info,
a40cbfa3 418#else
ffead7ae 419 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
a40cbfa3 420#endif
ffead7ae
MM
421 CGEN_INSN_INT insn_value,
422 unsigned int attrs,
423 unsigned int word_offset,
424 unsigned int start,
425 unsigned int length,
426 unsigned int word_length,
427 unsigned int total_length,
a40cbfa3 428#if ! CGEN_INT_INSN_P
ffead7ae 429 bfd_vma pc,
a40cbfa3 430#else
ffead7ae 431 bfd_vma pc ATTRIBUTE_UNUSED,
a40cbfa3 432#endif
ffead7ae 433 long *valuep)
a40cbfa3
NC
434{
435 long value, mask;
436
437 /* If LENGTH is zero, this operand doesn't contribute to the value
438 so give it a standard value of zero. */
439 if (length == 0)
440 {
441 *valuep = 0;
442 return 1;
443 }
444
b7cd1872 445 if (word_length > 8 * sizeof (CGEN_INSN_INT))
a40cbfa3
NC
446 abort ();
447
448 /* For architectures with insns smaller than the insn-base-bitsize,
449 word_length may be too big. */
450 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
451 {
ed963e2d
NC
452 if (word_offset + word_length > total_length)
453 word_length = total_length - word_offset;
a40cbfa3
NC
454 }
455
456 /* Does the value reside in INSN_VALUE, and at the right alignment? */
457
458 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
459 {
460 if (CGEN_INSN_LSB0_P)
461 value = insn_value >> ((word_offset + start + 1) - length);
462 else
463 value = insn_value >> (total_length - ( word_offset + start + length));
464 }
465
466#if ! CGEN_INT_INSN_P
467
468 else
469 {
470 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
471
b7cd1872 472 if (word_length > 8 * sizeof (CGEN_INSN_INT))
a40cbfa3
NC
473 abort ();
474
475 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
476 return 0;
477
478 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
479 }
480
481#endif /* ! CGEN_INT_INSN_P */
482
483 /* Written this way to avoid undefined behaviour. */
484 mask = (((1L << (length - 1)) - 1) << 1) | 1;
485
486 value &= mask;
487 /* sign extend? */
488 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
489 && (value & (1L << (length - 1))))
490 value |= ~mask;
491
492 *valuep = value;
493
494 return 1;
495}
496
497/* Default insn extractor.
498
499 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
500 The extracted fields are stored in FIELDS.
501 EX_INFO is used to handle reading variable length insns.
502 Return the length of the insn in bits, or 0 if no match,
503 or -1 if an error occurs fetching data (memory_error_func will have
504 been called). */
505
506static int
ffead7ae
MM
507extract_insn_normal (CGEN_CPU_DESC cd,
508 const CGEN_INSN *insn,
509 CGEN_EXTRACT_INFO *ex_info,
510 CGEN_INSN_INT insn_value,
511 CGEN_FIELDS *fields,
512 bfd_vma pc)
a40cbfa3
NC
513{
514 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
515 const CGEN_SYNTAX_CHAR_TYPE *syn;
516
517 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
518
519 CGEN_INIT_EXTRACT (cd);
520
521 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
522 {
523 int length;
524
525 if (CGEN_SYNTAX_CHAR_P (*syn))
526 continue;
527
528 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
529 ex_info, insn_value, fields, pc);
530 if (length <= 0)
531 return length;
532 }
533
534 /* We recognized and successfully extracted this insn. */
535 return CGEN_INSN_BITSIZE (insn);
536}
537\f
47b0e7ad 538/* Machine generated code added here. */
a40cbfa3
NC
539
540const char * ip2k_cgen_insert_operand
47b0e7ad 541 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
a40cbfa3
NC
542
543/* Main entry point for operand insertion.
544
545 This function is basically just a big switch statement. Earlier versions
546 used tables to look up the function to use, but
547 - if the table contains both assembler and disassembler functions then
548 the disassembler contains much of the assembler and vice-versa,
549 - there's a lot of inlining possibilities as things grow,
550 - using a switch statement avoids the function call overhead.
551
552 This function could be moved into `parse_insn_normal', but keeping it
553 separate makes clear the interface between `parse_insn_normal' and each of
554 the handlers. It's also needed by GAS to insert operands that couldn't be
555 resolved during parsing. */
556
557const char *
47b0e7ad
NC
558ip2k_cgen_insert_operand (CGEN_CPU_DESC cd,
559 int opindex,
560 CGEN_FIELDS * fields,
561 CGEN_INSN_BYTES_PTR buffer,
562 bfd_vma pc ATTRIBUTE_UNUSED)
a40cbfa3
NC
563{
564 const char * errmsg = NULL;
565 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
566
567 switch (opindex)
568 {
569 case IP2K_OPERAND_ADDR16CJP :
570 errmsg = insert_normal (cd, fields->f_addr16cjp, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 12, 13, 16, total_length, buffer);
571 break;
572 case IP2K_OPERAND_ADDR16H :
573 errmsg = insert_normal (cd, fields->f_imm8, 0, 0, 7, 8, 16, total_length, buffer);
574 break;
575 case IP2K_OPERAND_ADDR16L :
576 errmsg = insert_normal (cd, fields->f_imm8, 0, 0, 7, 8, 16, total_length, buffer);
577 break;
578 case IP2K_OPERAND_ADDR16P :
579 errmsg = insert_normal (cd, fields->f_page3, 0, 0, 2, 3, 16, total_length, buffer);
580 break;
581 case IP2K_OPERAND_BITNO :
582 errmsg = insert_normal (cd, fields->f_bitno, 0, 0, 11, 3, 16, total_length, buffer);
583 break;
584 case IP2K_OPERAND_CBIT :
585 break;
586 case IP2K_OPERAND_DCBIT :
587 break;
588 case IP2K_OPERAND_FR :
589 errmsg = insert_normal (cd, fields->f_reg, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 9, 16, total_length, buffer);
590 break;
591 case IP2K_OPERAND_LIT8 :
592 errmsg = insert_normal (cd, fields->f_imm8, 0, 0, 7, 8, 16, total_length, buffer);
593 break;
594 case IP2K_OPERAND_PABITS :
595 break;
596 case IP2K_OPERAND_RETI3 :
597 errmsg = insert_normal (cd, fields->f_reti3, 0, 0, 2, 3, 16, total_length, buffer);
598 break;
599 case IP2K_OPERAND_ZBIT :
600 break;
601
602 default :
603 /* xgettext:c-format */
604 fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
605 opindex);
606 abort ();
607 }
608
609 return errmsg;
610}
611
612int ip2k_cgen_extract_operand
47b0e7ad 613 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
a40cbfa3
NC
614
615/* Main entry point for operand extraction.
616 The result is <= 0 for error, >0 for success.
617 ??? Actual values aren't well defined right now.
618
619 This function is basically just a big switch statement. Earlier versions
620 used tables to look up the function to use, but
621 - if the table contains both assembler and disassembler functions then
622 the disassembler contains much of the assembler and vice-versa,
623 - there's a lot of inlining possibilities as things grow,
624 - using a switch statement avoids the function call overhead.
625
626 This function could be moved into `print_insn_normal', but keeping it
627 separate makes clear the interface between `print_insn_normal' and each of
628 the handlers. */
629
630int
47b0e7ad
NC
631ip2k_cgen_extract_operand (CGEN_CPU_DESC cd,
632 int opindex,
633 CGEN_EXTRACT_INFO *ex_info,
634 CGEN_INSN_INT insn_value,
635 CGEN_FIELDS * fields,
636 bfd_vma pc)
a40cbfa3
NC
637{
638 /* Assume success (for those operands that are nops). */
639 int length = 1;
640 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
641
642 switch (opindex)
643 {
644 case IP2K_OPERAND_ADDR16CJP :
645 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 12, 13, 16, total_length, pc, & fields->f_addr16cjp);
646 break;
647 case IP2K_OPERAND_ADDR16H :
648 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 8, 16, total_length, pc, & fields->f_imm8);
649 break;
650 case IP2K_OPERAND_ADDR16L :
651 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 8, 16, total_length, pc, & fields->f_imm8);
652 break;
653 case IP2K_OPERAND_ADDR16P :
654 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 3, 16, total_length, pc, & fields->f_page3);
655 break;
656 case IP2K_OPERAND_BITNO :
657 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 3, 16, total_length, pc, & fields->f_bitno);
658 break;
659 case IP2K_OPERAND_CBIT :
660 break;
661 case IP2K_OPERAND_DCBIT :
662 break;
663 case IP2K_OPERAND_FR :
664 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_ABS_ADDR), 0, 8, 9, 16, total_length, pc, & fields->f_reg);
665 break;
666 case IP2K_OPERAND_LIT8 :
667 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 8, 16, total_length, pc, & fields->f_imm8);
668 break;
669 case IP2K_OPERAND_PABITS :
670 break;
671 case IP2K_OPERAND_RETI3 :
672 length = extract_normal (cd, ex_info, insn_value, 0, 0, 2, 3, 16, total_length, pc, & fields->f_reti3);
673 break;
674 case IP2K_OPERAND_ZBIT :
675 break;
676
677 default :
678 /* xgettext:c-format */
679 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
680 opindex);
681 abort ();
682 }
683
684 return length;
685}
686
687cgen_insert_fn * const ip2k_cgen_insert_handlers[] =
688{
689 insert_insn_normal,
690};
691
692cgen_extract_fn * const ip2k_cgen_extract_handlers[] =
693{
694 extract_insn_normal,
695};
696
47b0e7ad
NC
697int ip2k_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
698bfd_vma ip2k_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
a40cbfa3
NC
699
700/* Getting values from cgen_fields is handled by a collection of functions.
701 They are distinguished by the type of the VALUE argument they return.
702 TODO: floating point, inlining support, remove cases where result type
703 not appropriate. */
704
705int
47b0e7ad
NC
706ip2k_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
707 int opindex,
708 const CGEN_FIELDS * fields)
a40cbfa3
NC
709{
710 int value;
711
712 switch (opindex)
713 {
714 case IP2K_OPERAND_ADDR16CJP :
715 value = fields->f_addr16cjp;
716 break;
717 case IP2K_OPERAND_ADDR16H :
718 value = fields->f_imm8;
719 break;
720 case IP2K_OPERAND_ADDR16L :
721 value = fields->f_imm8;
722 break;
723 case IP2K_OPERAND_ADDR16P :
724 value = fields->f_page3;
725 break;
726 case IP2K_OPERAND_BITNO :
727 value = fields->f_bitno;
728 break;
729 case IP2K_OPERAND_CBIT :
730 value = 0;
731 break;
732 case IP2K_OPERAND_DCBIT :
733 value = 0;
734 break;
735 case IP2K_OPERAND_FR :
736 value = fields->f_reg;
737 break;
738 case IP2K_OPERAND_LIT8 :
739 value = fields->f_imm8;
740 break;
741 case IP2K_OPERAND_PABITS :
742 value = 0;
743 break;
744 case IP2K_OPERAND_RETI3 :
745 value = fields->f_reti3;
746 break;
747 case IP2K_OPERAND_ZBIT :
748 value = 0;
749 break;
750
751 default :
752 /* xgettext:c-format */
753 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
754 opindex);
755 abort ();
756 }
757
758 return value;
759}
760
761bfd_vma
47b0e7ad
NC
762ip2k_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
763 int opindex,
764 const CGEN_FIELDS * fields)
a40cbfa3
NC
765{
766 bfd_vma value;
767
768 switch (opindex)
769 {
770 case IP2K_OPERAND_ADDR16CJP :
771 value = fields->f_addr16cjp;
772 break;
773 case IP2K_OPERAND_ADDR16H :
774 value = fields->f_imm8;
775 break;
776 case IP2K_OPERAND_ADDR16L :
777 value = fields->f_imm8;
778 break;
779 case IP2K_OPERAND_ADDR16P :
780 value = fields->f_page3;
781 break;
782 case IP2K_OPERAND_BITNO :
783 value = fields->f_bitno;
784 break;
785 case IP2K_OPERAND_CBIT :
786 value = 0;
787 break;
788 case IP2K_OPERAND_DCBIT :
789 value = 0;
790 break;
791 case IP2K_OPERAND_FR :
792 value = fields->f_reg;
793 break;
794 case IP2K_OPERAND_LIT8 :
795 value = fields->f_imm8;
796 break;
797 case IP2K_OPERAND_PABITS :
798 value = 0;
799 break;
800 case IP2K_OPERAND_RETI3 :
801 value = fields->f_reti3;
802 break;
803 case IP2K_OPERAND_ZBIT :
804 value = 0;
805 break;
806
807 default :
808 /* xgettext:c-format */
809 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
810 opindex);
811 abort ();
812 }
813
814 return value;
815}
816
47b0e7ad
NC
817void ip2k_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
818void ip2k_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
a40cbfa3
NC
819
820/* Stuffing values in cgen_fields is handled by a collection of functions.
821 They are distinguished by the type of the VALUE argument they accept.
822 TODO: floating point, inlining support, remove cases where argument type
823 not appropriate. */
824
825void
47b0e7ad
NC
826ip2k_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
827 int opindex,
828 CGEN_FIELDS * fields,
829 int value)
a40cbfa3
NC
830{
831 switch (opindex)
832 {
833 case IP2K_OPERAND_ADDR16CJP :
834 fields->f_addr16cjp = value;
835 break;
836 case IP2K_OPERAND_ADDR16H :
837 fields->f_imm8 = value;
838 break;
839 case IP2K_OPERAND_ADDR16L :
840 fields->f_imm8 = value;
841 break;
842 case IP2K_OPERAND_ADDR16P :
843 fields->f_page3 = value;
844 break;
845 case IP2K_OPERAND_BITNO :
846 fields->f_bitno = value;
847 break;
848 case IP2K_OPERAND_CBIT :
849 break;
850 case IP2K_OPERAND_DCBIT :
851 break;
852 case IP2K_OPERAND_FR :
853 fields->f_reg = value;
854 break;
855 case IP2K_OPERAND_LIT8 :
856 fields->f_imm8 = value;
857 break;
858 case IP2K_OPERAND_PABITS :
859 break;
860 case IP2K_OPERAND_RETI3 :
861 fields->f_reti3 = value;
862 break;
863 case IP2K_OPERAND_ZBIT :
864 break;
865
866 default :
867 /* xgettext:c-format */
868 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
869 opindex);
870 abort ();
871 }
872}
873
874void
47b0e7ad
NC
875ip2k_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
876 int opindex,
877 CGEN_FIELDS * fields,
878 bfd_vma value)
a40cbfa3
NC
879{
880 switch (opindex)
881 {
882 case IP2K_OPERAND_ADDR16CJP :
883 fields->f_addr16cjp = value;
884 break;
885 case IP2K_OPERAND_ADDR16H :
886 fields->f_imm8 = value;
887 break;
888 case IP2K_OPERAND_ADDR16L :
889 fields->f_imm8 = value;
890 break;
891 case IP2K_OPERAND_ADDR16P :
892 fields->f_page3 = value;
893 break;
894 case IP2K_OPERAND_BITNO :
895 fields->f_bitno = value;
896 break;
897 case IP2K_OPERAND_CBIT :
898 break;
899 case IP2K_OPERAND_DCBIT :
900 break;
901 case IP2K_OPERAND_FR :
902 fields->f_reg = value;
903 break;
904 case IP2K_OPERAND_LIT8 :
905 fields->f_imm8 = value;
906 break;
907 case IP2K_OPERAND_PABITS :
908 break;
909 case IP2K_OPERAND_RETI3 :
910 fields->f_reti3 = value;
911 break;
912 case IP2K_OPERAND_ZBIT :
913 break;
914
915 default :
916 /* xgettext:c-format */
917 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
918 opindex);
919 abort ();
920 }
921}
922
923/* Function to call before using the instruction builder tables. */
924
925void
47b0e7ad 926ip2k_cgen_init_ibld_table (CGEN_CPU_DESC cd)
a40cbfa3
NC
927{
928 cd->insert_handlers = & ip2k_cgen_insert_handlers[0];
929 cd->extract_handlers = & ip2k_cgen_extract_handlers[0];
930
931 cd->insert_operand = ip2k_cgen_insert_operand;
932 cd->extract_operand = ip2k_cgen_extract_operand;
933
934 cd->get_int_operand = ip2k_cgen_get_int_operand;
935 cd->set_int_operand = ip2k_cgen_set_int_operand;
936 cd->get_vma_operand = ip2k_cgen_get_vma_operand;
937 cd->set_vma_operand = ip2k_cgen_set_vma_operand;
938}
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