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* cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
[deliverable/binutils-gdb.git] / opcodes / ip2k-opc.c
CommitLineData
a40cbfa3
NC		 1/* Instruction opcode table for ip2k.
2
3THIS FILE IS MACHINE GENERATED WITH CGEN.
4
5Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
6
7This file is part of the GNU Binutils and/or GDB, the GNU debugger.
8
9This program is free software; you can redistribute it and/or modify
10it under the terms of the GNU General Public License as published by
11the Free Software Foundation; either version 2, or (at your option)
12any later version.
13
14This program is distributed in the hope that it will be useful,
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License along
20with this program; if not, write to the Free Software Foundation, Inc.,
2159 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23*/
24
25#include "sysdep.h"
26#include "ansidecl.h"
27#include "bfd.h"
28#include "symcat.h"
29#include "ip2k-desc.h"
30#include "ip2k-opc.h"
31#include "libiberty.h"
32
33/* -- opc.c */
34
35/* A better hash function for instruction mnemonics. */
36unsigned int
37ip2k_asm_hash (insn)
38 const char* insn;
39{
40 unsigned int hash;
41 const char* m = insn;
42
43 for (hash = 0; *m && !isspace(*m); m++)
44 hash = (hash * 23) ^ (0x1F & tolower(*m));
45
46 /* printf ("%s %d\n", insn, (hash % CGEN_ASM_HASH_SIZE)); */
47
48 return hash % CGEN_ASM_HASH_SIZE;
49}
50
51
52
53\f
54/* -- asm.c */
55/* The hash functions are recorded here to help keep assembler code out of
56 the disassembler and vice versa. */
57
58static int asm_hash_insn_p PARAMS ((const CGEN_INSN *));
59static unsigned int asm_hash_insn PARAMS ((const char *));
60static int dis_hash_insn_p PARAMS ((const CGEN_INSN *));
61static unsigned int dis_hash_insn PARAMS ((const char *, CGEN_INSN_INT));
62
63/* Instruction formats. */
64
65#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
66#define F(f) & ip2k_cgen_ifld_table[IP2K_##f]
67#else
68#define F(f) & ip2k_cgen_ifld_table[IP2K_/**/f]
69#endif
70static const CGEN_IFMT ifmt_empty = {
71 0, 0, 0x0, { { 0 } }
72};
73
74static const CGEN_IFMT ifmt_jmp = {
75 16, 16, 0xe000, { { F (F_OP3) }, { F (F_ADDR16CJP) }, { 0 } }
76};
77
78static const CGEN_IFMT ifmt_sb = {
79 16, 16, 0xf000, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } }
80};
81
82static const CGEN_IFMT ifmt_xorw_l = {
83 16, 16, 0xff00, { { F (F_OP4) }, { F (F_OP4MID) }, { F (F_IMM8) }, { 0 } }
84};
85
86static const CGEN_IFMT ifmt_loadl_a = {
87 16, 16, 0xff00, { { F (F_OP4) }, { F (F_OP4MID) }, { F (F_IMM8) }, { 0 } }
88};
89
90static const CGEN_IFMT ifmt_loadh_a = {
91 16, 16, 0xff00, { { F (F_OP4) }, { F (F_OP4MID) }, { F (F_IMM8) }, { 0 } }
92};
93
94static const CGEN_IFMT ifmt_addcfr_w = {
95 16, 16, 0xfe00, { { F (F_OP6) }, { F (F_DIR) }, { F (F_REG) }, { 0 } }
96};
97
98static const CGEN_IFMT ifmt_speed = {
99 16, 16, 0xff00, { { F (F_OP8) }, { F (F_IMM8) }, { 0 } }
100};
101
102static const CGEN_IFMT ifmt_ireadi = {
103 16, 16, 0xffff, { { F (F_OP6) }, { F (F_OP6_10LOW) }, { 0 } }
104};
105
106static const CGEN_IFMT ifmt_page = {
107 16, 16, 0xfff8, { { F (F_OP6) }, { F (F_OP6_7LOW) }, { F (F_PAGE3) }, { 0 } }
108};
109
110static const CGEN_IFMT ifmt_reti = {
111 16, 16, 0xfff8, { { F (F_OP6) }, { F (F_OP6_7LOW) }, { F (F_RETI3) }, { 0 } }
112};
113
114#undef F
115
116#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
117#define A(a) (1 << CGEN_INSN_##a)
118#else
119#define A(a) (1 << CGEN_INSN_/**/a)
120#endif
121#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
122#define OPERAND(op) IP2K_OPERAND_##op
123#else
124#define OPERAND(op) IP2K_OPERAND_/**/op
125#endif
126#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
127#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
128
129/* The instruction table. */
130
131static const CGEN_OPCODE ip2k_cgen_insn_opcode_table[MAX_INSNS] =
132{
133 /* Special null first entry.
134 A `num' value of zero is thus invalid.
135 Also, the special `invalid' insn resides here. */
136 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
137/* jmp $addr16cjp */
138 {
139 { 0, 0, 0, 0 },
140 { { MNEM, ' ', OP (ADDR16CJP), 0 } },
141 & ifmt_jmp, { 0xe000 }
142 },
143/* call $addr16cjp */
144 {
145 { 0, 0, 0, 0 },
146 { { MNEM, ' ', OP (ADDR16CJP), 0 } },
147 & ifmt_jmp, { 0xc000 }
148 },
149/* sb $fr,$bitno */
150 {
151 { 0, 0, 0, 0 },
152 { { MNEM, ' ', OP (FR), ',', OP (BITNO), 0 } },
153 & ifmt_sb, { 0xb000 }
154 },
155/* snb $fr,$bitno */
156 {
157 { 0, 0, 0, 0 },
158 { { MNEM, ' ', OP (FR), ',', OP (BITNO), 0 } },
159 & ifmt_sb, { 0xa000 }
160 },
161/* setb $fr,$bitno */
162 {
163 { 0, 0, 0, 0 },
164 { { MNEM, ' ', OP (FR), ',', OP (BITNO), 0 } },
165 & ifmt_sb, { 0x9000 }
166 },
167/* clrb $fr,$bitno */
168 {
169 { 0, 0, 0, 0 },
170 { { MNEM, ' ', OP (FR), ',', OP (BITNO), 0 } },
171 & ifmt_sb, { 0x8000 }
172 },
173/* xor W,#$lit8 */
174 {
175 { 0, 0, 0, 0 },
176 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
177 & ifmt_xorw_l, { 0x7f00 }
178 },
179/* and W,#$lit8 */
180 {
181 { 0, 0, 0, 0 },
182 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
183 & ifmt_xorw_l, { 0x7e00 }
184 },
185/* or W,#$lit8 */
186 {
187 { 0, 0, 0, 0 },
188 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
189 & ifmt_xorw_l, { 0x7d00 }
190 },
191/* add W,#$lit8 */
192 {
193 { 0, 0, 0, 0 },
194 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
195 & ifmt_xorw_l, { 0x7b00 }
196 },
197/* sub W,#$lit8 */
198 {
199 { 0, 0, 0, 0 },
200 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
201 & ifmt_xorw_l, { 0x7a00 }
202 },
203/* cmp W,#$lit8 */
204 {
205 { 0, 0, 0, 0 },
206 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
207 & ifmt_xorw_l, { 0x7900 }
208 },
209/* retw #$lit8 */
210 {
211 { 0, 0, 0, 0 },
212 { { MNEM, ' ', '#', OP (LIT8), 0 } },
213 & ifmt_xorw_l, { 0x7800 }
214 },
215/* cse W,#$lit8 */
216 {
217 { 0, 0, 0, 0 },
218 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
219 & ifmt_xorw_l, { 0x7700 }
220 },
221/* csne W,#$lit8 */
222 {
223 { 0, 0, 0, 0 },
224 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
225 & ifmt_xorw_l, { 0x7600 }
226 },
227/* push #$lit8 */
228 {
229 { 0, 0, 0, 0 },
230 { { MNEM, ' ', '#', OP (LIT8), 0 } },
231 & ifmt_xorw_l, { 0x7400 }
232 },
233/* muls W,#$lit8 */
234 {
235 { 0, 0, 0, 0 },
236 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
237 & ifmt_xorw_l, { 0x7300 }
238 },
239/* mulu W,#$lit8 */
240 {
241 { 0, 0, 0, 0 },
242 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
243 & ifmt_xorw_l, { 0x7200 }
244 },
245/* loadl #$lit8 */
246 {
247 { 0, 0, 0, 0 },
248 { { MNEM, ' ', '#', OP (LIT8), 0 } },
249 & ifmt_xorw_l, { 0x7100 }
250 },
251/* loadh #$lit8 */
252 {
253 { 0, 0, 0, 0 },
254 { { MNEM, ' ', '#', OP (LIT8), 0 } },
255 & ifmt_xorw_l, { 0x7000 }
256 },
257/* loadl $addr16l */
258 {
259 { 0, 0, 0, 0 },
260 { { MNEM, ' ', OP (ADDR16L), 0 } },
261 & ifmt_loadl_a, { 0x7100 }
262 },
263/* loadh $addr16h */
264 {
265 { 0, 0, 0, 0 },
266 { { MNEM, ' ', OP (ADDR16H), 0 } },
267 & ifmt_loadh_a, { 0x7000 }
268 },
269/* addc $fr,W */
270 {
271 { 0, 0, 0, 0 },
272 { { MNEM, ' ', OP (FR), ',', 'W', 0 } },
273 & ifmt_addcfr_w, { 0x5e00 }
274 },
275/* addc W,$fr */
276 {
277 { 0, 0, 0, 0 },
278 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
279 & ifmt_addcfr_w, { 0x5c00 }
280 },
281/* incsnz $fr */
282 {
283 { 0, 0, 0, 0 },
284 { { MNEM, ' ', OP (FR), 0 } },
285 & ifmt_addcfr_w, { 0x5a00 }
286 },
287/* incsnz W,$fr */
288 {
289 { 0, 0, 0, 0 },
290 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
291 & ifmt_addcfr_w, { 0x5800 }
292 },
293/* muls W,$fr */
294 {
295 { 0, 0, 0, 0 },
296 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
297 & ifmt_addcfr_w, { 0x5400 }
298 },
299/* mulu W,$fr */
300 {
301 { 0, 0, 0, 0 },
302 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
303 & ifmt_addcfr_w, { 0x5000 }
304 },
305/* decsnz $fr */
306 {
307 { 0, 0, 0, 0 },
308 { { MNEM, ' ', OP (FR), 0 } },
309 & ifmt_addcfr_w, { 0x4e00 }
310 },
311/* decsnz W,$fr */
312 {
313 { 0, 0, 0, 0 },
314 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
315 & ifmt_addcfr_w, { 0x4c00 }
316 },
317/* subc W,$fr */
318 {
319 { 0, 0, 0, 0 },
320 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
321 & ifmt_addcfr_w, { 0x4800 }
322 },
323/* subc $fr,W */
324 {
325 { 0, 0, 0, 0 },
326 { { MNEM, ' ', OP (FR), ',', 'W', 0 } },
327 & ifmt_addcfr_w, { 0x4a00 }
328 },
329/* pop $fr */
330 {
331 { 0, 0, 0, 0 },
332 { { MNEM, ' ', OP (FR), 0 } },
333 & ifmt_addcfr_w, { 0x4600 }
334 },
335/* push $fr */
336 {
337 { 0, 0, 0, 0 },
338 { { MNEM, ' ', OP (FR), 0 } },
339 & ifmt_addcfr_w, { 0x4400 }
340 },
341/* cse W,$fr */
342 {
343 { 0, 0, 0, 0 },
344 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
345 & ifmt_addcfr_w, { 0x4200 }
346 },
347/* csne W,$fr */
348 {
349 { 0, 0, 0, 0 },
350 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
351 & ifmt_addcfr_w, { 0x4000 }
352 },
353/* incsz $fr */
354 {
355 { 0, 0, 0, 0 },
356 { { MNEM, ' ', OP (FR), 0 } },
357 & ifmt_addcfr_w, { 0x3e00 }
358 },
359/* incsz W,$fr */
360 {
361 { 0, 0, 0, 0 },
362 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
363 & ifmt_addcfr_w, { 0x3c00 }
364 },
365/* swap $fr */
366 {
367 { 0, 0, 0, 0 },
368 { { MNEM, ' ', OP (FR), 0 } },
369 & ifmt_addcfr_w, { 0x3a00 }
370 },
371/* swap W,$fr */
372 {
373 { 0, 0, 0, 0 },
374 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
375 & ifmt_addcfr_w, { 0x3800 }
376 },
377/* rl $fr */
378 {
379 { 0, 0, 0, 0 },
380 { { MNEM, ' ', OP (FR), 0 } },
381 & ifmt_addcfr_w, { 0x3600 }
382 },
383/* rl W,$fr */
384 {
385 { 0, 0, 0, 0 },
386 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
387 & ifmt_addcfr_w, { 0x3400 }
388 },
389/* rr $fr */
390 {
391 { 0, 0, 0, 0 },
392 { { MNEM, ' ', OP (FR), 0 } },
393 & ifmt_addcfr_w, { 0x3200 }
394 },
395/* rr W,$fr */
396 {
397 { 0, 0, 0, 0 },
398 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
399 & ifmt_addcfr_w, { 0x3000 }
400 },
401/* decsz $fr */
402 {
403 { 0, 0, 0, 0 },
404 { { MNEM, ' ', OP (FR), 0 } },
405 & ifmt_addcfr_w, { 0x2e00 }
406 },
407/* decsz W,$fr */
408 {
409 { 0, 0, 0, 0 },
410 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
411 & ifmt_addcfr_w, { 0x2c00 }
412 },
413/* inc $fr */
414 {
415 { 0, 0, 0, 0 },
416 { { MNEM, ' ', OP (FR), 0 } },
417 & ifmt_addcfr_w, { 0x2a00 }
418 },
419/* inc W,$fr */
420 {
421 { 0, 0, 0, 0 },
422 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
423 & ifmt_addcfr_w, { 0x2800 }
424 },
425/* not $fr */
426 {
427 { 0, 0, 0, 0 },
428 { { MNEM, ' ', OP (FR), 0 } },
429 & ifmt_addcfr_w, { 0x2600 }
430 },
431/* not W,$fr */
432 {
433 { 0, 0, 0, 0 },
434 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
435 & ifmt_addcfr_w, { 0x2400 }
436 },
437/* test $fr */
438 {
439 { 0, 0, 0, 0 },
440 { { MNEM, ' ', OP (FR), 0 } },
441 & ifmt_addcfr_w, { 0x2200 }
442 },
443/* mov W,#$lit8 */
444 {
445 { 0, 0, 0, 0 },
446 { { MNEM, ' ', 'W', ',', '#', OP (LIT8), 0 } },
447 & ifmt_xorw_l, { 0x7c00 }
448 },
449/* mov $fr,W */
450 {
451 { 0, 0, 0, 0 },
452 { { MNEM, ' ', OP (FR), ',', 'W', 0 } },
453 & ifmt_addcfr_w, { 0x200 }
454 },
455/* mov W,$fr */
456 {
457 { 0, 0, 0, 0 },
458 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
459 & ifmt_addcfr_w, { 0x2000 }
460 },
461/* add $fr,W */
462 {
463 { 0, 0, 0, 0 },
464 { { MNEM, ' ', OP (FR), ',', 'W', 0 } },
465 & ifmt_addcfr_w, { 0x1e00 }
466 },
467/* add W,$fr */
468 {
469 { 0, 0, 0, 0 },
470 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
471 & ifmt_addcfr_w, { 0x1c00 }
472 },
473/* xor $fr,W */
474 {
475 { 0, 0, 0, 0 },
476 { { MNEM, ' ', OP (FR), ',', 'W', 0 } },
477 & ifmt_addcfr_w, { 0x1a00 }
478 },
479/* xor W,$fr */
480 {
481 { 0, 0, 0, 0 },
482 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
483 & ifmt_addcfr_w, { 0x1800 }
484 },
485/* and $fr,W */
486 {
487 { 0, 0, 0, 0 },
488 { { MNEM, ' ', OP (FR), ',', 'W', 0 } },
489 & ifmt_addcfr_w, { 0x1600 }
490 },
491/* and W,$fr */
492 {
493 { 0, 0, 0, 0 },
494 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
495 & ifmt_addcfr_w, { 0x1400 }
496 },
497/* or $fr,W */
498 {
499 { 0, 0, 0, 0 },
500 { { MNEM, ' ', OP (FR), ',', 'W', 0 } },
501 & ifmt_addcfr_w, { 0x1200 }
502 },
503/* or W,$fr */
504 {
505 { 0, 0, 0, 0 },
506 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
507 & ifmt_addcfr_w, { 0x1000 }
508 },
509/* dec $fr */
510 {
511 { 0, 0, 0, 0 },
512 { { MNEM, ' ', OP (FR), 0 } },
513 & ifmt_addcfr_w, { 0xe00 }
514 },
515/* dec W,$fr */
516 {
517 { 0, 0, 0, 0 },
518 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
519 & ifmt_addcfr_w, { 0xc00 }
520 },
521/* sub $fr,W */
522 {
523 { 0, 0, 0, 0 },
524 { { MNEM, ' ', OP (FR), ',', 'W', 0 } },
525 & ifmt_addcfr_w, { 0xa00 }
526 },
527/* sub W,$fr */
528 {
529 { 0, 0, 0, 0 },
530 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
531 & ifmt_addcfr_w, { 0x800 }
532 },
533/* clr $fr */
534 {
535 { 0, 0, 0, 0 },
536 { { MNEM, ' ', OP (FR), 0 } },
537 & ifmt_addcfr_w, { 0x600 }
538 },
539/* cmp W,$fr */
540 {
541 { 0, 0, 0, 0 },
542 { { MNEM, ' ', 'W', ',', OP (FR), 0 } },
543 & ifmt_addcfr_w, { 0x400 }
544 },
545/* speed #$lit8 */
546 {
547 { 0, 0, 0, 0 },
548 { { MNEM, ' ', '#', OP (LIT8), 0 } },
549 & ifmt_speed, { 0x100 }
550 },
551/* ireadi */
552 {
553 { 0, 0, 0, 0 },
554 { { MNEM, 0 } },
555 & ifmt_ireadi, { 0x1d }
556 },
557/* iwritei */
558 {
559 { 0, 0, 0, 0 },
560 { { MNEM, 0 } },
561 & ifmt_ireadi, { 0x1c }
562 },
563/* fread */
564 {
565 { 0, 0, 0, 0 },
566 { { MNEM, 0 } },
567 & ifmt_ireadi, { 0x1b }
568 },
569/* fwrite */
570 {
571 { 0, 0, 0, 0 },
572 { { MNEM, 0 } },
573 & ifmt_ireadi, { 0x1a }
574 },
575/* iread */
576 {
577 { 0, 0, 0, 0 },
578 { { MNEM, 0 } },
579 & ifmt_ireadi, { 0x19 }
580 },
581/* iwrite */
582 {
583 { 0, 0, 0, 0 },
584 { { MNEM, 0 } },
585 & ifmt_ireadi, { 0x18 }
586 },
587/* page $addr16p */
588 {
589 { 0, 0, 0, 0 },
590 { { MNEM, ' ', OP (ADDR16P), 0 } },
591 & ifmt_page, { 0x10 }
592 },
593/* system */
594 {
595 { 0, 0, 0, 0 },
596 { { MNEM, 0 } },
597 & ifmt_ireadi, { 0xff }
598 },
599/* reti #$reti3 */
600 {
601 { 0, 0, 0, 0 },
602 { { MNEM, ' ', '#', OP (RETI3), 0 } },
603 & ifmt_reti, { 0x8 }
604 },
605/* ret */
606 {
607 { 0, 0, 0, 0 },
608 { { MNEM, 0 } },
609 & ifmt_ireadi, { 0x7 }
610 },
611/* int */
612 {
613 { 0, 0, 0, 0 },
614 { { MNEM, 0 } },
615 & ifmt_ireadi, { 0x6 }
616 },
617/* breakx */
618 {
619 { 0, 0, 0, 0 },
620 { { MNEM, 0 } },
621 & ifmt_ireadi, { 0x5 }
622 },
623/* cwdt */
624 {
625 { 0, 0, 0, 0 },
626 { { MNEM, 0 } },
627 & ifmt_ireadi, { 0x4 }
628 },
629/* ferase */
630 {
631 { 0, 0, 0, 0 },
632 { { MNEM, 0 } },
633 & ifmt_ireadi, { 0x3 }
634 },
635/* retnp */
636 {
637 { 0, 0, 0, 0 },
638 { { MNEM, 0 } },
639 & ifmt_ireadi, { 0x2 }
640 },
641/* break */
642 {
643 { 0, 0, 0, 0 },
644 { { MNEM, 0 } },
645 & ifmt_ireadi, { 0x1 }
646 },
647/* nop */
648 {
649 { 0, 0, 0, 0 },
650 { { MNEM, 0 } },
651 & ifmt_ireadi, { 0x0 }
652 },
653};
654
655#undef A
656#undef OPERAND
657#undef MNEM
658#undef OP
659
660/* Formats for ALIAS macro-insns. */
661
662#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
663#define F(f) & ip2k_cgen_ifld_table[IP2K_##f]
664#else
665#define F(f) & ip2k_cgen_ifld_table[IP2K_/**/f]
666#endif
667static const CGEN_IFMT ifmt_sc = {
668 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } }
669};
670
671static const CGEN_IFMT ifmt_snc = {
672 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } }
673};
674
675static const CGEN_IFMT ifmt_sz = {
676 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } }
677};
678
679static const CGEN_IFMT ifmt_snz = {
680 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } }
681};
682
683static const CGEN_IFMT ifmt_skip = {
684 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } }
685};
686
687static const CGEN_IFMT ifmt_skipb = {
688 16, 16, 0xffff, { { F (F_OP4) }, { F (F_BITNO) }, { F (F_REG) }, { 0 } }
689};
690
691#undef F
692
693/* Each non-simple macro entry points to an array of expansion possibilities. */
694
695#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
696#define A(a) (1 << CGEN_INSN_##a)
697#else
698#define A(a) (1 << CGEN_INSN_/**/a)
699#endif
700#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
701#define OPERAND(op) IP2K_OPERAND_##op
702#else
703#define OPERAND(op) IP2K_OPERAND_/**/op
704#endif
705#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
706#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
707
708/* The macro instruction table. */
709
710static const CGEN_IBASE ip2k_cgen_macro_insn_table[] =
711{
712/* sc */
713 {
714 -1, "sc", "sc", 16,
715 { 0|A(ALIAS), { (1<<MACH_BASE) } }
716 },
717/* snc */
718 {
719 -1, "snc", "snc", 16,
720 { 0|A(ALIAS), { (1<<MACH_BASE) } }
721 },
722/* sz */
723 {
724 -1, "sz", "sz", 16,
725 { 0|A(ALIAS), { (1<<MACH_BASE) } }
726 },
727/* snz */
728 {
729 -1, "snz", "snz", 16,
730 { 0|A(ALIAS), { (1<<MACH_BASE) } }
731 },
732/* skip */
733 {
734 -1, "skip", "skip", 16,
735 { 0|A(SKIPA)|A(ALIAS), { (1<<MACH_BASE) } }
736 },
737/* skip */
738 {
739 -1, "skipb", "skip", 16,
740 { 0|A(SKIPA)|A(ALIAS), { (1<<MACH_BASE) } }
741 },
742};
743
744/* The macro instruction opcode table. */
745
746static const CGEN_OPCODE ip2k_cgen_macro_insn_opcode_table[] =
747{
748/* sc */
749 {
750 { 0, 0, 0, 0 },
751 { { MNEM, 0 } },
752 & ifmt_sc, { 0xb00b }
753 },
754/* snc */
755 {
756 { 0, 0, 0, 0 },
757 { { MNEM, 0 } },
758 & ifmt_snc, { 0xa00b }
759 },
760/* sz */
761 {
762 { 0, 0, 0, 0 },
763 { { MNEM, 0 } },
764 & ifmt_sz, { 0xb40b }
765 },
766/* snz */
767 {
768 { 0, 0, 0, 0 },
769 { { MNEM, 0 } },
770 & ifmt_snz, { 0xa40b }
771 },
772/* skip */
773 {
774 { 0, 0, 0, 0 },
775 { { MNEM, 0 } },
776 & ifmt_skip, { 0xa009 }
777 },
778/* skip */
779 {
780 { 0, 0, 0, 0 },
781 { { MNEM, 0 } },
782 & ifmt_skipb, { 0xb009 }
783 },
784};
785
786#undef A
787#undef OPERAND
788#undef MNEM
789#undef OP
790
791#ifndef CGEN_ASM_HASH_P
792#define CGEN_ASM_HASH_P(insn) 1
793#endif
794
795#ifndef CGEN_DIS_HASH_P
796#define CGEN_DIS_HASH_P(insn) 1
797#endif
798
799/* Return non-zero if INSN is to be added to the hash table.
800 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
801
802static int
803asm_hash_insn_p (insn)
804 const CGEN_INSN *insn ATTRIBUTE_UNUSED;
805{
806 return CGEN_ASM_HASH_P (insn);
807}
808
809static int
810dis_hash_insn_p (insn)
811 const CGEN_INSN *insn;
812{
813 /* If building the hash table and the NO-DIS attribute is present,
814 ignore. */
815 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
816 return 0;
817 return CGEN_DIS_HASH_P (insn);
818}
819
820#ifndef CGEN_ASM_HASH
821#define CGEN_ASM_HASH_SIZE 127
822#ifdef CGEN_MNEMONIC_OPERANDS
823#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
824#else
825#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
826#endif
827#endif
828
829/* It doesn't make much sense to provide a default here,
830 but while this is under development we do.
831 BUFFER is a pointer to the bytes of the insn, target order.
832 VALUE is the first base_insn_bitsize bits as an int in host order. */
833
834#ifndef CGEN_DIS_HASH
835#define CGEN_DIS_HASH_SIZE 256
836#define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
837#endif
838
839/* The result is the hash value of the insn.
840 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
841
842static unsigned int
843asm_hash_insn (mnem)
844 const char * mnem;
845{
846 return CGEN_ASM_HASH (mnem);
847}
848
849/* BUF is a pointer to the bytes of the insn, target order.
850 VALUE is the first base_insn_bitsize bits as an int in host order. */
851
852static unsigned int
853dis_hash_insn (buf, value)
854 const char * buf ATTRIBUTE_UNUSED;
855 CGEN_INSN_INT value ATTRIBUTE_UNUSED;
856{
857 return CGEN_DIS_HASH (buf, value);
858}
859
860static void set_fields_bitsize PARAMS ((CGEN_FIELDS *, int));
861
862/* Set the recorded length of the insn in the CGEN_FIELDS struct. */
863
864static void
865set_fields_bitsize (fields, size)
866 CGEN_FIELDS *fields;
867 int size;
868{
869 CGEN_FIELDS_BITSIZE (fields) = size;
870}
871
872/* Function to call before using the operand instance table.
873 This plugs the opcode entries and macro instructions into the cpu table. */
874
875void
876ip2k_cgen_init_opcode_table (cd)
877 CGEN_CPU_DESC cd;
878{
879 int i;
880 int num_macros = (sizeof (ip2k_cgen_macro_insn_table) /
881 sizeof (ip2k_cgen_macro_insn_table[0]));
882 const CGEN_IBASE *ib = & ip2k_cgen_macro_insn_table[0];
883 const CGEN_OPCODE *oc = & ip2k_cgen_macro_insn_opcode_table[0];
884 CGEN_INSN *insns = (CGEN_INSN *) xmalloc (num_macros * sizeof (CGEN_INSN));
885 memset (insns, 0, num_macros * sizeof (CGEN_INSN));
886 for (i = 0; i < num_macros; ++i)
887 {
888 insns[i].base = &ib[i];
889 insns[i].opcode = &oc[i];
890 ip2k_cgen_build_insn_regex (& insns[i]);
891 }
892 cd->macro_insn_table.init_entries = insns;
893 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
894 cd->macro_insn_table.num_init_entries = num_macros;
895
896 oc = & ip2k_cgen_insn_opcode_table[0];
897 insns = (CGEN_INSN *) cd->insn_table.init_entries;
898 for (i = 0; i < MAX_INSNS; ++i)
899 {
900 insns[i].opcode = &oc[i];
901 ip2k_cgen_build_insn_regex (& insns[i]);
902 }
903
904 cd->sizeof_fields = sizeof (CGEN_FIELDS);
905 cd->set_fields_bitsize = set_fields_bitsize;
906
907 cd->asm_hash_p = asm_hash_insn_p;
908 cd->asm_hash = asm_hash_insn;
909 cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
910
911 cd->dis_hash_p = dis_hash_insn_p;
912 cd->dis_hash = dis_hash_insn;
913 cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
914}
GDB Binutils - Deliverables
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