Commit | Line | Data |
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47b1a55a SC |
1 | /* Assembler interface for targets using CGEN. -*- C -*- |
2 | CGEN: Cpu tools GENerator | |
3 | ||
47b0e7ad NC |
4 | THIS FILE IS MACHINE GENERATED WITH CGEN. |
5 | - the resultant file is machine generated, cgen-asm.in isn't | |
47b1a55a | 6 | |
b90efa5b | 7 | Copyright (C) 1996-2015 Free Software Foundation, Inc. |
47b1a55a | 8 | |
9b201bb5 | 9 | This file is part of libopcodes. |
47b1a55a | 10 | |
9b201bb5 | 11 | This library is free software; you can redistribute it and/or modify |
47b0e7ad | 12 | it under the terms of the GNU General Public License as published by |
9b201bb5 | 13 | the Free Software Foundation; either version 3, or (at your option) |
47b0e7ad | 14 | any later version. |
47b1a55a | 15 | |
9b201bb5 NC |
16 | It is distributed in the hope that it will be useful, but WITHOUT |
17 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY | |
18 | or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public | |
19 | License for more details. | |
47b1a55a | 20 | |
47b0e7ad NC |
21 | You should have received a copy of the GNU General Public License |
22 | along with this program; if not, write to the Free Software Foundation, Inc., | |
23 | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ | |
47b1a55a | 24 | |
9b201bb5 | 25 | |
47b1a55a SC |
26 | /* ??? Eventually more and more of this stuff can go to cpu-independent files. |
27 | Keep that in mind. */ | |
28 | ||
29 | #include "sysdep.h" | |
30 | #include <stdio.h> | |
31 | #include "ansidecl.h" | |
32 | #include "bfd.h" | |
33 | #include "symcat.h" | |
34 | #include "iq2000-desc.h" | |
35 | #include "iq2000-opc.h" | |
36 | #include "opintl.h" | |
37 | #include "xregex.h" | |
38 | #include "libiberty.h" | |
39 | #include "safe-ctype.h" | |
40 | ||
41 | #undef min | |
42 | #define min(a,b) ((a) < (b) ? (a) : (b)) | |
43 | #undef max | |
44 | #define max(a,b) ((a) > (b) ? (a) : (b)) | |
45 | ||
46 | static const char * parse_insn_normal | |
ffead7ae | 47 | (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *); |
47b1a55a SC |
48 | \f |
49 | /* -- assembler routines inserted here. */ | |
50 | ||
51 | /* -- asm.c */ | |
4030fa5a NC |
52 | |
53 | #include "safe-ctype.h" | |
54 | ||
47b0e7ad NC |
55 | static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'"); |
56 | ||
57 | /* Special check to ensure that instruction exists for given machine. */ | |
47b1a55a | 58 | |
47b1a55a | 59 | int |
47b0e7ad | 60 | iq2000_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn) |
47b1a55a SC |
61 | { |
62 | int machs = cd->machs; | |
63 | ||
47b0e7ad | 64 | return (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH) & machs) != 0; |
47b1a55a SC |
65 | } |
66 | ||
47b0e7ad NC |
67 | static int |
68 | iq2000_cgen_isa_register (const char **strp) | |
47b1a55a SC |
69 | { |
70 | int len; | |
71 | int ch1, ch2; | |
47b0e7ad | 72 | |
47b1a55a SC |
73 | if (**strp == 'r' || **strp == 'R') |
74 | { | |
75 | len = strlen (*strp); | |
76 | if (len == 2) | |
77 | { | |
78 | ch1 = (*strp)[1]; | |
79 | if ('0' <= ch1 && ch1 <= '9') | |
80 | return 1; | |
81 | } | |
82 | else if (len == 3) | |
83 | { | |
84 | ch1 = (*strp)[1]; | |
85 | ch2 = (*strp)[2]; | |
86 | if (('1' <= ch1 && ch1 <= '2') && ('0' <= ch2 && ch2 <= '9')) | |
87 | return 1; | |
88 | if ('3' == ch1 && (ch2 == '0' || ch2 == '1')) | |
89 | return 1; | |
90 | } | |
91 | } | |
47b0e7ad NC |
92 | if (**strp == '%' |
93 | && TOLOWER ((*strp)[1]) != 'l' | |
94 | && TOLOWER ((*strp)[1]) != 'h') | |
47b1a55a SC |
95 | return 1; |
96 | return 0; | |
97 | } | |
98 | ||
99 | /* Handle negated literal. */ | |
100 | ||
101 | static const char * | |
47b0e7ad NC |
102 | parse_mimm (CGEN_CPU_DESC cd, |
103 | const char **strp, | |
104 | int opindex, | |
105 | unsigned long *valuep) | |
47b1a55a SC |
106 | { |
107 | const char *errmsg; | |
47b1a55a | 108 | |
33b71eeb | 109 | /* Verify this isn't a register. */ |
47b1a55a SC |
110 | if (iq2000_cgen_isa_register (strp)) |
111 | errmsg = _("immediate value cannot be register"); | |
112 | else | |
113 | { | |
114 | long value; | |
115 | ||
116 | errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); | |
117 | if (errmsg == NULL) | |
118 | { | |
119 | long x = (-value) & 0xFFFF0000; | |
33b71eeb | 120 | |
4030fa5a | 121 | if (x != 0 && x != (long) 0xFFFF0000) |
47b1a55a SC |
122 | errmsg = _("immediate value out of range"); |
123 | else | |
124 | *valuep = (-value & 0xFFFF); | |
125 | } | |
126 | } | |
127 | return errmsg; | |
128 | } | |
129 | ||
130 | /* Handle signed/unsigned literal. */ | |
131 | ||
132 | static const char * | |
47b0e7ad NC |
133 | parse_imm (CGEN_CPU_DESC cd, |
134 | const char **strp, | |
135 | int opindex, | |
136 | unsigned long *valuep) | |
47b1a55a SC |
137 | { |
138 | const char *errmsg; | |
47b1a55a SC |
139 | |
140 | if (iq2000_cgen_isa_register (strp)) | |
141 | errmsg = _("immediate value cannot be register"); | |
142 | else | |
143 | { | |
144 | long value; | |
145 | ||
146 | errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); | |
147 | if (errmsg == NULL) | |
148 | { | |
149 | long x = value & 0xFFFF0000; | |
47b0e7ad | 150 | |
4030fa5a | 151 | if (x != 0 && x != (long) 0xFFFF0000) |
47b1a55a SC |
152 | errmsg = _("immediate value out of range"); |
153 | else | |
154 | *valuep = (value & 0xFFFF); | |
155 | } | |
156 | } | |
157 | return errmsg; | |
158 | } | |
159 | ||
160 | /* Handle iq10 21-bit jmp offset. */ | |
161 | ||
162 | static const char * | |
47b0e7ad NC |
163 | parse_jtargq10 (CGEN_CPU_DESC cd, |
164 | const char **strp, | |
165 | int opindex, | |
166 | int reloc ATTRIBUTE_UNUSED, | |
167 | enum cgen_parse_operand_result *type_addr ATTRIBUTE_UNUSED, | |
168 | bfd_vma *valuep) | |
47b1a55a SC |
169 | { |
170 | const char *errmsg; | |
171 | bfd_vma value; | |
172 | enum cgen_parse_operand_result result_type = CGEN_PARSE_OPERAND_RESULT_NUMBER; | |
173 | ||
174 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_OFFSET_21, | |
47b0e7ad | 175 | & result_type, & value); |
47b1a55a SC |
176 | if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) |
177 | { | |
47b0e7ad NC |
178 | /* Check value is within 23-bits |
179 | (remembering that 2-bit shift right will occur). */ | |
47b1a55a SC |
180 | if (value > 0x7fffff) |
181 | return _("21-bit offset out of range"); | |
182 | } | |
183 | *valuep = (value & 0x7FFFFF); | |
184 | return errmsg; | |
185 | } | |
186 | ||
187 | /* Handle high(). */ | |
188 | ||
189 | static const char * | |
47b0e7ad NC |
190 | parse_hi16 (CGEN_CPU_DESC cd, |
191 | const char **strp, | |
192 | int opindex, | |
193 | unsigned long *valuep) | |
47b1a55a SC |
194 | { |
195 | if (strncasecmp (*strp, "%hi(", 4) == 0) | |
196 | { | |
197 | enum cgen_parse_operand_result result_type; | |
198 | bfd_vma value; | |
199 | const char *errmsg; | |
200 | ||
201 | *strp += 4; | |
202 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16, | |
47b0e7ad | 203 | & result_type, & value); |
47b1a55a | 204 | if (**strp != ')') |
47b0e7ad | 205 | return MISSING_CLOSING_PARENTHESIS; |
47b1a55a SC |
206 | |
207 | ++*strp; | |
208 | if (errmsg == NULL | |
209 | && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) | |
210 | { | |
47b0e7ad | 211 | /* If value has top-bit of %lo on, then it will |
47b1a55a | 212 | sign-propagate and so we compensate by adding |
47b0e7ad | 213 | 1 to the resultant %hi value. */ |
47b1a55a SC |
214 | if (value & 0x8000) |
215 | value += 0x10000; | |
216 | value >>= 16; | |
ed963e2d | 217 | value &= 0xffff; |
47b1a55a SC |
218 | } |
219 | *valuep = value; | |
220 | ||
221 | return errmsg; | |
222 | } | |
223 | ||
47b0e7ad NC |
224 | /* We add %uhi in case a user just wants the high 16-bits or is using |
225 | an insn like ori for %lo which does not sign-propagate. */ | |
47b1a55a SC |
226 | if (strncasecmp (*strp, "%uhi(", 5) == 0) |
227 | { | |
228 | enum cgen_parse_operand_result result_type; | |
229 | bfd_vma value; | |
230 | const char *errmsg; | |
231 | ||
232 | *strp += 5; | |
233 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_UHI16, | |
47b0e7ad | 234 | & result_type, & value); |
47b1a55a | 235 | if (**strp != ')') |
47b0e7ad | 236 | return MISSING_CLOSING_PARENTHESIS; |
47b1a55a SC |
237 | |
238 | ++*strp; | |
239 | if (errmsg == NULL | |
240 | && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) | |
47b0e7ad NC |
241 | value >>= 16; |
242 | ||
8536c657 | 243 | value &= 0xffff; |
47b1a55a SC |
244 | *valuep = value; |
245 | ||
246 | return errmsg; | |
247 | } | |
248 | ||
249 | return parse_imm (cd, strp, opindex, valuep); | |
250 | } | |
251 | ||
252 | /* Handle %lo in a signed context. | |
253 | The signedness of the value doesn't matter to %lo(), but this also | |
254 | handles the case where %lo() isn't present. */ | |
255 | ||
256 | static const char * | |
47b0e7ad NC |
257 | parse_lo16 (CGEN_CPU_DESC cd, |
258 | const char **strp, | |
259 | int opindex, | |
3ec2b351 | 260 | unsigned long *valuep) |
47b1a55a SC |
261 | { |
262 | if (strncasecmp (*strp, "%lo(", 4) == 0) | |
263 | { | |
264 | const char *errmsg; | |
265 | enum cgen_parse_operand_result result_type; | |
266 | bfd_vma value; | |
267 | ||
268 | *strp += 4; | |
269 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16, | |
47b0e7ad | 270 | & result_type, & value); |
47b1a55a | 271 | if (**strp != ')') |
47b0e7ad | 272 | return MISSING_CLOSING_PARENTHESIS; |
47b1a55a SC |
273 | ++*strp; |
274 | if (errmsg == NULL | |
275 | && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) | |
276 | value &= 0xffff; | |
277 | *valuep = value; | |
278 | return errmsg; | |
279 | } | |
280 | ||
281 | return parse_imm (cd, strp, opindex, valuep); | |
282 | } | |
283 | ||
284 | /* Handle %lo in a negated signed context. | |
285 | The signedness of the value doesn't matter to %lo(), but this also | |
286 | handles the case where %lo() isn't present. */ | |
287 | ||
288 | static const char * | |
47b0e7ad NC |
289 | parse_mlo16 (CGEN_CPU_DESC cd, |
290 | const char **strp, | |
291 | int opindex, | |
3ec2b351 | 292 | unsigned long *valuep) |
47b1a55a SC |
293 | { |
294 | if (strncasecmp (*strp, "%lo(", 4) == 0) | |
295 | { | |
296 | const char *errmsg; | |
297 | enum cgen_parse_operand_result result_type; | |
298 | bfd_vma value; | |
299 | ||
300 | *strp += 4; | |
301 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16, | |
47b0e7ad | 302 | & result_type, & value); |
47b1a55a | 303 | if (**strp != ')') |
47b0e7ad | 304 | return MISSING_CLOSING_PARENTHESIS; |
47b1a55a SC |
305 | ++*strp; |
306 | if (errmsg == NULL | |
307 | && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) | |
308 | value = (-value) & 0xffff; | |
309 | *valuep = value; | |
310 | return errmsg; | |
311 | } | |
312 | ||
313 | return parse_mimm (cd, strp, opindex, valuep); | |
314 | } | |
315 | ||
316 | /* -- */ | |
317 | ||
318 | const char * iq2000_cgen_parse_operand | |
47b0e7ad | 319 | (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *); |
47b1a55a SC |
320 | |
321 | /* Main entry point for operand parsing. | |
322 | ||
323 | This function is basically just a big switch statement. Earlier versions | |
324 | used tables to look up the function to use, but | |
325 | - if the table contains both assembler and disassembler functions then | |
326 | the disassembler contains much of the assembler and vice-versa, | |
327 | - there's a lot of inlining possibilities as things grow, | |
328 | - using a switch statement avoids the function call overhead. | |
329 | ||
330 | This function could be moved into `parse_insn_normal', but keeping it | |
331 | separate makes clear the interface between `parse_insn_normal' and each of | |
332 | the handlers. */ | |
333 | ||
334 | const char * | |
47b0e7ad NC |
335 | iq2000_cgen_parse_operand (CGEN_CPU_DESC cd, |
336 | int opindex, | |
337 | const char ** strp, | |
338 | CGEN_FIELDS * fields) | |
47b1a55a SC |
339 | { |
340 | const char * errmsg = NULL; | |
341 | /* Used by scalar operands that still need to be parsed. */ | |
342 | long junk ATTRIBUTE_UNUSED; | |
343 | ||
344 | switch (opindex) | |
345 | { | |
4030fa5a | 346 | case IQ2000_OPERAND__INDEX : |
33b71eeb | 347 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND__INDEX, (unsigned long *) (& fields->f_index)); |
4030fa5a | 348 | break; |
47b1a55a SC |
349 | case IQ2000_OPERAND_BASE : |
350 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs); | |
351 | break; | |
352 | case IQ2000_OPERAND_BASEOFF : | |
353 | { | |
9494d739 | 354 | bfd_vma value = 0; |
47b1a55a SC |
355 | errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_BASEOFF, 0, NULL, & value); |
356 | fields->f_imm = value; | |
357 | } | |
358 | break; | |
359 | case IQ2000_OPERAND_BITNUM : | |
33b71eeb | 360 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BITNUM, (unsigned long *) (& fields->f_rt)); |
47b1a55a SC |
361 | break; |
362 | case IQ2000_OPERAND_BYTECOUNT : | |
33b71eeb | 363 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BYTECOUNT, (unsigned long *) (& fields->f_bytecount)); |
47b1a55a SC |
364 | break; |
365 | case IQ2000_OPERAND_CAM_Y : | |
33b71eeb | 366 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Y, (unsigned long *) (& fields->f_cam_y)); |
47b1a55a SC |
367 | break; |
368 | case IQ2000_OPERAND_CAM_Z : | |
33b71eeb | 369 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Z, (unsigned long *) (& fields->f_cam_z)); |
47b1a55a SC |
370 | break; |
371 | case IQ2000_OPERAND_CM_3FUNC : | |
33b71eeb | 372 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3FUNC, (unsigned long *) (& fields->f_cm_3func)); |
47b1a55a SC |
373 | break; |
374 | case IQ2000_OPERAND_CM_3Z : | |
33b71eeb | 375 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3Z, (unsigned long *) (& fields->f_cm_3z)); |
47b1a55a SC |
376 | break; |
377 | case IQ2000_OPERAND_CM_4FUNC : | |
33b71eeb | 378 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4FUNC, (unsigned long *) (& fields->f_cm_4func)); |
47b1a55a SC |
379 | break; |
380 | case IQ2000_OPERAND_CM_4Z : | |
33b71eeb | 381 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4Z, (unsigned long *) (& fields->f_cm_4z)); |
47b1a55a SC |
382 | break; |
383 | case IQ2000_OPERAND_COUNT : | |
33b71eeb | 384 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_COUNT, (unsigned long *) (& fields->f_count)); |
47b1a55a SC |
385 | break; |
386 | case IQ2000_OPERAND_EXECODE : | |
33b71eeb | 387 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_EXECODE, (unsigned long *) (& fields->f_excode)); |
47b1a55a SC |
388 | break; |
389 | case IQ2000_OPERAND_HI16 : | |
33b71eeb | 390 | errmsg = parse_hi16 (cd, strp, IQ2000_OPERAND_HI16, (unsigned long *) (& fields->f_imm)); |
47b1a55a SC |
391 | break; |
392 | case IQ2000_OPERAND_IMM : | |
33b71eeb | 393 | errmsg = parse_imm (cd, strp, IQ2000_OPERAND_IMM, (unsigned long *) (& fields->f_imm)); |
47b1a55a | 394 | break; |
47b1a55a SC |
395 | case IQ2000_OPERAND_JMPTARG : |
396 | { | |
9494d739 | 397 | bfd_vma value = 0; |
47b1a55a SC |
398 | errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_JMPTARG, 0, NULL, & value); |
399 | fields->f_jtarg = value; | |
400 | } | |
401 | break; | |
402 | case IQ2000_OPERAND_JMPTARGQ10 : | |
403 | { | |
33b71eeb | 404 | bfd_vma value = 0; |
47b1a55a SC |
405 | errmsg = parse_jtargq10 (cd, strp, IQ2000_OPERAND_JMPTARGQ10, 0, NULL, & value); |
406 | fields->f_jtargq10 = value; | |
407 | } | |
408 | break; | |
409 | case IQ2000_OPERAND_LO16 : | |
33b71eeb | 410 | errmsg = parse_lo16 (cd, strp, IQ2000_OPERAND_LO16, (unsigned long *) (& fields->f_imm)); |
47b1a55a SC |
411 | break; |
412 | case IQ2000_OPERAND_MASK : | |
33b71eeb | 413 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASK, (unsigned long *) (& fields->f_mask)); |
47b1a55a SC |
414 | break; |
415 | case IQ2000_OPERAND_MASKL : | |
33b71eeb | 416 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKL, (unsigned long *) (& fields->f_maskl)); |
47b1a55a SC |
417 | break; |
418 | case IQ2000_OPERAND_MASKQ10 : | |
33b71eeb | 419 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKQ10, (unsigned long *) (& fields->f_maskq10)); |
47b1a55a SC |
420 | break; |
421 | case IQ2000_OPERAND_MASKR : | |
33b71eeb | 422 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKR, (unsigned long *) (& fields->f_rs)); |
47b1a55a SC |
423 | break; |
424 | case IQ2000_OPERAND_MLO16 : | |
33b71eeb | 425 | errmsg = parse_mlo16 (cd, strp, IQ2000_OPERAND_MLO16, (unsigned long *) (& fields->f_imm)); |
47b1a55a SC |
426 | break; |
427 | case IQ2000_OPERAND_OFFSET : | |
428 | { | |
9494d739 | 429 | bfd_vma value = 0; |
47b1a55a SC |
430 | errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_OFFSET, 0, NULL, & value); |
431 | fields->f_offset = value; | |
432 | } | |
433 | break; | |
434 | case IQ2000_OPERAND_RD : | |
435 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd); | |
436 | break; | |
437 | case IQ2000_OPERAND_RD_RS : | |
438 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rs); | |
439 | break; | |
440 | case IQ2000_OPERAND_RD_RT : | |
441 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rt); | |
442 | break; | |
443 | case IQ2000_OPERAND_RS : | |
444 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs); | |
445 | break; | |
446 | case IQ2000_OPERAND_RT : | |
447 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt); | |
448 | break; | |
449 | case IQ2000_OPERAND_RT_RS : | |
450 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt_rs); | |
451 | break; | |
452 | case IQ2000_OPERAND_SHAMT : | |
33b71eeb | 453 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_SHAMT, (unsigned long *) (& fields->f_shamt)); |
47b1a55a SC |
454 | break; |
455 | ||
456 | default : | |
457 | /* xgettext:c-format */ | |
458 | fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex); | |
459 | abort (); | |
460 | } | |
461 | ||
462 | return errmsg; | |
463 | } | |
464 | ||
465 | cgen_parse_fn * const iq2000_cgen_parse_handlers[] = | |
466 | { | |
467 | parse_insn_normal, | |
468 | }; | |
469 | ||
470 | void | |
47b0e7ad | 471 | iq2000_cgen_init_asm (CGEN_CPU_DESC cd) |
47b1a55a SC |
472 | { |
473 | iq2000_cgen_init_opcode_table (cd); | |
474 | iq2000_cgen_init_ibld_table (cd); | |
475 | cd->parse_handlers = & iq2000_cgen_parse_handlers[0]; | |
476 | cd->parse_operand = iq2000_cgen_parse_operand; | |
1620f33d AM |
477 | #ifdef CGEN_ASM_INIT_HOOK |
478 | CGEN_ASM_INIT_HOOK | |
479 | #endif | |
47b1a55a SC |
480 | } |
481 | ||
482 | \f | |
483 | ||
484 | /* Regex construction routine. | |
485 | ||
486 | This translates an opcode syntax string into a regex string, | |
487 | by replacing any non-character syntax element (such as an | |
488 | opcode) with the pattern '.*' | |
489 | ||
490 | It then compiles the regex and stores it in the opcode, for | |
491 | later use by iq2000_cgen_assemble_insn | |
492 | ||
493 | Returns NULL for success, an error message for failure. */ | |
494 | ||
495 | char * | |
ffead7ae | 496 | iq2000_cgen_build_insn_regex (CGEN_INSN *insn) |
47b1a55a SC |
497 | { |
498 | CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); | |
499 | const char *mnem = CGEN_INSN_MNEMONIC (insn); | |
500 | char rxbuf[CGEN_MAX_RX_ELEMENTS]; | |
501 | char *rx = rxbuf; | |
502 | const CGEN_SYNTAX_CHAR_TYPE *syn; | |
503 | int reg_err; | |
504 | ||
505 | syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); | |
506 | ||
507 | /* Mnemonics come first in the syntax string. */ | |
508 | if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) | |
509 | return _("missing mnemonic in syntax string"); | |
510 | ++syn; | |
511 | ||
512 | /* Generate a case sensitive regular expression that emulates case | |
513 | insensitive matching in the "C" locale. We cannot generate a case | |
514 | insensitive regular expression because in Turkish locales, 'i' and 'I' | |
515 | are not equal modulo case conversion. */ | |
516 | ||
517 | /* Copy the literal mnemonic out of the insn. */ | |
518 | for (; *mnem; mnem++) | |
519 | { | |
520 | char c = *mnem; | |
521 | ||
522 | if (ISALPHA (c)) | |
523 | { | |
524 | *rx++ = '['; | |
525 | *rx++ = TOLOWER (c); | |
526 | *rx++ = TOUPPER (c); | |
527 | *rx++ = ']'; | |
528 | } | |
529 | else | |
530 | *rx++ = c; | |
531 | } | |
532 | ||
533 | /* Copy any remaining literals from the syntax string into the rx. */ | |
534 | for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) | |
535 | { | |
536 | if (CGEN_SYNTAX_CHAR_P (* syn)) | |
537 | { | |
538 | char c = CGEN_SYNTAX_CHAR (* syn); | |
539 | ||
540 | switch (c) | |
541 | { | |
542 | /* Escape any regex metacharacters in the syntax. */ | |
543 | case '.': case '[': case '\\': | |
544 | case '*': case '^': case '$': | |
545 | ||
546 | #ifdef CGEN_ESCAPE_EXTENDED_REGEX | |
547 | case '?': case '{': case '}': | |
548 | case '(': case ')': case '*': | |
549 | case '|': case '+': case ']': | |
550 | #endif | |
551 | *rx++ = '\\'; | |
552 | *rx++ = c; | |
553 | break; | |
554 | ||
555 | default: | |
556 | if (ISALPHA (c)) | |
557 | { | |
558 | *rx++ = '['; | |
559 | *rx++ = TOLOWER (c); | |
560 | *rx++ = TOUPPER (c); | |
561 | *rx++ = ']'; | |
562 | } | |
563 | else | |
564 | *rx++ = c; | |
565 | break; | |
566 | } | |
567 | } | |
568 | else | |
569 | { | |
570 | /* Replace non-syntax fields with globs. */ | |
571 | *rx++ = '.'; | |
572 | *rx++ = '*'; | |
573 | } | |
574 | } | |
575 | ||
576 | /* Trailing whitespace ok. */ | |
577 | * rx++ = '['; | |
578 | * rx++ = ' '; | |
579 | * rx++ = '\t'; | |
580 | * rx++ = ']'; | |
581 | * rx++ = '*'; | |
582 | ||
583 | /* But anchor it after that. */ | |
584 | * rx++ = '$'; | |
585 | * rx = '\0'; | |
586 | ||
587 | CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t)); | |
588 | reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB); | |
589 | ||
590 | if (reg_err == 0) | |
591 | return NULL; | |
592 | else | |
593 | { | |
594 | static char msg[80]; | |
595 | ||
596 | regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80); | |
597 | regfree ((regex_t *) CGEN_INSN_RX (insn)); | |
598 | free (CGEN_INSN_RX (insn)); | |
599 | (CGEN_INSN_RX (insn)) = NULL; | |
600 | return msg; | |
601 | } | |
602 | } | |
603 | ||
604 | \f | |
605 | /* Default insn parser. | |
606 | ||
607 | The syntax string is scanned and operands are parsed and stored in FIELDS. | |
608 | Relocs are queued as we go via other callbacks. | |
609 | ||
610 | ??? Note that this is currently an all-or-nothing parser. If we fail to | |
611 | parse the instruction, we return 0 and the caller will start over from | |
612 | the beginning. Backtracking will be necessary in parsing subexpressions, | |
613 | but that can be handled there. Not handling backtracking here may get | |
614 | expensive in the case of the m68k. Deal with later. | |
615 | ||
616 | Returns NULL for success, an error message for failure. */ | |
617 | ||
618 | static const char * | |
ffead7ae MM |
619 | parse_insn_normal (CGEN_CPU_DESC cd, |
620 | const CGEN_INSN *insn, | |
621 | const char **strp, | |
622 | CGEN_FIELDS *fields) | |
47b1a55a SC |
623 | { |
624 | /* ??? Runtime added insns not handled yet. */ | |
625 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); | |
626 | const char *str = *strp; | |
627 | const char *errmsg; | |
628 | const char *p; | |
629 | const CGEN_SYNTAX_CHAR_TYPE * syn; | |
630 | #ifdef CGEN_MNEMONIC_OPERANDS | |
631 | /* FIXME: wip */ | |
632 | int past_opcode_p; | |
633 | #endif | |
634 | ||
635 | /* For now we assume the mnemonic is first (there are no leading operands). | |
636 | We can parse it without needing to set up operand parsing. | |
637 | GAS's input scrubber will ensure mnemonics are lowercase, but we may | |
638 | not be called from GAS. */ | |
639 | p = CGEN_INSN_MNEMONIC (insn); | |
640 | while (*p && TOLOWER (*p) == TOLOWER (*str)) | |
641 | ++p, ++str; | |
642 | ||
643 | if (* p) | |
644 | return _("unrecognized instruction"); | |
645 | ||
646 | #ifndef CGEN_MNEMONIC_OPERANDS | |
647 | if (* str && ! ISSPACE (* str)) | |
648 | return _("unrecognized instruction"); | |
649 | #endif | |
650 | ||
651 | CGEN_INIT_PARSE (cd); | |
652 | cgen_init_parse_operand (cd); | |
653 | #ifdef CGEN_MNEMONIC_OPERANDS | |
654 | past_opcode_p = 0; | |
655 | #endif | |
656 | ||
657 | /* We don't check for (*str != '\0') here because we want to parse | |
658 | any trailing fake arguments in the syntax string. */ | |
659 | syn = CGEN_SYNTAX_STRING (syntax); | |
660 | ||
661 | /* Mnemonics come first for now, ensure valid string. */ | |
662 | if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) | |
663 | abort (); | |
664 | ||
665 | ++syn; | |
666 | ||
667 | while (* syn != 0) | |
668 | { | |
669 | /* Non operand chars must match exactly. */ | |
670 | if (CGEN_SYNTAX_CHAR_P (* syn)) | |
671 | { | |
672 | /* FIXME: While we allow for non-GAS callers above, we assume the | |
673 | first char after the mnemonic part is a space. */ | |
674 | /* FIXME: We also take inappropriate advantage of the fact that | |
675 | GAS's input scrubber will remove extraneous blanks. */ | |
676 | if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn))) | |
677 | { | |
678 | #ifdef CGEN_MNEMONIC_OPERANDS | |
679 | if (CGEN_SYNTAX_CHAR(* syn) == ' ') | |
680 | past_opcode_p = 1; | |
681 | #endif | |
682 | ++ syn; | |
683 | ++ str; | |
684 | } | |
685 | else if (*str) | |
686 | { | |
687 | /* Syntax char didn't match. Can't be this insn. */ | |
688 | static char msg [80]; | |
689 | ||
690 | /* xgettext:c-format */ | |
691 | sprintf (msg, _("syntax error (expected char `%c', found `%c')"), | |
692 | CGEN_SYNTAX_CHAR(*syn), *str); | |
693 | return msg; | |
694 | } | |
695 | else | |
696 | { | |
697 | /* Ran out of input. */ | |
698 | static char msg [80]; | |
699 | ||
700 | /* xgettext:c-format */ | |
701 | sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"), | |
702 | CGEN_SYNTAX_CHAR(*syn)); | |
703 | return msg; | |
704 | } | |
705 | continue; | |
706 | } | |
707 | ||
c7e2358a AM |
708 | #ifdef CGEN_MNEMONIC_OPERANDS |
709 | (void) past_opcode_p; | |
710 | #endif | |
47b1a55a | 711 | /* We have an operand of some sort. */ |
c7e2358a | 712 | errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), &str, fields); |
47b1a55a SC |
713 | if (errmsg) |
714 | return errmsg; | |
715 | ||
716 | /* Done with this operand, continue with next one. */ | |
717 | ++ syn; | |
718 | } | |
719 | ||
720 | /* If we're at the end of the syntax string, we're done. */ | |
721 | if (* syn == 0) | |
722 | { | |
723 | /* FIXME: For the moment we assume a valid `str' can only contain | |
724 | blanks now. IE: We needn't try again with a longer version of | |
725 | the insn and it is assumed that longer versions of insns appear | |
726 | before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ | |
727 | while (ISSPACE (* str)) | |
728 | ++ str; | |
729 | ||
730 | if (* str != '\0') | |
731 | return _("junk at end of line"); /* FIXME: would like to include `str' */ | |
732 | ||
733 | return NULL; | |
734 | } | |
735 | ||
736 | /* We couldn't parse it. */ | |
737 | return _("unrecognized instruction"); | |
738 | } | |
739 | \f | |
740 | /* Main entry point. | |
741 | This routine is called for each instruction to be assembled. | |
742 | STR points to the insn to be assembled. | |
743 | We assume all necessary tables have been initialized. | |
744 | The assembled instruction, less any fixups, is stored in BUF. | |
745 | Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value | |
746 | still needs to be converted to target byte order, otherwise BUF is an array | |
747 | of bytes in target byte order. | |
748 | The result is a pointer to the insn's entry in the opcode table, | |
749 | or NULL if an error occured (an error message will have already been | |
750 | printed). | |
751 | ||
752 | Note that when processing (non-alias) macro-insns, | |
753 | this function recurses. | |
754 | ||
755 | ??? It's possible to make this cpu-independent. | |
756 | One would have to deal with a few minor things. | |
757 | At this point in time doing so would be more of a curiosity than useful | |
758 | [for example this file isn't _that_ big], but keeping the possibility in | |
759 | mind helps keep the design clean. */ | |
760 | ||
761 | const CGEN_INSN * | |
ffead7ae MM |
762 | iq2000_cgen_assemble_insn (CGEN_CPU_DESC cd, |
763 | const char *str, | |
764 | CGEN_FIELDS *fields, | |
765 | CGEN_INSN_BYTES_PTR buf, | |
766 | char **errmsg) | |
47b1a55a SC |
767 | { |
768 | const char *start; | |
769 | CGEN_INSN_LIST *ilist; | |
770 | const char *parse_errmsg = NULL; | |
771 | const char *insert_errmsg = NULL; | |
772 | int recognized_mnemonic = 0; | |
773 | ||
774 | /* Skip leading white space. */ | |
775 | while (ISSPACE (* str)) | |
776 | ++ str; | |
777 | ||
778 | /* The instructions are stored in hashed lists. | |
779 | Get the first in the list. */ | |
780 | ilist = CGEN_ASM_LOOKUP_INSN (cd, str); | |
781 | ||
782 | /* Keep looking until we find a match. */ | |
783 | start = str; | |
784 | for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist)) | |
785 | { | |
786 | const CGEN_INSN *insn = ilist->insn; | |
787 | recognized_mnemonic = 1; | |
788 | ||
789 | #ifdef CGEN_VALIDATE_INSN_SUPPORTED | |
790 | /* Not usually needed as unsupported opcodes | |
791 | shouldn't be in the hash lists. */ | |
792 | /* Is this insn supported by the selected cpu? */ | |
793 | if (! iq2000_cgen_insn_supported (cd, insn)) | |
794 | continue; | |
795 | #endif | |
b11dcf4e | 796 | /* If the RELAXED attribute is set, this is an insn that shouldn't be |
47b1a55a SC |
797 | chosen immediately. Instead, it is used during assembler/linker |
798 | relaxation if possible. */ | |
b11dcf4e | 799 | if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) |
47b1a55a SC |
800 | continue; |
801 | ||
802 | str = start; | |
803 | ||
804 | /* Skip this insn if str doesn't look right lexically. */ | |
805 | if (CGEN_INSN_RX (insn) != NULL && | |
806 | regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH) | |
807 | continue; | |
808 | ||
809 | /* Allow parse/insert handlers to obtain length of insn. */ | |
810 | CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); | |
811 | ||
812 | parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields); | |
813 | if (parse_errmsg != NULL) | |
814 | continue; | |
815 | ||
816 | /* ??? 0 is passed for `pc'. */ | |
817 | insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, | |
818 | (bfd_vma) 0); | |
819 | if (insert_errmsg != NULL) | |
820 | continue; | |
821 | ||
822 | /* It is up to the caller to actually output the insn and any | |
823 | queued relocs. */ | |
824 | return insn; | |
825 | } | |
826 | ||
827 | { | |
828 | static char errbuf[150]; | |
47b1a55a | 829 | const char *tmp_errmsg; |
c7e2358a AM |
830 | #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS |
831 | #define be_verbose 1 | |
47b1a55a | 832 | #else |
c7e2358a | 833 | #define be_verbose 0 |
47b1a55a | 834 | #endif |
c7e2358a AM |
835 | |
836 | if (be_verbose) | |
837 | { | |
838 | /* If requesting verbose error messages, use insert_errmsg. | |
839 | Failing that, use parse_errmsg. */ | |
840 | tmp_errmsg = (insert_errmsg ? insert_errmsg : | |
841 | parse_errmsg ? parse_errmsg : | |
842 | recognized_mnemonic ? | |
843 | _("unrecognized form of instruction") : | |
844 | _("unrecognized instruction")); | |
845 | ||
846 | if (strlen (start) > 50) | |
847 | /* xgettext:c-format */ | |
848 | sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); | |
849 | else | |
850 | /* xgettext:c-format */ | |
851 | sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); | |
852 | } | |
853 | else | |
854 | { | |
855 | if (strlen (start) > 50) | |
856 | /* xgettext:c-format */ | |
857 | sprintf (errbuf, _("bad instruction `%.50s...'"), start); | |
858 | else | |
859 | /* xgettext:c-format */ | |
860 | sprintf (errbuf, _("bad instruction `%.50s'"), start); | |
861 | } | |
47b1a55a SC |
862 | |
863 | *errmsg = errbuf; | |
864 | return NULL; | |
865 | } | |
866 | } |