Commit | Line | Data |
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47b1a55a SC |
1 | /* Assembler interface for targets using CGEN. -*- C -*- |
2 | CGEN: Cpu tools GENerator | |
3 | ||
47b0e7ad NC |
4 | THIS FILE IS MACHINE GENERATED WITH CGEN. |
5 | - the resultant file is machine generated, cgen-asm.in isn't | |
47b1a55a | 6 | |
47b0e7ad NC |
7 | Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005 |
8 | Free Software Foundation, Inc. | |
47b1a55a | 9 | |
47b0e7ad | 10 | This file is part of the GNU Binutils and GDB, the GNU debugger. |
47b1a55a | 11 | |
47b0e7ad NC |
12 | This program is free software; you can redistribute it and/or modify |
13 | it under the terms of the GNU General Public License as published by | |
14 | the Free Software Foundation; either version 2, or (at your option) | |
15 | any later version. | |
47b1a55a | 16 | |
47b0e7ad NC |
17 | This program is distributed in the hope that it will be useful, |
18 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | GNU General Public License for more details. | |
47b1a55a | 21 | |
47b0e7ad NC |
22 | You should have received a copy of the GNU General Public License |
23 | along with this program; if not, write to the Free Software Foundation, Inc., | |
24 | 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ | |
47b1a55a SC |
25 | |
26 | /* ??? Eventually more and more of this stuff can go to cpu-independent files. | |
27 | Keep that in mind. */ | |
28 | ||
29 | #include "sysdep.h" | |
30 | #include <stdio.h> | |
31 | #include "ansidecl.h" | |
32 | #include "bfd.h" | |
33 | #include "symcat.h" | |
34 | #include "iq2000-desc.h" | |
35 | #include "iq2000-opc.h" | |
36 | #include "opintl.h" | |
37 | #include "xregex.h" | |
38 | #include "libiberty.h" | |
39 | #include "safe-ctype.h" | |
40 | ||
41 | #undef min | |
42 | #define min(a,b) ((a) < (b) ? (a) : (b)) | |
43 | #undef max | |
44 | #define max(a,b) ((a) > (b) ? (a) : (b)) | |
45 | ||
46 | static const char * parse_insn_normal | |
ffead7ae | 47 | (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *); |
47b1a55a SC |
48 | \f |
49 | /* -- assembler routines inserted here. */ | |
50 | ||
51 | /* -- asm.c */ | |
4030fa5a NC |
52 | |
53 | #include "safe-ctype.h" | |
54 | ||
47b0e7ad NC |
55 | static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'"); |
56 | ||
57 | /* Special check to ensure that instruction exists for given machine. */ | |
47b1a55a | 58 | |
47b1a55a | 59 | int |
47b0e7ad | 60 | iq2000_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn) |
47b1a55a SC |
61 | { |
62 | int machs = cd->machs; | |
63 | ||
47b0e7ad | 64 | return (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH) & machs) != 0; |
47b1a55a SC |
65 | } |
66 | ||
47b0e7ad NC |
67 | static int |
68 | iq2000_cgen_isa_register (const char **strp) | |
47b1a55a SC |
69 | { |
70 | int len; | |
71 | int ch1, ch2; | |
47b0e7ad | 72 | |
47b1a55a SC |
73 | if (**strp == 'r' || **strp == 'R') |
74 | { | |
75 | len = strlen (*strp); | |
76 | if (len == 2) | |
77 | { | |
78 | ch1 = (*strp)[1]; | |
79 | if ('0' <= ch1 && ch1 <= '9') | |
80 | return 1; | |
81 | } | |
82 | else if (len == 3) | |
83 | { | |
84 | ch1 = (*strp)[1]; | |
85 | ch2 = (*strp)[2]; | |
86 | if (('1' <= ch1 && ch1 <= '2') && ('0' <= ch2 && ch2 <= '9')) | |
87 | return 1; | |
88 | if ('3' == ch1 && (ch2 == '0' || ch2 == '1')) | |
89 | return 1; | |
90 | } | |
91 | } | |
47b0e7ad NC |
92 | if (**strp == '%' |
93 | && TOLOWER ((*strp)[1]) != 'l' | |
94 | && TOLOWER ((*strp)[1]) != 'h') | |
47b1a55a SC |
95 | return 1; |
96 | return 0; | |
97 | } | |
98 | ||
99 | /* Handle negated literal. */ | |
100 | ||
101 | static const char * | |
47b0e7ad NC |
102 | parse_mimm (CGEN_CPU_DESC cd, |
103 | const char **strp, | |
104 | int opindex, | |
105 | unsigned long *valuep) | |
47b1a55a SC |
106 | { |
107 | const char *errmsg; | |
47b1a55a | 108 | |
33b71eeb | 109 | /* Verify this isn't a register. */ |
47b1a55a SC |
110 | if (iq2000_cgen_isa_register (strp)) |
111 | errmsg = _("immediate value cannot be register"); | |
112 | else | |
113 | { | |
114 | long value; | |
115 | ||
116 | errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); | |
117 | if (errmsg == NULL) | |
118 | { | |
119 | long x = (-value) & 0xFFFF0000; | |
33b71eeb | 120 | |
4030fa5a | 121 | if (x != 0 && x != (long) 0xFFFF0000) |
47b1a55a SC |
122 | errmsg = _("immediate value out of range"); |
123 | else | |
124 | *valuep = (-value & 0xFFFF); | |
125 | } | |
126 | } | |
127 | return errmsg; | |
128 | } | |
129 | ||
130 | /* Handle signed/unsigned literal. */ | |
131 | ||
132 | static const char * | |
47b0e7ad NC |
133 | parse_imm (CGEN_CPU_DESC cd, |
134 | const char **strp, | |
135 | int opindex, | |
136 | unsigned long *valuep) | |
47b1a55a SC |
137 | { |
138 | const char *errmsg; | |
47b1a55a SC |
139 | |
140 | if (iq2000_cgen_isa_register (strp)) | |
141 | errmsg = _("immediate value cannot be register"); | |
142 | else | |
143 | { | |
144 | long value; | |
145 | ||
146 | errmsg = cgen_parse_signed_integer (cd, strp, opindex, & value); | |
147 | if (errmsg == NULL) | |
148 | { | |
149 | long x = value & 0xFFFF0000; | |
47b0e7ad | 150 | |
4030fa5a | 151 | if (x != 0 && x != (long) 0xFFFF0000) |
47b1a55a SC |
152 | errmsg = _("immediate value out of range"); |
153 | else | |
154 | *valuep = (value & 0xFFFF); | |
155 | } | |
156 | } | |
157 | return errmsg; | |
158 | } | |
159 | ||
160 | /* Handle iq10 21-bit jmp offset. */ | |
161 | ||
162 | static const char * | |
47b0e7ad NC |
163 | parse_jtargq10 (CGEN_CPU_DESC cd, |
164 | const char **strp, | |
165 | int opindex, | |
166 | int reloc ATTRIBUTE_UNUSED, | |
167 | enum cgen_parse_operand_result *type_addr ATTRIBUTE_UNUSED, | |
168 | bfd_vma *valuep) | |
47b1a55a SC |
169 | { |
170 | const char *errmsg; | |
171 | bfd_vma value; | |
172 | enum cgen_parse_operand_result result_type = CGEN_PARSE_OPERAND_RESULT_NUMBER; | |
173 | ||
174 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_OFFSET_21, | |
47b0e7ad | 175 | & result_type, & value); |
47b1a55a SC |
176 | if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) |
177 | { | |
47b0e7ad NC |
178 | /* Check value is within 23-bits |
179 | (remembering that 2-bit shift right will occur). */ | |
47b1a55a SC |
180 | if (value > 0x7fffff) |
181 | return _("21-bit offset out of range"); | |
182 | } | |
183 | *valuep = (value & 0x7FFFFF); | |
184 | return errmsg; | |
185 | } | |
186 | ||
187 | /* Handle high(). */ | |
188 | ||
189 | static const char * | |
47b0e7ad NC |
190 | parse_hi16 (CGEN_CPU_DESC cd, |
191 | const char **strp, | |
192 | int opindex, | |
193 | unsigned long *valuep) | |
47b1a55a SC |
194 | { |
195 | if (strncasecmp (*strp, "%hi(", 4) == 0) | |
196 | { | |
197 | enum cgen_parse_operand_result result_type; | |
198 | bfd_vma value; | |
199 | const char *errmsg; | |
200 | ||
201 | *strp += 4; | |
202 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_HI16, | |
47b0e7ad | 203 | & result_type, & value); |
47b1a55a | 204 | if (**strp != ')') |
47b0e7ad | 205 | return MISSING_CLOSING_PARENTHESIS; |
47b1a55a SC |
206 | |
207 | ++*strp; | |
208 | if (errmsg == NULL | |
209 | && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) | |
210 | { | |
47b0e7ad | 211 | /* If value has top-bit of %lo on, then it will |
47b1a55a | 212 | sign-propagate and so we compensate by adding |
47b0e7ad | 213 | 1 to the resultant %hi value. */ |
47b1a55a SC |
214 | if (value & 0x8000) |
215 | value += 0x10000; | |
216 | value >>= 16; | |
217 | } | |
218 | *valuep = value; | |
219 | ||
220 | return errmsg; | |
221 | } | |
222 | ||
47b0e7ad NC |
223 | /* We add %uhi in case a user just wants the high 16-bits or is using |
224 | an insn like ori for %lo which does not sign-propagate. */ | |
47b1a55a SC |
225 | if (strncasecmp (*strp, "%uhi(", 5) == 0) |
226 | { | |
227 | enum cgen_parse_operand_result result_type; | |
228 | bfd_vma value; | |
229 | const char *errmsg; | |
230 | ||
231 | *strp += 5; | |
232 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_IQ2000_UHI16, | |
47b0e7ad | 233 | & result_type, & value); |
47b1a55a | 234 | if (**strp != ')') |
47b0e7ad | 235 | return MISSING_CLOSING_PARENTHESIS; |
47b1a55a SC |
236 | |
237 | ++*strp; | |
238 | if (errmsg == NULL | |
239 | && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) | |
47b0e7ad NC |
240 | value >>= 16; |
241 | ||
47b1a55a SC |
242 | *valuep = value; |
243 | ||
244 | return errmsg; | |
245 | } | |
246 | ||
247 | return parse_imm (cd, strp, opindex, valuep); | |
248 | } | |
249 | ||
250 | /* Handle %lo in a signed context. | |
251 | The signedness of the value doesn't matter to %lo(), but this also | |
252 | handles the case where %lo() isn't present. */ | |
253 | ||
254 | static const char * | |
47b0e7ad NC |
255 | parse_lo16 (CGEN_CPU_DESC cd, |
256 | const char **strp, | |
257 | int opindex, | |
3ec2b351 | 258 | unsigned long *valuep) |
47b1a55a SC |
259 | { |
260 | if (strncasecmp (*strp, "%lo(", 4) == 0) | |
261 | { | |
262 | const char *errmsg; | |
263 | enum cgen_parse_operand_result result_type; | |
264 | bfd_vma value; | |
265 | ||
266 | *strp += 4; | |
267 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16, | |
47b0e7ad | 268 | & result_type, & value); |
47b1a55a | 269 | if (**strp != ')') |
47b0e7ad | 270 | return MISSING_CLOSING_PARENTHESIS; |
47b1a55a SC |
271 | ++*strp; |
272 | if (errmsg == NULL | |
273 | && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) | |
274 | value &= 0xffff; | |
275 | *valuep = value; | |
276 | return errmsg; | |
277 | } | |
278 | ||
279 | return parse_imm (cd, strp, opindex, valuep); | |
280 | } | |
281 | ||
282 | /* Handle %lo in a negated signed context. | |
283 | The signedness of the value doesn't matter to %lo(), but this also | |
284 | handles the case where %lo() isn't present. */ | |
285 | ||
286 | static const char * | |
47b0e7ad NC |
287 | parse_mlo16 (CGEN_CPU_DESC cd, |
288 | const char **strp, | |
289 | int opindex, | |
3ec2b351 | 290 | unsigned long *valuep) |
47b1a55a SC |
291 | { |
292 | if (strncasecmp (*strp, "%lo(", 4) == 0) | |
293 | { | |
294 | const char *errmsg; | |
295 | enum cgen_parse_operand_result result_type; | |
296 | bfd_vma value; | |
297 | ||
298 | *strp += 4; | |
299 | errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_LO16, | |
47b0e7ad | 300 | & result_type, & value); |
47b1a55a | 301 | if (**strp != ')') |
47b0e7ad | 302 | return MISSING_CLOSING_PARENTHESIS; |
47b1a55a SC |
303 | ++*strp; |
304 | if (errmsg == NULL | |
305 | && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) | |
306 | value = (-value) & 0xffff; | |
307 | *valuep = value; | |
308 | return errmsg; | |
309 | } | |
310 | ||
311 | return parse_mimm (cd, strp, opindex, valuep); | |
312 | } | |
313 | ||
314 | /* -- */ | |
315 | ||
316 | const char * iq2000_cgen_parse_operand | |
47b0e7ad | 317 | (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *); |
47b1a55a SC |
318 | |
319 | /* Main entry point for operand parsing. | |
320 | ||
321 | This function is basically just a big switch statement. Earlier versions | |
322 | used tables to look up the function to use, but | |
323 | - if the table contains both assembler and disassembler functions then | |
324 | the disassembler contains much of the assembler and vice-versa, | |
325 | - there's a lot of inlining possibilities as things grow, | |
326 | - using a switch statement avoids the function call overhead. | |
327 | ||
328 | This function could be moved into `parse_insn_normal', but keeping it | |
329 | separate makes clear the interface between `parse_insn_normal' and each of | |
330 | the handlers. */ | |
331 | ||
332 | const char * | |
47b0e7ad NC |
333 | iq2000_cgen_parse_operand (CGEN_CPU_DESC cd, |
334 | int opindex, | |
335 | const char ** strp, | |
336 | CGEN_FIELDS * fields) | |
47b1a55a SC |
337 | { |
338 | const char * errmsg = NULL; | |
339 | /* Used by scalar operands that still need to be parsed. */ | |
340 | long junk ATTRIBUTE_UNUSED; | |
341 | ||
342 | switch (opindex) | |
343 | { | |
4030fa5a | 344 | case IQ2000_OPERAND__INDEX : |
33b71eeb | 345 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND__INDEX, (unsigned long *) (& fields->f_index)); |
4030fa5a | 346 | break; |
47b1a55a SC |
347 | case IQ2000_OPERAND_BASE : |
348 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs); | |
349 | break; | |
350 | case IQ2000_OPERAND_BASEOFF : | |
351 | { | |
9494d739 | 352 | bfd_vma value = 0; |
47b1a55a SC |
353 | errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_BASEOFF, 0, NULL, & value); |
354 | fields->f_imm = value; | |
355 | } | |
356 | break; | |
357 | case IQ2000_OPERAND_BITNUM : | |
33b71eeb | 358 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BITNUM, (unsigned long *) (& fields->f_rt)); |
47b1a55a SC |
359 | break; |
360 | case IQ2000_OPERAND_BYTECOUNT : | |
33b71eeb | 361 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_BYTECOUNT, (unsigned long *) (& fields->f_bytecount)); |
47b1a55a SC |
362 | break; |
363 | case IQ2000_OPERAND_CAM_Y : | |
33b71eeb | 364 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Y, (unsigned long *) (& fields->f_cam_y)); |
47b1a55a SC |
365 | break; |
366 | case IQ2000_OPERAND_CAM_Z : | |
33b71eeb | 367 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CAM_Z, (unsigned long *) (& fields->f_cam_z)); |
47b1a55a SC |
368 | break; |
369 | case IQ2000_OPERAND_CM_3FUNC : | |
33b71eeb | 370 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3FUNC, (unsigned long *) (& fields->f_cm_3func)); |
47b1a55a SC |
371 | break; |
372 | case IQ2000_OPERAND_CM_3Z : | |
33b71eeb | 373 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_3Z, (unsigned long *) (& fields->f_cm_3z)); |
47b1a55a SC |
374 | break; |
375 | case IQ2000_OPERAND_CM_4FUNC : | |
33b71eeb | 376 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4FUNC, (unsigned long *) (& fields->f_cm_4func)); |
47b1a55a SC |
377 | break; |
378 | case IQ2000_OPERAND_CM_4Z : | |
33b71eeb | 379 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_CM_4Z, (unsigned long *) (& fields->f_cm_4z)); |
47b1a55a SC |
380 | break; |
381 | case IQ2000_OPERAND_COUNT : | |
33b71eeb | 382 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_COUNT, (unsigned long *) (& fields->f_count)); |
47b1a55a SC |
383 | break; |
384 | case IQ2000_OPERAND_EXECODE : | |
33b71eeb | 385 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_EXECODE, (unsigned long *) (& fields->f_excode)); |
47b1a55a SC |
386 | break; |
387 | case IQ2000_OPERAND_HI16 : | |
33b71eeb | 388 | errmsg = parse_hi16 (cd, strp, IQ2000_OPERAND_HI16, (unsigned long *) (& fields->f_imm)); |
47b1a55a SC |
389 | break; |
390 | case IQ2000_OPERAND_IMM : | |
33b71eeb | 391 | errmsg = parse_imm (cd, strp, IQ2000_OPERAND_IMM, (unsigned long *) (& fields->f_imm)); |
47b1a55a | 392 | break; |
47b1a55a SC |
393 | case IQ2000_OPERAND_JMPTARG : |
394 | { | |
9494d739 | 395 | bfd_vma value = 0; |
47b1a55a SC |
396 | errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_JMPTARG, 0, NULL, & value); |
397 | fields->f_jtarg = value; | |
398 | } | |
399 | break; | |
400 | case IQ2000_OPERAND_JMPTARGQ10 : | |
401 | { | |
33b71eeb | 402 | bfd_vma value = 0; |
47b1a55a SC |
403 | errmsg = parse_jtargq10 (cd, strp, IQ2000_OPERAND_JMPTARGQ10, 0, NULL, & value); |
404 | fields->f_jtargq10 = value; | |
405 | } | |
406 | break; | |
407 | case IQ2000_OPERAND_LO16 : | |
33b71eeb | 408 | errmsg = parse_lo16 (cd, strp, IQ2000_OPERAND_LO16, (unsigned long *) (& fields->f_imm)); |
47b1a55a SC |
409 | break; |
410 | case IQ2000_OPERAND_MASK : | |
33b71eeb | 411 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASK, (unsigned long *) (& fields->f_mask)); |
47b1a55a SC |
412 | break; |
413 | case IQ2000_OPERAND_MASKL : | |
33b71eeb | 414 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKL, (unsigned long *) (& fields->f_maskl)); |
47b1a55a SC |
415 | break; |
416 | case IQ2000_OPERAND_MASKQ10 : | |
33b71eeb | 417 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKQ10, (unsigned long *) (& fields->f_maskq10)); |
47b1a55a SC |
418 | break; |
419 | case IQ2000_OPERAND_MASKR : | |
33b71eeb | 420 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_MASKR, (unsigned long *) (& fields->f_rs)); |
47b1a55a SC |
421 | break; |
422 | case IQ2000_OPERAND_MLO16 : | |
33b71eeb | 423 | errmsg = parse_mlo16 (cd, strp, IQ2000_OPERAND_MLO16, (unsigned long *) (& fields->f_imm)); |
47b1a55a SC |
424 | break; |
425 | case IQ2000_OPERAND_OFFSET : | |
426 | { | |
9494d739 | 427 | bfd_vma value = 0; |
47b1a55a SC |
428 | errmsg = cgen_parse_address (cd, strp, IQ2000_OPERAND_OFFSET, 0, NULL, & value); |
429 | fields->f_offset = value; | |
430 | } | |
431 | break; | |
432 | case IQ2000_OPERAND_RD : | |
433 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd); | |
434 | break; | |
435 | case IQ2000_OPERAND_RD_RS : | |
436 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rs); | |
437 | break; | |
438 | case IQ2000_OPERAND_RD_RT : | |
439 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rd_rt); | |
440 | break; | |
441 | case IQ2000_OPERAND_RS : | |
442 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rs); | |
443 | break; | |
444 | case IQ2000_OPERAND_RT : | |
445 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt); | |
446 | break; | |
447 | case IQ2000_OPERAND_RT_RS : | |
448 | errmsg = cgen_parse_keyword (cd, strp, & iq2000_cgen_opval_gr_names, & fields->f_rt_rs); | |
449 | break; | |
450 | case IQ2000_OPERAND_SHAMT : | |
33b71eeb | 451 | errmsg = cgen_parse_unsigned_integer (cd, strp, IQ2000_OPERAND_SHAMT, (unsigned long *) (& fields->f_shamt)); |
47b1a55a SC |
452 | break; |
453 | ||
454 | default : | |
455 | /* xgettext:c-format */ | |
456 | fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex); | |
457 | abort (); | |
458 | } | |
459 | ||
460 | return errmsg; | |
461 | } | |
462 | ||
463 | cgen_parse_fn * const iq2000_cgen_parse_handlers[] = | |
464 | { | |
465 | parse_insn_normal, | |
466 | }; | |
467 | ||
468 | void | |
47b0e7ad | 469 | iq2000_cgen_init_asm (CGEN_CPU_DESC cd) |
47b1a55a SC |
470 | { |
471 | iq2000_cgen_init_opcode_table (cd); | |
472 | iq2000_cgen_init_ibld_table (cd); | |
473 | cd->parse_handlers = & iq2000_cgen_parse_handlers[0]; | |
474 | cd->parse_operand = iq2000_cgen_parse_operand; | |
47b1a55a SC |
475 | } |
476 | ||
477 | \f | |
478 | ||
479 | /* Regex construction routine. | |
480 | ||
481 | This translates an opcode syntax string into a regex string, | |
482 | by replacing any non-character syntax element (such as an | |
483 | opcode) with the pattern '.*' | |
484 | ||
485 | It then compiles the regex and stores it in the opcode, for | |
486 | later use by iq2000_cgen_assemble_insn | |
487 | ||
488 | Returns NULL for success, an error message for failure. */ | |
489 | ||
490 | char * | |
ffead7ae | 491 | iq2000_cgen_build_insn_regex (CGEN_INSN *insn) |
47b1a55a SC |
492 | { |
493 | CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn); | |
494 | const char *mnem = CGEN_INSN_MNEMONIC (insn); | |
495 | char rxbuf[CGEN_MAX_RX_ELEMENTS]; | |
496 | char *rx = rxbuf; | |
497 | const CGEN_SYNTAX_CHAR_TYPE *syn; | |
498 | int reg_err; | |
499 | ||
500 | syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc)); | |
501 | ||
502 | /* Mnemonics come first in the syntax string. */ | |
503 | if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) | |
504 | return _("missing mnemonic in syntax string"); | |
505 | ++syn; | |
506 | ||
507 | /* Generate a case sensitive regular expression that emulates case | |
508 | insensitive matching in the "C" locale. We cannot generate a case | |
509 | insensitive regular expression because in Turkish locales, 'i' and 'I' | |
510 | are not equal modulo case conversion. */ | |
511 | ||
512 | /* Copy the literal mnemonic out of the insn. */ | |
513 | for (; *mnem; mnem++) | |
514 | { | |
515 | char c = *mnem; | |
516 | ||
517 | if (ISALPHA (c)) | |
518 | { | |
519 | *rx++ = '['; | |
520 | *rx++ = TOLOWER (c); | |
521 | *rx++ = TOUPPER (c); | |
522 | *rx++ = ']'; | |
523 | } | |
524 | else | |
525 | *rx++ = c; | |
526 | } | |
527 | ||
528 | /* Copy any remaining literals from the syntax string into the rx. */ | |
529 | for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn) | |
530 | { | |
531 | if (CGEN_SYNTAX_CHAR_P (* syn)) | |
532 | { | |
533 | char c = CGEN_SYNTAX_CHAR (* syn); | |
534 | ||
535 | switch (c) | |
536 | { | |
537 | /* Escape any regex metacharacters in the syntax. */ | |
538 | case '.': case '[': case '\\': | |
539 | case '*': case '^': case '$': | |
540 | ||
541 | #ifdef CGEN_ESCAPE_EXTENDED_REGEX | |
542 | case '?': case '{': case '}': | |
543 | case '(': case ')': case '*': | |
544 | case '|': case '+': case ']': | |
545 | #endif | |
546 | *rx++ = '\\'; | |
547 | *rx++ = c; | |
548 | break; | |
549 | ||
550 | default: | |
551 | if (ISALPHA (c)) | |
552 | { | |
553 | *rx++ = '['; | |
554 | *rx++ = TOLOWER (c); | |
555 | *rx++ = TOUPPER (c); | |
556 | *rx++ = ']'; | |
557 | } | |
558 | else | |
559 | *rx++ = c; | |
560 | break; | |
561 | } | |
562 | } | |
563 | else | |
564 | { | |
565 | /* Replace non-syntax fields with globs. */ | |
566 | *rx++ = '.'; | |
567 | *rx++ = '*'; | |
568 | } | |
569 | } | |
570 | ||
571 | /* Trailing whitespace ok. */ | |
572 | * rx++ = '['; | |
573 | * rx++ = ' '; | |
574 | * rx++ = '\t'; | |
575 | * rx++ = ']'; | |
576 | * rx++ = '*'; | |
577 | ||
578 | /* But anchor it after that. */ | |
579 | * rx++ = '$'; | |
580 | * rx = '\0'; | |
581 | ||
582 | CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t)); | |
583 | reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB); | |
584 | ||
585 | if (reg_err == 0) | |
586 | return NULL; | |
587 | else | |
588 | { | |
589 | static char msg[80]; | |
590 | ||
591 | regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80); | |
592 | regfree ((regex_t *) CGEN_INSN_RX (insn)); | |
593 | free (CGEN_INSN_RX (insn)); | |
594 | (CGEN_INSN_RX (insn)) = NULL; | |
595 | return msg; | |
596 | } | |
597 | } | |
598 | ||
599 | \f | |
600 | /* Default insn parser. | |
601 | ||
602 | The syntax string is scanned and operands are parsed and stored in FIELDS. | |
603 | Relocs are queued as we go via other callbacks. | |
604 | ||
605 | ??? Note that this is currently an all-or-nothing parser. If we fail to | |
606 | parse the instruction, we return 0 and the caller will start over from | |
607 | the beginning. Backtracking will be necessary in parsing subexpressions, | |
608 | but that can be handled there. Not handling backtracking here may get | |
609 | expensive in the case of the m68k. Deal with later. | |
610 | ||
611 | Returns NULL for success, an error message for failure. */ | |
612 | ||
613 | static const char * | |
ffead7ae MM |
614 | parse_insn_normal (CGEN_CPU_DESC cd, |
615 | const CGEN_INSN *insn, | |
616 | const char **strp, | |
617 | CGEN_FIELDS *fields) | |
47b1a55a SC |
618 | { |
619 | /* ??? Runtime added insns not handled yet. */ | |
620 | const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); | |
621 | const char *str = *strp; | |
622 | const char *errmsg; | |
623 | const char *p; | |
624 | const CGEN_SYNTAX_CHAR_TYPE * syn; | |
625 | #ifdef CGEN_MNEMONIC_OPERANDS | |
626 | /* FIXME: wip */ | |
627 | int past_opcode_p; | |
628 | #endif | |
629 | ||
630 | /* For now we assume the mnemonic is first (there are no leading operands). | |
631 | We can parse it without needing to set up operand parsing. | |
632 | GAS's input scrubber will ensure mnemonics are lowercase, but we may | |
633 | not be called from GAS. */ | |
634 | p = CGEN_INSN_MNEMONIC (insn); | |
635 | while (*p && TOLOWER (*p) == TOLOWER (*str)) | |
636 | ++p, ++str; | |
637 | ||
638 | if (* p) | |
639 | return _("unrecognized instruction"); | |
640 | ||
641 | #ifndef CGEN_MNEMONIC_OPERANDS | |
642 | if (* str && ! ISSPACE (* str)) | |
643 | return _("unrecognized instruction"); | |
644 | #endif | |
645 | ||
646 | CGEN_INIT_PARSE (cd); | |
647 | cgen_init_parse_operand (cd); | |
648 | #ifdef CGEN_MNEMONIC_OPERANDS | |
649 | past_opcode_p = 0; | |
650 | #endif | |
651 | ||
652 | /* We don't check for (*str != '\0') here because we want to parse | |
653 | any trailing fake arguments in the syntax string. */ | |
654 | syn = CGEN_SYNTAX_STRING (syntax); | |
655 | ||
656 | /* Mnemonics come first for now, ensure valid string. */ | |
657 | if (! CGEN_SYNTAX_MNEMONIC_P (* syn)) | |
658 | abort (); | |
659 | ||
660 | ++syn; | |
661 | ||
662 | while (* syn != 0) | |
663 | { | |
664 | /* Non operand chars must match exactly. */ | |
665 | if (CGEN_SYNTAX_CHAR_P (* syn)) | |
666 | { | |
667 | /* FIXME: While we allow for non-GAS callers above, we assume the | |
668 | first char after the mnemonic part is a space. */ | |
669 | /* FIXME: We also take inappropriate advantage of the fact that | |
670 | GAS's input scrubber will remove extraneous blanks. */ | |
671 | if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn))) | |
672 | { | |
673 | #ifdef CGEN_MNEMONIC_OPERANDS | |
674 | if (CGEN_SYNTAX_CHAR(* syn) == ' ') | |
675 | past_opcode_p = 1; | |
676 | #endif | |
677 | ++ syn; | |
678 | ++ str; | |
679 | } | |
680 | else if (*str) | |
681 | { | |
682 | /* Syntax char didn't match. Can't be this insn. */ | |
683 | static char msg [80]; | |
684 | ||
685 | /* xgettext:c-format */ | |
686 | sprintf (msg, _("syntax error (expected char `%c', found `%c')"), | |
687 | CGEN_SYNTAX_CHAR(*syn), *str); | |
688 | return msg; | |
689 | } | |
690 | else | |
691 | { | |
692 | /* Ran out of input. */ | |
693 | static char msg [80]; | |
694 | ||
695 | /* xgettext:c-format */ | |
696 | sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"), | |
697 | CGEN_SYNTAX_CHAR(*syn)); | |
698 | return msg; | |
699 | } | |
700 | continue; | |
701 | } | |
702 | ||
703 | /* We have an operand of some sort. */ | |
704 | errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), | |
705 | &str, fields); | |
706 | if (errmsg) | |
707 | return errmsg; | |
708 | ||
709 | /* Done with this operand, continue with next one. */ | |
710 | ++ syn; | |
711 | } | |
712 | ||
713 | /* If we're at the end of the syntax string, we're done. */ | |
714 | if (* syn == 0) | |
715 | { | |
716 | /* FIXME: For the moment we assume a valid `str' can only contain | |
717 | blanks now. IE: We needn't try again with a longer version of | |
718 | the insn and it is assumed that longer versions of insns appear | |
719 | before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */ | |
720 | while (ISSPACE (* str)) | |
721 | ++ str; | |
722 | ||
723 | if (* str != '\0') | |
724 | return _("junk at end of line"); /* FIXME: would like to include `str' */ | |
725 | ||
726 | return NULL; | |
727 | } | |
728 | ||
729 | /* We couldn't parse it. */ | |
730 | return _("unrecognized instruction"); | |
731 | } | |
732 | \f | |
733 | /* Main entry point. | |
734 | This routine is called for each instruction to be assembled. | |
735 | STR points to the insn to be assembled. | |
736 | We assume all necessary tables have been initialized. | |
737 | The assembled instruction, less any fixups, is stored in BUF. | |
738 | Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value | |
739 | still needs to be converted to target byte order, otherwise BUF is an array | |
740 | of bytes in target byte order. | |
741 | The result is a pointer to the insn's entry in the opcode table, | |
742 | or NULL if an error occured (an error message will have already been | |
743 | printed). | |
744 | ||
745 | Note that when processing (non-alias) macro-insns, | |
746 | this function recurses. | |
747 | ||
748 | ??? It's possible to make this cpu-independent. | |
749 | One would have to deal with a few minor things. | |
750 | At this point in time doing so would be more of a curiosity than useful | |
751 | [for example this file isn't _that_ big], but keeping the possibility in | |
752 | mind helps keep the design clean. */ | |
753 | ||
754 | const CGEN_INSN * | |
ffead7ae MM |
755 | iq2000_cgen_assemble_insn (CGEN_CPU_DESC cd, |
756 | const char *str, | |
757 | CGEN_FIELDS *fields, | |
758 | CGEN_INSN_BYTES_PTR buf, | |
759 | char **errmsg) | |
47b1a55a SC |
760 | { |
761 | const char *start; | |
762 | CGEN_INSN_LIST *ilist; | |
763 | const char *parse_errmsg = NULL; | |
764 | const char *insert_errmsg = NULL; | |
765 | int recognized_mnemonic = 0; | |
766 | ||
767 | /* Skip leading white space. */ | |
768 | while (ISSPACE (* str)) | |
769 | ++ str; | |
770 | ||
771 | /* The instructions are stored in hashed lists. | |
772 | Get the first in the list. */ | |
773 | ilist = CGEN_ASM_LOOKUP_INSN (cd, str); | |
774 | ||
775 | /* Keep looking until we find a match. */ | |
776 | start = str; | |
777 | for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist)) | |
778 | { | |
779 | const CGEN_INSN *insn = ilist->insn; | |
780 | recognized_mnemonic = 1; | |
781 | ||
782 | #ifdef CGEN_VALIDATE_INSN_SUPPORTED | |
783 | /* Not usually needed as unsupported opcodes | |
784 | shouldn't be in the hash lists. */ | |
785 | /* Is this insn supported by the selected cpu? */ | |
786 | if (! iq2000_cgen_insn_supported (cd, insn)) | |
787 | continue; | |
788 | #endif | |
b11dcf4e | 789 | /* If the RELAXED attribute is set, this is an insn that shouldn't be |
47b1a55a SC |
790 | chosen immediately. Instead, it is used during assembler/linker |
791 | relaxation if possible. */ | |
b11dcf4e | 792 | if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0) |
47b1a55a SC |
793 | continue; |
794 | ||
795 | str = start; | |
796 | ||
797 | /* Skip this insn if str doesn't look right lexically. */ | |
798 | if (CGEN_INSN_RX (insn) != NULL && | |
799 | regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH) | |
800 | continue; | |
801 | ||
802 | /* Allow parse/insert handlers to obtain length of insn. */ | |
803 | CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn); | |
804 | ||
805 | parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields); | |
806 | if (parse_errmsg != NULL) | |
807 | continue; | |
808 | ||
809 | /* ??? 0 is passed for `pc'. */ | |
810 | insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf, | |
811 | (bfd_vma) 0); | |
812 | if (insert_errmsg != NULL) | |
813 | continue; | |
814 | ||
815 | /* It is up to the caller to actually output the insn and any | |
816 | queued relocs. */ | |
817 | return insn; | |
818 | } | |
819 | ||
820 | { | |
821 | static char errbuf[150]; | |
822 | #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS | |
823 | const char *tmp_errmsg; | |
824 | ||
825 | /* If requesting verbose error messages, use insert_errmsg. | |
826 | Failing that, use parse_errmsg. */ | |
827 | tmp_errmsg = (insert_errmsg ? insert_errmsg : | |
828 | parse_errmsg ? parse_errmsg : | |
829 | recognized_mnemonic ? | |
830 | _("unrecognized form of instruction") : | |
831 | _("unrecognized instruction")); | |
832 | ||
833 | if (strlen (start) > 50) | |
834 | /* xgettext:c-format */ | |
835 | sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start); | |
836 | else | |
837 | /* xgettext:c-format */ | |
838 | sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start); | |
839 | #else | |
840 | if (strlen (start) > 50) | |
841 | /* xgettext:c-format */ | |
842 | sprintf (errbuf, _("bad instruction `%.50s...'"), start); | |
843 | else | |
844 | /* xgettext:c-format */ | |
845 | sprintf (errbuf, _("bad instruction `%.50s'"), start); | |
846 | #endif | |
847 | ||
848 | *errmsg = errbuf; | |
849 | return NULL; | |
850 | } | |
851 | } |