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2011-03-16 Kai Tietz <ktietz@redhat.com>
[deliverable/binutils-gdb.git] / opcodes / lm32-opc.c
CommitLineData
84e94c90
NC		 1/* Instruction opcode table for lm32.
2
3THIS FILE IS MACHINE GENERATED WITH CGEN.
4
05994f45 5Copyright 1996-2010 Free Software Foundation, Inc.
84e94c90
NC		 6
7This file is part of the GNU Binutils and/or GDB, the GNU debugger.
8
9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
13
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
18
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
22
23*/
24
25#include "sysdep.h"
26#include "ansidecl.h"
27#include "bfd.h"
28#include "symcat.h"
29#include "lm32-desc.h"
30#include "lm32-opc.h"
31#include "libiberty.h"
32
33/* The hash functions are recorded here to help keep assembler code out of
34 the disassembler and vice versa. */
35
36static int asm_hash_insn_p (const CGEN_INSN *);
37static unsigned int asm_hash_insn (const char *);
38static int dis_hash_insn_p (const CGEN_INSN *);
39static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT);
40
41/* Instruction formats. */
42
84e94c90 43#define F(f) & lm32_cgen_ifld_table[LM32_##f]
84e94c90
NC		 44static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED = {
45 0, 0, 0x0, { { 0 } }
46};
47
48static const CGEN_IFMT ifmt_add ATTRIBUTE_UNUSED = {
49 32, 32, 0xfc0007ff, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
50};
51
52static const CGEN_IFMT ifmt_addi ATTRIBUTE_UNUSED = {
53 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
54};
55
56static const CGEN_IFMT ifmt_andi ATTRIBUTE_UNUSED = {
57 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_UIMM) }, { 0 } }
58};
59
60static const CGEN_IFMT ifmt_andhii ATTRIBUTE_UNUSED = {
61 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_UIMM) }, { 0 } }
62};
63
64static const CGEN_IFMT ifmt_b ATTRIBUTE_UNUSED = {
65 32, 32, 0xfc1fffff, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
66};
67
68static const CGEN_IFMT ifmt_bi ATTRIBUTE_UNUSED = {
69 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_CALL) }, { 0 } }
70};
71
72static const CGEN_IFMT ifmt_be ATTRIBUTE_UNUSED = {
73 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_BRANCH) }, { 0 } }
74};
75
76static const CGEN_IFMT ifmt_ori ATTRIBUTE_UNUSED = {
77 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_UIMM) }, { 0 } }
78};
79
80static const CGEN_IFMT ifmt_rcsr ATTRIBUTE_UNUSED = {
81 32, 32, 0xfc1f07ff, { { F (F_OPCODE) }, { F (F_CSR) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
82};
83
84static const CGEN_IFMT ifmt_sextb ATTRIBUTE_UNUSED = {
85 32, 32, 0xfc1f07ff, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
86};
87
88static const CGEN_IFMT ifmt_user ATTRIBUTE_UNUSED = {
89 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_R2) }, { F (F_USER) }, { 0 } }
90};
91
92static const CGEN_IFMT ifmt_wcsr ATTRIBUTE_UNUSED = {
93 32, 32, 0xfc00ffff, { { F (F_OPCODE) }, { F (F_CSR) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
94};
95
96static const CGEN_IFMT ifmt_break ATTRIBUTE_UNUSED = {
97 32, 32, 0xffffffff, { { F (F_OPCODE) }, { F (F_EXCEPTION) }, { 0 } }
98};
99
100static const CGEN_IFMT ifmt_bret ATTRIBUTE_UNUSED = {
101 32, 32, 0xffffffff, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_R2) }, { F (F_RESV0) }, { 0 } }
102};
103
104static const CGEN_IFMT ifmt_mvi ATTRIBUTE_UNUSED = {
105 32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
106};
107
108static const CGEN_IFMT ifmt_mvui ATTRIBUTE_UNUSED = {
109 32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_UIMM) }, { 0 } }
110};
111
112static const CGEN_IFMT ifmt_mvhi ATTRIBUTE_UNUSED = {
113 32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_UIMM) }, { 0 } }
114};
115
116static const CGEN_IFMT ifmt_mva ATTRIBUTE_UNUSED = {
117 32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
118};
119
120static const CGEN_IFMT ifmt_nop ATTRIBUTE_UNUSED = {
121 32, 32, 0xffffffff, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
122};
123
124static const CGEN_IFMT ifmt_lwgotrel ATTRIBUTE_UNUSED = {
125 32, 32, 0xffe00000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
126};
127
128static const CGEN_IFMT ifmt_orhigotoffi ATTRIBUTE_UNUSED = {
129 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
130};
131
132static const CGEN_IFMT ifmt_addgotoff ATTRIBUTE_UNUSED = {
133 32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R0) }, { F (F_R1) }, { F (F_IMM) }, { 0 } }
134};
135
136#undef F
137
84e94c90 138#define A(a) (1 << CGEN_INSN_##a)
84e94c90 139#define OPERAND(op) LM32_OPERAND_##op
84e94c90
NC		 140#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
141#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
142
143/* The instruction table. */
144
145static const CGEN_OPCODE lm32_cgen_insn_opcode_table[MAX_INSNS] =
146{
147 /* Special null first entry.
148 A `num' value of zero is thus invalid.
149 Also, the special `invalid' insn resides here. */
150 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
151/* add $r2,$r0,$r1 */
152 {
153 { 0, 0, 0, 0 },
154 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
155 & ifmt_add, { 0xb4000000 }
156 },
157/* addi $r1,$r0,$imm */
158 {
159 { 0, 0, 0, 0 },
160 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
161 & ifmt_addi, { 0x34000000 }
162 },
163/* and $r2,$r0,$r1 */
164 {
165 { 0, 0, 0, 0 },
166 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
167 & ifmt_add, { 0xa0000000 }
168 },
169/* andi $r1,$r0,$uimm */
170 {
171 { 0, 0, 0, 0 },
172 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
173 & ifmt_andi, { 0x20000000 }
174 },
175/* andhi $r1,$r0,$hi16 */
176 {
177 { 0, 0, 0, 0 },
178 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (HI16), 0 } },
179 & ifmt_andhii, { 0x60000000 }
180 },
181/* b $r0 */
182 {
183 { 0, 0, 0, 0 },
184 { { MNEM, ' ', OP (R0), 0 } },
185 & ifmt_b, { 0xc0000000 }
186 },
187/* bi $call */
188 {
189 { 0, 0, 0, 0 },
190 { { MNEM, ' ', OP (CALL), 0 } },
191 & ifmt_bi, { 0xe0000000 }
192 },
193/* be $r0,$r1,$branch */
194 {
195 { 0, 0, 0, 0 },
196 { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
197 & ifmt_be, { 0x44000000 }
198 },
199/* bg $r0,$r1,$branch */
200 {
201 { 0, 0, 0, 0 },
202 { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
203 & ifmt_be, { 0x48000000 }
204 },
205/* bge $r0,$r1,$branch */
206 {
207 { 0, 0, 0, 0 },
208 { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
209 & ifmt_be, { 0x4c000000 }
210 },
211/* bgeu $r0,$r1,$branch */
212 {
213 { 0, 0, 0, 0 },
214 { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
215 & ifmt_be, { 0x50000000 }
216 },
217/* bgu $r0,$r1,$branch */
218 {
219 { 0, 0, 0, 0 },
220 { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
221 & ifmt_be, { 0x54000000 }
222 },
223/* bne $r0,$r1,$branch */
224 {
225 { 0, 0, 0, 0 },
226 { { MNEM, ' ', OP (R0), ',', OP (R1), ',', OP (BRANCH), 0 } },
227 & ifmt_be, { 0x5c000000 }
228 },
229/* call $r0 */
230 {
231 { 0, 0, 0, 0 },
232 { { MNEM, ' ', OP (R0), 0 } },
233 & ifmt_b, { 0xd8000000 }
234 },
235/* calli $call */
236 {
237 { 0, 0, 0, 0 },
238 { { MNEM, ' ', OP (CALL), 0 } },
239 & ifmt_bi, { 0xf8000000 }
240 },
241/* cmpe $r2,$r0,$r1 */
242 {
243 { 0, 0, 0, 0 },
244 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
245 & ifmt_add, { 0xe4000000 }
246 },
247/* cmpei $r1,$r0,$imm */
248 {
249 { 0, 0, 0, 0 },
250 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
251 & ifmt_addi, { 0x64000000 }
252 },
253/* cmpg $r2,$r0,$r1 */
254 {
255 { 0, 0, 0, 0 },
256 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
257 & ifmt_add, { 0xe8000000 }
258 },
259/* cmpgi $r1,$r0,$imm */
260 {
261 { 0, 0, 0, 0 },
262 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
263 & ifmt_addi, { 0x68000000 }
264 },
265/* cmpge $r2,$r0,$r1 */
266 {
267 { 0, 0, 0, 0 },
268 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
269 & ifmt_add, { 0xec000000 }
270 },
271/* cmpgei $r1,$r0,$imm */
272 {
273 { 0, 0, 0, 0 },
274 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
275 & ifmt_addi, { 0x6c000000 }
276 },
277/* cmpgeu $r2,$r0,$r1 */
278 {
279 { 0, 0, 0, 0 },
280 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
281 & ifmt_add, { 0xf0000000 }
282 },
283/* cmpgeui $r1,$r0,$uimm */
284 {
285 { 0, 0, 0, 0 },
286 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
287 & ifmt_andi, { 0x70000000 }
288 },
289/* cmpgu $r2,$r0,$r1 */
290 {
291 { 0, 0, 0, 0 },
292 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
293 & ifmt_add, { 0xf4000000 }
294 },
295/* cmpgui $r1,$r0,$uimm */
296 {
297 { 0, 0, 0, 0 },
298 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
299 & ifmt_andi, { 0x74000000 }
300 },
301/* cmpne $r2,$r0,$r1 */
302 {
303 { 0, 0, 0, 0 },
304 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
305 & ifmt_add, { 0xfc000000 }
306 },
307/* cmpnei $r1,$r0,$imm */
308 {
309 { 0, 0, 0, 0 },
310 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
311 & ifmt_addi, { 0x7c000000 }
312 },
313/* divu $r2,$r0,$r1 */
314 {
315 { 0, 0, 0, 0 },
316 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
317 & ifmt_add, { 0x8c000000 }
318 },
319/* lb $r1,($r0+$imm) */
320 {
321 { 0, 0, 0, 0 },
322 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
323 & ifmt_addi, { 0x10000000 }
324 },
325/* lbu $r1,($r0+$imm) */
326 {
327 { 0, 0, 0, 0 },
328 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
329 & ifmt_addi, { 0x40000000 }
330 },
331/* lh $r1,($r0+$imm) */
332 {
333 { 0, 0, 0, 0 },
334 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
335 & ifmt_addi, { 0x1c000000 }
336 },
337/* lhu $r1,($r0+$imm) */
338 {
339 { 0, 0, 0, 0 },
340 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
341 & ifmt_addi, { 0x2c000000 }
342 },
343/* lw $r1,($r0+$imm) */
344 {
345 { 0, 0, 0, 0 },
346 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (IMM), ')', 0 } },
347 & ifmt_addi, { 0x28000000 }
348 },
349/* modu $r2,$r0,$r1 */
350 {
351 { 0, 0, 0, 0 },
352 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
353 & ifmt_add, { 0xc4000000 }
354 },
355/* mul $r2,$r0,$r1 */
356 {
357 { 0, 0, 0, 0 },
358 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
359 & ifmt_add, { 0x88000000 }
360 },
361/* muli $r1,$r0,$imm */
362 {
363 { 0, 0, 0, 0 },
364 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
365 & ifmt_addi, { 0x8000000 }
366 },
367/* nor $r2,$r0,$r1 */
368 {
369 { 0, 0, 0, 0 },
370 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
371 & ifmt_add, { 0x84000000 }
372 },
373/* nori $r1,$r0,$uimm */
374 {
375 { 0, 0, 0, 0 },
376 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
377 & ifmt_andi, { 0x4000000 }
378 },
379/* or $r2,$r0,$r1 */
380 {
381 { 0, 0, 0, 0 },
382 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
383 & ifmt_add, { 0xb8000000 }
384 },
385/* ori $r1,$r0,$lo16 */
386 {
387 { 0, 0, 0, 0 },
388 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (LO16), 0 } },
389 & ifmt_ori, { 0x38000000 }
390 },
391/* orhi $r1,$r0,$hi16 */
392 {
393 { 0, 0, 0, 0 },
394 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (HI16), 0 } },
395 & ifmt_andhii, { 0x78000000 }
396 },
397/* rcsr $r2,$csr */
398 {
399 { 0, 0, 0, 0 },
400 { { MNEM, ' ', OP (R2), ',', OP (CSR), 0 } },
401 & ifmt_rcsr, { 0x90000000 }
402 },
403/* sb ($r0+$imm),$r1 */
404 {
405 { 0, 0, 0, 0 },
406 { { MNEM, ' ', '(', OP (R0), '+', OP (IMM), ')', ',', OP (R1), 0 } },
407 & ifmt_addi, { 0x30000000 }
408 },
409/* sextb $r2,$r0 */
410 {
411 { 0, 0, 0, 0 },
412 { { MNEM, ' ', OP (R2), ',', OP (R0), 0 } },
413 & ifmt_sextb, { 0xb0000000 }
414 },
415/* sexth $r2,$r0 */
416 {
417 { 0, 0, 0, 0 },
418 { { MNEM, ' ', OP (R2), ',', OP (R0), 0 } },
419 & ifmt_sextb, { 0xdc000000 }
420 },
421/* sh ($r0+$imm),$r1 */
422 {
423 { 0, 0, 0, 0 },
424 { { MNEM, ' ', '(', OP (R0), '+', OP (IMM), ')', ',', OP (R1), 0 } },
425 & ifmt_addi, { 0xc000000 }
426 },
427/* sl $r2,$r0,$r1 */
428 {
429 { 0, 0, 0, 0 },
430 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
431 & ifmt_add, { 0xbc000000 }
432 },
433/* sli $r1,$r0,$imm */
434 {
435 { 0, 0, 0, 0 },
436 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
437 & ifmt_addi, { 0x3c000000 }
438 },
439/* sr $r2,$r0,$r1 */
440 {
441 { 0, 0, 0, 0 },
442 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
443 & ifmt_add, { 0x94000000 }
444 },
445/* sri $r1,$r0,$imm */
446 {
447 { 0, 0, 0, 0 },
448 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
449 & ifmt_addi, { 0x14000000 }
450 },
451/* sru $r2,$r0,$r1 */
452 {
453 { 0, 0, 0, 0 },
454 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
455 & ifmt_add, { 0x80000000 }
456 },
457/* srui $r1,$r0,$imm */
458 {
459 { 0, 0, 0, 0 },
460 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (IMM), 0 } },
461 & ifmt_addi, { 0x0 }
462 },
463/* sub $r2,$r0,$r1 */
464 {
465 { 0, 0, 0, 0 },
466 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
467 & ifmt_add, { 0xc8000000 }
468 },
469/* sw ($r0+$imm),$r1 */
470 {
471 { 0, 0, 0, 0 },
472 { { MNEM, ' ', '(', OP (R0), '+', OP (IMM), ')', ',', OP (R1), 0 } },
473 & ifmt_addi, { 0x58000000 }
474 },
475/* user $r2,$r0,$r1,$user */
476 {
477 { 0, 0, 0, 0 },
478 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), ',', OP (USER), 0 } },
479 & ifmt_user, { 0xcc000000 }
480 },
481/* wcsr $csr,$r1 */
482 {
483 { 0, 0, 0, 0 },
484 { { MNEM, ' ', OP (CSR), ',', OP (R1), 0 } },
485 & ifmt_wcsr, { 0xd0000000 }
486 },
487/* xor $r2,$r0,$r1 */
488 {
489 { 0, 0, 0, 0 },
490 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
491 & ifmt_add, { 0x98000000 }
492 },
493/* xori $r1,$r0,$uimm */
494 {
495 { 0, 0, 0, 0 },
496 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
497 & ifmt_andi, { 0x18000000 }
498 },
499/* xnor $r2,$r0,$r1 */
500 {
501 { 0, 0, 0, 0 },
502 { { MNEM, ' ', OP (R2), ',', OP (R0), ',', OP (R1), 0 } },
503 & ifmt_add, { 0xa4000000 }
504 },
505/* xnori $r1,$r0,$uimm */
506 {
507 { 0, 0, 0, 0 },
508 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (UIMM), 0 } },
509 & ifmt_andi, { 0x24000000 }
510 },
511/* break */
512 {
513 { 0, 0, 0, 0 },
514 { { MNEM, 0 } },
515 & ifmt_break, { 0xac000002 }
516 },
517/* scall */
518 {
519 { 0, 0, 0, 0 },
520 { { MNEM, 0 } },
521 & ifmt_break, { 0xac000007 }
522 },
523/* bret */
524 {
525 { 0, 0, 0, 0 },
526 { { MNEM, 0 } },
527 & ifmt_bret, { 0xc3e00000 }
528 },
529/* eret */
530 {
531 { 0, 0, 0, 0 },
532 { { MNEM, 0 } },
533 & ifmt_bret, { 0xc3c00000 }
534 },
535/* ret */
536 {
537 { 0, 0, 0, 0 },
538 { { MNEM, 0 } },
539 & ifmt_bret, { 0xc3a00000 }
540 },
541/* mv $r2,$r0 */
542 {
543 { 0, 0, 0, 0 },
544 { { MNEM, ' ', OP (R2), ',', OP (R0), 0 } },
545 & ifmt_sextb, { 0xb8000000 }
546 },
547/* mvi $r1,$imm */
548 {
549 { 0, 0, 0, 0 },
550 { { MNEM, ' ', OP (R1), ',', OP (IMM), 0 } },
551 & ifmt_mvi, { 0x34000000 }
552 },
553/* mvu $r1,$lo16 */
554 {
555 { 0, 0, 0, 0 },
556 { { MNEM, ' ', OP (R1), ',', OP (LO16), 0 } },
557 & ifmt_mvui, { 0x38000000 }
558 },
559/* mvhi $r1,$hi16 */
560 {
561 { 0, 0, 0, 0 },
562 { { MNEM, ' ', OP (R1), ',', OP (HI16), 0 } },
563 & ifmt_mvhi, { 0x78000000 }
564 },
565/* mva $r1,$gp16 */
566 {
567 { 0, 0, 0, 0 },
568 { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
569 & ifmt_mva, { 0x37400000 }
570 },
571/* not $r2,$r0 */
572 {
573 { 0, 0, 0, 0 },
574 { { MNEM, ' ', OP (R2), ',', OP (R0), 0 } },
575 & ifmt_sextb, { 0xa4000000 }
576 },
577/* nop */
578 {
579 { 0, 0, 0, 0 },
580 { { MNEM, 0 } },
581 & ifmt_nop, { 0x34000000 }
582 },
583/* lb $r1,$gp16 */
584 {
585 { 0, 0, 0, 0 },
586 { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
587 & ifmt_mva, { 0x13400000 }
588 },
589/* lbu $r1,$gp16 */
590 {
591 { 0, 0, 0, 0 },
592 { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
593 & ifmt_mva, { 0x43400000 }
594 },
595/* lh $r1,$gp16 */
596 {
597 { 0, 0, 0, 0 },
598 { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
599 & ifmt_mva, { 0x1f400000 }
600 },
601/* lhu $r1,$gp16 */
602 {
603 { 0, 0, 0, 0 },
604 { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
605 & ifmt_mva, { 0x2f400000 }
606 },
607/* lw $r1,$gp16 */
608 {
609 { 0, 0, 0, 0 },
610 { { MNEM, ' ', OP (R1), ',', OP (GP16), 0 } },
611 & ifmt_mva, { 0x2b400000 }
612 },
613/* sb $gp16,$r1 */
614 {
615 { 0, 0, 0, 0 },
616 { { MNEM, ' ', OP (GP16), ',', OP (R1), 0 } },
617 & ifmt_mva, { 0x33400000 }
618 },
619/* sh $gp16,$r1 */
620 {
621 { 0, 0, 0, 0 },
622 { { MNEM, ' ', OP (GP16), ',', OP (R1), 0 } },
623 & ifmt_mva, { 0xf400000 }
624 },
625/* sw $gp16,$r1 */
626 {
627 { 0, 0, 0, 0 },
628 { { MNEM, ' ', OP (GP16), ',', OP (R1), 0 } },
629 & ifmt_mva, { 0x5b400000 }
630 },
631/* lw $r1,(gp+$got16) */
632 {
633 { 0, 0, 0, 0 },
634 { { MNEM, ' ', OP (R1), ',', '(', 'g', 'p', '+', OP (GOT16), ')', 0 } },
635 & ifmt_lwgotrel, { 0x2b400000 }
636 },
637/* orhi $r1,$r0,$gotoffhi16 */
638 {
639 { 0, 0, 0, 0 },
640 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (GOTOFFHI16), 0 } },
641 & ifmt_orhigotoffi, { 0x78000000 }
642 },
643/* addi $r1,$r0,$gotofflo16 */
644 {
645 { 0, 0, 0, 0 },
646 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (GOTOFFLO16), 0 } },
647 & ifmt_addgotoff, { 0x34000000 }
648 },
649/* sw ($r0+$gotofflo16),$r1 */
650 {
651 { 0, 0, 0, 0 },
652 { { MNEM, ' ', '(', OP (R0), '+', OP (GOTOFFLO16), ')', ',', OP (R1), 0 } },
653 & ifmt_addgotoff, { 0x58000000 }
654 },
655/* lw $r1,($r0+$gotofflo16) */
656 {
657 { 0, 0, 0, 0 },
658 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (GOTOFFLO16), ')', 0 } },
659 & ifmt_addgotoff, { 0x28000000 }
660 },
661/* sh ($r0+$gotofflo16),$r1 */
662 {
663 { 0, 0, 0, 0 },
664 { { MNEM, ' ', '(', OP (R0), '+', OP (GOTOFFLO16), ')', ',', OP (R1), 0 } },
665 & ifmt_addgotoff, { 0xc000000 }
666 },
667/* lh $r1,($r0+$gotofflo16) */
668 {
669 { 0, 0, 0, 0 },
670 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (GOTOFFLO16), ')', 0 } },
671 & ifmt_addgotoff, { 0x1c000000 }
672 },
673/* lhu $r1,($r0+$gotofflo16) */
674 {
675 { 0, 0, 0, 0 },
676 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (GOTOFFLO16), ')', 0 } },
677 & ifmt_addgotoff, { 0x2c000000 }
678 },
679/* sb ($r0+$gotofflo16),$r1 */
680 {
681 { 0, 0, 0, 0 },
682 { { MNEM, ' ', '(', OP (R0), '+', OP (GOTOFFLO16), ')', ',', OP (R1), 0 } },
683 & ifmt_addgotoff, { 0x30000000 }
684 },
685/* lb $r1,($r0+$gotofflo16) */
686 {
687 { 0, 0, 0, 0 },
688 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (GOTOFFLO16), ')', 0 } },
689 & ifmt_addgotoff, { 0x10000000 }
690 },
691/* lbu $r1,($r0+$gotofflo16) */
692 {
693 { 0, 0, 0, 0 },
694 { { MNEM, ' ', OP (R1), ',', '(', OP (R0), '+', OP (GOTOFFLO16), ')', 0 } },
695 & ifmt_addgotoff, { 0x40000000 }
696 },
697};
698
699#undef A
700#undef OPERAND
701#undef MNEM
702#undef OP
703
704/* Formats for ALIAS macro-insns. */
705
84e94c90 706#define F(f) & lm32_cgen_ifld_table[LM32_##f]
84e94c90
NC		 707#undef F
708
709/* Each non-simple macro entry points to an array of expansion possibilities. */
710
84e94c90 711#define A(a) (1 << CGEN_INSN_##a)
84e94c90 712#define OPERAND(op) LM32_OPERAND_##op
84e94c90
NC		 713#define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
714#define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
715
716/* The macro instruction table. */
717
718static const CGEN_IBASE lm32_cgen_macro_insn_table[] =
719{
720};
721
722/* The macro instruction opcode table. */
723
724static const CGEN_OPCODE lm32_cgen_macro_insn_opcode_table[] =
725{
726};
727
728#undef A
729#undef OPERAND
730#undef MNEM
731#undef OP
732
733#ifndef CGEN_ASM_HASH_P
734#define CGEN_ASM_HASH_P(insn) 1
735#endif
736
737#ifndef CGEN_DIS_HASH_P
738#define CGEN_DIS_HASH_P(insn) 1
739#endif
740
741/* Return non-zero if INSN is to be added to the hash table.
742 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
743
744static int
745asm_hash_insn_p (insn)
746 const CGEN_INSN *insn ATTRIBUTE_UNUSED;
747{
748 return CGEN_ASM_HASH_P (insn);
749}
750
751static int
752dis_hash_insn_p (insn)
753 const CGEN_INSN *insn;
754{
755 /* If building the hash table and the NO-DIS attribute is present,
756 ignore. */
757 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_NO_DIS))
758 return 0;
759 return CGEN_DIS_HASH_P (insn);
760}
761
762#ifndef CGEN_ASM_HASH
763#define CGEN_ASM_HASH_SIZE 127
764#ifdef CGEN_MNEMONIC_OPERANDS
765#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
766#else
767#define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
768#endif
769#endif
770
771/* It doesn't make much sense to provide a default here,
772 but while this is under development we do.
773 BUFFER is a pointer to the bytes of the insn, target order.
774 VALUE is the first base_insn_bitsize bits as an int in host order. */
775
776#ifndef CGEN_DIS_HASH
777#define CGEN_DIS_HASH_SIZE 256
778#define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
779#endif
780
781/* The result is the hash value of the insn.
782 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
783
784static unsigned int
785asm_hash_insn (mnem)
786 const char * mnem;
787{
788 return CGEN_ASM_HASH (mnem);
789}
790
791/* BUF is a pointer to the bytes of the insn, target order.
792 VALUE is the first base_insn_bitsize bits as an int in host order. */
793
794static unsigned int
795dis_hash_insn (buf, value)
796 const char * buf ATTRIBUTE_UNUSED;
797 CGEN_INSN_INT value ATTRIBUTE_UNUSED;
798{
799 return CGEN_DIS_HASH (buf, value);
800}
801
802/* Set the recorded length of the insn in the CGEN_FIELDS struct. */
803
804static void
805set_fields_bitsize (CGEN_FIELDS *fields, int size)
806{
807 CGEN_FIELDS_BITSIZE (fields) = size;
808}
809
810/* Function to call before using the operand instance table.
811 This plugs the opcode entries and macro instructions into the cpu table. */
812
813void
814lm32_cgen_init_opcode_table (CGEN_CPU_DESC cd)
815{
816 int i;
817 int num_macros = (sizeof (lm32_cgen_macro_insn_table) /
818 sizeof (lm32_cgen_macro_insn_table[0]));
819 const CGEN_IBASE *ib = & lm32_cgen_macro_insn_table[0];
820 const CGEN_OPCODE *oc = & lm32_cgen_macro_insn_opcode_table[0];
821 CGEN_INSN *insns = xmalloc (num_macros * sizeof (CGEN_INSN));
822
137f2437
NC		 823 /* This test has been added to avoid a warning generated
824 if memset is called with a third argument of value zero. */
825 if (num_macros >= 1)
826 memset (insns, 0, num_macros * sizeof (CGEN_INSN));
84e94c90
NC		 827 for (i = 0; i < num_macros; ++i)
828 {
829 insns[i].base = &ib[i];
830 insns[i].opcode = &oc[i];
831 lm32_cgen_build_insn_regex (& insns[i]);
832 }
833 cd->macro_insn_table.init_entries = insns;
834 cd->macro_insn_table.entry_size = sizeof (CGEN_IBASE);
835 cd->macro_insn_table.num_init_entries = num_macros;
836
837 oc = & lm32_cgen_insn_opcode_table[0];
838 insns = (CGEN_INSN *) cd->insn_table.init_entries;
839 for (i = 0; i < MAX_INSNS; ++i)
840 {
841 insns[i].opcode = &oc[i];
842 lm32_cgen_build_insn_regex (& insns[i]);
843 }
844
845 cd->sizeof_fields = sizeof (CGEN_FIELDS);
846 cd->set_fields_bitsize = set_fields_bitsize;
847
848 cd->asm_hash_p = asm_hash_insn_p;
849 cd->asm_hash = asm_hash_insn;
850 cd->asm_hash_size = CGEN_ASM_HASH_SIZE;
851
852 cd->dis_hash_p = dis_hash_insn_p;
853 cd->dis_hash = dis_hash_insn;
854 cd->dis_hash_size = CGEN_DIS_HASH_SIZE;
855}
GDB Binutils - Deliverables
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