Kaveh Ghazi's printf format attribute checking patch.
[deliverable/binutils-gdb.git] / opcodes / m32r-asm.c
CommitLineData
252b5132
RH
1/* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
47b0e7ad
NC
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
252b5132 6
47b0e7ad
NC
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2005
8 Free Software Foundation, Inc.
252b5132 9
47b0e7ad 10 This file is part of the GNU Binutils and GDB, the GNU debugger.
252b5132 11
47b0e7ad
NC
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
15 any later version.
252b5132 16
47b0e7ad
NC
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
252b5132 21
47b0e7ad
NC
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
252b5132
RH
25
26/* ??? Eventually more and more of this stuff can go to cpu-independent files.
27 Keep that in mind. */
28
29#include "sysdep.h"
252b5132
RH
30#include <stdio.h>
31#include "ansidecl.h"
32#include "bfd.h"
33#include "symcat.h"
34#include "m32r-desc.h"
35#include "m32r-opc.h"
36#include "opintl.h"
fc7bc883 37#include "xregex.h"
fc05c67f 38#include "libiberty.h"
37111cc7 39#include "safe-ctype.h"
252b5132 40
37111cc7 41#undef min
252b5132 42#define min(a,b) ((a) < (b) ? (a) : (b))
37111cc7 43#undef max
252b5132
RH
44#define max(a,b) ((a) > (b) ? (a) : (b))
45
0e2ee3ca 46static const char * parse_insn_normal
ffead7ae 47 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
252b5132 48\f
37111cc7 49/* -- assembler routines inserted here. */
252b5132
RH
50
51/* -- asm.c */
47b0e7ad 52static const char * MISSING_CLOSING_PARENTHESIS = N_("missing `)'");
252b5132
RH
53
54/* Handle '#' prefixes (i.e. skip over them). */
55
56static const char *
47b0e7ad
NC
57parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
58 const char **strp,
59 int opindex ATTRIBUTE_UNUSED,
60 long *valuep ATTRIBUTE_UNUSED)
252b5132
RH
61{
62 if (**strp == '#')
63 ++*strp;
64 return NULL;
65}
66
67/* Handle shigh(), high(). */
68
69static const char *
47b0e7ad
NC
70parse_hi16 (CGEN_CPU_DESC cd,
71 const char **strp,
72 int opindex,
73 unsigned long *valuep)
252b5132
RH
74{
75 const char *errmsg;
76 enum cgen_parse_operand_result result_type;
77 bfd_vma value;
78
79 if (**strp == '#')
80 ++*strp;
81
82 if (strncasecmp (*strp, "high(", 5) == 0)
83 {
84 *strp += 5;
85 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO,
47b0e7ad 86 & result_type, & value);
252b5132 87 if (**strp != ')')
47b0e7ad 88 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
89 ++*strp;
90 if (errmsg == NULL
91 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
92 value >>= 16;
93 *valuep = value;
94 return errmsg;
95 }
96 else if (strncasecmp (*strp, "shigh(", 6) == 0)
97 {
98 *strp += 6;
99 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO,
47b0e7ad 100 & result_type, & value);
252b5132 101 if (**strp != ')')
47b0e7ad 102 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
103 ++*strp;
104 if (errmsg == NULL
105 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
f4453dfa
NC
106 {
107 value = value + (value & 0x8000 ? 0x10000 : 0);
108 value >>= 16;
109 }
252b5132
RH
110 *valuep = value;
111 return errmsg;
112 }
113
114 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
115}
116
117/* Handle low() in a signed context. Also handle sda().
118 The signedness of the value doesn't matter to low(), but this also
119 handles the case where low() isn't present. */
120
121static const char *
d125c27b
AM
122parse_slo16 (CGEN_CPU_DESC cd,
123 const char ** strp,
124 int opindex,
125 long * valuep)
252b5132
RH
126{
127 const char *errmsg;
128 enum cgen_parse_operand_result result_type;
129 bfd_vma value;
130
131 if (**strp == '#')
132 ++*strp;
133
134 if (strncasecmp (*strp, "low(", 4) == 0)
135 {
136 *strp += 4;
137 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
47b0e7ad 138 & result_type, & value);
252b5132 139 if (**strp != ')')
47b0e7ad 140 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
141 ++*strp;
142 if (errmsg == NULL
143 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
88845958
NC
144 {
145 value &= 0xffff;
146 if (value & 0x8000)
147 value |= 0xffff0000;
148 }
252b5132
RH
149 *valuep = value;
150 return errmsg;
151 }
152
153 if (strncasecmp (*strp, "sda(", 4) == 0)
154 {
155 *strp += 4;
156 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16,
47b0e7ad 157 NULL, & value);
252b5132 158 if (**strp != ')')
47b0e7ad 159 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
160 ++*strp;
161 *valuep = value;
162 return errmsg;
163 }
164
165 return cgen_parse_signed_integer (cd, strp, opindex, valuep);
166}
167
168/* Handle low() in an unsigned context.
169 The signedness of the value doesn't matter to low(), but this also
170 handles the case where low() isn't present. */
171
172static const char *
47b0e7ad
NC
173parse_ulo16 (CGEN_CPU_DESC cd,
174 const char **strp,
175 int opindex,
176 unsigned long *valuep)
252b5132
RH
177{
178 const char *errmsg;
179 enum cgen_parse_operand_result result_type;
180 bfd_vma value;
181
182 if (**strp == '#')
183 ++*strp;
184
185 if (strncasecmp (*strp, "low(", 4) == 0)
186 {
187 *strp += 4;
188 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
47b0e7ad 189 & result_type, & value);
252b5132 190 if (**strp != ')')
47b0e7ad 191 return MISSING_CLOSING_PARENTHESIS;
252b5132
RH
192 ++*strp;
193 if (errmsg == NULL
194 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
195 value &= 0xffff;
196 *valuep = value;
197 return errmsg;
198 }
199
200 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
201}
202
203/* -- */
204
0e2ee3ca 205const char * m32r_cgen_parse_operand
47b0e7ad 206 (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
0e2ee3ca 207
252b5132
RH
208/* Main entry point for operand parsing.
209
210 This function is basically just a big switch statement. Earlier versions
211 used tables to look up the function to use, but
212 - if the table contains both assembler and disassembler functions then
213 the disassembler contains much of the assembler and vice-versa,
214 - there's a lot of inlining possibilities as things grow,
215 - using a switch statement avoids the function call overhead.
216
217 This function could be moved into `parse_insn_normal', but keeping it
218 separate makes clear the interface between `parse_insn_normal' and each of
9a2e995d 219 the handlers. */
252b5132
RH
220
221const char *
47b0e7ad
NC
222m32r_cgen_parse_operand (CGEN_CPU_DESC cd,
223 int opindex,
224 const char ** strp,
225 CGEN_FIELDS * fields)
252b5132 226{
eb1b03df
DE
227 const char * errmsg = NULL;
228 /* Used by scalar operands that still need to be parsed. */
0e2ee3ca 229 long junk ATTRIBUTE_UNUSED;
252b5132
RH
230
231 switch (opindex)
232 {
1fa60b5d
DE
233 case M32R_OPERAND_ACC :
234 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_acc);
235 break;
236 case M32R_OPERAND_ACCD :
237 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accd);
238 break;
239 case M32R_OPERAND_ACCS :
240 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accs);
241 break;
252b5132
RH
242 case M32R_OPERAND_DCR :
243 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r1);
244 break;
245 case M32R_OPERAND_DISP16 :
246 {
9494d739 247 bfd_vma value = 0;
252b5132
RH
248 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP16, 0, NULL, & value);
249 fields->f_disp16 = value;
250 }
251 break;
252 case M32R_OPERAND_DISP24 :
253 {
9494d739 254 bfd_vma value = 0;
252b5132
RH
255 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP24, 0, NULL, & value);
256 fields->f_disp24 = value;
257 }
258 break;
259 case M32R_OPERAND_DISP8 :
260 {
9494d739 261 bfd_vma value = 0;
252b5132
RH
262 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP8, 0, NULL, & value);
263 fields->f_disp8 = value;
264 }
265 break;
266 case M32R_OPERAND_DR :
267 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
268 break;
269 case M32R_OPERAND_HASH :
33b71eeb 270 errmsg = parse_hash (cd, strp, M32R_OPERAND_HASH, (long *) (& junk));
252b5132
RH
271 break;
272 case M32R_OPERAND_HI16 :
33b71eeb 273 errmsg = parse_hi16 (cd, strp, M32R_OPERAND_HI16, (unsigned long *) (& fields->f_hi16));
252b5132 274 break;
1fa60b5d 275 case M32R_OPERAND_IMM1 :
33b71eeb 276 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_IMM1, (unsigned long *) (& fields->f_imm1));
1fa60b5d 277 break;
252b5132
RH
278 case M32R_OPERAND_SCR :
279 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r2);
280 break;
281 case M32R_OPERAND_SIMM16 :
33b71eeb 282 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, (long *) (& fields->f_simm16));
252b5132
RH
283 break;
284 case M32R_OPERAND_SIMM8 :
33b71eeb 285 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, (long *) (& fields->f_simm8));
252b5132
RH
286 break;
287 case M32R_OPERAND_SLO16 :
33b71eeb 288 errmsg = parse_slo16 (cd, strp, M32R_OPERAND_SLO16, (long *) (& fields->f_simm16));
252b5132
RH
289 break;
290 case M32R_OPERAND_SR :
291 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
292 break;
293 case M32R_OPERAND_SRC1 :
294 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
295 break;
296 case M32R_OPERAND_SRC2 :
297 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
298 break;
299 case M32R_OPERAND_UIMM16 :
33b71eeb 300 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM16, (unsigned long *) (& fields->f_uimm16));
252b5132
RH
301 break;
302 case M32R_OPERAND_UIMM24 :
303 {
9494d739 304 bfd_vma value = 0;
252b5132
RH
305 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_UIMM24, 0, NULL, & value);
306 fields->f_uimm24 = value;
307 }
308 break;
88845958 309 case M32R_OPERAND_UIMM3 :
33b71eeb 310 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM3, (unsigned long *) (& fields->f_uimm3));
88845958 311 break;
252b5132 312 case M32R_OPERAND_UIMM4 :
33b71eeb 313 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, (unsigned long *) (& fields->f_uimm4));
252b5132
RH
314 break;
315 case M32R_OPERAND_UIMM5 :
33b71eeb 316 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, (unsigned long *) (& fields->f_uimm5));
252b5132 317 break;
88845958 318 case M32R_OPERAND_UIMM8 :
33b71eeb 319 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM8, (unsigned long *) (& fields->f_uimm8));
88845958 320 break;
252b5132 321 case M32R_OPERAND_ULO16 :
33b71eeb 322 errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, (unsigned long *) (& fields->f_uimm16));
252b5132
RH
323 break;
324
325 default :
326 /* xgettext:c-format */
327 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
328 abort ();
329 }
330
331 return errmsg;
332}
333
334cgen_parse_fn * const m32r_cgen_parse_handlers[] =
335{
336 parse_insn_normal,
337};
338
339void
47b0e7ad 340m32r_cgen_init_asm (CGEN_CPU_DESC cd)
252b5132
RH
341{
342 m32r_cgen_init_opcode_table (cd);
343 m32r_cgen_init_ibld_table (cd);
344 cd->parse_handlers = & m32r_cgen_parse_handlers[0];
345 cd->parse_operand = m32r_cgen_parse_operand;
346}
347
fc7bc883
RH
348\f
349
37111cc7 350/* Regex construction routine.
fc7bc883 351
37111cc7
NC
352 This translates an opcode syntax string into a regex string,
353 by replacing any non-character syntax element (such as an
354 opcode) with the pattern '.*'
fc7bc883 355
37111cc7
NC
356 It then compiles the regex and stores it in the opcode, for
357 later use by m32r_cgen_assemble_insn
fc7bc883 358
37111cc7 359 Returns NULL for success, an error message for failure. */
fc7bc883
RH
360
361char *
ffead7ae 362m32r_cgen_build_insn_regex (CGEN_INSN *insn)
fc7bc883 363{
fc05c67f 364 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
fc7bc883 365 const char *mnem = CGEN_INSN_MNEMONIC (insn);
fc7bc883
RH
366 char rxbuf[CGEN_MAX_RX_ELEMENTS];
367 char *rx = rxbuf;
368 const CGEN_SYNTAX_CHAR_TYPE *syn;
369 int reg_err;
370
371 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
372
f3a55c17
NC
373 /* Mnemonics come first in the syntax string. */
374 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
375 return _("missing mnemonic in syntax string");
fc7bc883
RH
376 ++syn;
377
f3a55c17
NC
378 /* Generate a case sensitive regular expression that emulates case
379 insensitive matching in the "C" locale. We cannot generate a case
380 insensitive regular expression because in Turkish locales, 'i' and 'I'
381 are not equal modulo case conversion. */
fc7bc883 382
f3a55c17
NC
383 /* Copy the literal mnemonic out of the insn. */
384 for (; *mnem; mnem++)
385 {
386 char c = *mnem;
387
388 if (ISALPHA (c))
389 {
390 *rx++ = '[';
391 *rx++ = TOLOWER (c);
392 *rx++ = TOUPPER (c);
393 *rx++ = ']';
394 }
395 else
396 *rx++ = c;
397 }
398
399 /* Copy any remaining literals from the syntax string into the rx. */
400 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
fc7bc883
RH
401 {
402 if (CGEN_SYNTAX_CHAR_P (* syn))
403 {
f3a55c17
NC
404 char c = CGEN_SYNTAX_CHAR (* syn);
405
406 switch (c)
407 {
408 /* Escape any regex metacharacters in the syntax. */
409 case '.': case '[': case '\\':
410 case '*': case '^': case '$':
fc7bc883
RH
411
412#ifdef CGEN_ESCAPE_EXTENDED_REGEX
f3a55c17
NC
413 case '?': case '{': case '}':
414 case '(': case ')': case '*':
415 case '|': case '+': case ']':
fc7bc883 416#endif
f3a55c17
NC
417 *rx++ = '\\';
418 *rx++ = c;
419 break;
420
421 default:
422 if (ISALPHA (c))
423 {
424 *rx++ = '[';
425 *rx++ = TOLOWER (c);
426 *rx++ = TOUPPER (c);
427 *rx++ = ']';
428 }
429 else
430 *rx++ = c;
431 break;
432 }
fc7bc883
RH
433 }
434 else
435 {
f3a55c17
NC
436 /* Replace non-syntax fields with globs. */
437 *rx++ = '.';
438 *rx++ = '*';
fc7bc883
RH
439 }
440 }
441
f3a55c17 442 /* Trailing whitespace ok. */
fc7bc883
RH
443 * rx++ = '[';
444 * rx++ = ' ';
445 * rx++ = '\t';
446 * rx++ = ']';
447 * rx++ = '*';
448
f3a55c17 449 /* But anchor it after that. */
fc7bc883
RH
450 * rx++ = '$';
451 * rx = '\0';
452
453 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
f3a55c17 454 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
fc7bc883
RH
455
456 if (reg_err == 0)
457 return NULL;
458 else
459 {
460 static char msg[80];
f3a55c17 461
fc7bc883
RH
462 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
463 regfree ((regex_t *) CGEN_INSN_RX (insn));
464 free (CGEN_INSN_RX (insn));
465 (CGEN_INSN_RX (insn)) = NULL;
37111cc7 466 return msg;
fc7bc883
RH
467 }
468}
469
252b5132
RH
470\f
471/* Default insn parser.
472
473 The syntax string is scanned and operands are parsed and stored in FIELDS.
474 Relocs are queued as we go via other callbacks.
475
476 ??? Note that this is currently an all-or-nothing parser. If we fail to
477 parse the instruction, we return 0 and the caller will start over from
478 the beginning. Backtracking will be necessary in parsing subexpressions,
479 but that can be handled there. Not handling backtracking here may get
480 expensive in the case of the m68k. Deal with later.
481
f3a55c17 482 Returns NULL for success, an error message for failure. */
252b5132
RH
483
484static const char *
ffead7ae
MM
485parse_insn_normal (CGEN_CPU_DESC cd,
486 const CGEN_INSN *insn,
487 const char **strp,
488 CGEN_FIELDS *fields)
252b5132
RH
489{
490 /* ??? Runtime added insns not handled yet. */
491 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
492 const char *str = *strp;
493 const char *errmsg;
494 const char *p;
b3466c39 495 const CGEN_SYNTAX_CHAR_TYPE * syn;
252b5132
RH
496#ifdef CGEN_MNEMONIC_OPERANDS
497 /* FIXME: wip */
498 int past_opcode_p;
499#endif
500
501 /* For now we assume the mnemonic is first (there are no leading operands).
502 We can parse it without needing to set up operand parsing.
503 GAS's input scrubber will ensure mnemonics are lowercase, but we may
504 not be called from GAS. */
505 p = CGEN_INSN_MNEMONIC (insn);
37111cc7 506 while (*p && TOLOWER (*p) == TOLOWER (*str))
252b5132 507 ++p, ++str;
1fa60b5d
DE
508
509 if (* p)
510 return _("unrecognized instruction");
511
512#ifndef CGEN_MNEMONIC_OPERANDS
37111cc7 513 if (* str && ! ISSPACE (* str))
252b5132 514 return _("unrecognized instruction");
1fa60b5d 515#endif
252b5132
RH
516
517 CGEN_INIT_PARSE (cd);
518 cgen_init_parse_operand (cd);
519#ifdef CGEN_MNEMONIC_OPERANDS
520 past_opcode_p = 0;
521#endif
522
523 /* We don't check for (*str != '\0') here because we want to parse
524 any trailing fake arguments in the syntax string. */
525 syn = CGEN_SYNTAX_STRING (syntax);
526
527 /* Mnemonics come first for now, ensure valid string. */
528 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
529 abort ();
530
531 ++syn;
532
533 while (* syn != 0)
534 {
535 /* Non operand chars must match exactly. */
536 if (CGEN_SYNTAX_CHAR_P (* syn))
537 {
1fa60b5d
DE
538 /* FIXME: While we allow for non-GAS callers above, we assume the
539 first char after the mnemonic part is a space. */
540 /* FIXME: We also take inappropriate advantage of the fact that
541 GAS's input scrubber will remove extraneous blanks. */
37111cc7 542 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
252b5132
RH
543 {
544#ifdef CGEN_MNEMONIC_OPERANDS
b3466c39 545 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
252b5132
RH
546 past_opcode_p = 1;
547#endif
548 ++ syn;
549 ++ str;
550 }
b3466c39 551 else if (*str)
252b5132
RH
552 {
553 /* Syntax char didn't match. Can't be this insn. */
6bb95a0f 554 static char msg [80];
f3a55c17 555
6bb95a0f
DB
556 /* xgettext:c-format */
557 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
b3466c39
DB
558 CGEN_SYNTAX_CHAR(*syn), *str);
559 return msg;
560 }
561 else
562 {
563 /* Ran out of input. */
564 static char msg [80];
f3a55c17 565
b3466c39
DB
566 /* xgettext:c-format */
567 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
568 CGEN_SYNTAX_CHAR(*syn));
6bb95a0f 569 return msg;
252b5132
RH
570 }
571 continue;
572 }
573
574 /* We have an operand of some sort. */
a978a3e5 575 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
252b5132
RH
576 &str, fields);
577 if (errmsg)
578 return errmsg;
579
580 /* Done with this operand, continue with next one. */
581 ++ syn;
582 }
583
584 /* If we're at the end of the syntax string, we're done. */
b3466c39 585 if (* syn == 0)
252b5132
RH
586 {
587 /* FIXME: For the moment we assume a valid `str' can only contain
588 blanks now. IE: We needn't try again with a longer version of
589 the insn and it is assumed that longer versions of insns appear
590 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
37111cc7 591 while (ISSPACE (* str))
252b5132
RH
592 ++ str;
593
594 if (* str != '\0')
595 return _("junk at end of line"); /* FIXME: would like to include `str' */
596
597 return NULL;
598 }
599
600 /* We couldn't parse it. */
601 return _("unrecognized instruction");
602}
603\f
604/* Main entry point.
605 This routine is called for each instruction to be assembled.
606 STR points to the insn to be assembled.
607 We assume all necessary tables have been initialized.
608 The assembled instruction, less any fixups, is stored in BUF.
609 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
610 still needs to be converted to target byte order, otherwise BUF is an array
611 of bytes in target byte order.
612 The result is a pointer to the insn's entry in the opcode table,
613 or NULL if an error occured (an error message will have already been
614 printed).
615
616 Note that when processing (non-alias) macro-insns,
617 this function recurses.
618
619 ??? It's possible to make this cpu-independent.
620 One would have to deal with a few minor things.
621 At this point in time doing so would be more of a curiosity than useful
622 [for example this file isn't _that_ big], but keeping the possibility in
623 mind helps keep the design clean. */
624
625const CGEN_INSN *
ffead7ae
MM
626m32r_cgen_assemble_insn (CGEN_CPU_DESC cd,
627 const char *str,
628 CGEN_FIELDS *fields,
629 CGEN_INSN_BYTES_PTR buf,
630 char **errmsg)
252b5132
RH
631{
632 const char *start;
633 CGEN_INSN_LIST *ilist;
b3466c39
DB
634 const char *parse_errmsg = NULL;
635 const char *insert_errmsg = NULL;
fc7bc883 636 int recognized_mnemonic = 0;
252b5132
RH
637
638 /* Skip leading white space. */
37111cc7 639 while (ISSPACE (* str))
252b5132
RH
640 ++ str;
641
642 /* The instructions are stored in hashed lists.
643 Get the first in the list. */
644 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
645
646 /* Keep looking until we find a match. */
252b5132
RH
647 start = str;
648 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
649 {
650 const CGEN_INSN *insn = ilist->insn;
fc7bc883 651 recognized_mnemonic = 1;
252b5132 652
cfcdbe97 653#ifdef CGEN_VALIDATE_INSN_SUPPORTED
f3a55c17
NC
654 /* Not usually needed as unsupported opcodes
655 shouldn't be in the hash lists. */
252b5132
RH
656 /* Is this insn supported by the selected cpu? */
657 if (! m32r_cgen_insn_supported (cd, insn))
658 continue;
659#endif
b11dcf4e 660 /* If the RELAXED attribute is set, this is an insn that shouldn't be
252b5132
RH
661 chosen immediately. Instead, it is used during assembler/linker
662 relaxation if possible. */
b11dcf4e 663 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
252b5132
RH
664 continue;
665
666 str = start;
667
f3a55c17 668 /* Skip this insn if str doesn't look right lexically. */
fc7bc883
RH
669 if (CGEN_INSN_RX (insn) != NULL &&
670 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
671 continue;
672
252b5132
RH
673 /* Allow parse/insert handlers to obtain length of insn. */
674 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
675
b3466c39
DB
676 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
677 if (parse_errmsg != NULL)
6bb95a0f 678 continue;
252b5132 679
f3a55c17 680 /* ??? 0 is passed for `pc'. */
b3466c39
DB
681 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
682 (bfd_vma) 0);
683 if (insert_errmsg != NULL)
6bb95a0f
DB
684 continue;
685
686 /* It is up to the caller to actually output the insn and any
687 queued relocs. */
688 return insn;
252b5132
RH
689 }
690
252b5132 691 {
cfcdbe97 692 static char errbuf[150];
52646233 693#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
b3466c39 694 const char *tmp_errmsg;
cfcdbe97 695
b3466c39 696 /* If requesting verbose error messages, use insert_errmsg.
f3a55c17 697 Failing that, use parse_errmsg. */
b3466c39
DB
698 tmp_errmsg = (insert_errmsg ? insert_errmsg :
699 parse_errmsg ? parse_errmsg :
f3a55c17
NC
700 recognized_mnemonic ?
701 _("unrecognized form of instruction") :
b3466c39
DB
702 _("unrecognized instruction"));
703
cfcdbe97
AH
704 if (strlen (start) > 50)
705 /* xgettext:c-format */
706 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
707 else
708 /* xgettext:c-format */
709 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
710#else
252b5132
RH
711 if (strlen (start) > 50)
712 /* xgettext:c-format */
713 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
714 else
715 /* xgettext:c-format */
716 sprintf (errbuf, _("bad instruction `%.50s'"), start);
cfcdbe97 717#endif
252b5132
RH
718
719 *errmsg = errbuf;
720 return NULL;
721 }
722}
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