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Varobj support for Ada.
[deliverable/binutils-gdb.git] / opcodes / m32r-opinst.c
CommitLineData
252b5132
RH		 1/* Semantic operand instances for m32r.
2
3THIS FILE IS MACHINE GENERATED WITH CGEN.
4
05994f45 5Copyright 1996-2010 Free Software Foundation, Inc.
252b5132
RH		 6
7This file is part of the GNU Binutils and/or GDB, the GNU debugger.
8
9b201bb5
NC		 9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
12 any later version.
252b5132 13
9b201bb5
NC		 14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
252b5132 18
9b201bb5
NC		 19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
252b5132
RH		 22
23*/
24
25#include "sysdep.h"
26#include "ansidecl.h"
27#include "bfd.h"
28#include "symcat.h"
29#include "m32r-desc.h"
30#include "m32r-opc.h"
31
32/* Operand references. */
33
b3466c39 34#define OP_ENT(op) M32R_OPERAND_##op
0e2ee3ca
NC		 35#define INPUT CGEN_OPINST_INPUT
36#define OUTPUT CGEN_OPINST_OUTPUT
37#define END CGEN_OPINST_END
252b5132 38#define COND_REF CGEN_OPINST_COND_REF
252b5132 39
bf143b25 40static const CGEN_OPINST sfmt_empty_ops[] ATTRIBUTE_UNUSED = {
88845958 41 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 42};
43
bf143b25 44static const CGEN_OPINST sfmt_add_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 45 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
46 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
47 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 48 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 49};
50
bf143b25 51static const CGEN_OPINST sfmt_add3_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 52 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
53 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
54 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 55 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 56};
57
bf143b25 58static const CGEN_OPINST sfmt_and3_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 59 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
60 { INPUT, "uimm16", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM16), 0, 0 },
61 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 62 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 63};
64
bf143b25 65static const CGEN_OPINST sfmt_or3_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 66 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
67 { INPUT, "ulo16", HW_H_ULO16, CGEN_MODE_UINT, OP_ENT (ULO16), 0, 0 },
68 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 69 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 70};
71
bf143b25 72static const CGEN_OPINST sfmt_addi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 73 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
74 { INPUT, "simm8", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM8), 0, 0 },
75 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 76 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 77};
78
bf143b25 79static const CGEN_OPINST sfmt_addv_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 80 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
81 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
82 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
83 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 84 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 85};
86
bf143b25 87static const CGEN_OPINST sfmt_addv3_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 88 { INPUT, "simm16", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
89 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
90 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
91 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 92 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 93};
94
bf143b25 95static const CGEN_OPINST sfmt_addx_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 96 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
97 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
98 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
99 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
100 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 101 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 102};
103
bf143b25 104static const CGEN_OPINST sfmt_bc8_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 105 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
106 { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, COND_REF },
107 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 108 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 109};
110
bf143b25 111static const CGEN_OPINST sfmt_bc24_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 112 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
113 { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, COND_REF },
114 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 115 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 116};
117
bf143b25 118static const CGEN_OPINST sfmt_beq_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 119 { INPUT, "disp16", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP16), 0, COND_REF },
120 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
121 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
122 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 123 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 124};
125
bf143b25 126static const CGEN_OPINST sfmt_beqz_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 127 { INPUT, "disp16", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP16), 0, COND_REF },
128 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
129 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 130 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 131};
132
bf143b25 133static const CGEN_OPINST sfmt_bl8_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 134 { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, 0 },
135 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
fc7bc883 136 { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, 0 },
252b5132 137 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 138 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 139};
140
bf143b25 141static const CGEN_OPINST sfmt_bl24_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 142 { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, 0 },
143 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
fc7bc883 144 { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, 0 },
252b5132 145 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 146 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 147};
148
bf143b25 149static const CGEN_OPINST sfmt_bcl8_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 150 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
151 { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, COND_REF },
152 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
fc7bc883 153 { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, COND_REF },
1fa60b5d 154 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 155 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 156};
157
bf143b25 158static const CGEN_OPINST sfmt_bcl24_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 159 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
160 { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, COND_REF },
161 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
fc7bc883 162 { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, COND_REF },
1fa60b5d 163 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 164 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 165};
166
bf143b25 167static const CGEN_OPINST sfmt_bra8_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 168 { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, 0 },
169 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 170 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 171};
172
bf143b25 173static const CGEN_OPINST sfmt_bra24_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 174 { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, 0 },
175 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 176 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 177};
178
bf143b25 179static const CGEN_OPINST sfmt_cmp_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 180 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
181 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
182 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
88845958 183 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 184};
185
bf143b25 186static const CGEN_OPINST sfmt_cmpi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 187 { INPUT, "simm16", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
188 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
189 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
88845958 190 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 191};
192
bf143b25 193static const CGEN_OPINST sfmt_cmpz_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 194 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
195 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
88845958 196 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 197};
198
bf143b25 199static const CGEN_OPINST sfmt_div_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 200 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, COND_REF },
201 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
202 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, COND_REF },
88845958 203 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 204};
205
bf143b25 206static const CGEN_OPINST sfmt_jc_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 207 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
208 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, COND_REF },
209 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 210 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 211};
212
bf143b25 213static const CGEN_OPINST sfmt_jl_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 214 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
215 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
fc7bc883 216 { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, 0 },
252b5132 217 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 218 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 219};
220
bf143b25 221static const CGEN_OPINST sfmt_jmp_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 222 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
223 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 224 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 225};
226
bf143b25 227static const CGEN_OPINST sfmt_ld_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 228 { INPUT, "h_memory_SI_sr", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
cedb97b6 229 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
252b5132 230 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 231 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 232};
233
bf143b25 234static const CGEN_OPINST sfmt_ld_d_ops[] ATTRIBUTE_UNUSED = {
cedb97b6 235 { INPUT, "h_memory_SI_add__SI_sr_slo16", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
fc7bc883
RH		 236 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
237 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
238 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 239 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
fc7bc883
RH		 240};
241
bf143b25 242static const CGEN_OPINST sfmt_ldb_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 243 { INPUT, "h_memory_QI_sr", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
cedb97b6 244 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
fc7bc883 245 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 246 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
fc7bc883
RH		 247};
248
bf143b25 249static const CGEN_OPINST sfmt_ldb_d_ops[] ATTRIBUTE_UNUSED = {
cedb97b6 250 { INPUT, "h_memory_QI_add__SI_sr_slo16", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
fc7bc883
RH		 251 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
252 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
253 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 254 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
fc7bc883
RH		 255};
256
bf143b25 257static const CGEN_OPINST sfmt_ldh_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 258 { INPUT, "h_memory_HI_sr", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 },
cedb97b6 259 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
fc7bc883 260 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 261 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
fc7bc883
RH		 262};
263
bf143b25 264static const CGEN_OPINST sfmt_ldh_d_ops[] ATTRIBUTE_UNUSED = {
cedb97b6 265 { INPUT, "h_memory_HI_add__SI_sr_slo16", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 },
252b5132
RH		 266 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
267 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
268 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 269 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 270};
271
bf143b25 272static const CGEN_OPINST sfmt_ld_plus_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 273 { INPUT, "h_memory_SI_sr", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
cedb97b6 274 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
252b5132
RH		 275 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
276 { OUTPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
88845958 277 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 278};
279
bf143b25 280static const CGEN_OPINST sfmt_ld24_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 281 { INPUT, "uimm24", HW_H_ADDR, CGEN_MODE_USI, OP_ENT (UIMM24), 0, 0 },
282 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 283 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 284};
285
bf143b25 286static const CGEN_OPINST sfmt_ldi8_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 287 { INPUT, "simm8", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM8), 0, 0 },
288 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 289 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 290};
291
bf143b25 292static const CGEN_OPINST sfmt_ldi16_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 293 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
294 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 295 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 296};
297
bf143b25 298static const CGEN_OPINST sfmt_lock_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 299 { INPUT, "h_memory_SI_sr", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
cedb97b6 300 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
252b5132 301 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
fc7bc883 302 { OUTPUT, "h_lock_BI", HW_H_LOCK, CGEN_MODE_BI, 0, 0, 0 },
88845958 303 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 304};
305
bf143b25 306static const CGEN_OPINST sfmt_machi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 307 { INPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
308 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
309 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
310 { OUTPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
88845958 311 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 312};
313
bf143b25 314static const CGEN_OPINST sfmt_machi_a_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 315 { INPUT, "acc", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACC), 0, 0 },
316 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
317 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
318 { OUTPUT, "acc", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACC), 0, 0 },
88845958 319 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 320};
321
bf143b25 322static const CGEN_OPINST sfmt_mulhi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 323 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
324 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
325 { OUTPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
88845958 326 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 327};
328
bf143b25 329static const CGEN_OPINST sfmt_mulhi_a_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 330 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
331 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
332 { OUTPUT, "acc", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACC), 0, 0 },
88845958 333 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 334};
335
bf143b25 336static const CGEN_OPINST sfmt_mv_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 337 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
338 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 339 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 340};
341
bf143b25 342static const CGEN_OPINST sfmt_mvfachi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 343 { INPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
344 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 345 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 346};
347
bf143b25 348static const CGEN_OPINST sfmt_mvfachi_a_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 349 { INPUT, "accs", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCS), 0, 0 },
350 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 351 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 352};
353
bf143b25 354static const CGEN_OPINST sfmt_mvfc_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 355 { INPUT, "scr", HW_H_CR, CGEN_MODE_USI, OP_ENT (SCR), 0, 0 },
356 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 357 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 358};
359
bf143b25 360static const CGEN_OPINST sfmt_mvtachi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 361 { INPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
362 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
363 { OUTPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
88845958 364 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 365};
366
bf143b25 367static const CGEN_OPINST sfmt_mvtachi_a_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 368 { INPUT, "accs", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCS), 0, 0 },
369 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
370 { OUTPUT, "accs", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCS), 0, 0 },
88845958 371 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 372};
373
bf143b25 374static const CGEN_OPINST sfmt_mvtc_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 375 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
376 { OUTPUT, "dcr", HW_H_CR, CGEN_MODE_USI, OP_ENT (DCR), 0, 0 },
88845958 377 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 378};
379
bf143b25 380static const CGEN_OPINST sfmt_nop_ops[] ATTRIBUTE_UNUSED = {
88845958 381 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 382};
383
bf143b25 384static const CGEN_OPINST sfmt_rac_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 385 { INPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
386 { OUTPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
88845958 387 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 388};
389
bf143b25 390static const CGEN_OPINST sfmt_rac_dsi_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d 391 { INPUT, "accs", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCS), 0, 0 },
cedb97b6 392 { INPUT, "imm1", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (IMM1), 0, 0 },
1fa60b5d 393 { OUTPUT, "accd", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCD), 0, 0 },
88845958 394 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 395};
396
bf143b25 397static const CGEN_OPINST sfmt_rte_ops[] ATTRIBUTE_UNUSED = {
fc7bc883
RH		 398 { INPUT, "h_bbpsw_UQI", HW_H_BBPSW, CGEN_MODE_UQI, 0, 0, 0 },
399 { INPUT, "h_bpsw_UQI", HW_H_BPSW, CGEN_MODE_UQI, 0, 0, 0 },
400 { INPUT, "h_cr_USI_14", HW_H_CR, CGEN_MODE_USI, 0, 14, 0 },
401 { INPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 },
402 { OUTPUT, "h_bpsw_UQI", HW_H_BPSW, CGEN_MODE_UQI, 0, 0, 0 },
403 { OUTPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 },
404 { OUTPUT, "h_psw_UQI", HW_H_PSW, CGEN_MODE_UQI, 0, 0, 0 },
252b5132 405 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 406 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 407};
408
bf143b25 409static const CGEN_OPINST sfmt_seth_ops[] ATTRIBUTE_UNUSED = {
cedb97b6 410 { INPUT, "hi16", HW_H_HI16, CGEN_MODE_UINT, OP_ENT (HI16), 0, 0 },
252b5132 411 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 412 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 413};
414
bf143b25 415static const CGEN_OPINST sfmt_sll3_ops[] ATTRIBUTE_UNUSED = {
cedb97b6 416 { INPUT, "simm16", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
252b5132
RH		 417 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
418 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 419 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 420};
421
bf143b25 422static const CGEN_OPINST sfmt_slli_ops[] ATTRIBUTE_UNUSED = {
252b5132 423 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
cedb97b6 424 { INPUT, "uimm5", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM5), 0, 0 },
252b5132 425 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 426 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 427};
428
bf143b25 429static const CGEN_OPINST sfmt_st_ops[] ATTRIBUTE_UNUSED = {
252b5132 430 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
cedb97b6 431 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 432 { OUTPUT, "h_memory_SI_src2", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
88845958 433 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 434};
435
bf143b25 436static const CGEN_OPINST sfmt_st_d_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 437 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
438 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
439 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
cedb97b6 440 { OUTPUT, "h_memory_SI_add__SI_src2_slo16", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
88845958 441 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 442};
443
bf143b25 444static const CGEN_OPINST sfmt_stb_ops[] ATTRIBUTE_UNUSED = {
cedb97b6
DE		 445 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
446 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 447 { OUTPUT, "h_memory_QI_src2", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
88845958 448 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 449};
450
bf143b25 451static const CGEN_OPINST sfmt_stb_d_ops[] ATTRIBUTE_UNUSED = {
252b5132 452 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
cedb97b6 453 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
252b5132 454 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
cedb97b6 455 { OUTPUT, "h_memory_QI_add__SI_src2_slo16", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
88845958 456 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 457};
458
bf143b25 459static const CGEN_OPINST sfmt_sth_ops[] ATTRIBUTE_UNUSED = {
cedb97b6
DE		 460 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
461 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 462 { OUTPUT, "h_memory_HI_src2", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 },
88845958 463 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 464};
465
bf143b25 466static const CGEN_OPINST sfmt_sth_d_ops[] ATTRIBUTE_UNUSED = {
252b5132 467 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
cedb97b6 468 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
252b5132 469 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
cedb97b6 470 { OUTPUT, "h_memory_HI_add__SI_src2_slo16", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 },
88845958 471 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 472};
473
bf143b25 474static const CGEN_OPINST sfmt_st_plus_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 475 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
476 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 477 { OUTPUT, "h_memory_SI_new_src2", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
252b5132 478 { OUTPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
88845958
NC		 479 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
480};
481
bf143b25 482static const CGEN_OPINST sfmt_sth_plus_ops[] ATTRIBUTE_UNUSED = {
88845958
NC		 483 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
484 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
485 { OUTPUT, "h_memory_HI_new_src2", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 },
486 { OUTPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
487 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
488};
489
bf143b25 490static const CGEN_OPINST sfmt_stb_plus_ops[] ATTRIBUTE_UNUSED = {
88845958
NC		 491 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
492 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
493 { OUTPUT, "h_memory_QI_new_src2", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
494 { OUTPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
495 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 496};
497
bf143b25 498static const CGEN_OPINST sfmt_trap_ops[] ATTRIBUTE_UNUSED = {
fc7bc883
RH		 499 { INPUT, "h_bpsw_UQI", HW_H_BPSW, CGEN_MODE_UQI, 0, 0, 0 },
500 { INPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 },
501 { INPUT, "h_psw_UQI", HW_H_PSW, CGEN_MODE_UQI, 0, 0, 0 },
252b5132
RH		 502 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
503 { INPUT, "uimm4", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM4), 0, 0 },
fc7bc883
RH		 504 { OUTPUT, "h_bbpsw_UQI", HW_H_BBPSW, CGEN_MODE_UQI, 0, 0, 0 },
505 { OUTPUT, "h_bpsw_UQI", HW_H_BPSW, CGEN_MODE_UQI, 0, 0, 0 },
506 { OUTPUT, "h_cr_USI_14", HW_H_CR, CGEN_MODE_USI, 0, 14, 0 },
507 { OUTPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 },
508 { OUTPUT, "h_psw_UQI", HW_H_PSW, CGEN_MODE_UQI, 0, 0, 0 },
cedb97b6 509 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 510 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 511};
512
bf143b25 513static const CGEN_OPINST sfmt_unlock_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 514 { INPUT, "h_lock_BI", HW_H_LOCK, CGEN_MODE_BI, 0, 0, 0 },
252b5132 515 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, COND_REF },
cedb97b6 516 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, COND_REF },
fc7bc883
RH		 517 { OUTPUT, "h_lock_BI", HW_H_LOCK, CGEN_MODE_BI, 0, 0, 0 },
518 { OUTPUT, "h_memory_SI_src2", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, COND_REF },
88845958 519 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 520};
521
bf143b25 522static const CGEN_OPINST sfmt_satb_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 523 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
524 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 525 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 526};
527
bf143b25 528static const CGEN_OPINST sfmt_sat_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 529 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
530 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, COND_REF },
531 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 532 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 533};
534
bf143b25 535static const CGEN_OPINST sfmt_sadd_ops[] ATTRIBUTE_UNUSED = {
fc7bc883
RH		 536 { INPUT, "h_accums_DI_0", HW_H_ACCUMS, CGEN_MODE_DI, 0, 0, 0 },
537 { INPUT, "h_accums_DI_1", HW_H_ACCUMS, CGEN_MODE_DI, 0, 1, 0 },
538 { OUTPUT, "h_accums_DI_0", HW_H_ACCUMS, CGEN_MODE_DI, 0, 0, 0 },
88845958 539 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 540};
541
bf143b25 542static const CGEN_OPINST sfmt_macwu1_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 543 { INPUT, "h_accums_DI_1", HW_H_ACCUMS, CGEN_MODE_DI, 0, 1, 0 },
1fa60b5d
DE		 544 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
545 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 546 { OUTPUT, "h_accums_DI_1", HW_H_ACCUMS, CGEN_MODE_DI, 0, 1, 0 },
88845958 547 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 548};
549
bf143b25 550static const CGEN_OPINST sfmt_mulwu1_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 551 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
552 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 553 { OUTPUT, "h_accums_DI_1", HW_H_ACCUMS, CGEN_MODE_DI, 0, 1, 0 },
88845958 554 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 555};
556
bf143b25 557static const CGEN_OPINST sfmt_sc_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d 558 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
88845958
NC		 559 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
560};
561
bf143b25 562static const CGEN_OPINST sfmt_clrpsw_ops[] ATTRIBUTE_UNUSED = {
88845958 563 { INPUT, "h_cr_USI_0", HW_H_CR, CGEN_MODE_USI, 0, 0, 0 },
cedb97b6 564 { INPUT, "uimm8", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM8), 0, 0 },
88845958
NC		 565 { OUTPUT, "h_cr_USI_0", HW_H_CR, CGEN_MODE_USI, 0, 0, 0 },
566 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
567};
568
bf143b25 569static const CGEN_OPINST sfmt_setpsw_ops[] ATTRIBUTE_UNUSED = {
cedb97b6 570 { INPUT, "uimm8", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM8), 0, 0 },
88845958
NC		 571 { OUTPUT, "h_cr_USI_0", HW_H_CR, CGEN_MODE_USI, 0, 0, 0 },
572 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
573};
574
bf143b25 575static const CGEN_OPINST sfmt_bset_ops[] ATTRIBUTE_UNUSED = {
cedb97b6 576 { INPUT, "h_memory_QI_add__SI_sr_slo16", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
88845958
NC		 577 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
578 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
579 { INPUT, "uimm3", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM3), 0, 0 },
cedb97b6 580 { OUTPUT, "h_memory_QI_add__SI_sr_slo16", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
88845958
NC		 581 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
582};
583
bf143b25 584static const CGEN_OPINST sfmt_btst_ops[] ATTRIBUTE_UNUSED = {
cedb97b6 585 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
88845958
NC		 586 { INPUT, "uimm3", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM3), 0, 0 },
587 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
588 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 589};
590
b3466c39 591#undef OP_ENT
252b5132
RH		 592#undef INPUT
593#undef OUTPUT
594#undef END
595#undef COND_REF
252b5132
RH		 596
597/* Operand instance lookup table. */
598
599static const CGEN_OPINST *m32r_cgen_opinst_table[MAX_INSNS] = {
600 0,
eb1b03df
DE		 601 & sfmt_add_ops[0],
602 & sfmt_add3_ops[0],
603 & sfmt_add_ops[0],
604 & sfmt_and3_ops[0],
605 & sfmt_add_ops[0],
606 & sfmt_or3_ops[0],
607 & sfmt_add_ops[0],
608 & sfmt_and3_ops[0],
609 & sfmt_addi_ops[0],
610 & sfmt_addv_ops[0],
611 & sfmt_addv3_ops[0],
612 & sfmt_addx_ops[0],
613 & sfmt_bc8_ops[0],
614 & sfmt_bc24_ops[0],
615 & sfmt_beq_ops[0],
616 & sfmt_beqz_ops[0],
617 & sfmt_beqz_ops[0],
618 & sfmt_beqz_ops[0],
619 & sfmt_beqz_ops[0],
620 & sfmt_beqz_ops[0],
621 & sfmt_beqz_ops[0],
622 & sfmt_bl8_ops[0],
623 & sfmt_bl24_ops[0],
1fa60b5d
DE		 624 & sfmt_bcl8_ops[0],
625 & sfmt_bcl24_ops[0],
eb1b03df
DE		 626 & sfmt_bc8_ops[0],
627 & sfmt_bc24_ops[0],
628 & sfmt_beq_ops[0],
629 & sfmt_bra8_ops[0],
630 & sfmt_bra24_ops[0],
1fa60b5d
DE		 631 & sfmt_bcl8_ops[0],
632 & sfmt_bcl24_ops[0],
eb1b03df
DE		 633 & sfmt_cmp_ops[0],
634 & sfmt_cmpi_ops[0],
635 & sfmt_cmp_ops[0],
636 & sfmt_cmpi_ops[0],
1fa60b5d
DE		 637 & sfmt_cmp_ops[0],
638 & sfmt_cmpz_ops[0],
eb1b03df
DE		 639 & sfmt_div_ops[0],
640 & sfmt_div_ops[0],
641 & sfmt_div_ops[0],
642 & sfmt_div_ops[0],
1fa60b5d 643 & sfmt_div_ops[0],
88845958
NC		 644 & sfmt_div_ops[0],
645 & sfmt_div_ops[0],
646 & sfmt_div_ops[0],
647 & sfmt_div_ops[0],
648 & sfmt_div_ops[0],
649 & sfmt_div_ops[0],
650 & sfmt_div_ops[0],
1fa60b5d
DE		 651 & sfmt_jc_ops[0],
652 & sfmt_jc_ops[0],
eb1b03df
DE		 653 & sfmt_jl_ops[0],
654 & sfmt_jmp_ops[0],
655 & sfmt_ld_ops[0],
656 & sfmt_ld_d_ops[0],
fc7bc883
RH		 657 & sfmt_ldb_ops[0],
658 & sfmt_ldb_d_ops[0],
659 & sfmt_ldh_ops[0],
660 & sfmt_ldh_d_ops[0],
661 & sfmt_ldb_ops[0],
662 & sfmt_ldb_d_ops[0],
663 & sfmt_ldh_ops[0],
664 & sfmt_ldh_d_ops[0],
eb1b03df
DE		 665 & sfmt_ld_plus_ops[0],
666 & sfmt_ld24_ops[0],
667 & sfmt_ldi8_ops[0],
668 & sfmt_ldi16_ops[0],
669 & sfmt_lock_ops[0],
670 & sfmt_machi_ops[0],
1fa60b5d 671 & sfmt_machi_a_ops[0],
eb1b03df 672 & sfmt_machi_ops[0],
1fa60b5d 673 & sfmt_machi_a_ops[0],
eb1b03df 674 & sfmt_machi_ops[0],
1fa60b5d 675 & sfmt_machi_a_ops[0],
eb1b03df 676 & sfmt_machi_ops[0],
1fa60b5d 677 & sfmt_machi_a_ops[0],
eb1b03df
DE		 678 & sfmt_add_ops[0],
679 & sfmt_mulhi_ops[0],
1fa60b5d 680 & sfmt_mulhi_a_ops[0],
eb1b03df 681 & sfmt_mulhi_ops[0],
1fa60b5d 682 & sfmt_mulhi_a_ops[0],
eb1b03df 683 & sfmt_mulhi_ops[0],
1fa60b5d 684 & sfmt_mulhi_a_ops[0],
eb1b03df 685 & sfmt_mulhi_ops[0],
1fa60b5d 686 & sfmt_mulhi_a_ops[0],
eb1b03df
DE		 687 & sfmt_mv_ops[0],
688 & sfmt_mvfachi_ops[0],
1fa60b5d 689 & sfmt_mvfachi_a_ops[0],
eb1b03df 690 & sfmt_mvfachi_ops[0],
1fa60b5d 691 & sfmt_mvfachi_a_ops[0],
eb1b03df 692 & sfmt_mvfachi_ops[0],
1fa60b5d 693 & sfmt_mvfachi_a_ops[0],
eb1b03df
DE		 694 & sfmt_mvfc_ops[0],
695 & sfmt_mvtachi_ops[0],
1fa60b5d 696 & sfmt_mvtachi_a_ops[0],
eb1b03df 697 & sfmt_mvtachi_ops[0],
1fa60b5d 698 & sfmt_mvtachi_a_ops[0],
eb1b03df
DE		 699 & sfmt_mvtc_ops[0],
700 & sfmt_mv_ops[0],
701 & sfmt_nop_ops[0],
702 & sfmt_mv_ops[0],
703 & sfmt_rac_ops[0],
1fa60b5d 704 & sfmt_rac_dsi_ops[0],
eb1b03df 705 & sfmt_rac_ops[0],
1fa60b5d 706 & sfmt_rac_dsi_ops[0],
eb1b03df
DE		 707 & sfmt_rte_ops[0],
708 & sfmt_seth_ops[0],
709 & sfmt_add_ops[0],
710 & sfmt_sll3_ops[0],
711 & sfmt_slli_ops[0],
712 & sfmt_add_ops[0],
713 & sfmt_sll3_ops[0],
714 & sfmt_slli_ops[0],
715 & sfmt_add_ops[0],
716 & sfmt_sll3_ops[0],
717 & sfmt_slli_ops[0],
718 & sfmt_st_ops[0],
719 & sfmt_st_d_ops[0],
720 & sfmt_stb_ops[0],
721 & sfmt_stb_d_ops[0],
722 & sfmt_sth_ops[0],
723 & sfmt_sth_d_ops[0],
724 & sfmt_st_plus_ops[0],
88845958
NC		 725 & sfmt_sth_plus_ops[0],
726 & sfmt_stb_plus_ops[0],
eb1b03df
DE		 727 & sfmt_st_plus_ops[0],
728 & sfmt_add_ops[0],
729 & sfmt_addv_ops[0],
730 & sfmt_addx_ops[0],
731 & sfmt_trap_ops[0],
732 & sfmt_unlock_ops[0],
1fa60b5d
DE		 733 & sfmt_satb_ops[0],
734 & sfmt_satb_ops[0],
735 & sfmt_sat_ops[0],
736 & sfmt_cmpz_ops[0],
737 & sfmt_sadd_ops[0],
738 & sfmt_macwu1_ops[0],
739 & sfmt_machi_ops[0],
740 & sfmt_mulwu1_ops[0],
741 & sfmt_macwu1_ops[0],
742 & sfmt_sc_ops[0],
743 & sfmt_sc_ops[0],
88845958
NC		 744 & sfmt_clrpsw_ops[0],
745 & sfmt_setpsw_ops[0],
746 & sfmt_bset_ops[0],
747 & sfmt_bset_ops[0],
748 & sfmt_btst_ops[0],
252b5132
RH		 749};
750
751/* Function to call before using the operand instance table. */
752
753void
754m32r_cgen_init_opinst_table (cd)
755 CGEN_CPU_DESC cd;
756{
757 int i;
758 const CGEN_OPINST **oi = & m32r_cgen_opinst_table[0];
759 CGEN_INSN *insns = (CGEN_INSN *) cd->insn_table.init_entries;
760 for (i = 0; i < MAX_INSNS; ++i)
761 insns[i].opinst = oi[i];
762}
GDB Binutils - Deliverables
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