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[MIPS/GAS] Split Loongson EXT Instructions from loongson3a.
[deliverable/binutils-gdb.git] / opcodes / m32r-opinst.c
CommitLineData
4162bb66 1/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
252b5132
RH		 2/* Semantic operand instances for m32r.
3
4THIS FILE IS MACHINE GENERATED WITH CGEN.
5
219d1afa 6Copyright (C) 1996-2018 Free Software Foundation, Inc.
252b5132
RH		 7
8This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9
9b201bb5
NC		 10 This file is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
13 any later version.
252b5132 14
9b201bb5
NC		 15 It is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
18 License for more details.
252b5132 19
9b201bb5
NC		 20 You should have received a copy of the GNU General Public License along
21 with this program; if not, write to the Free Software Foundation, Inc.,
22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
252b5132
RH		 23
24*/
25
26#include "sysdep.h"
27#include "ansidecl.h"
28#include "bfd.h"
29#include "symcat.h"
30#include "m32r-desc.h"
31#include "m32r-opc.h"
32
33/* Operand references. */
34
b3466c39 35#define OP_ENT(op) M32R_OPERAND_##op
0e2ee3ca
NC		 36#define INPUT CGEN_OPINST_INPUT
37#define OUTPUT CGEN_OPINST_OUTPUT
38#define END CGEN_OPINST_END
252b5132 39#define COND_REF CGEN_OPINST_COND_REF
252b5132 40
bf143b25 41static const CGEN_OPINST sfmt_empty_ops[] ATTRIBUTE_UNUSED = {
88845958 42 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 43};
44
bf143b25 45static const CGEN_OPINST sfmt_add_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 46 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
47 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
48 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 49 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 50};
51
bf143b25 52static const CGEN_OPINST sfmt_add3_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 53 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
54 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
55 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 56 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 57};
58
bf143b25 59static const CGEN_OPINST sfmt_and3_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 60 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
61 { INPUT, "uimm16", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM16), 0, 0 },
62 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 63 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 64};
65
bf143b25 66static const CGEN_OPINST sfmt_or3_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 67 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
68 { INPUT, "ulo16", HW_H_ULO16, CGEN_MODE_UINT, OP_ENT (ULO16), 0, 0 },
69 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 70 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 71};
72
bf143b25 73static const CGEN_OPINST sfmt_addi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 74 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
75 { INPUT, "simm8", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM8), 0, 0 },
76 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 77 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 78};
79
bf143b25 80static const CGEN_OPINST sfmt_addv_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 81 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
82 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
83 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
84 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 85 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 86};
87
bf143b25 88static const CGEN_OPINST sfmt_addv3_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 89 { INPUT, "simm16", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
90 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
91 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
92 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 93 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 94};
95
bf143b25 96static const CGEN_OPINST sfmt_addx_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 97 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
98 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
99 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
100 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
101 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 102 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 103};
104
bf143b25 105static const CGEN_OPINST sfmt_bc8_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 106 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
107 { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, COND_REF },
108 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 109 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 110};
111
bf143b25 112static const CGEN_OPINST sfmt_bc24_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 113 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
114 { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, COND_REF },
115 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 116 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 117};
118
bf143b25 119static const CGEN_OPINST sfmt_beq_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 120 { INPUT, "disp16", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP16), 0, COND_REF },
121 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
122 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
123 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 124 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 125};
126
bf143b25 127static const CGEN_OPINST sfmt_beqz_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 128 { INPUT, "disp16", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP16), 0, COND_REF },
129 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
130 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 131 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 132};
133
bf143b25 134static const CGEN_OPINST sfmt_bl8_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 135 { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, 0 },
136 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
fc7bc883 137 { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, 0 },
252b5132 138 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 139 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 140};
141
bf143b25 142static const CGEN_OPINST sfmt_bl24_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 143 { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, 0 },
144 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
fc7bc883 145 { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, 0 },
252b5132 146 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 147 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 148};
149
bf143b25 150static const CGEN_OPINST sfmt_bcl8_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 151 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
152 { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, COND_REF },
153 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
fc7bc883 154 { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, COND_REF },
1fa60b5d 155 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 156 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 157};
158
bf143b25 159static const CGEN_OPINST sfmt_bcl24_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 160 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
161 { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, COND_REF },
162 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
fc7bc883 163 { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, COND_REF },
1fa60b5d 164 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 165 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 166};
167
bf143b25 168static const CGEN_OPINST sfmt_bra8_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 169 { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, 0 },
170 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 171 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 172};
173
bf143b25 174static const CGEN_OPINST sfmt_bra24_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 175 { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, 0 },
176 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 177 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 178};
179
bf143b25 180static const CGEN_OPINST sfmt_cmp_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 181 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
182 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
183 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
88845958 184 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 185};
186
bf143b25 187static const CGEN_OPINST sfmt_cmpi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 188 { INPUT, "simm16", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
189 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
190 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
88845958 191 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 192};
193
bf143b25 194static const CGEN_OPINST sfmt_cmpz_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 195 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
196 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
88845958 197 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 198};
199
bf143b25 200static const CGEN_OPINST sfmt_div_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 201 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, COND_REF },
202 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
203 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, COND_REF },
88845958 204 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 205};
206
bf143b25 207static const CGEN_OPINST sfmt_jc_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 208 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
209 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, COND_REF },
210 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 211 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 212};
213
bf143b25 214static const CGEN_OPINST sfmt_jl_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 215 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
216 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
fc7bc883 217 { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, 0 },
252b5132 218 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 219 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 220};
221
bf143b25 222static const CGEN_OPINST sfmt_jmp_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 223 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
224 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 225 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 226};
227
bf143b25 228static const CGEN_OPINST sfmt_ld_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 229 { INPUT, "h_memory_SI_sr", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
cedb97b6 230 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
252b5132 231 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 232 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 233};
234
bf143b25 235static const CGEN_OPINST sfmt_ld_d_ops[] ATTRIBUTE_UNUSED = {
cedb97b6 236 { INPUT, "h_memory_SI_add__SI_sr_slo16", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
fc7bc883
RH		 237 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
238 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
239 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 240 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
fc7bc883
RH		 241};
242
bf143b25 243static const CGEN_OPINST sfmt_ldb_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 244 { INPUT, "h_memory_QI_sr", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
cedb97b6 245 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
fc7bc883 246 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 247 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
fc7bc883
RH		 248};
249
bf143b25 250static const CGEN_OPINST sfmt_ldb_d_ops[] ATTRIBUTE_UNUSED = {
cedb97b6 251 { INPUT, "h_memory_QI_add__SI_sr_slo16", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
fc7bc883
RH		 252 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
253 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
254 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 255 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
fc7bc883
RH		 256};
257
bf143b25 258static const CGEN_OPINST sfmt_ldh_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 259 { INPUT, "h_memory_HI_sr", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 },
cedb97b6 260 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
fc7bc883 261 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 262 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
fc7bc883
RH		 263};
264
bf143b25 265static const CGEN_OPINST sfmt_ldh_d_ops[] ATTRIBUTE_UNUSED = {
cedb97b6 266 { INPUT, "h_memory_HI_add__SI_sr_slo16", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 },
252b5132
RH		 267 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
268 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
269 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 270 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 271};
272
bf143b25 273static const CGEN_OPINST sfmt_ld_plus_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 274 { INPUT, "h_memory_SI_sr", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
cedb97b6 275 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
252b5132
RH		 276 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
277 { OUTPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
88845958 278 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 279};
280
bf143b25 281static const CGEN_OPINST sfmt_ld24_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 282 { INPUT, "uimm24", HW_H_ADDR, CGEN_MODE_USI, OP_ENT (UIMM24), 0, 0 },
283 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 284 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 285};
286
bf143b25 287static const CGEN_OPINST sfmt_ldi8_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 288 { INPUT, "simm8", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM8), 0, 0 },
289 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 290 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 291};
292
bf143b25 293static const CGEN_OPINST sfmt_ldi16_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 294 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
295 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 296 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 297};
298
bf143b25 299static const CGEN_OPINST sfmt_lock_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 300 { INPUT, "h_memory_SI_sr", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
cedb97b6 301 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
252b5132 302 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
fc7bc883 303 { OUTPUT, "h_lock_BI", HW_H_LOCK, CGEN_MODE_BI, 0, 0, 0 },
88845958 304 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 305};
306
bf143b25 307static const CGEN_OPINST sfmt_machi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 308 { INPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
309 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
310 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
311 { OUTPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
88845958 312 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 313};
314
bf143b25 315static const CGEN_OPINST sfmt_machi_a_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 316 { INPUT, "acc", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACC), 0, 0 },
317 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
318 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
319 { OUTPUT, "acc", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACC), 0, 0 },
88845958 320 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 321};
322
bf143b25 323static const CGEN_OPINST sfmt_mulhi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 324 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
325 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
326 { OUTPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
88845958 327 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 328};
329
bf143b25 330static const CGEN_OPINST sfmt_mulhi_a_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 331 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
332 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
333 { OUTPUT, "acc", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACC), 0, 0 },
88845958 334 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 335};
336
bf143b25 337static const CGEN_OPINST sfmt_mv_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 338 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
339 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 340 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 341};
342
bf143b25 343static const CGEN_OPINST sfmt_mvfachi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 344 { INPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
345 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 346 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 347};
348
bf143b25 349static const CGEN_OPINST sfmt_mvfachi_a_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 350 { INPUT, "accs", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCS), 0, 0 },
351 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 352 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 353};
354
bf143b25 355static const CGEN_OPINST sfmt_mvfc_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 356 { INPUT, "scr", HW_H_CR, CGEN_MODE_USI, OP_ENT (SCR), 0, 0 },
357 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 358 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 359};
360
bf143b25 361static const CGEN_OPINST sfmt_mvtachi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 362 { INPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
363 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
364 { OUTPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
88845958 365 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 366};
367
bf143b25 368static const CGEN_OPINST sfmt_mvtachi_a_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 369 { INPUT, "accs", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCS), 0, 0 },
370 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
371 { OUTPUT, "accs", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCS), 0, 0 },
88845958 372 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 373};
374
bf143b25 375static const CGEN_OPINST sfmt_mvtc_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 376 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
377 { OUTPUT, "dcr", HW_H_CR, CGEN_MODE_USI, OP_ENT (DCR), 0, 0 },
88845958 378 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 379};
380
bf143b25 381static const CGEN_OPINST sfmt_nop_ops[] ATTRIBUTE_UNUSED = {
88845958 382 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 383};
384
bf143b25 385static const CGEN_OPINST sfmt_rac_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 386 { INPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
387 { OUTPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
88845958 388 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 389};
390
bf143b25 391static const CGEN_OPINST sfmt_rac_dsi_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d 392 { INPUT, "accs", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCS), 0, 0 },
cedb97b6 393 { INPUT, "imm1", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (IMM1), 0, 0 },
1fa60b5d 394 { OUTPUT, "accd", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCD), 0, 0 },
88845958 395 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 396};
397
bf143b25 398static const CGEN_OPINST sfmt_rte_ops[] ATTRIBUTE_UNUSED = {
fc7bc883
RH		 399 { INPUT, "h_bbpsw_UQI", HW_H_BBPSW, CGEN_MODE_UQI, 0, 0, 0 },
400 { INPUT, "h_bpsw_UQI", HW_H_BPSW, CGEN_MODE_UQI, 0, 0, 0 },
401 { INPUT, "h_cr_USI_14", HW_H_CR, CGEN_MODE_USI, 0, 14, 0 },
402 { INPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 },
403 { OUTPUT, "h_bpsw_UQI", HW_H_BPSW, CGEN_MODE_UQI, 0, 0, 0 },
404 { OUTPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 },
405 { OUTPUT, "h_psw_UQI", HW_H_PSW, CGEN_MODE_UQI, 0, 0, 0 },
252b5132 406 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 407 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 408};
409
bf143b25 410static const CGEN_OPINST sfmt_seth_ops[] ATTRIBUTE_UNUSED = {
cedb97b6 411 { INPUT, "hi16", HW_H_HI16, CGEN_MODE_UINT, OP_ENT (HI16), 0, 0 },
252b5132 412 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 413 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 414};
415
bf143b25 416static const CGEN_OPINST sfmt_sll3_ops[] ATTRIBUTE_UNUSED = {
cedb97b6 417 { INPUT, "simm16", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
252b5132
RH		 418 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
419 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 420 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 421};
422
bf143b25 423static const CGEN_OPINST sfmt_slli_ops[] ATTRIBUTE_UNUSED = {
252b5132 424 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
cedb97b6 425 { INPUT, "uimm5", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM5), 0, 0 },
252b5132 426 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 427 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 428};
429
bf143b25 430static const CGEN_OPINST sfmt_st_ops[] ATTRIBUTE_UNUSED = {
252b5132 431 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
cedb97b6 432 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 433 { OUTPUT, "h_memory_SI_src2", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
88845958 434 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 435};
436
bf143b25 437static const CGEN_OPINST sfmt_st_d_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 438 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
439 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
440 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
cedb97b6 441 { OUTPUT, "h_memory_SI_add__SI_src2_slo16", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
88845958 442 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 443};
444
bf143b25 445static const CGEN_OPINST sfmt_stb_ops[] ATTRIBUTE_UNUSED = {
cedb97b6
DE		 446 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
447 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 448 { OUTPUT, "h_memory_QI_src2", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
88845958 449 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 450};
451
bf143b25 452static const CGEN_OPINST sfmt_stb_d_ops[] ATTRIBUTE_UNUSED = {
252b5132 453 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
cedb97b6 454 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
252b5132 455 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
cedb97b6 456 { OUTPUT, "h_memory_QI_add__SI_src2_slo16", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
88845958 457 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 458};
459
bf143b25 460static const CGEN_OPINST sfmt_sth_ops[] ATTRIBUTE_UNUSED = {
cedb97b6
DE		 461 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
462 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 463 { OUTPUT, "h_memory_HI_src2", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 },
88845958 464 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 465};
466
bf143b25 467static const CGEN_OPINST sfmt_sth_d_ops[] ATTRIBUTE_UNUSED = {
252b5132 468 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
cedb97b6 469 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
252b5132 470 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
cedb97b6 471 { OUTPUT, "h_memory_HI_add__SI_src2_slo16", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 },
88845958 472 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 473};
474
bf143b25 475static const CGEN_OPINST sfmt_st_plus_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 476 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
477 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 478 { OUTPUT, "h_memory_SI_new_src2", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
252b5132 479 { OUTPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
88845958
NC		 480 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
481};
482
bf143b25 483static const CGEN_OPINST sfmt_sth_plus_ops[] ATTRIBUTE_UNUSED = {
88845958
NC		 484 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
485 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
486 { OUTPUT, "h_memory_HI_new_src2", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 },
487 { OUTPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
488 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
489};
490
bf143b25 491static const CGEN_OPINST sfmt_stb_plus_ops[] ATTRIBUTE_UNUSED = {
88845958
NC		 492 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
493 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
494 { OUTPUT, "h_memory_QI_new_src2", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
495 { OUTPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
496 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 497};
498
bf143b25 499static const CGEN_OPINST sfmt_trap_ops[] ATTRIBUTE_UNUSED = {
fc7bc883
RH		 500 { INPUT, "h_bpsw_UQI", HW_H_BPSW, CGEN_MODE_UQI, 0, 0, 0 },
501 { INPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 },
502 { INPUT, "h_psw_UQI", HW_H_PSW, CGEN_MODE_UQI, 0, 0, 0 },
252b5132
RH		 503 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
504 { INPUT, "uimm4", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM4), 0, 0 },
fc7bc883
RH		 505 { OUTPUT, "h_bbpsw_UQI", HW_H_BBPSW, CGEN_MODE_UQI, 0, 0, 0 },
506 { OUTPUT, "h_bpsw_UQI", HW_H_BPSW, CGEN_MODE_UQI, 0, 0, 0 },
507 { OUTPUT, "h_cr_USI_14", HW_H_CR, CGEN_MODE_USI, 0, 14, 0 },
508 { OUTPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 },
509 { OUTPUT, "h_psw_UQI", HW_H_PSW, CGEN_MODE_UQI, 0, 0, 0 },
cedb97b6 510 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 511 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 512};
513
bf143b25 514static const CGEN_OPINST sfmt_unlock_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 515 { INPUT, "h_lock_BI", HW_H_LOCK, CGEN_MODE_BI, 0, 0, 0 },
252b5132 516 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, COND_REF },
cedb97b6 517 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, COND_REF },
fc7bc883
RH		 518 { OUTPUT, "h_lock_BI", HW_H_LOCK, CGEN_MODE_BI, 0, 0, 0 },
519 { OUTPUT, "h_memory_SI_src2", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, COND_REF },
88845958 520 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 521};
522
bf143b25 523static const CGEN_OPINST sfmt_satb_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 524 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
525 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 526 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 527};
528
bf143b25 529static const CGEN_OPINST sfmt_sat_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 530 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
531 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, COND_REF },
532 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 533 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 534};
535
bf143b25 536static const CGEN_OPINST sfmt_sadd_ops[] ATTRIBUTE_UNUSED = {
fc7bc883
RH		 537 { INPUT, "h_accums_DI_0", HW_H_ACCUMS, CGEN_MODE_DI, 0, 0, 0 },
538 { INPUT, "h_accums_DI_1", HW_H_ACCUMS, CGEN_MODE_DI, 0, 1, 0 },
539 { OUTPUT, "h_accums_DI_0", HW_H_ACCUMS, CGEN_MODE_DI, 0, 0, 0 },
88845958 540 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 541};
542
bf143b25 543static const CGEN_OPINST sfmt_macwu1_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 544 { INPUT, "h_accums_DI_1", HW_H_ACCUMS, CGEN_MODE_DI, 0, 1, 0 },
1fa60b5d
DE		 545 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
546 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 547 { OUTPUT, "h_accums_DI_1", HW_H_ACCUMS, CGEN_MODE_DI, 0, 1, 0 },
88845958 548 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 549};
550
bf143b25 551static const CGEN_OPINST sfmt_mulwu1_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 552 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
553 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 554 { OUTPUT, "h_accums_DI_1", HW_H_ACCUMS, CGEN_MODE_DI, 0, 1, 0 },
88845958 555 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 556};
557
bf143b25 558static const CGEN_OPINST sfmt_sc_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d 559 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
88845958
NC		 560 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
561};
562
bf143b25 563static const CGEN_OPINST sfmt_clrpsw_ops[] ATTRIBUTE_UNUSED = {
88845958 564 { INPUT, "h_cr_USI_0", HW_H_CR, CGEN_MODE_USI, 0, 0, 0 },
cedb97b6 565 { INPUT, "uimm8", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM8), 0, 0 },
88845958
NC		 566 { OUTPUT, "h_cr_USI_0", HW_H_CR, CGEN_MODE_USI, 0, 0, 0 },
567 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
568};
569
bf143b25 570static const CGEN_OPINST sfmt_setpsw_ops[] ATTRIBUTE_UNUSED = {
cedb97b6 571 { INPUT, "uimm8", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM8), 0, 0 },
88845958
NC		 572 { OUTPUT, "h_cr_USI_0", HW_H_CR, CGEN_MODE_USI, 0, 0, 0 },
573 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
574};
575
bf143b25 576static const CGEN_OPINST sfmt_bset_ops[] ATTRIBUTE_UNUSED = {
cedb97b6 577 { INPUT, "h_memory_QI_add__SI_sr_slo16", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
88845958
NC		 578 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
579 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
580 { INPUT, "uimm3", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM3), 0, 0 },
cedb97b6 581 { OUTPUT, "h_memory_QI_add__SI_sr_slo16", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
88845958
NC		 582 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
583};
584
bf143b25 585static const CGEN_OPINST sfmt_btst_ops[] ATTRIBUTE_UNUSED = {
cedb97b6 586 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
88845958
NC		 587 { INPUT, "uimm3", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM3), 0, 0 },
588 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
589 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 590};
591
b3466c39 592#undef OP_ENT
252b5132
RH		 593#undef INPUT
594#undef OUTPUT
595#undef END
596#undef COND_REF
252b5132
RH		 597
598/* Operand instance lookup table. */
599
600static const CGEN_OPINST *m32r_cgen_opinst_table[MAX_INSNS] = {
601 0,
eb1b03df
DE		 602 & sfmt_add_ops[0],
603 & sfmt_add3_ops[0],
604 & sfmt_add_ops[0],
605 & sfmt_and3_ops[0],
606 & sfmt_add_ops[0],
607 & sfmt_or3_ops[0],
608 & sfmt_add_ops[0],
609 & sfmt_and3_ops[0],
610 & sfmt_addi_ops[0],
611 & sfmt_addv_ops[0],
612 & sfmt_addv3_ops[0],
613 & sfmt_addx_ops[0],
614 & sfmt_bc8_ops[0],
615 & sfmt_bc24_ops[0],
616 & sfmt_beq_ops[0],
617 & sfmt_beqz_ops[0],
618 & sfmt_beqz_ops[0],
619 & sfmt_beqz_ops[0],
620 & sfmt_beqz_ops[0],
621 & sfmt_beqz_ops[0],
622 & sfmt_beqz_ops[0],
623 & sfmt_bl8_ops[0],
624 & sfmt_bl24_ops[0],
1fa60b5d
DE		 625 & sfmt_bcl8_ops[0],
626 & sfmt_bcl24_ops[0],
eb1b03df
DE		 627 & sfmt_bc8_ops[0],
628 & sfmt_bc24_ops[0],
629 & sfmt_beq_ops[0],
630 & sfmt_bra8_ops[0],
631 & sfmt_bra24_ops[0],
1fa60b5d
DE		 632 & sfmt_bcl8_ops[0],
633 & sfmt_bcl24_ops[0],
eb1b03df
DE		 634 & sfmt_cmp_ops[0],
635 & sfmt_cmpi_ops[0],
636 & sfmt_cmp_ops[0],
637 & sfmt_cmpi_ops[0],
1fa60b5d
DE		 638 & sfmt_cmp_ops[0],
639 & sfmt_cmpz_ops[0],
eb1b03df
DE		 640 & sfmt_div_ops[0],
641 & sfmt_div_ops[0],
642 & sfmt_div_ops[0],
643 & sfmt_div_ops[0],
1fa60b5d 644 & sfmt_div_ops[0],
88845958
NC		 645 & sfmt_div_ops[0],
646 & sfmt_div_ops[0],
647 & sfmt_div_ops[0],
648 & sfmt_div_ops[0],
649 & sfmt_div_ops[0],
650 & sfmt_div_ops[0],
651 & sfmt_div_ops[0],
1fa60b5d
DE		 652 & sfmt_jc_ops[0],
653 & sfmt_jc_ops[0],
eb1b03df
DE		 654 & sfmt_jl_ops[0],
655 & sfmt_jmp_ops[0],
656 & sfmt_ld_ops[0],
657 & sfmt_ld_d_ops[0],
fc7bc883
RH		 658 & sfmt_ldb_ops[0],
659 & sfmt_ldb_d_ops[0],
660 & sfmt_ldh_ops[0],
661 & sfmt_ldh_d_ops[0],
662 & sfmt_ldb_ops[0],
663 & sfmt_ldb_d_ops[0],
664 & sfmt_ldh_ops[0],
665 & sfmt_ldh_d_ops[0],
eb1b03df
DE		 666 & sfmt_ld_plus_ops[0],
667 & sfmt_ld24_ops[0],
668 & sfmt_ldi8_ops[0],
669 & sfmt_ldi16_ops[0],
670 & sfmt_lock_ops[0],
671 & sfmt_machi_ops[0],
1fa60b5d 672 & sfmt_machi_a_ops[0],
eb1b03df 673 & sfmt_machi_ops[0],
1fa60b5d 674 & sfmt_machi_a_ops[0],
eb1b03df 675 & sfmt_machi_ops[0],
1fa60b5d 676 & sfmt_machi_a_ops[0],
eb1b03df 677 & sfmt_machi_ops[0],
1fa60b5d 678 & sfmt_machi_a_ops[0],
eb1b03df
DE		 679 & sfmt_add_ops[0],
680 & sfmt_mulhi_ops[0],
1fa60b5d 681 & sfmt_mulhi_a_ops[0],
eb1b03df 682 & sfmt_mulhi_ops[0],
1fa60b5d 683 & sfmt_mulhi_a_ops[0],
eb1b03df 684 & sfmt_mulhi_ops[0],
1fa60b5d 685 & sfmt_mulhi_a_ops[0],
eb1b03df 686 & sfmt_mulhi_ops[0],
1fa60b5d 687 & sfmt_mulhi_a_ops[0],
eb1b03df
DE		 688 & sfmt_mv_ops[0],
689 & sfmt_mvfachi_ops[0],
1fa60b5d 690 & sfmt_mvfachi_a_ops[0],
eb1b03df 691 & sfmt_mvfachi_ops[0],
1fa60b5d 692 & sfmt_mvfachi_a_ops[0],
eb1b03df 693 & sfmt_mvfachi_ops[0],
1fa60b5d 694 & sfmt_mvfachi_a_ops[0],
eb1b03df
DE		 695 & sfmt_mvfc_ops[0],
696 & sfmt_mvtachi_ops[0],
1fa60b5d 697 & sfmt_mvtachi_a_ops[0],
eb1b03df 698 & sfmt_mvtachi_ops[0],
1fa60b5d 699 & sfmt_mvtachi_a_ops[0],
eb1b03df
DE		 700 & sfmt_mvtc_ops[0],
701 & sfmt_mv_ops[0],
702 & sfmt_nop_ops[0],
703 & sfmt_mv_ops[0],
704 & sfmt_rac_ops[0],
1fa60b5d 705 & sfmt_rac_dsi_ops[0],
eb1b03df 706 & sfmt_rac_ops[0],
1fa60b5d 707 & sfmt_rac_dsi_ops[0],
eb1b03df
DE		 708 & sfmt_rte_ops[0],
709 & sfmt_seth_ops[0],
710 & sfmt_add_ops[0],
711 & sfmt_sll3_ops[0],
712 & sfmt_slli_ops[0],
713 & sfmt_add_ops[0],
714 & sfmt_sll3_ops[0],
715 & sfmt_slli_ops[0],
716 & sfmt_add_ops[0],
717 & sfmt_sll3_ops[0],
718 & sfmt_slli_ops[0],
719 & sfmt_st_ops[0],
720 & sfmt_st_d_ops[0],
721 & sfmt_stb_ops[0],
722 & sfmt_stb_d_ops[0],
723 & sfmt_sth_ops[0],
724 & sfmt_sth_d_ops[0],
725 & sfmt_st_plus_ops[0],
88845958
NC		 726 & sfmt_sth_plus_ops[0],
727 & sfmt_stb_plus_ops[0],
eb1b03df
DE		 728 & sfmt_st_plus_ops[0],
729 & sfmt_add_ops[0],
730 & sfmt_addv_ops[0],
731 & sfmt_addx_ops[0],
732 & sfmt_trap_ops[0],
733 & sfmt_unlock_ops[0],
1fa60b5d
DE		 734 & sfmt_satb_ops[0],
735 & sfmt_satb_ops[0],
736 & sfmt_sat_ops[0],
737 & sfmt_cmpz_ops[0],
738 & sfmt_sadd_ops[0],
739 & sfmt_macwu1_ops[0],
740 & sfmt_machi_ops[0],
741 & sfmt_mulwu1_ops[0],
742 & sfmt_macwu1_ops[0],
743 & sfmt_sc_ops[0],
744 & sfmt_sc_ops[0],
88845958
NC		 745 & sfmt_clrpsw_ops[0],
746 & sfmt_setpsw_ops[0],
747 & sfmt_bset_ops[0],
748 & sfmt_bset_ops[0],
749 & sfmt_btst_ops[0],
252b5132
RH		 750};
751
752/* Function to call before using the operand instance table. */
753
754void
e6c7cdec 755m32r_cgen_init_opinst_table (CGEN_CPU_DESC cd)
252b5132
RH		 756{
757 int i;
758 const CGEN_OPINST **oi = & m32r_cgen_opinst_table[0];
759 CGEN_INSN *insns = (CGEN_INSN *) cd->insn_table.init_entries;
760 for (i = 0; i < MAX_INSNS; ++i)
761 insns[i].opinst = oi[i];
762}
GDB Binutils - Deliverables
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