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2006-05-15 Peter O'Gorman <gdb-patches@mlists.thewrittenword.com>
[deliverable/binutils-gdb.git] / opcodes / m32r-opinst.c
CommitLineData
252b5132
RH		 1/* Semantic operand instances for m32r.
2
3THIS FILE IS MACHINE GENERATED WITH CGEN.
4
610ad19b 5Copyright 1996-2005 Free Software Foundation, Inc.
252b5132
RH		 6
7This file is part of the GNU Binutils and/or GDB, the GNU debugger.
8
9This program is free software; you can redistribute it and/or modify
10it under the terms of the GNU General Public License as published by
11the Free Software Foundation; either version 2, or (at your option)
12any later version.
13
14This program is distributed in the hope that it will be useful,
15but WITHOUT ANY WARRANTY; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License along
20with this program; if not, write to the Free Software Foundation, Inc.,
f4321104 2151 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
252b5132
RH		 22
23*/
24
25#include "sysdep.h"
26#include "ansidecl.h"
27#include "bfd.h"
28#include "symcat.h"
29#include "m32r-desc.h"
30#include "m32r-opc.h"
31
32/* Operand references. */
33
b3466c39
DB		 34#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
35#define OP_ENT(op) M32R_OPERAND_##op
36#else
37#define OP_ENT(op) M32R_OPERAND_/**/op
38#endif
0e2ee3ca
NC		 39#define INPUT CGEN_OPINST_INPUT
40#define OUTPUT CGEN_OPINST_OUTPUT
41#define END CGEN_OPINST_END
252b5132 42#define COND_REF CGEN_OPINST_COND_REF
252b5132 43
bf143b25 44static const CGEN_OPINST sfmt_empty_ops[] ATTRIBUTE_UNUSED = {
88845958 45 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 46};
47
bf143b25 48static const CGEN_OPINST sfmt_add_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 49 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
50 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
51 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 52 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 53};
54
bf143b25 55static const CGEN_OPINST sfmt_add3_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 56 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
57 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
58 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 59 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 60};
61
bf143b25 62static const CGEN_OPINST sfmt_and3_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 63 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
64 { INPUT, "uimm16", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM16), 0, 0 },
65 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 66 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 67};
68
bf143b25 69static const CGEN_OPINST sfmt_or3_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 70 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
71 { INPUT, "ulo16", HW_H_ULO16, CGEN_MODE_UINT, OP_ENT (ULO16), 0, 0 },
72 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 73 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 74};
75
bf143b25 76static const CGEN_OPINST sfmt_addi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 77 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
78 { INPUT, "simm8", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM8), 0, 0 },
79 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 80 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 81};
82
bf143b25 83static const CGEN_OPINST sfmt_addv_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 84 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
85 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
86 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
87 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 88 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 89};
90
bf143b25 91static const CGEN_OPINST sfmt_addv3_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 92 { INPUT, "simm16", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
93 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
94 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
95 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 96 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 97};
98
bf143b25 99static const CGEN_OPINST sfmt_addx_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 100 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
101 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
102 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
103 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
104 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 105 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 106};
107
bf143b25 108static const CGEN_OPINST sfmt_bc8_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 109 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
110 { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, COND_REF },
111 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 112 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 113};
114
bf143b25 115static const CGEN_OPINST sfmt_bc24_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 116 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
117 { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, COND_REF },
118 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 119 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 120};
121
bf143b25 122static const CGEN_OPINST sfmt_beq_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 123 { INPUT, "disp16", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP16), 0, COND_REF },
124 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
125 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
126 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 127 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 128};
129
bf143b25 130static const CGEN_OPINST sfmt_beqz_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 131 { INPUT, "disp16", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP16), 0, COND_REF },
132 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
133 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 134 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 135};
136
bf143b25 137static const CGEN_OPINST sfmt_bl8_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 138 { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, 0 },
139 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
fc7bc883 140 { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, 0 },
252b5132 141 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 142 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 143};
144
bf143b25 145static const CGEN_OPINST sfmt_bl24_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 146 { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, 0 },
147 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
fc7bc883 148 { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, 0 },
252b5132 149 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 150 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 151};
152
bf143b25 153static const CGEN_OPINST sfmt_bcl8_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 154 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
155 { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, COND_REF },
156 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
fc7bc883 157 { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, COND_REF },
1fa60b5d 158 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 159 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 160};
161
bf143b25 162static const CGEN_OPINST sfmt_bcl24_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 163 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
164 { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, COND_REF },
165 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
fc7bc883 166 { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, COND_REF },
1fa60b5d 167 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 168 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 169};
170
bf143b25 171static const CGEN_OPINST sfmt_bra8_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 172 { INPUT, "disp8", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP8), 0, 0 },
173 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 174 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 175};
176
bf143b25 177static const CGEN_OPINST sfmt_bra24_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 178 { INPUT, "disp24", HW_H_IADDR, CGEN_MODE_USI, OP_ENT (DISP24), 0, 0 },
179 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 180 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 181};
182
bf143b25 183static const CGEN_OPINST sfmt_cmp_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 184 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
185 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
186 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
88845958 187 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 188};
189
bf143b25 190static const CGEN_OPINST sfmt_cmpi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 191 { INPUT, "simm16", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM16), 0, 0 },
192 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
193 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
88845958 194 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 195};
196
bf143b25 197static const CGEN_OPINST sfmt_cmpz_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 198 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
199 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
88845958 200 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 201};
202
bf143b25 203static const CGEN_OPINST sfmt_div_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 204 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, COND_REF },
205 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
206 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, COND_REF },
88845958 207 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 208};
209
bf143b25 210static const CGEN_OPINST sfmt_jc_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 211 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
212 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, COND_REF },
213 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, COND_REF },
88845958 214 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 215};
216
bf143b25 217static const CGEN_OPINST sfmt_jl_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 218 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
219 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
fc7bc883 220 { OUTPUT, "h_gr_SI_14", HW_H_GR, CGEN_MODE_SI, 0, 14, 0 },
252b5132 221 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 222 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 223};
224
bf143b25 225static const CGEN_OPINST sfmt_jmp_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 226 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
227 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 228 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 229};
230
bf143b25 231static const CGEN_OPINST sfmt_ld_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 232 { INPUT, "h_memory_SI_sr", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
252b5132
RH		 233 { INPUT, "sr", HW_H_GR, CGEN_MODE_USI, OP_ENT (SR), 0, 0 },
234 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 235 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 236};
237
bf143b25 238static const CGEN_OPINST sfmt_ld_d_ops[] ATTRIBUTE_UNUSED = {
fc7bc883
RH		 239 { INPUT, "h_memory_SI_add__DFLT_sr_slo16", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
240 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
241 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
242 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 243 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
fc7bc883
RH		 244};
245
bf143b25 246static const CGEN_OPINST sfmt_ldb_ops[] ATTRIBUTE_UNUSED = {
fc7bc883
RH		 247 { INPUT, "h_memory_QI_sr", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
248 { INPUT, "sr", HW_H_GR, CGEN_MODE_USI, OP_ENT (SR), 0, 0 },
249 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 250 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
fc7bc883
RH		 251};
252
bf143b25 253static const CGEN_OPINST sfmt_ldb_d_ops[] ATTRIBUTE_UNUSED = {
fc7bc883
RH		 254 { INPUT, "h_memory_QI_add__DFLT_sr_slo16", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
255 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
256 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
257 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 258 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
fc7bc883
RH		 259};
260
bf143b25 261static const CGEN_OPINST sfmt_ldh_ops[] ATTRIBUTE_UNUSED = {
fc7bc883
RH		 262 { INPUT, "h_memory_HI_sr", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 },
263 { INPUT, "sr", HW_H_GR, CGEN_MODE_USI, OP_ENT (SR), 0, 0 },
264 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 265 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
fc7bc883
RH		 266};
267
bf143b25 268static const CGEN_OPINST sfmt_ldh_d_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 269 { INPUT, "h_memory_HI_add__DFLT_sr_slo16", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 },
252b5132
RH		 270 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
271 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
272 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 273 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 274};
275
bf143b25 276static const CGEN_OPINST sfmt_ld_plus_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 277 { INPUT, "h_memory_SI_sr", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
252b5132
RH		 278 { INPUT, "sr", HW_H_GR, CGEN_MODE_USI, OP_ENT (SR), 0, 0 },
279 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
280 { OUTPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
88845958 281 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 282};
283
bf143b25 284static const CGEN_OPINST sfmt_ld24_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 285 { INPUT, "uimm24", HW_H_ADDR, CGEN_MODE_USI, OP_ENT (UIMM24), 0, 0 },
286 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 287 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 288};
289
bf143b25 290static const CGEN_OPINST sfmt_ldi8_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 291 { INPUT, "simm8", HW_H_SINT, CGEN_MODE_INT, OP_ENT (SIMM8), 0, 0 },
292 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 293 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 294};
295
bf143b25 296static const CGEN_OPINST sfmt_ldi16_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 297 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
298 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 299 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 300};
301
bf143b25 302static const CGEN_OPINST sfmt_lock_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 303 { INPUT, "h_memory_SI_sr", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
252b5132
RH		 304 { INPUT, "sr", HW_H_GR, CGEN_MODE_USI, OP_ENT (SR), 0, 0 },
305 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
fc7bc883 306 { OUTPUT, "h_lock_BI", HW_H_LOCK, CGEN_MODE_BI, 0, 0, 0 },
88845958 307 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 308};
309
bf143b25 310static const CGEN_OPINST sfmt_machi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 311 { INPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
312 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
313 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
314 { OUTPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
88845958 315 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 316};
317
bf143b25 318static const CGEN_OPINST sfmt_machi_a_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 319 { INPUT, "acc", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACC), 0, 0 },
320 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
321 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
322 { OUTPUT, "acc", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACC), 0, 0 },
88845958 323 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 324};
325
bf143b25 326static const CGEN_OPINST sfmt_mulhi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 327 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
328 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
329 { OUTPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
88845958 330 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 331};
332
bf143b25 333static const CGEN_OPINST sfmt_mulhi_a_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 334 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
335 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
336 { OUTPUT, "acc", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACC), 0, 0 },
88845958 337 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 338};
339
bf143b25 340static const CGEN_OPINST sfmt_mv_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 341 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
342 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 343 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 344};
345
bf143b25 346static const CGEN_OPINST sfmt_mvfachi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 347 { INPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
348 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 349 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 350};
351
bf143b25 352static const CGEN_OPINST sfmt_mvfachi_a_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 353 { INPUT, "accs", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCS), 0, 0 },
354 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 355 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 356};
357
bf143b25 358static const CGEN_OPINST sfmt_mvfc_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 359 { INPUT, "scr", HW_H_CR, CGEN_MODE_USI, OP_ENT (SCR), 0, 0 },
360 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 361 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 362};
363
bf143b25 364static const CGEN_OPINST sfmt_mvtachi_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 365 { INPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
366 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
367 { OUTPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
88845958 368 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 369};
370
bf143b25 371static const CGEN_OPINST sfmt_mvtachi_a_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 372 { INPUT, "accs", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCS), 0, 0 },
373 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
374 { OUTPUT, "accs", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCS), 0, 0 },
88845958 375 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 376};
377
bf143b25 378static const CGEN_OPINST sfmt_mvtc_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 379 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
380 { OUTPUT, "dcr", HW_H_CR, CGEN_MODE_USI, OP_ENT (DCR), 0, 0 },
88845958 381 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 382};
383
bf143b25 384static const CGEN_OPINST sfmt_nop_ops[] ATTRIBUTE_UNUSED = {
88845958 385 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 386};
387
bf143b25 388static const CGEN_OPINST sfmt_rac_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 389 { INPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
390 { OUTPUT, "accum", HW_H_ACCUM, CGEN_MODE_DI, 0, 0, 0 },
88845958 391 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 392};
393
bf143b25 394static const CGEN_OPINST sfmt_rac_dsi_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 395 { INPUT, "accs", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCS), 0, 0 },
396 { INPUT, "imm1", HW_H_UINT, CGEN_MODE_INT, OP_ENT (IMM1), 0, 0 },
397 { OUTPUT, "accd", HW_H_ACCUMS, CGEN_MODE_DI, OP_ENT (ACCD), 0, 0 },
88845958 398 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 399};
400
bf143b25 401static const CGEN_OPINST sfmt_rte_ops[] ATTRIBUTE_UNUSED = {
fc7bc883
RH		 402 { INPUT, "h_bbpsw_UQI", HW_H_BBPSW, CGEN_MODE_UQI, 0, 0, 0 },
403 { INPUT, "h_bpsw_UQI", HW_H_BPSW, CGEN_MODE_UQI, 0, 0, 0 },
404 { INPUT, "h_cr_USI_14", HW_H_CR, CGEN_MODE_USI, 0, 14, 0 },
405 { INPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 },
406 { OUTPUT, "h_bpsw_UQI", HW_H_BPSW, CGEN_MODE_UQI, 0, 0, 0 },
407 { OUTPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 },
408 { OUTPUT, "h_psw_UQI", HW_H_PSW, CGEN_MODE_UQI, 0, 0, 0 },
252b5132 409 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
88845958 410 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 411};
412
bf143b25 413static const CGEN_OPINST sfmt_seth_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 414 { INPUT, "hi16", HW_H_HI16, CGEN_MODE_SI, OP_ENT (HI16), 0, 0 },
415 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 416 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 417};
418
bf143b25 419static const CGEN_OPINST sfmt_sll3_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 420 { INPUT, "simm16", HW_H_SINT, CGEN_MODE_SI, OP_ENT (SIMM16), 0, 0 },
421 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
422 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 423 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 424};
425
bf143b25 426static const CGEN_OPINST sfmt_slli_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 427 { INPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
428 { INPUT, "uimm5", HW_H_UINT, CGEN_MODE_INT, OP_ENT (UIMM5), 0, 0 },
429 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 430 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 431};
432
bf143b25 433static const CGEN_OPINST sfmt_st_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 434 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
435 { INPUT, "src2", HW_H_GR, CGEN_MODE_USI, OP_ENT (SRC2), 0, 0 },
fc7bc883 436 { OUTPUT, "h_memory_SI_src2", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
88845958 437 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 438};
439
bf143b25 440static const CGEN_OPINST sfmt_st_d_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 441 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
442 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
443 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 444 { OUTPUT, "h_memory_SI_add__DFLT_src2_slo16", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
88845958 445 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 446};
447
bf143b25 448static const CGEN_OPINST sfmt_stb_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 449 { INPUT, "src1", HW_H_GR, CGEN_MODE_QI, OP_ENT (SRC1), 0, 0 },
450 { INPUT, "src2", HW_H_GR, CGEN_MODE_USI, OP_ENT (SRC2), 0, 0 },
fc7bc883 451 { OUTPUT, "h_memory_QI_src2", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
88845958 452 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 453};
454
bf143b25 455static const CGEN_OPINST sfmt_stb_d_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 456 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
457 { INPUT, "src1", HW_H_GR, CGEN_MODE_QI, OP_ENT (SRC1), 0, 0 },
458 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 459 { OUTPUT, "h_memory_QI_add__DFLT_src2_slo16", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
88845958 460 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 461};
462
bf143b25 463static const CGEN_OPINST sfmt_sth_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 464 { INPUT, "src1", HW_H_GR, CGEN_MODE_HI, OP_ENT (SRC1), 0, 0 },
465 { INPUT, "src2", HW_H_GR, CGEN_MODE_USI, OP_ENT (SRC2), 0, 0 },
fc7bc883 466 { OUTPUT, "h_memory_HI_src2", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 },
88845958 467 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 468};
469
bf143b25 470static const CGEN_OPINST sfmt_sth_d_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 471 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
472 { INPUT, "src1", HW_H_GR, CGEN_MODE_HI, OP_ENT (SRC1), 0, 0 },
473 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 474 { OUTPUT, "h_memory_HI_add__DFLT_src2_slo16", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 },
88845958 475 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 476};
477
bf143b25 478static const CGEN_OPINST sfmt_st_plus_ops[] ATTRIBUTE_UNUSED = {
252b5132
RH		 479 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
480 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 481 { OUTPUT, "h_memory_SI_new_src2", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, 0 },
252b5132 482 { OUTPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
88845958
NC		 483 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
484};
485
bf143b25 486static const CGEN_OPINST sfmt_sth_plus_ops[] ATTRIBUTE_UNUSED = {
88845958
NC		 487 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
488 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
489 { OUTPUT, "h_memory_HI_new_src2", HW_H_MEMORY, CGEN_MODE_HI, 0, 0, 0 },
490 { OUTPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
491 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
492};
493
bf143b25 494static const CGEN_OPINST sfmt_stb_plus_ops[] ATTRIBUTE_UNUSED = {
88845958
NC		 495 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
496 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
497 { OUTPUT, "h_memory_QI_new_src2", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
498 { OUTPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
499 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 500};
501
bf143b25 502static const CGEN_OPINST sfmt_trap_ops[] ATTRIBUTE_UNUSED = {
fc7bc883
RH		 503 { INPUT, "h_bpsw_UQI", HW_H_BPSW, CGEN_MODE_UQI, 0, 0, 0 },
504 { INPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 },
505 { INPUT, "h_psw_UQI", HW_H_PSW, CGEN_MODE_UQI, 0, 0, 0 },
252b5132
RH		 506 { INPUT, "pc", HW_H_PC, CGEN_MODE_USI, 0, 0, 0 },
507 { INPUT, "uimm4", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM4), 0, 0 },
fc7bc883
RH		 508 { OUTPUT, "h_bbpsw_UQI", HW_H_BBPSW, CGEN_MODE_UQI, 0, 0, 0 },
509 { OUTPUT, "h_bpsw_UQI", HW_H_BPSW, CGEN_MODE_UQI, 0, 0, 0 },
510 { OUTPUT, "h_cr_USI_14", HW_H_CR, CGEN_MODE_USI, 0, 14, 0 },
511 { OUTPUT, "h_cr_USI_6", HW_H_CR, CGEN_MODE_USI, 0, 6, 0 },
512 { OUTPUT, "h_psw_UQI", HW_H_PSW, CGEN_MODE_UQI, 0, 0, 0 },
252b5132 513 { OUTPUT, "pc", HW_H_PC, CGEN_MODE_SI, 0, 0, 0 },
88845958 514 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 515};
516
bf143b25 517static const CGEN_OPINST sfmt_unlock_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 518 { INPUT, "h_lock_BI", HW_H_LOCK, CGEN_MODE_BI, 0, 0, 0 },
252b5132
RH		 519 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, COND_REF },
520 { INPUT, "src2", HW_H_GR, CGEN_MODE_USI, OP_ENT (SRC2), 0, COND_REF },
fc7bc883
RH		 521 { OUTPUT, "h_lock_BI", HW_H_LOCK, CGEN_MODE_BI, 0, 0, 0 },
522 { OUTPUT, "h_memory_SI_src2", HW_H_MEMORY, CGEN_MODE_SI, 0, 0, COND_REF },
88845958 523 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
252b5132
RH		 524};
525
bf143b25 526static const CGEN_OPINST sfmt_satb_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 527 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
528 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 529 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 530};
531
bf143b25 532static const CGEN_OPINST sfmt_sat_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 533 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
534 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, COND_REF },
535 { OUTPUT, "dr", HW_H_GR, CGEN_MODE_SI, OP_ENT (DR), 0, 0 },
88845958 536 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 537};
538
bf143b25 539static const CGEN_OPINST sfmt_sadd_ops[] ATTRIBUTE_UNUSED = {
fc7bc883
RH		 540 { INPUT, "h_accums_DI_0", HW_H_ACCUMS, CGEN_MODE_DI, 0, 0, 0 },
541 { INPUT, "h_accums_DI_1", HW_H_ACCUMS, CGEN_MODE_DI, 0, 1, 0 },
542 { OUTPUT, "h_accums_DI_0", HW_H_ACCUMS, CGEN_MODE_DI, 0, 0, 0 },
88845958 543 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 544};
545
bf143b25 546static const CGEN_OPINST sfmt_macwu1_ops[] ATTRIBUTE_UNUSED = {
fc7bc883 547 { INPUT, "h_accums_DI_1", HW_H_ACCUMS, CGEN_MODE_DI, 0, 1, 0 },
1fa60b5d
DE		 548 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
549 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 550 { OUTPUT, "h_accums_DI_1", HW_H_ACCUMS, CGEN_MODE_DI, 0, 1, 0 },
88845958 551 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 552};
553
bf143b25 554static const CGEN_OPINST sfmt_mulwu1_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d
DE		 555 { INPUT, "src1", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC1), 0, 0 },
556 { INPUT, "src2", HW_H_GR, CGEN_MODE_SI, OP_ENT (SRC2), 0, 0 },
fc7bc883 557 { OUTPUT, "h_accums_DI_1", HW_H_ACCUMS, CGEN_MODE_DI, 0, 1, 0 },
88845958 558 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 559};
560
bf143b25 561static const CGEN_OPINST sfmt_sc_ops[] ATTRIBUTE_UNUSED = {
1fa60b5d 562 { INPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
88845958
NC		 563 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
564};
565
bf143b25 566static const CGEN_OPINST sfmt_clrpsw_ops[] ATTRIBUTE_UNUSED = {
88845958
NC		 567 { INPUT, "h_cr_USI_0", HW_H_CR, CGEN_MODE_USI, 0, 0, 0 },
568 { INPUT, "uimm8", HW_H_UINT, CGEN_MODE_BI, OP_ENT (UIMM8), 0, 0 },
569 { OUTPUT, "h_cr_USI_0", HW_H_CR, CGEN_MODE_USI, 0, 0, 0 },
570 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
571};
572
bf143b25 573static const CGEN_OPINST sfmt_setpsw_ops[] ATTRIBUTE_UNUSED = {
88845958
NC		 574 { INPUT, "uimm8", HW_H_UINT, CGEN_MODE_USI, OP_ENT (UIMM8), 0, 0 },
575 { OUTPUT, "h_cr_USI_0", HW_H_CR, CGEN_MODE_USI, 0, 0, 0 },
576 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
577};
578
bf143b25 579static const CGEN_OPINST sfmt_bset_ops[] ATTRIBUTE_UNUSED = {
88845958
NC		 580 { INPUT, "h_memory_QI_add__DFLT_sr_slo16", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
581 { INPUT, "slo16", HW_H_SLO16, CGEN_MODE_INT, OP_ENT (SLO16), 0, 0 },
582 { INPUT, "sr", HW_H_GR, CGEN_MODE_SI, OP_ENT (SR), 0, 0 },
583 { INPUT, "uimm3", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM3), 0, 0 },
584 { OUTPUT, "h_memory_QI_add__DFLT_sr_slo16", HW_H_MEMORY, CGEN_MODE_QI, 0, 0, 0 },
585 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
586};
587
bf143b25 588static const CGEN_OPINST sfmt_btst_ops[] ATTRIBUTE_UNUSED = {
88845958
NC		 589 { INPUT, "sr", HW_H_GR, CGEN_MODE_USI, OP_ENT (SR), 0, 0 },
590 { INPUT, "uimm3", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (UIMM3), 0, 0 },
591 { OUTPUT, "condbit", HW_H_COND, CGEN_MODE_BI, 0, 0, 0 },
592 { END, (const char *)0, (enum cgen_hw_type)0, (enum cgen_mode)0, (enum cgen_operand_type)0, 0, 0 }
1fa60b5d
DE		 593};
594
b3466c39 595#undef OP_ENT
252b5132
RH		 596#undef INPUT
597#undef OUTPUT
598#undef END
599#undef COND_REF
252b5132
RH		 600
601/* Operand instance lookup table. */
602
603static const CGEN_OPINST *m32r_cgen_opinst_table[MAX_INSNS] = {
604 0,
eb1b03df
DE		 605 & sfmt_add_ops[0],
606 & sfmt_add3_ops[0],
607 & sfmt_add_ops[0],
608 & sfmt_and3_ops[0],
609 & sfmt_add_ops[0],
610 & sfmt_or3_ops[0],
611 & sfmt_add_ops[0],
612 & sfmt_and3_ops[0],
613 & sfmt_addi_ops[0],
614 & sfmt_addv_ops[0],
615 & sfmt_addv3_ops[0],
616 & sfmt_addx_ops[0],
617 & sfmt_bc8_ops[0],
618 & sfmt_bc24_ops[0],
619 & sfmt_beq_ops[0],
620 & sfmt_beqz_ops[0],
621 & sfmt_beqz_ops[0],
622 & sfmt_beqz_ops[0],
623 & sfmt_beqz_ops[0],
624 & sfmt_beqz_ops[0],
625 & sfmt_beqz_ops[0],
626 & sfmt_bl8_ops[0],
627 & sfmt_bl24_ops[0],
1fa60b5d
DE		 628 & sfmt_bcl8_ops[0],
629 & sfmt_bcl24_ops[0],
eb1b03df
DE		 630 & sfmt_bc8_ops[0],
631 & sfmt_bc24_ops[0],
632 & sfmt_beq_ops[0],
633 & sfmt_bra8_ops[0],
634 & sfmt_bra24_ops[0],
1fa60b5d
DE		 635 & sfmt_bcl8_ops[0],
636 & sfmt_bcl24_ops[0],
eb1b03df
DE		 637 & sfmt_cmp_ops[0],
638 & sfmt_cmpi_ops[0],
639 & sfmt_cmp_ops[0],
640 & sfmt_cmpi_ops[0],
1fa60b5d
DE		 641 & sfmt_cmp_ops[0],
642 & sfmt_cmpz_ops[0],
eb1b03df
DE		 643 & sfmt_div_ops[0],
644 & sfmt_div_ops[0],
645 & sfmt_div_ops[0],
646 & sfmt_div_ops[0],
1fa60b5d 647 & sfmt_div_ops[0],
88845958
NC		 648 & sfmt_div_ops[0],
649 & sfmt_div_ops[0],
650 & sfmt_div_ops[0],
651 & sfmt_div_ops[0],
652 & sfmt_div_ops[0],
653 & sfmt_div_ops[0],
654 & sfmt_div_ops[0],
1fa60b5d
DE		 655 & sfmt_jc_ops[0],
656 & sfmt_jc_ops[0],
eb1b03df
DE		 657 & sfmt_jl_ops[0],
658 & sfmt_jmp_ops[0],
659 & sfmt_ld_ops[0],
660 & sfmt_ld_d_ops[0],
fc7bc883
RH		 661 & sfmt_ldb_ops[0],
662 & sfmt_ldb_d_ops[0],
663 & sfmt_ldh_ops[0],
664 & sfmt_ldh_d_ops[0],
665 & sfmt_ldb_ops[0],
666 & sfmt_ldb_d_ops[0],
667 & sfmt_ldh_ops[0],
668 & sfmt_ldh_d_ops[0],
eb1b03df
DE		 669 & sfmt_ld_plus_ops[0],
670 & sfmt_ld24_ops[0],
671 & sfmt_ldi8_ops[0],
672 & sfmt_ldi16_ops[0],
673 & sfmt_lock_ops[0],
674 & sfmt_machi_ops[0],
1fa60b5d 675 & sfmt_machi_a_ops[0],
eb1b03df 676 & sfmt_machi_ops[0],
1fa60b5d 677 & sfmt_machi_a_ops[0],
eb1b03df 678 & sfmt_machi_ops[0],
1fa60b5d 679 & sfmt_machi_a_ops[0],
eb1b03df 680 & sfmt_machi_ops[0],
1fa60b5d 681 & sfmt_machi_a_ops[0],
eb1b03df
DE		 682 & sfmt_add_ops[0],
683 & sfmt_mulhi_ops[0],
1fa60b5d 684 & sfmt_mulhi_a_ops[0],
eb1b03df 685 & sfmt_mulhi_ops[0],
1fa60b5d 686 & sfmt_mulhi_a_ops[0],
eb1b03df 687 & sfmt_mulhi_ops[0],
1fa60b5d 688 & sfmt_mulhi_a_ops[0],
eb1b03df 689 & sfmt_mulhi_ops[0],
1fa60b5d 690 & sfmt_mulhi_a_ops[0],
eb1b03df
DE		 691 & sfmt_mv_ops[0],
692 & sfmt_mvfachi_ops[0],
1fa60b5d 693 & sfmt_mvfachi_a_ops[0],
eb1b03df 694 & sfmt_mvfachi_ops[0],
1fa60b5d 695 & sfmt_mvfachi_a_ops[0],
eb1b03df 696 & sfmt_mvfachi_ops[0],
1fa60b5d 697 & sfmt_mvfachi_a_ops[0],
eb1b03df
DE		 698 & sfmt_mvfc_ops[0],
699 & sfmt_mvtachi_ops[0],
1fa60b5d 700 & sfmt_mvtachi_a_ops[0],
eb1b03df 701 & sfmt_mvtachi_ops[0],
1fa60b5d 702 & sfmt_mvtachi_a_ops[0],
eb1b03df
DE		 703 & sfmt_mvtc_ops[0],
704 & sfmt_mv_ops[0],
705 & sfmt_nop_ops[0],
706 & sfmt_mv_ops[0],
707 & sfmt_rac_ops[0],
1fa60b5d 708 & sfmt_rac_dsi_ops[0],
eb1b03df 709 & sfmt_rac_ops[0],
1fa60b5d 710 & sfmt_rac_dsi_ops[0],
eb1b03df
DE		 711 & sfmt_rte_ops[0],
712 & sfmt_seth_ops[0],
713 & sfmt_add_ops[0],
714 & sfmt_sll3_ops[0],
715 & sfmt_slli_ops[0],
716 & sfmt_add_ops[0],
717 & sfmt_sll3_ops[0],
718 & sfmt_slli_ops[0],
719 & sfmt_add_ops[0],
720 & sfmt_sll3_ops[0],
721 & sfmt_slli_ops[0],
722 & sfmt_st_ops[0],
723 & sfmt_st_d_ops[0],
724 & sfmt_stb_ops[0],
725 & sfmt_stb_d_ops[0],
726 & sfmt_sth_ops[0],
727 & sfmt_sth_d_ops[0],
728 & sfmt_st_plus_ops[0],
88845958
NC		 729 & sfmt_sth_plus_ops[0],
730 & sfmt_stb_plus_ops[0],
eb1b03df
DE		 731 & sfmt_st_plus_ops[0],
732 & sfmt_add_ops[0],
733 & sfmt_addv_ops[0],
734 & sfmt_addx_ops[0],
735 & sfmt_trap_ops[0],
736 & sfmt_unlock_ops[0],
1fa60b5d
DE		 737 & sfmt_satb_ops[0],
738 & sfmt_satb_ops[0],
739 & sfmt_sat_ops[0],
740 & sfmt_cmpz_ops[0],
741 & sfmt_sadd_ops[0],
742 & sfmt_macwu1_ops[0],
743 & sfmt_machi_ops[0],
744 & sfmt_mulwu1_ops[0],
745 & sfmt_macwu1_ops[0],
746 & sfmt_sc_ops[0],
747 & sfmt_sc_ops[0],
88845958
NC		 748 & sfmt_clrpsw_ops[0],
749 & sfmt_setpsw_ops[0],
750 & sfmt_bset_ops[0],
751 & sfmt_bset_ops[0],
752 & sfmt_btst_ops[0],
252b5132
RH		 753};
754
755/* Function to call before using the operand instance table. */
756
757void
758m32r_cgen_init_opinst_table (cd)
759 CGEN_CPU_DESC cd;
760{
761 int i;
762 const CGEN_OPINST **oi = & m32r_cgen_opinst_table[0];
763 CGEN_INSN *insns = (CGEN_INSN *) cd->insn_table.init_entries;
764 for (i = 0; i < MAX_INSNS; ++i)
765 insns[i].opinst = oi[i];
766}
GDB Binutils - Deliverables
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