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* Makefile.in (ALLDEPFILES): Add hpread.c.
[deliverable/binutils-gdb.git] / opcodes / mips-opc.c
CommitLineData
45b14705
ILT		 1/* mips.h. Mips opcode list for GDB, the GNU debugger.
2 Copyright 1993 Free Software Foundation, Inc.
3 Contributed by Ralph Campbell and OSF
4 Commented and modified by Ian Lance Taylor, Cygnus Support
5
6This file is part of GDB, GAS, and the GNU binutils.
7
8GDB, GAS, and the GNU binutils are free software; you can redistribute
9them and/or modify them under the terms of the GNU General Public
10License as published by the Free Software Foundation; either version
111, or (at your option) any later version.
12
13GDB, GAS, and the GNU binutils are distributed in the hope that they
14will be useful, but WITHOUT ANY WARRANTY; without even the implied
15warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
16the GNU General Public License for more details.
17
18You should have received a copy of the GNU General Public License
19along with this file; see the file COPYING. If not, write to the Free
20Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21
22#include <stdio.h>
23#include "ansidecl.h"
24#include "opcode/mips.h"
25
26/* Short hand so the lines aren't too long. */
27
2bef2d3e
ILT		 28#define LDD INSN_LOAD_MEMORY_DELAY
29#define LCD INSN_LOAD_COPROC_DELAY
45b14705
ILT		 30#define UBD INSN_UNCOND_BRANCH_DELAY
31#define CBD INSN_COND_BRANCH_DELAY
2bef2d3e
ILT		 32#define COD INSN_COPROC_MOVE_DELAY
33#define CLD INSN_COPROC_MEMORY_DELAY
34#define CBL INSN_COND_BRANCH_LIKELY
9978cd4d 35#define TRAP INSN_TRAP
45b14705
ILT		 36
37#define WR_d INSN_WRITE_GPR_D
38#define WR_t INSN_WRITE_GPR_T
39#define WR_31 INSN_WRITE_GPR_31
40#define WR_D INSN_WRITE_FPR_D
41#define WR_T INSN_WRITE_FPR_T
2bef2d3e 42#define WR_S INSN_WRITE_FPR_S
45b14705
ILT		 43#define RD_s INSN_READ_GPR_S
44#define RD_b INSN_READ_GPR_S
45#define RD_t INSN_READ_GPR_T
46#define RD_S INSN_READ_FPR_S
47#define RD_T INSN_READ_FPR_T
48#define WR_CC INSN_WRITE_COND_CODE
49#define RD_CC INSN_READ_COND_CODE
50#define RD_C0 INSN_COP
51#define RD_C1 INSN_COP
52#define RD_C2 INSN_COP
53#define RD_C3 INSN_COP
54#define WR_C0 INSN_COP
55#define WR_C1 INSN_COP
56#define WR_C2 INSN_COP
57#define WR_C3 INSN_COP
58#define WR_HI INSN_WRITE_HI
59#define WR_LO INSN_WRITE_LO
60#define RD_HI INSN_READ_HI
61#define RD_LO INSN_READ_LO
62
2bef2d3e
ILT		 63#define I2 INSN_ISA2
64#define I3 INSN_ISA3
65
45b14705
ILT		 66/* The order of overloaded instructions matters. Label arguments and
67 register arguments look the same. Instructions that can have either
68 for arguments must apear in the correct order in this table for the
69 assembler to pick the right one. In other words, entries with
70 immediate operands must apear after the same instruction with
71 registers.
72
73 Many instructions are short hand for other instructions (i.e., The
74 jal <register> instruction is short for jalr <register>). */
75
76const struct mips_opcode mips_opcodes[] = {
77/* These instructions appear first so that the disassembler will find
78 them first. The assemblers uses a hash table based on the
79 instruction name anyhow. */
80{"nop", "", 0x00000000, 0xffffffff, 0 },
81{"li", "t,j", 0x24000000, 0xffe00000, WR_t }, /* addiu */
82{"li", "t,i", 0x34000000, 0xffe00000, WR_t }, /* ori */
83{"li", "t,I", 0, (int) M_LI, INSN_MACRO },
84{"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d|RD_s }, /* addu */
85{"b", "p", 0x10000000, 0xffff0000, UBD }, /* beq 0,0 */
9978cd4d 86{"b", "p", 0x04010000, 0xffff0000, UBD }, /* bgez 0 */
a5ba0d3f 87{"bal", "p", 0x04110000, 0xffff0000, UBD|WR_31 }, /* bgezal 0 */
45b14705
ILT		 88
89{"abs", "d,v", 0, (int) M_ABS, INSN_MACRO },
90{"abs.s", "D,V", 0x46000005, 0xffff003f, WR_D|RD_S },
91{"abs.d", "D,V", 0x46200005, 0xffff003f, WR_D|RD_S },
45b14705
ILT		 92{"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_d|RD_s|RD_t },
93{"add", "t,r,I", 0, (int) M_ADD_I, INSN_MACRO },
94{"add.s", "D,V,T", 0x46000000, 0xffe0003f, WR_D|RD_S|RD_T },
95{"add.d", "D,V,T", 0x46200000, 0xffe0003f, WR_D|RD_S|RD_T },
96{"addi", "t,r,j", 0x20000000, 0xfc000000, WR_t|RD_s },
97{"addiu", "t,r,j", 0x24000000, 0xfc000000, WR_t|RD_s },
98{"addu", "d,v,t", 0x00000021, 0xfc0007ff, WR_d|RD_s|RD_t },
99{"addu", "t,r,I", 0, (int) M_ADDU_I, INSN_MACRO },
100{"and", "d,v,t", 0x00000024, 0xfc0007ff, WR_d|RD_s|RD_t },
101{"and", "t,r,I", 0, (int) M_AND_I, INSN_MACRO },
102{"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t|RD_s },
103/* b is at the top of the table. */
104/* bal is at the top of the table. */
105{"bc0f", "p", 0x41000000, 0xffff0000, CBD|RD_CC },
2bef2d3e 106{"bc0fl", "p", 0x41020000, 0xffff0000, CBL|RD_CC|I2 },
45b14705 107{"bc1f", "p", 0x45000000, 0xffff0000, CBD|RD_CC },
2bef2d3e 108{"bc1fl", "p", 0x45020000, 0xffff0000, CBL|RD_CC|I2 },
45b14705 109{"bc2f", "p", 0x49000000, 0xffff0000, CBD|RD_CC },
2bef2d3e 110{"bc2fl", "p", 0x49020000, 0xffff0000, CBL|RD_CC|I2 },
45b14705 111{"bc3f", "p", 0x4d000000, 0xffff0000, CBD|RD_CC },
2bef2d3e 112{"bc3fl", "p", 0x4d020000, 0xffff0000, CBL|RD_CC|I2 },
45b14705 113{"bc0t", "p", 0x41010000, 0xffff0000, CBD|RD_CC },
2bef2d3e 114{"bc0tl", "p", 0x41030000, 0xffff0000, CBL|RD_CC|I2 },
45b14705 115{"bc1t", "p", 0x45010000, 0xffff0000, CBD|RD_CC },
2bef2d3e 116{"bc1tl", "p", 0x45030000, 0xffff0000, CBL|RD_CC|I2 },
45b14705 117{"bc2t", "p", 0x49010000, 0xffff0000, CBD|RD_CC },
2bef2d3e 118{"bc2tl", "p", 0x49030000, 0xffff0000, CBL|RD_CC|I2 },
45b14705 119{"bc3t", "p", 0x4d010000, 0xffff0000, CBD|RD_CC },
2bef2d3e
ILT		 120{"bc3tl", "p", 0x4d030000, 0xffff0000, CBL|RD_CC|I2 },
121{"beqz", "s,p", 0x10000000, 0xfc1f0000, CBD|RD_s },
9978cd4d 122{"beqzl", "s,p", 0x50000000, 0xfc1f0000, CBL|RD_s|I2 },
45b14705
ILT		 123{"beq", "s,t,p", 0x10000000, 0xfc000000, CBD|RD_s|RD_t },
124{"beq", "s,I,p", 0, (int) M_BEQ_I, INSN_MACRO },
2bef2d3e
ILT		 125{"beql", "s,t,p", 0x50000000, 0xfc000000, CBL|RD_s|RD_t|I2},
126{"beql", "s,I,p", 2, (int) M_BEQL_I, INSN_MACRO },
45b14705
ILT		 127{"bge", "s,t,p", 0, (int) M_BGE, INSN_MACRO },
128{"bge", "s,I,p", 0, (int) M_BGE_I, INSN_MACRO },
2bef2d3e
ILT		 129{"bgel", "s,t,p", 2, (int) M_BGEL, INSN_MACRO },
130{"bgel", "s,I,p", 2, (int) M_BGEL_I, INSN_MACRO },
45b14705
ILT		 131{"bgeu", "s,t,p", 0, (int) M_BGEU, INSN_MACRO },
132{"bgeu", "s,I,p", 0, (int) M_BGEU_I, INSN_MACRO },
2bef2d3e
ILT		 133{"bgeul", "s,t,p", 2, (int) M_BGEUL, INSN_MACRO },
134{"bgeul", "s,I,p", 2, (int) M_BGEUL_I, INSN_MACRO },
45b14705 135{"bgez", "s,p", 0x04010000, 0xfc1f0000, CBD|RD_s },
9978cd4d 136{"bgezl", "s,p", 0x04030000, 0xfc1f0000, CBL|RD_s|I2 },
a5ba0d3f 137{"bgezal", "s,p", 0x04110000, 0xfc1f0000, CBD|RD_s|WR_31 },
9978cd4d 138{"bgezall", "s,p", 0x04130000, 0xfc1f0000, CBL|RD_s|I2 },
45b14705
ILT		 139{"bgt", "s,t,p", 0, (int) M_BGT, INSN_MACRO },
140{"bgt", "s,I,p", 0, (int) M_BGT_I, INSN_MACRO },
2bef2d3e
ILT		 141{"bgtl", "s,t,p", 2, (int) M_BGTL, INSN_MACRO },
142{"bgtl", "s,I,p", 2, (int) M_BGTL_I, INSN_MACRO },
45b14705
ILT		 143{"bgtu", "s,t,p", 0, (int) M_BGTU, INSN_MACRO },
144{"bgtu", "s,I,p", 0, (int) M_BGTU_I, INSN_MACRO },
2bef2d3e
ILT		 145{"bgtul", "s,t,p", 2, (int) M_BGTUL, INSN_MACRO },
146{"bgtul", "s,I,p", 2, (int) M_BGTUL_I, INSN_MACRO },
45b14705 147{"bgtz", "s,p", 0x1c000000, 0xfc1f0000, CBD|RD_s },
9978cd4d 148{"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, CBL|RD_s|I2 },
45b14705
ILT		 149{"ble", "s,t,p", 0, (int) M_BLE, INSN_MACRO },
150{"ble", "s,I,p", 0, (int) M_BLE_I, INSN_MACRO },
2bef2d3e
ILT		 151{"blel", "s,t,p", 2, (int) M_BLEL, INSN_MACRO },
152{"blel", "s,I,p", 2, (int) M_BLEL_I, INSN_MACRO },
45b14705
ILT		 153{"bleu", "s,t,p", 0, (int) M_BLEU, INSN_MACRO },
154{"bleu", "s,I,p", 0, (int) M_BLEU_I, INSN_MACRO },
2bef2d3e
ILT		 155{"bleul", "s,t,p", 2, (int) M_BLEUL, INSN_MACRO },
156{"bleul", "s,I,p", 2, (int) M_BLEUL_I, INSN_MACRO },
45b14705 157{"blez", "s,p", 0x18000000, 0xfc1f0000, CBD|RD_s },
9978cd4d 158{"blezl", "s,p", 0x58000000, 0xfc1f0000, CBL|RD_s|I2 },
45b14705
ILT		 159{"blt", "s,t,p", 0, (int) M_BLT, INSN_MACRO },
160{"blt", "s,I,p", 0, (int) M_BLT_I, INSN_MACRO },
2bef2d3e
ILT		 161{"bltl", "s,t,p", 2, (int) M_BLTL, INSN_MACRO },
162{"bltl", "s,I,p", 2, (int) M_BLTL_I, INSN_MACRO },
45b14705
ILT		 163{"bltu", "s,t,p", 0, (int) M_BLTU, INSN_MACRO },
164{"bltu", "s,I,p", 0, (int) M_BLTU_I, INSN_MACRO },
2bef2d3e
ILT		 165{"bltul", "s,t,p", 2, (int) M_BLTUL, INSN_MACRO },
166{"bltul", "s,I,p", 2, (int) M_BLTUL_I, INSN_MACRO },
45b14705 167{"bltz", "s,p", 0x04000000, 0xfc1f0000, CBD|RD_s },
9978cd4d 168{"bltzl", "s,p", 0x04020000, 0xfc1f0000, CBL|RD_s|I2 },
a5ba0d3f 169{"bltzal", "s,p", 0x04100000, 0xfc1f0000, CBD|RD_s|WR_31 },
9978cd4d 170{"bltzall", "s,p", 0x04120000, 0xfc1f0000, CBL|RD_s|I2 },
2bef2d3e 171{"bnez", "s,p", 0x14000000, 0xfc1f0000, CBD|RD_s },
9978cd4d 172{"bnezl", "s,p", 0x54000000, 0xfc1f0000, CBL|RD_s|I2 },
45b14705
ILT		 173{"bne", "s,t,p", 0x14000000, 0xfc000000, CBD|RD_s|RD_t },
174{"bne", "s,I,p", 0, (int) M_BNE_I, INSN_MACRO },
9978cd4d 175{"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL|RD_s|RD_t|I2},
2bef2d3e 176{"bnel", "s,I,p", 2, (int) M_BNEL_I, INSN_MACRO },
9978cd4d
ILT		 177{"break", "", 0x0000000d, 0xffffffff, TRAP },
178{"break", "c", 0x0000000d, 0xfc00003f, TRAP },
45b14705
ILT		 179{"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_S|RD_T|WR_CC },
180{"c.f.s", "S,T", 0x46000030, 0xffe007ff, RD_S|RD_T|WR_CC },
181{"c.un.d", "S,T", 0x46200031, 0xffe007ff, RD_S|RD_T|WR_CC },
182{"c.un.s", "S,T", 0x46000031, 0xffe007ff, RD_S|RD_T|WR_CC },
183{"c.eq.d", "S,T", 0x46200032, 0xffe007ff, RD_S|RD_T|WR_CC },
184{"c.eq.s", "S,T", 0x46000032, 0xffe007ff, RD_S|RD_T|WR_CC },
185{"c.ueq.d", "S,T", 0x46200033, 0xffe007ff, RD_S|RD_T|WR_CC },
186{"c.ueq.s", "S,T", 0x46000033, 0xffe007ff, RD_S|RD_T|WR_CC },
187{"c.olt.d", "S,T", 0x46200034, 0xffe007ff, RD_S|RD_T|WR_CC },
188{"c.olt.s", "S,T", 0x46000034, 0xffe007ff, RD_S|RD_T|WR_CC },
189{"c.ult.d", "S,T", 0x46200035, 0xffe007ff, RD_S|RD_T|WR_CC },
190{"c.ult.s", "S,T", 0x46000035, 0xffe007ff, RD_S|RD_T|WR_CC },
191{"c.ole.d", "S,T", 0x46200036, 0xffe007ff, RD_S|RD_T|WR_CC },
192{"c.ole.s", "S,T", 0x46000036, 0xffe007ff, RD_S|RD_T|WR_CC },
193{"c.ule.d", "S,T", 0x46200037, 0xffe007ff, RD_S|RD_T|WR_CC },
194{"c.ule.s", "S,T", 0x46000037, 0xffe007ff, RD_S|RD_T|WR_CC },
195{"c.sf.d", "S,T", 0x46200038, 0xffe007ff, RD_S|RD_T|WR_CC },
196{"c.sf.s", "S,T", 0x46000038, 0xffe007ff, RD_S|RD_T|WR_CC },
197{"c.ngle.d","S,T", 0x46200039, 0xffe007ff, RD_S|RD_T|WR_CC },
198{"c.ngle.s","S,T", 0x46000039, 0xffe007ff, RD_S|RD_T|WR_CC },
199{"c.seq.d", "S,T", 0x4620003a, 0xffe007ff, RD_S|RD_T|WR_CC },
200{"c.seq.s", "S,T", 0x4600003a, 0xffe007ff, RD_S|RD_T|WR_CC },
201{"c.ngl.d", "S,T", 0x4620003b, 0xffe007ff, RD_S|RD_T|WR_CC },
202{"c.ngl.s", "S,T", 0x4600003b, 0xffe007ff, RD_S|RD_T|WR_CC },
203{"c.lt.d", "S,T", 0x4620003c, 0xffe007ff, RD_S|RD_T|WR_CC },
204{"c.lt.s", "S,T", 0x4600003c, 0xffe007ff, RD_S|RD_T|WR_CC },
205{"c.nge.d", "S,T", 0x4620003d, 0xffe007ff, RD_S|RD_T|WR_CC },
206{"c.nge.s", "S,T", 0x4600003d, 0xffe007ff, RD_S|RD_T|WR_CC },
207{"c.le.d", "S,T", 0x4620003e, 0xffe007ff, RD_S|RD_T|WR_CC },
208{"c.le.s", "S,T", 0x4600003e, 0xffe007ff, RD_S|RD_T|WR_CC },
209{"c.ngt.d", "S,T", 0x4620003f, 0xffe007ff, RD_S|RD_T|WR_CC },
210{"c.ngt.s", "S,T", 0x4600003f, 0xffe007ff, RD_S|RD_T|WR_CC },
2bef2d3e
ILT		 211{"cache", "t,o(b)", 0xbc000000, 0xfc000000, RD_b|I3 },
212{"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D|RD_S|I3 },
213{"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D|RD_S|I3 },
214{"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D|RD_S|I2 },
215{"ceil.w.s", "D,S", 0x4600000e, 0xffff003f, WR_D|RD_S|I2 },
216{"cfc0", "t,G", 0x40400000, 0xffe007ff, LCD|WR_t|RD_C0 },
217{"cfc1", "t,G", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1 },
218{"cfc1", "t,S", 0x44400000, 0xffe007ff, LCD|WR_t|RD_C1 },
219{"cfc2", "t,G", 0x48400000, 0xffe007ff, LCD|WR_t|RD_C2 },
220{"cfc3", "t,G", 0x4c400000, 0xffe007ff, LCD|WR_t|RD_C3 },
45b14705
ILT		 221{"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD|RD_t|WR_CC },
222{"ctc1", "t,G", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC },
223{"ctc1", "t,S", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC },
224{"ctc2", "t,G", 0x48c00000, 0xffe007ff, COD|RD_t|WR_CC },
225{"ctc3", "t,G", 0x4cc00000, 0xffe007ff, COD|RD_t|WR_CC },
2bef2d3e 226{"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D|RD_S|I3 },
45b14705
ILT		 227{"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_D|RD_S },
228{"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_D|RD_S },
2bef2d3e
ILT		 229{"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D|RD_S|I3 },
230{"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D|RD_S|I3 },
231{"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D|RD_S|I3 },
45b14705
ILT		 232{"cvt.s.d", "D,S", 0x46200020, 0xffff003f, WR_D|RD_S },
233{"cvt.s.w", "D,S", 0x46800020, 0xffff003f, WR_D|RD_S },
234{"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_D|RD_S },
235{"cvt.w.s", "D,S", 0x46000024, 0xffff003f, WR_D|RD_S },
a5ba0d3f 236{"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO },
2bef2d3e
ILT		 237{"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_d|RD_s|RD_t|I3},
238{"dadd", "t,r,I", 3, (int) M_DADD_I, INSN_MACRO },
239{"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_t|RD_s|I3 },
240{"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_t|RD_s|I3 },
241{"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_d|RD_s|RD_t|I3},
242{"daddu", "t,r,I", 3, (int) M_DADDU_I, INSN_MACRO },
a9c686ad 243/* For ddiv, see the comments about div. */
547998d2 244{"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|I3 },
a9c686ad 245{"ddiv", "d,v,t", 3, (int) M_DDIV_3, INSN_MACRO },
2bef2d3e 246{"ddiv", "d,v,I", 3, (int) M_DDIV_3I, INSN_MACRO },
a9c686ad 247/* For ddivu, see the comments about div. */
547998d2 248{"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|I3 },
a9c686ad 249{"ddivu", "d,v,t", 3, (int) M_DDIVU_3, INSN_MACRO },
2bef2d3e 250{"ddivu", "d,v,I", 3, (int) M_DDIVU_3I, INSN_MACRO },
a9c686ad
ILT		 251/* The MIPS assembler treats the div opcode with two operands as
252 though the first operand appeared twice (the first operand is both
253 a source and a destination). To get the div machine instruction,
547998d2
ILT		 254 you must use an explicit destination of $0. */
255{"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO },
a9c686ad 256{"div", "d,v,t", 0, (int) M_DIV_3, INSN_MACRO },
45b14705
ILT		 257{"div", "d,v,I", 0, (int) M_DIV_3I, INSN_MACRO },
258{"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_D|RD_S|RD_T },
259{"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_D|RD_S|RD_T },
a9c686ad 260/* For divu, see the comments about div. */
547998d2 261{"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO },
a9c686ad 262{"divu", "d,v,t", 0, (int) M_DIVU_3, INSN_MACRO },
45b14705 263{"divu", "d,v,I", 0, (int) M_DIVU_3I, INSN_MACRO },
2bef2d3e
ILT		 264{"dmfc0", "t,G", 0x40200000, 0xffe007ff, LCD|WR_t|RD_C0|I3 },
265{"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC|I3 },
266{"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD|WR_t|RD_S|I3 },
267{"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD|RD_t|WR_S|I3 },
268{"dmul", "d,v,t", 3, (int) M_DMUL, INSN_MACRO },
269{"dmul", "d,v,I", 3, (int) M_DMUL_I, INSN_MACRO },
270{"dmulo", "d,v,t", 3, (int) M_DMULO, INSN_MACRO },
271{"dmulo", "d,v,I", 3, (int) M_DMULO_I, INSN_MACRO },
272{"dmulou", "d,v,t", 3, (int) M_DMULOU, INSN_MACRO },
273{"dmulou", "d,v,I", 3, (int) M_DMULOU_I, INSN_MACRO },
274{"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|I3 },
275{"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|I3 },
276{"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_d|RD_t|I3 }, /* dsub 0 */
277{"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_d|RD_t|I3 }, /* dsubu 0*/
547998d2 278{"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|I3 },
2bef2d3e
ILT		 279{"drem", "d,v,t", 3, (int) M_DREM_3, INSN_MACRO },
280{"drem", "d,v,I", 3, (int) M_DREM_3I, INSN_MACRO },
547998d2 281{"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|I3 },
2bef2d3e
ILT		 282{"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO },
283{"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO },
284{"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s|I3},
285{"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s|I3}, /* dsllv */
286{"dsll", "d,w,<", 0x00000038, 0xffe0003f, WR_d|RD_t|I3 },
287{"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t|I3 },
288{"dsrav", "d,t,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s|I3},
289{"dsra", "d,w,s", 0x00000017, 0xfc0007ff, WR_d|RD_t|RD_s|I3}, /* dsrav */
290{"dsra", "d,w,<", 0x0000003b, 0xffe0003f, WR_d|RD_t|I3 },
291{"dsra32", "d,w,<", 0x0000003f, 0xffe0003f, WR_d|RD_t|I3 },
292{"dsrlv", "d,t,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s|I3},
293{"dsrl", "d,w,s", 0x00000016, 0xfc0007ff, WR_d|RD_t|RD_s|I3}, /* dsrlv */
294{"dsrl", "d,w,<", 0x0000003a, 0xffe0003f, WR_d|RD_t|I3 },
295{"dsrl32", "d,w,<", 0x0000003e, 0xffe0003f, WR_d|RD_t|I3 },
296{"dsub", "d,v,t", 0x0000002e, 0xfc0007ff, WR_d|RD_s|RD_t|I3},
297{"dsub", "d,v,I", 3, (int) M_DSUB_I, INSN_MACRO },
298{"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_d|RD_s|RD_t|I3},
299{"dsubu", "d,v,I", 3, (int) M_DSUBU_I, INSN_MACRO },
300{"eret", "", 0x42000018, 0xffffffff, I3 },
301{"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D|RD_S|I3 },
302{"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D|RD_S|I3 },
303{"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D|RD_S|I2 },
304{"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D|RD_S|I2 },
45b14705
ILT		 305{"jr", "s", 0x00000008, 0xfc1fffff, UBD|RD_s },
306{"j", "s", 0x00000008, 0xfc1fffff, UBD|RD_s },
307{"j", "a", 0x08000000, 0xfc000000, UBD },
308{"jalr", "s", 0x0000f809, 0xfc1fffff, UBD|RD_s|WR_d },
309{"jalr", "d,s", 0x00000009, 0xfc1f07ff, UBD|RD_s|WR_d },
310{"jal", "d,s", 0x00000009, 0xfc1f07ff, UBD|RD_s|WR_d },/* jalr */
2bef2d3e 311{"jal", "s", 0x0000f809, 0xfc1fffff, UBD|RD_s|WR_d },/* jalr $ra*/
45b14705 312{"jal", "a", 0x0c000000, 0xfc000000, UBD|WR_31 },
2bef2d3e 313{"l.d", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|I2},
45b14705
ILT		 314{"l.d", "T,o(b)", 0, (int) M_L_DOB, INSN_MACRO },
315{"l.d", "T,A(b)", 0, (int) M_L_DAB, INSN_MACRO },
316{"la", "t,A", 0, (int) M_LA, INSN_MACRO },
317{"la", "t,A(b)", 0, (int) M_LA_AB, INSN_MACRO },
318{"lb", "t,o(b)", 0x80000000, 0xfc000000, LDD|RD_b|WR_t },
319{"lb", "t,A(b)", 0, (int) M_LB_AB, INSN_MACRO },
320{"lbu", "t,o(b)", 0x90000000, 0xfc000000, LDD|RD_b|WR_t },
321{"lbu", "t,A(b)", 0, (int) M_LBU_AB, INSN_MACRO },
2bef2d3e 322{"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t|RD_b|I3 },
45b14705
ILT		 323{"ld", "t,o(b)", 0, (int) M_LD_OB, INSN_MACRO },
324{"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO },
2bef2d3e
ILT		 325{"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|I2},
326{"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|I2},
327{"ldc1", "T,A(b)", 2, (int) M_LDC1_AB, INSN_MACRO },
328{"ldc1", "E,A(b)", 2, (int) M_LDC1_AB, INSN_MACRO },
329{"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, CLD|RD_b|WR_CC|I2},
330{"ldc2", "E,A(b)", 2, (int) M_LDC2_AB, INSN_MACRO },
331{"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, CLD|RD_b|WR_CC|I2},
332{"ldc3", "E,A(b)", 2, (int) M_LDC3_AB, INSN_MACRO },
333{"ldl", "t,o(b)", 0x68000000, 0xfc000000, LDD|WR_t|RD_b|I3},
334{"ldl", "t,A(b)", 3, (int) M_LDL_AB, INSN_MACRO },
335{"ldr", "t,o(b)", 0x6c000000, 0xfc000000, LDD|WR_t|RD_b|I3},
336{"ldr", "t,A(b)", 3, (int) M_LDR_AB, INSN_MACRO },
45b14705
ILT		 337{"lh", "t,o(b)", 0x84000000, 0xfc000000, LDD|RD_b|WR_t },
338{"lh", "t,A(b)", 0, (int) M_LH_AB, INSN_MACRO },
339{"lhu", "t,o(b)", 0x94000000, 0xfc000000, LDD|RD_b|WR_t },
340{"lhu", "t,A(b)", 0, (int) M_LHU_AB, INSN_MACRO },
341/* li is at the start of the table. */
342{"li.d", "t,F", 0, (int) M_LI_D, INSN_MACRO },
343{"li.d", "T,L", 0, (int) M_LI_DD, INSN_MACRO },
344{"li.s", "t,f", 0, (int) M_LI_S, INSN_MACRO },
345{"li.s", "T,l", 0, (int) M_LI_SS, INSN_MACRO },
2bef2d3e
ILT		 346{"ll", "t,o(b)", 0xc0000000, 0xfc000000, LDD|RD_b|WR_t|I2},
347{"ll", "t,A(b)", 2, (int) M_LL_AB, INSN_MACRO },
348{"lld", "t,o(b)", 0xd0000000, 0xfc000000, LDD|RD_b|WR_t|I3},
349{"lld", "t,A(b)", 3, (int) M_LLD_AB, INSN_MACRO },
45b14705
ILT		 350{"lui", "t,u", 0x3c000000, 0xffe00000, WR_t },
351{"lw", "t,o(b)", 0x8c000000, 0xfc000000, LDD|RD_b|WR_t },
352{"lw", "t,A(b)", 0, (int) M_LW_AB, INSN_MACRO },
2bef2d3e 353{"lwc0", "E,o(b)", 0xc0000000, 0xfc000000, CLD|RD_b|WR_CC },
45b14705 354{"lwc0", "E,A(b)", 0, (int) M_LWC0_AB, INSN_MACRO },
2bef2d3e
ILT		 355{"lwc1", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T },
356{"lwc1", "E,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T },
45b14705
ILT		 357{"lwc1", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO },
358{"lwc1", "E,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO },
2bef2d3e 359{"l.s", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T }, /* lwc1 */
45b14705 360{"l.s", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO },
2bef2d3e 361{"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, CLD|RD_b|WR_CC },
45b14705 362{"lwc2", "E,A(b)", 0, (int) M_LWC2_AB, INSN_MACRO },
2bef2d3e 363{"lwc3", "E,o(b)", 0xcc000000, 0xfc000000, CLD|RD_b|WR_CC },
45b14705
ILT		 364{"lwc3", "E,A(b)", 0, (int) M_LWC3_AB, INSN_MACRO },
365{"lwl", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t },
366{"lwl", "t,A(b)", 0, (int) M_LWL_AB, INSN_MACRO },
2bef2d3e
ILT		 367{"lcache", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t|I2}, /* same */
368{"lcache", "t,A(b)", 2, (int) M_LWL_AB, INSN_MACRO }, /* as lwl */
45b14705
ILT		 369{"lwr", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t },
370{"lwr", "t,A(b)", 0, (int) M_LWR_AB, INSN_MACRO },
2bef2d3e
ILT		 371{"flush", "t,o(b)", 0x98000000, 0xfc000000, LDD|RD_b|WR_t|I2}, /* same */
372{"flush", "t,A(b)", 2, (int) M_LWR_AB, INSN_MACRO }, /* as lwr */
9978cd4d 373{"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD|RD_b|WR_t|I3},
2bef2d3e
ILT		 374{"lwu", "t,A(b)", 3, (int) M_LWU_AB, INSN_MACRO },
375{"mfc0", "t,G", 0x40000000, 0xffe007ff, LCD|WR_t|RD_C0 },
376{"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S },
377{"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD|WR_t|RD_S },
378{"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD|WR_t|RD_C2 },
379{"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD|WR_t|RD_C3 },
45b14705
ILT		 380{"mfhi", "d", 0x00000010, 0xffff07ff, WR_d|RD_HI },
381{"mflo", "d", 0x00000012, 0xffff07ff, WR_d|RD_LO },
382{"mov.d", "D,S", 0x46200006, 0xffff003f, WR_D|RD_S },
383{"mov.s", "D,S", 0x46000006, 0xffff003f, WR_D|RD_S },
384/* move is at the top of the table. */
385{"mtc0", "t,G", 0x40800000, 0xffe007ff, COD|RD_t|WR_C0|WR_CC },
2bef2d3e
ILT		 386{"mtc1", "t,S", 0x44800000, 0xffe007ff, COD|RD_t|WR_S },
387{"mtc1", "t,G", 0x44800000, 0xffe007ff, COD|RD_t|WR_S },
45b14705
ILT		 388{"mtc2", "t,G", 0x48800000, 0xffe007ff, COD|RD_t|WR_C2|WR_CC },
389{"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC },
390{"mthi", "s", 0x00000011, 0xfc1fffff, RD_s|WR_HI },
391{"mtlo", "s", 0x00000013, 0xfc1fffff, RD_s|WR_LO },
392{"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_D|RD_S|RD_T },
393{"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_D|RD_S|RD_T },
394{"mul", "d,v,t", 0, (int) M_MUL, INSN_MACRO },
395{"mul", "d,v,I", 0, (int) M_MUL_I, INSN_MACRO },
396{"mulo", "d,v,t", 0, (int) M_MULO, INSN_MACRO },
397{"mulo", "d,v,I", 0, (int) M_MULO_I, INSN_MACRO },
398{"mulou", "d,v,t", 0, (int) M_MULOU, INSN_MACRO },
399{"mulou", "d,v,I", 0, (int) M_MULOU_I, INSN_MACRO },
400{"mult", "s,t", 0x00000018, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO },
401{"multu", "s,t", 0x00000019, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO },
402{"neg", "d,w", 0x00000022, 0xffe007ff, WR_d|RD_t }, /* sub 0 */
403{"negu", "d,w", 0x00000023, 0xffe007ff, WR_d|RD_t }, /* subu 0 */
404{"neg.d", "D,V", 0x46200007, 0xffff003f, WR_D|RD_S },
405{"neg.s", "D,V", 0x46000007, 0xffff003f, WR_D|RD_S },
406/* nop is at the start of the table. */
407{"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_d|RD_s|RD_t },
408{"nor", "d,v,I", 0, (int) M_NOR_I, INSN_MACRO },
409{"not", "d,v", 0x00000027, 0xfc0007ff, WR_d|RD_s|RD_t }, /* nor d,s,zero */
410{"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_d|RD_s|RD_t },
411{"or", "t,r,I", 0, (int) M_OR_I, INSN_MACRO },
412{"ori", "t,r,i", 0x34000000, 0xfc000000, WR_t|RD_s },
547998d2 413{"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO },
45b14705
ILT		 414{"rem", "d,v,t", 0, (int) M_REM_3, INSN_MACRO },
415{"rem", "d,v,I", 0, (int) M_REM_3I, INSN_MACRO },
547998d2 416{"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO },
45b14705
ILT		 417{"remu", "d,v,t", 0, (int) M_REMU_3, INSN_MACRO },
418{"remu", "d,v,I", 0, (int) M_REMU_3I, INSN_MACRO },
419{"rfe", "", 0x42000010, 0xffffffff, INSN_RFE },
420{"rol", "d,v,t", 0, (int) M_ROL, INSN_MACRO },
421{"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO },
422{"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO },
423{"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO },
2bef2d3e
ILT		 424{"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|I3 },
425{"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|I3 },
426{"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|I2 },
427{"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_D|RD_S|I2 },
45b14705
ILT		 428{"sb", "t,o(b)", 0xa0000000, 0xfc000000, RD_t|RD_b },
429{"sb", "t,A(b)", 0, (int) M_SB_AB, INSN_MACRO },
2bef2d3e
ILT		 430{"sc", "t,o(b)", 0xe0000000, 0xfc000000, RD_t|RD_b|I2 },
431{"sc", "t,A(b)", 2, (int) M_SC_AB, INSN_MACRO },
432{"scd", "t,o(b)", 0xf0000000, 0xfc000000, RD_t|RD_b|I3 },
433{"scd", "t,A(b)", 3, (int) M_SCD_AB, INSN_MACRO },
434{"sd", "t,o(b)", 0xfc000000, 0xfc000000, RD_t|RD_b|I3 },
45b14705
ILT		 435{"sd", "t,o(b)", 0, (int) M_SD_OB, INSN_MACRO },
436{"sd", "t,A(b)", 0, (int) M_SD_AB, INSN_MACRO },
2bef2d3e
ILT		 437{"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, RD_T|RD_b|I2 },
438{"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, RD_T|RD_b|I2 },
439{"sdc1", "T,A(b)", 2, (int) M_SDC1_AB, INSN_MACRO },
440{"sdc1", "E,A(b)", 2, (int) M_SDC1_AB, INSN_MACRO },
441{"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, RD_C2|RD_b|I2 },
442{"sdc2", "E,A(b)", 2, (int) M_SDC2_AB, INSN_MACRO },
443{"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, RD_C3|RD_b|I2 },
444{"sdc3", "E,A(b)", 2, (int) M_SDC3_AB, INSN_MACRO },
445{"s.d", "T,o(b)", 0xf4000000, 0xfc000000, RD_T|RD_b|I2 },
446{"s.d", "T,o(b)", 0, (int) M_S_DOB, INSN_MACRO },
447{"s.d", "T,A(b)", 0, (int) M_S_DAB, INSN_MACRO },
448{"sdl", "t,o(b)", 0xb0000000, 0xfc000000, RD_t|RD_b|I3 },
449{"sdl", "t,A(b)", 3, (int) M_SDL_AB, INSN_MACRO },
450{"sdr", "t,o(b)", 0xb4000000, 0xfc000000, RD_t|RD_b|I3 },
451{"sdr", "t,A(b)", 3, (int) M_SDR_AB, INSN_MACRO },
45b14705
ILT		 452{"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO },
453{"seq", "d,v,I", 0, (int) M_SEQ_I, INSN_MACRO },
454{"sge", "d,v,t", 0, (int) M_SGE, INSN_MACRO },
455{"sge", "d,v,I", 0, (int) M_SGE_I, INSN_MACRO },
456{"sgeu", "d,v,t", 0, (int) M_SGEU, INSN_MACRO },
457{"sgeu", "d,v,I", 0, (int) M_SGEU_I, INSN_MACRO },
458{"sgt", "d,v,t", 0, (int) M_SGT, INSN_MACRO },
459{"sgt", "d,v,I", 0, (int) M_SGT_I, INSN_MACRO },
460{"sgtu", "d,v,t", 0, (int) M_SGTU, INSN_MACRO },
461{"sgtu", "d,v,I", 0, (int) M_SGTU_I, INSN_MACRO },
462{"sh", "t,o(b)", 0xa4000000, 0xfc000000, RD_t|RD_b },
463{"sh", "t,A(b)", 0, (int) M_SH_AB, INSN_MACRO },
464{"sle", "d,v,t", 0, (int) M_SLE, INSN_MACRO },
465{"sle", "d,v,I", 0, (int) M_SLE_I, INSN_MACRO },
466{"sleu", "d,v,t", 0, (int) M_SLEU, INSN_MACRO },
467{"sleu", "d,v,I", 0, (int) M_SLEU_I, INSN_MACRO },
468{"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s },
469{"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_d|RD_t|RD_s }, /* sllv */
470{"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_d|RD_t },
471{"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_d|RD_s|RD_t },
472{"slt", "d,v,I", 0, (int) M_SLT_I, INSN_MACRO },
473{"slti", "t,r,j", 0x28000000, 0xfc000000, WR_t|RD_s },
474{"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_t|RD_s },
475{"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_d|RD_s|RD_t },
476{"sltu", "d,v,I", 0, (int) M_SLTU_I, INSN_MACRO },
477{"sne", "d,v,t", 0, (int) M_SNE, INSN_MACRO },
478{"sne", "d,v,I", 0, (int) M_SNE_I, INSN_MACRO },
2bef2d3e
ILT		 479{"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_D|RD_S|I2 },
480{"sqrt.w", "D,S", 0x46000004, 0xffff003f, WR_D|RD_S|I2 },
45b14705
ILT		 481{"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s },
482{"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_d|RD_t|RD_s }, /* srav */
483{"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_d|RD_t },
484{"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s },
485{"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_d|RD_t|RD_s }, /* srlv */
486{"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_d|RD_t },
487{"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_d|RD_s|RD_t },
488{"sub", "d,v,I", 0, (int) M_SUB_I, INSN_MACRO },
489{"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_D|RD_S|RD_T },
490{"sub.s", "D,V,T", 0x46000001, 0xffe0003f, WR_D|RD_S|RD_T },
491{"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_d|RD_s|RD_t },
492{"subu", "d,v,I", 0, (int) M_SUBU_I, INSN_MACRO },
493{"sw", "t,o(b)", 0xac000000, 0xfc000000, RD_t|RD_b },
494{"sw", "t,A(b)", 0, (int) M_SW_AB, INSN_MACRO },
495{"swc0", "E,o(b)", 0xe0000000, 0xfc000000, RD_C0|RD_b },
496{"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO },
497{"swc1", "T,o(b)", 0xe4000000, 0xfc000000, RD_T|RD_b },
498{"swc1", "E,o(b)", 0xe4000000, 0xfc000000, RD_T|RD_b },
499{"swc1", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO },
500{"swc1", "E,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO },
501{"s.s", "T,o(b)", 0xe4000000, 0xfc000000, RD_T|RD_b }, /* swc1 */
502{"s.s", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO },
503{"swc2", "E,o(b)", 0xe8000000, 0xfc000000, RD_C2|RD_b },
504{"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO },
505{"swc3", "E,o(b)", 0xec000000, 0xfc000000, RD_C3|RD_b },
506{"swc3", "E,A(b)", 0, (int) M_SWC3_AB, INSN_MACRO },
507{"swl", "t,o(b)", 0xa8000000, 0xfc000000, RD_t|RD_b },
508{"swl", "t,A(b)", 0, (int) M_SWL_AB, INSN_MACRO },
2bef2d3e
ILT		 509{"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_t|RD_b|I2 }, /* same */
510{"scache", "t,A(b)", 2, (int) M_SWL_AB, INSN_MACRO }, /* as swl */
45b14705
ILT		 511{"swr", "t,o(b)", 0xb8000000, 0xfc000000, RD_t|RD_b },
512{"swr", "t,A(b)", 0, (int) M_SWR_AB, INSN_MACRO },
2bef2d3e
ILT		 513{"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t|RD_b|I2 }, /* same */
514{"invalidate", "t,A(b)",2, (int) M_SWR_AB, INSN_MACRO }, /* as swr */
515{"sync", "", 0x0000000f, 0xffffffff, I2 },
9978cd4d
ILT		 516{"syscall", "", 0x0000000c, 0xffffffff, TRAP },
517{"syscall", "B", 0x0000000c, 0xfc00003f, TRAP },
518{"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s|I2|TRAP },
519{"teq", "s,t", 0x00000034, 0xfc00003f, RD_s|RD_t|I2|TRAP },
520{"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_s|I2|TRAP }, /* teqi */
2bef2d3e 521{"teq", "s,I", 2, (int) M_TEQ_I, INSN_MACRO },
9978cd4d
ILT		 522{"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_s|I2|TRAP },
523{"tge", "s,t", 0x00000030, 0xfc00003f, RD_s|RD_t|I2|TRAP },
524{"tge", "s,j", 0x04080000, 0xfc1f0000, RD_s|I2|TRAP }, /* tgei */
2bef2d3e 525{"tge", "s,I", 2, (int) M_TGE_I, INSN_MACRO },
9978cd4d
ILT		 526{"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_s|I2|TRAP },
527{"tgeu", "s,t", 0x00000031, 0xfc00003f, RD_s|RD_t|I2|TRAP },
528{"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s|I2|TRAP }, /* tgeiu */
2bef2d3e 529{"tgeu", "s,I", 2, (int) M_TGEU_I, INSN_MACRO },
45b14705
ILT		 530{"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB },
531{"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB },
532{"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB },
533{"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB },
9978cd4d
ILT		 534{"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s|I2|TRAP },
535{"tlt", "s,t", 0x00000032, 0xfc00003f, RD_s|RD_t|I2|TRAP },
536{"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_s|I2|TRAP }, /* tlti */
2bef2d3e 537{"tlt", "s,I", 2, (int) M_TLT_I, INSN_MACRO },
9978cd4d
ILT		 538{"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|I2|TRAP },
539{"tltu", "s,t", 0x00000033, 0xfc00003f, RD_s|RD_t|I2|TRAP },
540{"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_s|I2|TRAP }, /* tltiu */
2bef2d3e 541{"tltu", "s,I", 2, (int) M_TLTU_I, INSN_MACRO },
9978cd4d
ILT		 542{"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_s|I2|TRAP },
543{"tne", "s,t", 0x00000036, 0xfc00003f, RD_s|RD_t|I2|TRAP },
544{"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s|I2|TRAP }, /* tnei */
2bef2d3e
ILT		 545{"tne", "s,I", 2, (int) M_TNE_I, INSN_MACRO },
546{"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D|RD_S|I3 },
547{"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D|RD_S|I3 },
548{"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D|RD_S|I2 },
549{"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D|RD_S|I2 },
45b14705 550{"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD, INSN_MACRO },
2bef2d3e
ILT		 551{"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D|RD_S|I2 },
552{"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D|RD_S|I2 },
45b14705
ILT		 553{"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS, INSN_MACRO },
554{"ulh", "t,o(b)", 0, (int) M_ULH, INSN_MACRO },
555{"ulh", "t,A", 0, (int) M_ULH_A, INSN_MACRO },
556{"ulhu", "t,o(b)", 0, (int) M_ULHU, INSN_MACRO },
557{"ulhu", "t,A", 0, (int) M_ULHU_A, INSN_MACRO },
558{"ulw", "t,o(b)", 0, (int) M_ULW, INSN_MACRO },
559{"ulw", "t,A", 0, (int) M_ULW_A, INSN_MACRO },
560{"ush", "t,o(b)", 0, (int) M_USH, INSN_MACRO },
561{"ush", "t,A", 0, (int) M_USH_A, INSN_MACRO },
562{"usw", "t,o(b)", 0, (int) M_USW, INSN_MACRO },
563{"usw", "t,A", 0, (int) M_USW_A, INSN_MACRO },
564{"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t },
565{"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO },
566{"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t|RD_s },
567/* No hazard protection on coprocessor instructions--they shouldn't
568 change the state of the processor and if they do it's up to the
569 user to put in nops as necessary. These are at the end so that the
570 disasembler recognizes more specific versions first. */
571{"c0", "C", 0x42000000, 0xfe000000, 0 },
572{"c1", "C", 0x46000000, 0xfe000000, 0 },
573{"c2", "C", 0x4a000000, 0xfe000000, 0 },
574{"c3", "C", 0x4e000000, 0xfe000000, 0 },
575};
576
577const int bfd_mips_num_opcodes =
578 ((sizeof mips_opcodes) / (sizeof (mips_opcodes[0])));
GDB Binutils - Deliverables
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