Commit | Line | Data |
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5c84d377 | 1 | /* Disassembly routines for TMS320C54X architecture |
d83c6548 | 2 | Copyright 1999, 2000, 2001 Free Software Foundation, Inc. |
5c84d377 TW |
3 | Contributed by Timothy Wall (twall@cygnus.com) |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 2 of the License, or | |
8 | (at your option) any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
16 | along with this program; if not, write to the Free Software | |
17 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA | |
18 | 02111-1307, USA. */ | |
19 | ||
20 | #include <errno.h> | |
21 | #include <math.h> | |
22 | #include <stdlib.h> | |
c1485d85 | 23 | #include "sysdep.h" |
5c84d377 TW |
24 | #include "dis-asm.h" |
25 | #include "opcode/tic54x.h" | |
26 | #include "coff/tic54x.h" | |
27 | ||
28 | typedef struct _instruction { | |
29 | int parallel; | |
30 | template *tm; | |
31 | partemplate *ptm; | |
32 | } instruction; | |
33 | ||
d83c6548 | 34 | static int has_lkaddr PARAMS ((unsigned short, template *)); |
5c84d377 | 35 | static int get_insn_size PARAMS ((unsigned short, instruction *)); |
d83c6548 | 36 | static int get_instruction PARAMS ((disassemble_info *, bfd_vma, |
5c84d377 | 37 | unsigned short, instruction *)); |
d83c6548 AJ |
38 | static int print_instruction PARAMS ((disassemble_info *, bfd_vma, |
39 | unsigned short, char *, | |
5c84d377 TW |
40 | enum optype [], int, int)); |
41 | static int print_parallel_instruction PARAMS ((disassemble_info *, bfd_vma, | |
42 | unsigned short, partemplate *, | |
d83c6548 AJ |
43 | int)); |
44 | static int sprint_dual_address (disassemble_info *,char [], | |
5c84d377 | 45 | unsigned short); |
d83c6548 | 46 | static int sprint_indirect_address (disassemble_info *,char [], |
5c84d377 | 47 | unsigned short); |
d83c6548 | 48 | static int sprint_direct_address (disassemble_info *,char [], |
5c84d377 TW |
49 | unsigned short); |
50 | static int sprint_mmr (disassemble_info *,char [],int); | |
51 | static int sprint_condition (disassemble_info *,char *,unsigned short); | |
52 | static int sprint_cc2 (disassemble_info *,char *,unsigned short); | |
53 | ||
54 | int | |
33822a8e | 55 | print_insn_tic54x (memaddr, info) |
5c84d377 TW |
56 | bfd_vma memaddr; |
57 | disassemble_info *info; | |
58 | { | |
d83c6548 | 59 | bfd_byte opbuf[2]; |
5c84d377 TW |
60 | unsigned short opcode; |
61 | int status, size; | |
62 | instruction insn; | |
63 | ||
64 | status = (*info->read_memory_func) (memaddr, opbuf, 2, info); | |
65 | if (status != 0) | |
66 | { | |
33822a8e | 67 | (*info->memory_error_func) (status, memaddr, info); |
5c84d377 TW |
68 | return -1; |
69 | } | |
70 | ||
33822a8e | 71 | opcode = bfd_getl16 (opbuf); |
5c84d377 TW |
72 | if (!get_instruction (info, memaddr, opcode, &insn)) |
73 | return -1; | |
74 | ||
75 | size = get_insn_size (opcode, &insn); | |
76 | info->bytes_per_line = 2; | |
77 | info->bytes_per_chunk = 2; | |
78 | info->octets_per_byte = 2; | |
79 | info->display_endian = BFD_ENDIAN_LITTLE; | |
80 | ||
81 | if (insn.parallel) | |
82 | { | |
83 | if (!print_parallel_instruction (info, memaddr, opcode, insn.ptm, size)) | |
84 | return -1; | |
85 | } | |
86 | else | |
87 | { | |
d83c6548 AJ |
88 | if (!print_instruction (info, memaddr, opcode, |
89 | (char *) insn.tm->name, | |
5c84d377 TW |
90 | insn.tm->operand_types, |
91 | size, (insn.tm->flags & FL_EXT))) | |
92 | return -1; | |
93 | } | |
94 | ||
33822a8e | 95 | return size * 2; |
5c84d377 TW |
96 | } |
97 | ||
98 | static int | |
33822a8e | 99 | has_lkaddr (opcode, tm) |
5c84d377 TW |
100 | unsigned short opcode; |
101 | template *tm; | |
102 | { | |
33822a8e KH |
103 | return (IS_LKADDR (opcode) |
104 | && (OPTYPE (tm->operand_types[0]) == OP_Smem | |
105 | || OPTYPE (tm->operand_types[1]) == OP_Smem | |
106 | || OPTYPE (tm->operand_types[2]) == OP_Smem | |
107 | || OPTYPE (tm->operand_types[1]) == OP_Sind)); | |
5c84d377 TW |
108 | } |
109 | ||
110 | /* always returns 1 (whether an insn template was found) since we provide an | |
111 | "unknown instruction" template */ | |
d83c6548 | 112 | static int |
5c84d377 TW |
113 | get_instruction (info, addr, opcode, insn) |
114 | disassemble_info *info; | |
115 | bfd_vma addr; | |
116 | unsigned short opcode; | |
117 | instruction *insn; | |
118 | { | |
119 | template * tm; | |
120 | partemplate * ptm; | |
121 | ||
122 | insn->parallel = 0; | |
33822a8e | 123 | for (tm = (template *) tic54x_optab; tm->name; tm++) |
5c84d377 TW |
124 | { |
125 | if (tm->opcode == (opcode & tm->mask)) | |
126 | { | |
127 | /* a few opcodes span two words */ | |
128 | if (tm->flags & FL_EXT) | |
129 | { | |
130 | /* if lk addressing is used, the second half of the opcode gets | |
131 | pushed one word later */ | |
132 | bfd_byte opbuf[2]; | |
33822a8e KH |
133 | bfd_vma addr2 = addr + 1 + has_lkaddr (opcode, tm); |
134 | int status = (*info->read_memory_func) (addr2, opbuf, 2, info); | |
5c84d377 TW |
135 | if (status == 0) |
136 | { | |
33822a8e | 137 | unsigned short opcode2 = bfd_getl16 (opbuf); |
5c84d377 TW |
138 | if (tm->opcode2 == (opcode2 & tm->mask2)) |
139 | { | |
140 | insn->tm = tm; | |
141 | return 1; | |
142 | } | |
143 | } | |
144 | } | |
145 | else | |
146 | { | |
147 | insn->tm = tm; | |
148 | return 1; | |
149 | } | |
150 | } | |
151 | } | |
33822a8e | 152 | for (ptm = (partemplate *) tic54x_paroptab; ptm->name; ptm++) |
5c84d377 TW |
153 | { |
154 | if (ptm->opcode == (opcode & ptm->mask)) | |
155 | { | |
156 | insn->parallel = 1; | |
157 | insn->ptm = ptm; | |
158 | return 1; | |
159 | } | |
160 | } | |
161 | ||
33822a8e | 162 | insn->tm = (template *) &tic54x_unknown_opcode; |
5c84d377 TW |
163 | return 1; |
164 | } | |
165 | ||
d83c6548 | 166 | static int |
5c84d377 TW |
167 | get_insn_size (opcode, insn) |
168 | unsigned short opcode; | |
169 | instruction *insn; | |
170 | { | |
171 | int size; | |
172 | ||
173 | if (insn->parallel) | |
174 | { | |
175 | /* only non-parallel instructions support lk addressing */ | |
176 | size = insn->ptm->words; | |
177 | } | |
178 | else | |
179 | { | |
33822a8e | 180 | size = insn->tm->words + has_lkaddr (opcode, insn->tm); |
5c84d377 TW |
181 | } |
182 | ||
183 | return size; | |
184 | } | |
185 | ||
186 | int | |
187 | print_instruction (info, memaddr, opcode, tm_name, tm_operands, size, ext) | |
188 | disassemble_info *info; | |
189 | bfd_vma memaddr; | |
190 | unsigned short opcode; | |
191 | char *tm_name; | |
192 | enum optype tm_operands[]; | |
193 | int size; | |
194 | int ext; | |
195 | { | |
196 | static int n; | |
197 | /* string storage for multiple operands */ | |
198 | char operand[4][64] = { {0},{0},{0},{0}, }; | |
199 | bfd_byte buf[2]; | |
fc05c67f NC |
200 | unsigned long opcode2 = 0; |
201 | unsigned long lkaddr = 0; | |
5c84d377 TW |
202 | enum optype src = OP_None; |
203 | enum optype dst = OP_None; | |
204 | int i, shift; | |
205 | char *comma = ""; | |
206 | ||
207 | info->fprintf_func (info->stream, "%-7s", tm_name); | |
208 | ||
209 | if (size > 1) | |
210 | { | |
33822a8e | 211 | int status = (*info->read_memory_func) (memaddr + 1, buf, 2, info); |
5c84d377 TW |
212 | if (status != 0) |
213 | return 0; | |
33822a8e | 214 | lkaddr = opcode2 = bfd_getl16 (buf); |
5c84d377 TW |
215 | if (size > 2) |
216 | { | |
33822a8e | 217 | status = (*info->read_memory_func) (memaddr + 2, buf, 2, info); |
5c84d377 TW |
218 | if (status != 0) |
219 | return 0; | |
33822a8e | 220 | opcode2 = bfd_getl16 (buf); |
5c84d377 TW |
221 | } |
222 | } | |
223 | ||
33822a8e | 224 | for (i = 0; i < MAX_OPERANDS && OPTYPE (tm_operands[i]) != OP_None; i++) |
5c84d377 TW |
225 | { |
226 | char *next_comma = ","; | |
227 | int optional = (tm_operands[i] & OPT) != 0; | |
228 | ||
33822a8e | 229 | switch (OPTYPE (tm_operands[i])) |
5c84d377 TW |
230 | { |
231 | case OP_Xmem: | |
33822a8e | 232 | sprint_dual_address (info, operand[i], XMEM (opcode)); |
5c84d377 TW |
233 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
234 | break; | |
235 | case OP_Ymem: | |
33822a8e | 236 | sprint_dual_address (info, operand[i], YMEM (opcode)); |
5c84d377 TW |
237 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
238 | break; | |
239 | case OP_Smem: | |
240 | case OP_Sind: | |
241 | case OP_Lmem: | |
242 | info->fprintf_func (info->stream, "%s", comma); | |
33822a8e | 243 | if (INDIRECT (opcode)) |
5c84d377 | 244 | { |
33822a8e | 245 | if (MOD (opcode) >= 12) |
5c84d377 TW |
246 | { |
247 | bfd_vma addr = lkaddr; | |
33822a8e KH |
248 | int arf = ARF (opcode); |
249 | int mod = MOD (opcode); | |
5c84d377 TW |
250 | if (mod == 15) |
251 | info->fprintf_func (info->stream, "*("); | |
252 | else | |
d83c6548 | 253 | info->fprintf_func (info->stream, "*%sar%d(", |
5c84d377 TW |
254 | (mod == 13 || mod == 14 ? "+" : ""), |
255 | arf); | |
33822a8e | 256 | (*(info->print_address_func)) ((bfd_vma) addr, info); |
d83c6548 | 257 | info->fprintf_func (info->stream, ")%s", |
5c84d377 TW |
258 | mod == 14 ? "%" : ""); |
259 | } | |
260 | else | |
261 | { | |
262 | sprint_indirect_address (info, operand[i], opcode); | |
263 | info->fprintf_func (info->stream, "%s", operand[i]); | |
264 | } | |
265 | } | |
266 | else | |
267 | { | |
268 | /* FIXME -- use labels (print_address_func) */ | |
269 | /* in order to do this, we need to guess what DP is */ | |
270 | sprint_direct_address (info, operand[i], opcode); | |
271 | info->fprintf_func (info->stream, "%s", operand[i]); | |
272 | } | |
273 | break; | |
274 | case OP_dmad: | |
275 | info->fprintf_func (info->stream, "%s", comma); | |
33822a8e | 276 | (*(info->print_address_func)) ((bfd_vma) opcode2, info); |
5c84d377 TW |
277 | break; |
278 | case OP_xpmad: | |
279 | /* upper 7 bits of address are in the opcode */ | |
33822a8e | 280 | opcode2 += ((unsigned long) opcode & 0x7F) << 16; |
5c84d377 TW |
281 | /* fall through */ |
282 | case OP_pmad: | |
283 | info->fprintf_func (info->stream, "%s", comma); | |
33822a8e | 284 | (*(info->print_address_func)) ((bfd_vma) opcode2, info); |
5c84d377 TW |
285 | break; |
286 | case OP_MMRX: | |
33822a8e | 287 | sprint_mmr (info, operand[i], MMRX (opcode)); |
5c84d377 TW |
288 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
289 | break; | |
290 | case OP_MMRY: | |
33822a8e | 291 | sprint_mmr (info, operand[i], MMRY (opcode)); |
5c84d377 TW |
292 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
293 | break; | |
294 | case OP_MMR: | |
33822a8e | 295 | sprint_mmr (info, operand[i], MMR (opcode)); |
5c84d377 TW |
296 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
297 | break; | |
298 | case OP_PA: | |
33822a8e | 299 | sprintf (operand[i], "pa%d", (unsigned) opcode2); |
5c84d377 TW |
300 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
301 | break; | |
302 | case OP_SRC: | |
33822a8e | 303 | src = SRC (ext ? opcode2 : opcode) ? OP_B : OP_A; |
5c84d377 TW |
304 | sprintf (operand[i], (src == OP_B) ? "b" : "a"); |
305 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
306 | break; | |
307 | case OP_SRC1: | |
33822a8e | 308 | src = SRC1 (ext ? opcode2 : opcode) ? OP_B : OP_A; |
5c84d377 TW |
309 | sprintf (operand[i], (src == OP_B) ? "b" : "a"); |
310 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
311 | break; | |
312 | case OP_RND: | |
33822a8e | 313 | dst = DST (opcode) ? OP_B : OP_A; |
5c84d377 TW |
314 | sprintf (operand[i], (dst == OP_B) ? "a" : "b"); |
315 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
316 | break; | |
317 | case OP_DST: | |
33822a8e | 318 | dst = DST (ext ? opcode2 : opcode) ? OP_B : OP_A; |
5c84d377 TW |
319 | if (!optional || dst != src) |
320 | { | |
321 | sprintf (operand[i], (dst == OP_B) ? "b" : "a"); | |
322 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
323 | } | |
324 | else | |
325 | next_comma = comma; | |
326 | break; | |
327 | case OP_B: | |
328 | sprintf (operand[i], "b"); | |
329 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
330 | break; | |
331 | case OP_A: | |
332 | sprintf (operand[i], "a"); | |
333 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
334 | break; | |
335 | case OP_ARX: | |
33822a8e | 336 | sprintf (operand[i], "ar%d", (int) ARX (opcode)); |
5c84d377 TW |
337 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
338 | break; | |
339 | case OP_SHIFT: | |
33822a8e | 340 | shift = SHIFT (ext ? opcode2 : opcode); |
5c84d377 TW |
341 | if (!optional || shift != 0) |
342 | { | |
33822a8e | 343 | sprintf (operand[i], "%d", shift); |
5c84d377 TW |
344 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
345 | } | |
346 | else | |
347 | next_comma = comma; | |
348 | break; | |
349 | case OP_SHFT: | |
33822a8e | 350 | shift = SHFT (opcode); |
5c84d377 TW |
351 | if (!optional || shift != 0) |
352 | { | |
33822a8e | 353 | sprintf (operand[i], "%d", (unsigned) shift); |
5c84d377 TW |
354 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
355 | } | |
356 | else | |
357 | next_comma = comma; | |
358 | break; | |
359 | case OP_lk: | |
33822a8e | 360 | sprintf (operand[i], "#%d", (int) (short) opcode2); |
5c84d377 TW |
361 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
362 | break; | |
363 | case OP_T: | |
364 | sprintf (operand[i], "t"); | |
365 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
366 | break; | |
367 | case OP_TS: | |
368 | sprintf (operand[i], "ts"); | |
369 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
370 | break; | |
371 | case OP_k8: | |
33822a8e | 372 | sprintf (operand[i], "%d", (int) ((signed char) (opcode & 0xFF))); |
5c84d377 TW |
373 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
374 | break; | |
375 | case OP_16: | |
376 | sprintf (operand[i], "16"); | |
377 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
378 | break; | |
379 | case OP_ASM: | |
380 | sprintf (operand[i], "asm"); | |
381 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
382 | break; | |
383 | case OP_BITC: | |
33822a8e | 384 | sprintf (operand[i], "%d", (int) (opcode & 0xF)); |
5c84d377 TW |
385 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
386 | break; | |
387 | case OP_CC: | |
388 | /* put all CC operands in the same operand */ | |
389 | sprint_condition (info, operand[i], opcode); | |
390 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
391 | i = MAX_OPERANDS; | |
392 | break; | |
393 | case OP_CC2: | |
394 | sprint_cc2 (info, operand[i], opcode); | |
395 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
396 | break; | |
397 | case OP_CC3: | |
398 | { | |
399 | const char *code[] = { "eq", "lt", "gt", "neq" }; | |
33822a8e | 400 | sprintf (operand[i], code[CC3 (opcode)]); |
5c84d377 TW |
401 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
402 | break; | |
403 | } | |
404 | case OP_123: | |
405 | { | |
33822a8e | 406 | int code = (opcode >> 8) & 0x3; |
5c84d377 TW |
407 | sprintf (operand[i], "%d", (code == 0) ? 1 : (code == 2) ? 2 : 3); |
408 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
409 | break; | |
410 | } | |
411 | case OP_k5: | |
d83c6548 | 412 | sprintf (operand[i], "#%d", |
33822a8e | 413 | (int) (((signed char) opcode & 0x1F) << 3) >> 3); |
5c84d377 TW |
414 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
415 | break; | |
416 | case OP_k8u: | |
33822a8e | 417 | sprintf (operand[i], "#%d", (unsigned) (opcode & 0xFF)); |
5c84d377 TW |
418 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
419 | break; | |
420 | case OP_k3: | |
33822a8e | 421 | sprintf (operand[i], "#%d", (int) (opcode & 0x7)); |
5c84d377 TW |
422 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
423 | break; | |
424 | case OP_lku: | |
33822a8e | 425 | sprintf (operand[i], "#%d", (unsigned) opcode2); |
5c84d377 TW |
426 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
427 | break; | |
428 | case OP_N: | |
429 | n = (opcode >> 9) & 0x1; | |
430 | sprintf (operand[i], "st%d", n); | |
431 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
432 | break; | |
433 | case OP_SBIT: | |
434 | { | |
435 | const char *status0[] = { | |
d83c6548 | 436 | "0", "1", "2", "3", "4", "5", "6", "7", "8", |
5c84d377 TW |
437 | "ovb", "ova", "c", "tc", "13", "14", "15" |
438 | }; | |
439 | const char *status1[] = { | |
d83c6548 | 440 | "0", "1", "2", "3", "4", |
5c84d377 TW |
441 | "cmpt", "frct", "c16", "sxm", "ovm", "10", |
442 | "intm", "hm", "xf", "cpl", "braf" | |
443 | }; | |
d83c6548 | 444 | sprintf (operand[i], "%s", |
33822a8e | 445 | n ? status1[SBIT (opcode)] : status0[SBIT (opcode)]); |
5c84d377 TW |
446 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
447 | break; | |
448 | } | |
449 | case OP_12: | |
33822a8e | 450 | sprintf (operand[i], "%d", (int) ((opcode >> 9) & 1) + 1); |
5c84d377 TW |
451 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
452 | break; | |
453 | case OP_TRN: | |
454 | sprintf (operand[i], "trn"); | |
455 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
456 | break; | |
457 | case OP_DP: | |
458 | sprintf (operand[i], "dp"); | |
459 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
460 | break; | |
461 | case OP_k9: | |
462 | /* FIXME-- this is DP, print the original address? */ | |
33822a8e | 463 | sprintf (operand[i], "#%d", (int) (opcode & 0x1FF)); |
5c84d377 TW |
464 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
465 | break; | |
466 | case OP_ARP: | |
467 | sprintf (operand[i], "arp"); | |
468 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
469 | break; | |
470 | case OP_031: | |
33822a8e | 471 | sprintf (operand[i], "%d", (int) (opcode & 0x1F)); |
5c84d377 TW |
472 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); |
473 | break; | |
474 | default: | |
475 | sprintf (operand[i], "??? (0x%x)", tm_operands[i]); | |
476 | info->fprintf_func (info->stream, "%s%s", comma, operand[i]); | |
477 | break; | |
478 | } | |
479 | comma = next_comma; | |
480 | } | |
481 | return 1; | |
482 | } | |
483 | ||
484 | static int | |
485 | print_parallel_instruction (info, memaddr, opcode, ptm, size) | |
486 | disassemble_info *info; | |
487 | bfd_vma memaddr; | |
488 | unsigned short opcode; | |
489 | partemplate *ptm; | |
490 | int size; | |
491 | { | |
d83c6548 | 492 | print_instruction (info, memaddr, opcode, |
5c84d377 TW |
493 | ptm->name, ptm->operand_types, size, 0); |
494 | info->fprintf_func (info->stream, " || "); | |
d83c6548 | 495 | return print_instruction (info, memaddr, opcode, |
5c84d377 TW |
496 | ptm->parname, ptm->paroperand_types, size, 0); |
497 | } | |
498 | ||
499 | static int | |
500 | sprint_dual_address (info, buf, code) | |
d83c6548 | 501 | disassemble_info *info ATTRIBUTE_UNUSED; |
5c84d377 TW |
502 | char buf[]; |
503 | unsigned short code; | |
504 | { | |
505 | const char *formats[] = { | |
506 | "*ar%d", | |
507 | "*ar%d-", | |
508 | "*ar%d+", | |
509 | "*ar%d+0%%", | |
510 | }; | |
33822a8e | 511 | return sprintf (buf, formats[XMOD (code)], XARX (code)); |
5c84d377 TW |
512 | } |
513 | ||
514 | static int | |
515 | sprint_indirect_address (info, buf, opcode) | |
d83c6548 | 516 | disassemble_info *info ATTRIBUTE_UNUSED; |
5c84d377 TW |
517 | char buf[]; |
518 | unsigned short opcode; | |
519 | { | |
520 | const char *formats[] = { | |
521 | "*ar%d", | |
522 | "*ar%d-", | |
523 | "*ar%d+", | |
524 | "*+ar%d", | |
525 | "*ar%d-0B", | |
526 | "*ar%d-0", | |
527 | "*ar%d+0", | |
528 | "*ar%d+0B", | |
529 | "*ar%d-%%", | |
530 | "*ar%d-0%%", | |
531 | "*ar%d+%%", | |
532 | "*ar%d+0%%", | |
533 | }; | |
33822a8e | 534 | return sprintf (buf, formats[MOD (opcode)], ARF (opcode)); |
5c84d377 TW |
535 | } |
536 | ||
537 | static int | |
538 | sprint_direct_address (info, buf, opcode) | |
d83c6548 | 539 | disassemble_info *info ATTRIBUTE_UNUSED; |
5c84d377 TW |
540 | char buf[]; |
541 | unsigned short opcode; | |
542 | { | |
543 | /* FIXME -- look up relocation if available */ | |
33822a8e | 544 | return sprintf (buf, "0x??%02x", (int) (opcode & 0x7F)); |
5c84d377 TW |
545 | } |
546 | ||
547 | static int | |
548 | sprint_mmr (info, buf, mmr) | |
d83c6548 | 549 | disassemble_info *info ATTRIBUTE_UNUSED; |
5c84d377 TW |
550 | char buf[]; |
551 | int mmr; | |
552 | { | |
33822a8e | 553 | symbol *reg = (symbol *) mmregs; |
5c84d377 TW |
554 | while (reg->name != NULL) |
555 | { | |
556 | if (mmr == reg->value) | |
557 | { | |
33822a8e | 558 | sprintf (buf, "%s", (reg + 1)->name); |
5c84d377 TW |
559 | return 1; |
560 | } | |
561 | ++reg; | |
562 | } | |
d1e28e24 | 563 | sprintf (buf, "MMR(%d)", mmr); /* FIXME -- different targets. */ |
5c84d377 TW |
564 | return 0; |
565 | } | |
566 | ||
567 | static int | |
568 | sprint_cc2 (info, buf, opcode) | |
d83c6548 | 569 | disassemble_info *info ATTRIBUTE_UNUSED; |
5c84d377 TW |
570 | char *buf; |
571 | unsigned short opcode; | |
572 | { | |
573 | const char *cc2[] = { | |
574 | "??", "??", "ageq", "alt", "aneq", "aeq", "agt", "aleq", | |
575 | "??", "??", "bgeq", "blt", "bneq", "beq", "bgt", "bleq", | |
576 | }; | |
577 | return sprintf (buf, "%s", cc2[opcode & 0xF]); | |
578 | } | |
579 | ||
580 | static int | |
581 | sprint_condition (info, buf, opcode) | |
d83c6548 | 582 | disassemble_info *info ATTRIBUTE_UNUSED; |
5c84d377 TW |
583 | char *buf; |
584 | unsigned short opcode; | |
585 | { | |
586 | char *start = buf; | |
587 | const char *cmp[] = { | |
588 | "??", "??", "geq", "lt", "neq", "eq", "gt", "leq" | |
589 | }; | |
590 | if (opcode & 0x40) | |
591 | { | |
592 | char acc = (opcode & 0x8) ? 'b' : 'a'; | |
593 | if (opcode & 0x7) | |
33822a8e KH |
594 | buf += sprintf (buf, "%c%s%s", acc, cmp[(opcode & 0x7)], |
595 | (opcode & 0x20) ? ", " : ""); | |
5c84d377 | 596 | if (opcode & 0x20) |
33822a8e | 597 | buf += sprintf (buf, "%c%s", acc, (opcode & 0x10) ? "ov" : "nov"); |
5c84d377 TW |
598 | } |
599 | else if (opcode & 0x3F) | |
600 | { | |
601 | if (opcode & 0x30) | |
d83c6548 | 602 | buf += sprintf (buf, "%s%s", |
5c84d377 TW |
603 | ((opcode & 0x30) == 0x30) ? "tc" : "ntc", |
604 | (opcode & 0x0F) ? ", " : ""); | |
605 | if (opcode & 0x0C) | |
d83c6548 | 606 | buf += sprintf (buf, "%s%s", |
5c84d377 TW |
607 | ((opcode & 0x0C) == 0x0C) ? "c" : "nc", |
608 | (opcode & 0x03) ? ", " : ""); | |
609 | if (opcode & 0x03) | |
d83c6548 | 610 | buf += sprintf (buf, "%s", |
5c84d377 TW |
611 | ((opcode & 0x03) == 0x03) ? "bio" : "nbio"); |
612 | } | |
613 | else | |
614 | buf += sprintf (buf, "unc"); | |
615 | ||
616 | return buf - start; | |
617 | } |