[deliverable/binutils-gdb.git] / opcodes / vax-dis.c

/* Print VAX instructions.
   Copyright 1995, 1998, 2000, 2001, 2002, 2005, 2007, 2009
   Free Software Foundation, Inc.
   Contributed by Pauline Middelink <middelin@polyware.iaf.nl>

   This file is part of the GNU opcodes library.

   This library is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3, or (at your option)
   any later version.

   It is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
   MA 02110-1301, USA.  */

#include <setjmp.h>
#include <string.h>
#include "sysdep.h"
#include "opcode/vax.h"
#include "dis-asm.h"

static char *reg_names[] =
{
  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
  "r8", "r9", "r10", "r11", "ap", "fp", "sp", "pc"
};

/* Definitions for the function entry mask bits.  */
static char *entry_mask_bit[] =
{
  /* Registers 0 and 1 shall not be saved, since they're used to pass back
     a function's result to its caller...  */
  "~r0~", "~r1~",
  /* Registers 2 .. 11 are normal registers.  */
  "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11",
  /* Registers 12 and 13 are argument and frame pointer and must not
     be saved by using the entry mask.  */
  "~ap~", "~fp~",
  /* Bits 14 and 15 control integer and decimal overflow.  */
  "IntOvfl", "DecOvfl",
};

/* Sign-extend an (unsigned char). */
#define COERCE_SIGNED_CHAR(ch) ((signed char)(ch))

/* Get a 1 byte signed integer.  */
#define NEXTBYTE(p)  \
  (p += 1, FETCH_DATA (info, p), \
  COERCE_SIGNED_CHAR(p[-1]))

/* Get a 2 byte signed integer.  */
#define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
#define NEXTWORD(p)  \
  (p += 2, FETCH_DATA (info, p), \
   COERCE16 ((p[-1] << 8) + p[-2]))

/* Get a 4 byte signed integer.  */
#define COERCE32(x) ((int) (((x) ^ 0x80000000) - 0x80000000))
#define NEXTLONG(p)  \
  (p += 4, FETCH_DATA (info, p), \
   (COERCE32 ((((((p[-1] << 8) + p[-2]) << 8) + p[-3]) << 8) + p[-4])))

/* Maximum length of an instruction.  */
#define MAXLEN 25

struct private
{
  /* Points to first byte not fetched.  */
  bfd_byte * max_fetched;
  bfd_byte   the_buffer[MAXLEN];
  bfd_vma    insn_start;
  jmp_buf    bailout;
};

/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
   to ADDR (exclusive) are valid.  Returns 1 for success, longjmps
   on error.  */
#define FETCH_DATA(info, addr) \
  ((addr) <= ((struct private *)(info->private_data))->max_fetched \
   ? 1 : fetch_data ((info), (addr)))

static int
fetch_data (struct disassemble_info *info, bfd_byte *addr)
{
  int status;
  struct private *priv = (struct private *) info->private_data;
  bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);

  status = (*info->read_memory_func) (start,
				      priv->max_fetched,
				      addr - priv->max_fetched,
				      info);
  if (status != 0)
    {
      (*info->memory_error_func) (status, start, info);
      longjmp (priv->bailout, 1);
    }
  else
    priv->max_fetched = addr;

  return 1;
}

/* Entry mask handling.  */
static unsigned int  entry_addr_occupied_slots = 0;
static unsigned int  entry_addr_total_slots = 0;
static bfd_vma *     entry_addr = NULL;

/* Parse the VAX specific disassembler options.  These contain function
   entry addresses, which can be useful to disassemble ROM images, since
   there's no symbol table.  Returns TRUE upon success, FALSE otherwise.  */

static bfd_boolean
parse_disassembler_options (char * options)
{
  const char * entry_switch = "entry:";

  while ((options = strstr (options, entry_switch)))
    {
      options += strlen (entry_switch);

      /* The greater-than part of the test below is paranoia.  */
      if (entry_addr_occupied_slots >= entry_addr_total_slots)
	{
	  /* A guesstimate of the number of entries we will have to create.  */
	  entry_addr_total_slots +=
	    strlen (options) / (strlen (entry_switch) + 5);
	  
	  entry_addr = realloc (entry_addr, sizeof (bfd_vma)
				* entry_addr_total_slots);
	}

      if (entry_addr == NULL)
	return FALSE;
	  
      entry_addr[entry_addr_occupied_slots] = bfd_scan_vma (options, NULL, 0);
      entry_addr_occupied_slots ++;
    }

  return TRUE;
}

#if 0 /* FIXME:  Ideally the disassembler should have target specific
	 initialisation and termination function pointers.  Then
	 parse_disassembler_options could be the init function and
	 free_entry_array (below) could be the termination routine.
	 Until then there is no way for the disassembler to tell us
	 that it has finished and that we no longer need the entry
	 array, so this routine is suppressed for now.  It does mean
	 that we leak memory, but only to the extent that we do not
	 free it just before the disassembler is about to terminate
	 anyway.  */

/* Free memory allocated to our entry array.  */

static void
free_entry_array (void)
{
  if (entry_addr)
    {
      free (entry_addr);
      entry_addr = NULL;
      entry_addr_occupied_slots = entry_addr_total_slots = 0;
    }
}
#endif
/* Check if the given address is a known function entry point.  This is
   the case if there is a symbol of the function type at this address.
   We also check for synthetic symbols as these are used for PLT entries
   (weak undefined symbols may not have the function type set).  Finally
   the address may have been forced to be treated as an entry point.  The
   latter helps in disassembling ROM images, because there's no symbol
   table at all.  Forced entry points can be given by supplying several
   -M options to objdump: -M entry:0xffbb7730.  */

static bfd_boolean
is_function_entry (struct disassemble_info *info, bfd_vma addr)
{
  unsigned int i;

  /* Check if there's a function or PLT symbol at our address.  */
  if (info->symbols
      && info->symbols[0]
      && (info->symbols[0]->flags & (BSF_FUNCTION | BSF_SYNTHETIC))
      && addr == bfd_asymbol_value (info->symbols[0]))
    return TRUE;

  /* Check for forced function entry address.  */
  for (i = entry_addr_occupied_slots; i--;)
    if (entry_addr[i] == addr)
      return TRUE;

  return FALSE;
}

/* Check if the given address is the last longword of a PLT entry.
   This longword is data and depending on the value it may interfere
   with disassembly of further PLT entries.  We make use of the fact
   PLT symbols are marked BSF_SYNTHETIC.  */
static bfd_boolean
is_plt_tail (struct disassemble_info *info, bfd_vma addr)
{
  if (info->symbols
      && info->symbols[0]
      && (info->symbols[0]->flags & BSF_SYNTHETIC)
      && addr == bfd_asymbol_value (info->symbols[0]) + 8)
    return TRUE;

  return FALSE;
}

static int
print_insn_mode (const char *d,
		 int size,
		 unsigned char *p0,
		 bfd_vma addr,	/* PC for this arg to be relative to.  */
		 disassemble_info *info)
{
  unsigned char *p = p0;
  unsigned char mode, reg;

  /* Fetch and interpret mode byte.  */
  mode = (unsigned char) NEXTBYTE (p);
  reg = mode & 0xF;
  switch (mode & 0xF0)
    {
    case 0x00:
    case 0x10:
    case 0x20:
    case 0x30: /* Literal mode			$number.  */
      if (d[1] == 'd' || d[1] == 'f' || d[1] == 'g' || d[1] == 'h')
	(*info->fprintf_func) (info->stream, "$0x%x [%c-float]", mode, d[1]);
      else
        (*info->fprintf_func) (info->stream, "$0x%x", mode);
      break;
    case 0x40: /* Index:			base-addr[Rn] */
      p += print_insn_mode (d, size, p0 + 1, addr + 1, info);
      (*info->fprintf_func) (info->stream, "[%s]", reg_names[reg]);
      break;
    case 0x50: /* Register:			Rn */
      (*info->fprintf_func) (info->stream, "%s", reg_names[reg]);
      break;
    case 0x60: /* Register deferred:		(Rn) */
      (*info->fprintf_func) (info->stream, "(%s)", reg_names[reg]);
      break;
    case 0x70: /* Autodecrement:		-(Rn) */
      (*info->fprintf_func) (info->stream, "-(%s)", reg_names[reg]);
      break;
    case 0x80: /* Autoincrement:		(Rn)+ */
      if (reg == 0xF)
	{	/* Immediate?  */
	  int i;

	  FETCH_DATA (info, p + size);
	  (*info->fprintf_func) (info->stream, "$0x");
	  if (d[1] == 'd' || d[1] == 'f' || d[1] == 'g' || d[1] == 'h')
	    {
	      int float_word;

	      float_word = p[0] | (p[1] << 8);
	      if ((d[1] == 'd' || d[1] == 'f')
		  && (float_word & 0xff80) == 0x8000)
		{
		  (*info->fprintf_func) (info->stream, "[invalid %c-float]",
					 d[1]);
		}
	      else
		{
	          for (i = 0; i < size; i++)
		    (*info->fprintf_func) (info->stream, "%02x",
		                           p[size - i - 1]);
	          (*info->fprintf_func) (info->stream, " [%c-float]", d[1]);
		}
	    }
	  else
	    {
	      for (i = 0; i < size; i++)
	        (*info->fprintf_func) (info->stream, "%02x", p[size - i - 1]);
	    }
	  p += size;
	}
      else
	(*info->fprintf_func) (info->stream, "(%s)+", reg_names[reg]);
      break;
    case 0x90: /* Autoincrement deferred:	@(Rn)+ */
      if (reg == 0xF)
	(*info->fprintf_func) (info->stream, "*0x%x", NEXTLONG (p));
      else
	(*info->fprintf_func) (info->stream, "@(%s)+", reg_names[reg]);
      break;
    case 0xB0: /* Displacement byte deferred:	*displ(Rn).  */
      (*info->fprintf_func) (info->stream, "*");
    case 0xA0: /* Displacement byte:		displ(Rn).  */
      if (reg == 0xF)
	(*info->print_address_func) (addr + 2 + NEXTBYTE (p), info);
      else
	(*info->fprintf_func) (info->stream, "0x%x(%s)", NEXTBYTE (p),
			       reg_names[reg]);
      break;
    case 0xD0: /* Displacement word deferred:	*displ(Rn).  */
      (*info->fprintf_func) (info->stream, "*");
    case 0xC0: /* Displacement word:		displ(Rn).  */
      if (reg == 0xF)
	(*info->print_address_func) (addr + 3 + NEXTWORD (p), info);
      else
	(*info->fprintf_func) (info->stream, "0x%x(%s)", NEXTWORD (p),
			       reg_names[reg]);
      break;
    case 0xF0: /* Displacement long deferred:	*displ(Rn).  */
      (*info->fprintf_func) (info->stream, "*");
    case 0xE0: /* Displacement long:		displ(Rn).  */
      if (reg == 0xF)
	(*info->print_address_func) (addr + 5 + NEXTLONG (p), info);
      else
	(*info->fprintf_func) (info->stream, "0x%x(%s)", NEXTLONG (p),
			       reg_names[reg]);
      break;
    }

  return p - p0;
}

/* Returns number of bytes "eaten" by the operand, or return -1 if an
   invalid operand was found, or -2 if an opcode tabel error was
   found. */

static int
print_insn_arg (const char *d,
		unsigned char *p0,
		bfd_vma addr,	/* PC for this arg to be relative to.  */
		disassemble_info *info)
{
  int arg_len;

  /* Check validity of addressing length.  */
  switch (d[1])
    {
    case 'b' : arg_len = 1;	break;
    case 'd' : arg_len = 8;	break;
    case 'f' : arg_len = 4;	break;
    case 'g' : arg_len = 8;	break;
    case 'h' : arg_len = 16;	break;
    case 'l' : arg_len = 4;	break;
    case 'o' : arg_len = 16;	break;
    case 'w' : arg_len = 2;	break;
    case 'q' : arg_len = 8;	break;
    default  : abort ();
    }

  /* Branches have no mode byte.  */
  if (d[0] == 'b')
    {
      unsigned char *p = p0;

      if (arg_len == 1)
	(*info->print_address_func) (addr + 1 + NEXTBYTE (p), info);
      else
	(*info->print_address_func) (addr + 2 + NEXTWORD (p), info);

      return p - p0;
    }

  return print_insn_mode (d, arg_len, p0, addr, info);
}

/* Print the vax instruction at address MEMADDR in debugged memory,
   on INFO->STREAM.  Returns length of the instruction, in bytes.  */

int
print_insn_vax (bfd_vma memaddr, disassemble_info *info)
{
  static bfd_boolean parsed_disassembler_options = FALSE;
  const struct vot *votp;
  const char *argp;
  unsigned char *arg;
  struct private priv;
  bfd_byte *buffer = priv.the_buffer;

  info->private_data = & priv;
  priv.max_fetched = priv.the_buffer;
  priv.insn_start = memaddr;

  if (! parsed_disassembler_options
      && info->disassembler_options != NULL)
    {
      parse_disassembler_options (info->disassembler_options);

      /* To avoid repeated parsing of these options.  */
      parsed_disassembler_options = TRUE;
    }

  if (setjmp (priv.bailout) != 0)
    /* Error return.  */
    return -1;

  argp = NULL;
  /* Check if the info buffer has more than one byte left since
     the last opcode might be a single byte with no argument data.  */
  if (info->buffer_length - (memaddr - info->buffer_vma) > 1)
    {
      FETCH_DATA (info, buffer + 2);
    }
  else
    {
      FETCH_DATA (info, buffer + 1);
      buffer[1] = 0;
    }

  /* Decode function entry mask.  */
  if (is_function_entry (info, memaddr))
    {
      int i = 0;
      int register_mask = buffer[1] << 8 | buffer[0];

      (*info->fprintf_func) (info->stream, ".word 0x%04x # Entry mask: <",
			     register_mask);

      for (i = 15; i >= 0; i--)
	if (register_mask & (1 << i))
          (*info->fprintf_func) (info->stream, " %s", entry_mask_bit[i]);

      (*info->fprintf_func) (info->stream, " >");

      return 2;
    }

  /* Decode PLT entry offset longword.  */
  if (is_plt_tail (info, memaddr))
    {
      int offset;

      FETCH_DATA (info, buffer + 4);
      offset = buffer[3] << 24 | buffer[2] << 16 | buffer[1] << 8 | buffer[0];
      (*info->fprintf_func) (info->stream, ".long 0x%08x", offset);

      return 4;
    }

  for (votp = &votstrs[0]; votp->name[0]; votp++)
    {
      vax_opcodeT opcode = votp->detail.code;

      /* 2 byte codes match 2 buffer pos. */
      if ((bfd_byte) opcode == buffer[0]
	  && (opcode >> 8 == 0 || opcode >> 8 == buffer[1]))
	{
	  argp = votp->detail.args;
	  break;
	}
    }
  if (argp == NULL)
    {
      /* Handle undefined instructions. */
      (*info->fprintf_func) (info->stream, ".word 0x%x",
			     (buffer[0] << 8) + buffer[1]);
      return 2;
    }

  /* Point at first byte of argument data, and at descriptor for first
     argument.  */
  arg = buffer + ((votp->detail.code >> 8) ? 2 : 1);

  /* Make sure we have it in mem */
  FETCH_DATA (info, arg);

  (*info->fprintf_func) (info->stream, "%s", votp->name);
  if (*argp)
    (*info->fprintf_func) (info->stream, " ");

  while (*argp)
    {
      arg += print_insn_arg (argp, arg, memaddr + arg - buffer, info);
      argp += 2;
      if (*argp)
	(*info->fprintf_func) (info->stream, ",");
    }

  return arg - buffer;
}
Commit	Line	Data
252b5132	1	/* Print VAX instructions.
aa820537	2	Copyright 1995, 1998, 2000, 2001, 2002, 2005, 2007, 2009
220abb21	3	Free Software Foundation, Inc.
252b5132 RH	4	Contributed by Pauline Middelink <middelin@polyware.iaf.nl>
252b5132 RH	5
9b201bb5 NC	6	This file is part of the GNU opcodes library.
	7
	8	This library is free software; you can redistribute it and/or modify
4f495e61	9	it under the terms of the GNU General Public License as published by
9b201bb5 NC	10	the Free Software Foundation; either version 3, or (at your option)
9b201bb5 NC	11	any later version.
252b5132	12
9b201bb5 NC	13	It is distributed in the hope that it will be useful, but WITHOUT
	14	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
	15	or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	16	License for more details.
252b5132	17
4f495e61 NC	18	You should have received a copy of the GNU General Public License
4f495e61 NC	19	along with this program; if not, write to the Free Software
47b0e7ad NC	20	Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
47b0e7ad NC	21	MA 02110-1301, USA. */
252b5132	22
ec72cfe5 NC	23	#include <setjmp.h>
ec72cfe5 NC	24	#include <string.h>
0d8dfecf	25	#include "sysdep.h"
252b5132 RH	26	#include "opcode/vax.h"
	27	#include "dis-asm.h"
	28
252b5132 RH	29	static char *reg_names[] =
	30	{
	31	"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
	32	"r8", "r9", "r10", "r11", "ap", "fp", "sp", "pc"
	33	};
	34
220abb21 AM	35	/* Definitions for the function entry mask bits. */
	36	static char *entry_mask_bit[] =
	37	{
	38	/* Registers 0 and 1 shall not be saved, since they're used to pass back
4f495e61	39	a function's result to its caller... */
220abb21 AM	40	"~r0~", "~r1~",
	41	/* Registers 2 .. 11 are normal registers. */
	42	"r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11",
	43	/* Registers 12 and 13 are argument and frame pointer and must not
	44	be saved by using the entry mask. */
	45	"~ap~", "~fp~",
	46	/* Bits 14 and 15 control integer and decimal overflow. */
	47	"IntOvfl", "DecOvfl",
	48	};
	49
252b5132	50	/* Sign-extend an (unsigned char). */
252b5132	51	#define COERCE_SIGNED_CHAR(ch) ((signed char)(ch))
252b5132 RH	52
	53	/* Get a 1 byte signed integer. */
	54	#define NEXTBYTE(p) \
	55	(p += 1, FETCH_DATA (info, p), \
	56	COERCE_SIGNED_CHAR(p[-1]))
	57
	58	/* Get a 2 byte signed integer. */
	59	#define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
	60	#define NEXTWORD(p) \
	61	(p += 2, FETCH_DATA (info, p), \
	62	COERCE16 ((p[-1] << 8) + p[-2]))
	63
	64	/* Get a 4 byte signed integer. */
	65	#define COERCE32(x) ((int) (((x) ^ 0x80000000) - 0x80000000))
	66	#define NEXTLONG(p) \
	67	(p += 4, FETCH_DATA (info, p), \
	68	(COERCE32 ((((((p[-1] << 8) + p[-2]) << 8) + p[-3]) << 8) + p[-4])))
	69
	70	/* Maximum length of an instruction. */
	71	#define MAXLEN 25
	72
252b5132 RH	73	struct private
	74	{
	75	/* Points to first byte not fetched. */
ec72cfe5 NC	76	bfd_byte * max_fetched;
	77	bfd_byte the_buffer[MAXLEN];
	78	bfd_vma insn_start;
	79	jmp_buf bailout;
252b5132 RH	80	};
	81
	82	/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
	83	to ADDR (exclusive) are valid. Returns 1 for success, longjmps
	84	on error. */
	85	#define FETCH_DATA(info, addr) \
	86	((addr) <= ((struct private *)(info->private_data))->max_fetched \
	87	? 1 : fetch_data ((info), (addr)))
	88
	89	static int
47b0e7ad	90	fetch_data (struct disassemble_info info, bfd_byte addr)
252b5132 RH	91	{
	92	int status;
	93	struct private priv = (struct private ) info->private_data;
	94	bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
	95
	96	status = (*info->read_memory_func) (start,
	97	priv->max_fetched,
	98	addr - priv->max_fetched,
	99	info);
	100	if (status != 0)
	101	{
	102	(*info->memory_error_func) (status, start, info);
	103	longjmp (priv->bailout, 1);
	104	}
	105	else
	106	priv->max_fetched = addr;
	107
	108	return 1;
	109	}
	110
ec72cfe5 NC	111	/* Entry mask handling. */
	112	static unsigned int entry_addr_occupied_slots = 0;
	113	static unsigned int entry_addr_total_slots = 0;
	114	static bfd_vma * entry_addr = NULL;
	115
	116	/* Parse the VAX specific disassembler options. These contain function
	117	entry addresses, which can be useful to disassemble ROM images, since
	118	there's no symbol table. Returns TRUE upon success, FALSE otherwise. */
	119
	120	static bfd_boolean
	121	parse_disassembler_options (char * options)
	122	{
	123	const char * entry_switch = "entry:";
	124
	125	while ((options = strstr (options, entry_switch)))
	126	{
	127	options += strlen (entry_switch);
	128
	129	/* The greater-than part of the test below is paranoia. */
	130	if (entry_addr_occupied_slots >= entry_addr_total_slots)
	131	{
	132	/* A guesstimate of the number of entries we will have to create. */
	133	entry_addr_total_slots +=
	134	strlen (options) / (strlen (entry_switch) + 5);
	135
	136	entry_addr = realloc (entry_addr, sizeof (bfd_vma)
	137	* entry_addr_total_slots);
	138	}
	139
	140	if (entry_addr == NULL)
	141	return FALSE;
	142
	143	entry_addr[entry_addr_occupied_slots] = bfd_scan_vma (options, NULL, 0);
	144	entry_addr_occupied_slots ++;
	145	}
	146
	147	return TRUE;
	148	}
	149
	150	#if 0 /* FIXME: Ideally the disassembler should have target specific
	151	initialisation and termination function pointers. Then
	152	parse_disassembler_options could be the init function and
	153	free_entry_array (below) could be the termination routine.
	154	Until then there is no way for the disassembler to tell us
	155	that it has finished and that we no longer need the entry
	156	array, so this routine is suppressed for now. It does mean
	157	that we leak memory, but only to the extent that we do not
	158	free it just before the disassembler is about to terminate
	159	anyway. */
	160
	161	/* Free memory allocated to our entry array. */
	162
	163	static void
	164	free_entry_array (void)
	165	{
	166	if (entry_addr)
	167	{
	168	free (entry_addr);
	169	entry_addr = NULL;
	170	entry_addr_occupied_slots = entry_addr_total_slots = 0;
	171	}
	172	}
	173	#endif
6db7e006 MR	174	/* Check if the given address is a known function entry point. This is
	175	the case if there is a symbol of the function type at this address.
	176	We also check for synthetic symbols as these are used for PLT entries
	177	(weak undefined symbols may not have the function type set). Finally
	178	the address may have been forced to be treated as an entry point. The
	179	latter helps in disassembling ROM images, because there's no symbol
	180	table at all. Forced entry points can be given by supplying several
	181	-M options to objdump: -M entry:0xffbb7730. */
ec72cfe5 NC	182
	183	static bfd_boolean
	184	is_function_entry (struct disassemble_info *info, bfd_vma addr)
	185	{
	186	unsigned int i;
	187
6db7e006	188	/* Check if there's a function or PLT symbol at our address. */
ec72cfe5 NC	189	if (info->symbols
ec72cfe5 NC	190	&& info->symbols[0]
6db7e006	191	&& (info->symbols[0]->flags & (BSF_FUNCTION \| BSF_SYNTHETIC))
ec72cfe5 NC	192	&& addr == bfd_asymbol_value (info->symbols[0]))
	193	return TRUE;
	194
	195	/* Check for forced function entry address. */
	196	for (i = entry_addr_occupied_slots; i--;)
	197	if (entry_addr[i] == addr)
	198	return TRUE;
	199
	200	return FALSE;
	201	}
	202
6db7e006 MR	203	/* Check if the given address is the last longword of a PLT entry.
	204	This longword is data and depending on the value it may interfere
	205	with disassembly of further PLT entries. We make use of the fact
	206	PLT symbols are marked BSF_SYNTHETIC. */
	207	static bfd_boolean
	208	is_plt_tail (struct disassemble_info *info, bfd_vma addr)
	209	{
	210	if (info->symbols
	211	&& info->symbols[0]
	212	&& (info->symbols[0]->flags & BSF_SYNTHETIC)
	213	&& addr == bfd_asymbol_value (info->symbols[0]) + 8)
	214	return TRUE;
	215
	216	return FALSE;
	217	}
	218
47b0e7ad NC	219	static int
	220	print_insn_mode (const char *d,
	221	int size,
	222	unsigned char *p0,
	223	bfd_vma addr, /* PC for this arg to be relative to. */
	224	disassemble_info *info)
	225	{
	226	unsigned char *p = p0;
	227	unsigned char mode, reg;
	228
	229	/* Fetch and interpret mode byte. */
	230	mode = (unsigned char) NEXTBYTE (p);
	231	reg = mode & 0xF;
	232	switch (mode & 0xF0)
	233	{
	234	case 0x00:
	235	case 0x10:
	236	case 0x20:
	237	case 0x30: /* Literal mode $number. */
	238	if (d[1] == 'd' \|\| d[1] == 'f' \|\| d[1] == 'g' \|\| d[1] == 'h')
	239	(*info->fprintf_func) (info->stream, "$0x%x [%c-float]", mode, d[1]);
	240	else
	241	(*info->fprintf_func) (info->stream, "$0x%x", mode);
	242	break;
	243	case 0x40: /* Index: base-addr[Rn] */
	244	p += print_insn_mode (d, size, p0 + 1, addr + 1, info);
	245	(*info->fprintf_func) (info->stream, "[%s]", reg_names[reg]);
	246	break;
	247	case 0x50: /* Register: Rn */
	248	(*info->fprintf_func) (info->stream, "%s", reg_names[reg]);
	249	break;
	250	case 0x60: /* Register deferred: (Rn) */
	251	(*info->fprintf_func) (info->stream, "(%s)", reg_names[reg]);
	252	break;
	253	case 0x70: /* Autodecrement: -(Rn) */
	254	(*info->fprintf_func) (info->stream, "-(%s)", reg_names[reg]);
	255	break;
	256	case 0x80: /* Autoincrement: (Rn)+ */
	257	if (reg == 0xF)
	258	{ /* Immediate? */
	259	int i;
	260
	261	FETCH_DATA (info, p + size);
	262	(*info->fprintf_func) (info->stream, "$0x");
	263	if (d[1] == 'd' \|\| d[1] == 'f' \|\| d[1] == 'g' \|\| d[1] == 'h')
	264	{
	265	int float_word;
	266
	267	float_word = p[0] \| (p[1] << 8);
	268	if ((d[1] == 'd' \|\| d[1] == 'f')
	269	&& (float_word & 0xff80) == 0x8000)
	270	{
	271	(*info->fprintf_func) (info->stream, "[invalid %c-float]",
	272	d[1]);
	273	}
	274	else
	275	{
	276	for (i = 0; i < size; i++)
	277	(*info->fprintf_func) (info->stream, "%02x",
	278	p[size - i - 1]);
	279	(*info->fprintf_func) (info->stream, " [%c-float]", d[1]);
	280	}
	281	}
	282	else
283	{
284	for (i = 0; i < size; i++)
285	(*info->fprintf_func) (info->stream, "%02x", p[size - i - 1]);
286	}
287	p += size;
288	}
289	else
290	(*info->fprintf_func) (info->stream, "(%s)+", reg_names[reg]);
291	break;
292	case 0x90: /* Autoincrement deferred: @(Rn)+ */
293	if (reg == 0xF)
294	(info->fprintf_func) (info->stream, "0x%x", NEXTLONG (p));
295	else
296	(*info->fprintf_func) (info->stream, "@(%s)+", reg_names[reg]);
297	break;
298	case 0xB0: /* Displacement byte deferred: displ(Rn). /
299	(info->fprintf_func) (info->stream, "");
300	case 0xA0: /* Displacement byte: displ(Rn). */
301	if (reg == 0xF)
302	(*info->print_address_func) (addr + 2 + NEXTBYTE (p), info);
303	else
304	(*info->fprintf_func) (info->stream, "0x%x(%s)", NEXTBYTE (p),
305	reg_names[reg]);
306	break;
307	case 0xD0: /* Displacement word deferred: displ(Rn). /
308	(info->fprintf_func) (info->stream, "");
309	case 0xC0: /* Displacement word: displ(Rn). */
310	if (reg == 0xF)
311	(*info->print_address_func) (addr + 3 + NEXTWORD (p), info);
312	else
313	(*info->fprintf_func) (info->stream, "0x%x(%s)", NEXTWORD (p),
314	reg_names[reg]);
315	break;
316	case 0xF0: /* Displacement long deferred: displ(Rn). /
317	(info->fprintf_func) (info->stream, "");
318	case 0xE0: /* Displacement long: displ(Rn). */
319	if (reg == 0xF)
320	(*info->print_address_func) (addr + 5 + NEXTLONG (p), info);
321	else
322	(*info->fprintf_func) (info->stream, "0x%x(%s)", NEXTLONG (p),
323	reg_names[reg]);
324	break;
325	}
326
327	return p - p0;
328	}
329
330	/* Returns number of bytes "eaten" by the operand, or return -1 if an
331	invalid operand was found, or -2 if an opcode tabel error was
332	found. */
333
334	static int
335	print_insn_arg (const char *d,
336	unsigned char *p0,
337	bfd_vma addr, /* PC for this arg to be relative to. */
338	disassemble_info *info)
339	{
340	int arg_len;
341
342	/* Check validity of addressing length. */
343	switch (d[1])
344	{
345	case 'b' : arg_len = 1; break;
346	case 'd' : arg_len = 8; break;
347	case 'f' : arg_len = 4; break;
348	case 'g' : arg_len = 8; break;
349	case 'h' : arg_len = 16; break;
350	case 'l' : arg_len = 4; break;
351	case 'o' : arg_len = 16; break;
352	case 'w' : arg_len = 2; break;
353	case 'q' : arg_len = 8; break;
354	default : abort ();
355	}
356
357	/* Branches have no mode byte. */
358	if (d[0] == 'b')
359	{
360	unsigned char *p = p0;
361
362	if (arg_len == 1)
363	(*info->print_address_func) (addr + 1 + NEXTBYTE (p), info);
364	else
365	(*info->print_address_func) (addr + 2 + NEXTWORD (p), info);
366
367	return p - p0;
368	}
369
370	return print_insn_mode (d, arg_len, p0, addr, info);
371	}
372
252b5132 RH	373	/* Print the vax instruction at address MEMADDR in debugged memory,
	374	on INFO->STREAM. Returns length of the instruction, in bytes. */
	375
	376	int
47b0e7ad	377	print_insn_vax (bfd_vma memaddr, disassemble_info *info)
252b5132	378	{
ec72cfe5	379	static bfd_boolean parsed_disassembler_options = FALSE;
252b5132	380	const struct vot *votp;
fc05c67f	381	const char *argp;
252b5132 RH	382	unsigned char *arg;
	383	struct private priv;
	384	bfd_byte *buffer = priv.the_buffer;
	385
47b0e7ad	386	info->private_data = & priv;
252b5132 RH	387	priv.max_fetched = priv.the_buffer;
252b5132 RH	388	priv.insn_start = memaddr;
fc05c67f	389
ec72cfe5 NC	390	if (! parsed_disassembler_options
	391	&& info->disassembler_options != NULL)
	392	{
	393	parse_disassembler_options (info->disassembler_options);
	394
	395	/* To avoid repeated parsing of these options. */
	396	parsed_disassembler_options = TRUE;
	397	}
	398
252b5132	399	if (setjmp (priv.bailout) != 0)
47b0e7ad NC	400	/* Error return. */
47b0e7ad NC	401	return -1;
252b5132	402
fc05c67f	403	argp = NULL;
bbe6d95f AM	404	/* Check if the info buffer has more than one byte left since
	405	the last opcode might be a single byte with no argument data. */
	406	if (info->buffer_length - (memaddr - info->buffer_vma) > 1)
	407	{
	408	FETCH_DATA (info, buffer + 2);
	409	}
	410	else
	411	{
	412	FETCH_DATA (info, buffer + 1);
	413	buffer[1] = 0;
	414	}
	415
220abb21	416	/* Decode function entry mask. */
ec72cfe5	417	if (is_function_entry (info, memaddr))
220abb21 AM	418	{
	419	int i = 0;
	420	int register_mask = buffer[1] << 8 \| buffer[0];
	421
4f495e61	422	(*info->fprintf_func) (info->stream, ".word 0x%04x # Entry mask: <",
220abb21 AM	423	register_mask);
	424
	425	for (i = 15; i >= 0; i--)
	426	if (register_mask & (1 << i))
	427	(*info->fprintf_func) (info->stream, " %s", entry_mask_bit[i]);
	428
	429	(*info->fprintf_func) (info->stream, " >");
	430
	431	return 2;
	432	}
	433
6db7e006 MR	434	/* Decode PLT entry offset longword. */
	435	if (is_plt_tail (info, memaddr))
	436	{
	437	int offset;
	438
	439	FETCH_DATA (info, buffer + 4);
	440	offset = buffer[3] << 24 \| buffer[2] << 16 \| buffer[1] << 8 \| buffer[0];
	441	(*info->fprintf_func) (info->stream, ".long 0x%08x", offset);
	442
	443	return 4;
	444	}
	445
252b5132 RH	446	for (votp = &votstrs[0]; votp->name[0]; votp++)
252b5132 RH	447	{
47b0e7ad	448	vax_opcodeT opcode = votp->detail.code;
252b5132 RH	449
	450	/* 2 byte codes match 2 buffer pos. */
	451	if ((bfd_byte) opcode == buffer[0]
	452	&& (opcode >> 8 == 0 \|\| opcode >> 8 == buffer[1]))
	453	{
	454	argp = votp->detail.args;
	455	break;
	456	}
	457	}
	458	if (argp == NULL)
	459	{
	460	/* Handle undefined instructions. */
	461	(*info->fprintf_func) (info->stream, ".word 0x%x",
	462	(buffer[0] << 8) + buffer[1]);
	463	return 2;
	464	}
	465
	466	/* Point at first byte of argument data, and at descriptor for first
	467	argument. */
	468	arg = buffer + ((votp->detail.code >> 8) ? 2 : 1);
	469
	470	/* Make sure we have it in mem */
	471	FETCH_DATA (info, arg);
	472
	473	(*info->fprintf_func) (info->stream, "%s", votp->name);
	474	if (*argp)
	475	(*info->fprintf_func) (info->stream, " ");
	476
	477	while (*argp)
	478	{
	479	arg += print_insn_arg (argp, arg, memaddr + arg - buffer, info);
	480	argp += 2;
	481	if (*argp)
	482	(*info->fprintf_func) (info->stream, ",");
	483	}
	484
	485	return arg - buffer;
	486	}
	487