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Copy comments from gdbarch.sh to gdbarch.h. Fix a number of K&R params.
[deliverable/binutils-gdb.git] / sim / arm / armdefs.h
CommitLineData
c906108c
SS		 1/* armdefs.h -- ARMulator common definitions: ARM6 Instruction Emulator.
2 Copyright (C) 1994 Advanced RISC Machines Ltd.
3
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
17
18#include <stdio.h>
19#include <stdlib.h>
20
21#define FALSE 0
22#define TRUE 1
23#define LOW 0
24#define HIGH 1
25#define LOWHIGH 1
26#define HIGHLOW 2
27
28#ifndef __STDC__
dfcd3bfb 29typedef char *VoidStar;
c906108c
SS		 30#endif
31
dfcd3bfb
JM		 32typedef unsigned long ARMword; /* must be 32 bits wide */
33typedef struct ARMul_State ARMul_State;
34
35typedef unsigned ARMul_CPInits (ARMul_State * state);
36typedef unsigned ARMul_CPExits (ARMul_State * state);
37typedef unsigned ARMul_LDCs (ARMul_State * state, unsigned type,
38 ARMword instr, ARMword value);
39typedef unsigned ARMul_STCs (ARMul_State * state, unsigned type,
40 ARMword instr, ARMword * value);
41typedef unsigned ARMul_MRCs (ARMul_State * state, unsigned type,
42 ARMword instr, ARMword * value);
43typedef unsigned ARMul_MCRs (ARMul_State * state, unsigned type,
44 ARMword instr, ARMword value);
45typedef unsigned ARMul_CDPs (ARMul_State * state, unsigned type,
46 ARMword instr);
47typedef unsigned ARMul_CPReads (ARMul_State * state, unsigned reg,
48 ARMword * value);
49typedef unsigned ARMul_CPWrites (ARMul_State * state, unsigned reg,
50 ARMword value);
51
52struct ARMul_State
53{
54 ARMword Emulate; /* to start and stop emulation */
55 unsigned EndCondition; /* reason for stopping */
56 unsigned ErrorCode; /* type of illegal instruction */
57 ARMword Reg[16]; /* the current register file */
58 ARMword RegBank[7][16]; /* all the registers */
59 ARMword Cpsr; /* the current psr */
60 ARMword Spsr[7]; /* the exception psr's */
61 ARMword NFlag, ZFlag, CFlag, VFlag, IFFlags; /* dummy flags for speed */
c906108c 62#ifdef MODET
dfcd3bfb 63 ARMword TFlag; /* Thumb state */
c906108c 64#endif
dfcd3bfb
JM		 65 ARMword Bank; /* the current register bank */
66 ARMword Mode; /* the current mode */
67 ARMword instr, pc, temp; /* saved register state */
68 ARMword loaded, decoded; /* saved pipeline state */
69 unsigned long NumScycles, NumNcycles, NumIcycles, NumCcycles, NumFcycles; /* emulated cycles used */
70 unsigned long NumInstrs; /* the number of instructions executed */
71 unsigned NextInstr;
72 unsigned VectorCatch; /* caught exception mask */
73 unsigned CallDebug; /* set to call the debugger */
74 unsigned CanWatch; /* set by memory interface if its willing to suffer the
75 overhead of checking for watchpoints on each memory
76 access */
77 unsigned MemReadDebug, MemWriteDebug;
78 unsigned long StopHandle;
79
80 unsigned char *MemDataPtr; /* admin data */
81 unsigned char *MemInPtr; /* the Data In bus */
82 unsigned char *MemOutPtr; /* the Data Out bus (which you may not need */
83 unsigned char *MemSparePtr; /* extra space */
84 ARMword MemSize;
85
86 unsigned char *OSptr; /* OS Handle */
87 char *CommandLine; /* Command Line from ARMsd */
88
89 ARMul_CPInits *CPInit[16]; /* coprocessor initialisers */
90 ARMul_CPExits *CPExit[16]; /* coprocessor finalisers */
91 ARMul_LDCs *LDC[16]; /* LDC instruction */
92 ARMul_STCs *STC[16]; /* STC instruction */
93 ARMul_MRCs *MRC[16]; /* MRC instruction */
94 ARMul_MCRs *MCR[16]; /* MCR instruction */
95 ARMul_CDPs *CDP[16]; /* CDP instruction */
96 ARMul_CPReads *CPRead[16]; /* Read CP register */
97 ARMul_CPWrites *CPWrite[16]; /* Write CP register */
98 unsigned char *CPData[16]; /* Coprocessor data */
99 unsigned char const *CPRegWords[16]; /* map of coprocessor register sizes */
100
101 unsigned EventSet; /* the number of events in the queue */
102 unsigned long Now; /* time to the nearest cycle */
103 struct EventNode **EventPtr; /* the event list */
104
105 unsigned Exception; /* enable the next four values */
106 unsigned Debug; /* show instructions as they are executed */
107 unsigned NresetSig; /* reset the processor */
108 unsigned NfiqSig;
109 unsigned NirqSig;
110
111 unsigned abortSig;
112 unsigned NtransSig;
113 unsigned bigendSig;
114 unsigned prog32Sig;
115 unsigned data32Sig;
116 unsigned lateabtSig;
117 ARMword Vector; /* synthesize aborts in cycle modes */
118 ARMword Aborted; /* sticky flag for aborts */
119 ARMword Reseted; /* sticky flag for Reset */
120 ARMword Inted, LastInted; /* sticky flags for interrupts */
121 ARMword Base; /* extra hand for base writeback */
122 ARMword AbortAddr; /* to keep track of Prefetch aborts */
123
124 const struct Dbg_HostosInterface *hostif;
125
1e6b544a
AO		 126 unsigned is_StrongARM; /* Are we emulating a StrongARM? */
127
dfcd3bfb
JM		 128 int verbose; /* non-zero means print various messages like the banner */
129};
c906108c
SS		 130
131#define ResetPin NresetSig
132#define FIQPin NfiqSig
133#define IRQPin NirqSig
134#define AbortPin abortSig
135#define TransPin NtransSig
136#define BigEndPin bigendSig
137#define Prog32Pin prog32Sig
138#define Data32Pin data32Sig
139#define LateAbortPin lateabtSig
140
141/***************************************************************************\
142* Types of ARM we know about *
143\***************************************************************************/
dfcd3bfb 144
c906108c
SS		 145/* The bitflags */
146#define ARM_Fix26_Prop 0x01
147#define ARM_Nexec_Prop 0x02
148#define ARM_Debug_Prop 0x10
149#define ARM_Isync_Prop ARM_Debug_Prop
150#define ARM_Lock_Prop 0x20
1e6b544a 151#define ARM_Strong_Prop 0x40
dfcd3bfb 152
c906108c
SS		 153/* ARM2 family */
154#define ARM2 (ARM_Fix26_Prop)
155#define ARM2as ARM2
156#define ARM61 ARM2
157#define ARM3 ARM2
158
dfcd3bfb 159#ifdef ARM60 /* previous definition in armopts.h */
c906108c
SS		 160#undef ARM60
161#endif
162
163/* ARM6 family */
164#define ARM6 (ARM_Lock_Prop)
165#define ARM60 ARM6
166#define ARM600 ARM6
167#define ARM610 ARM6
168#define ARM620 ARM6
dfcd3bfb 169
1e6b544a 170#define STRONGARM (ARM_Strong_Prop)
c906108c
SS		 171
172/***************************************************************************\
173* Macros to extract instruction fields *
174\***************************************************************************/
175
dfcd3bfb
JM		 176#define BIT(n) ( (ARMword)(instr>>(n))&1) /* bit n of instruction */
177#define BITS(m,n) ( (ARMword)(instr<<(31-(n))) >> ((31-(n))+(m)) ) /* bits m to n of instr */
178#define TOPBITS(n) (instr >> (n)) /* bits 31 to n of instr */
c906108c
SS		 179
180/***************************************************************************\
181* The hardware vector addresses *
182\***************************************************************************/
183
184#define ARMResetV 0L
185#define ARMUndefinedInstrV 4L
186#define ARMSWIV 8L
187#define ARMPrefetchAbortV 12L
188#define ARMDataAbortV 16L
189#define ARMAddrExceptnV 20L
190#define ARMIRQV 24L
191#define ARMFIQV 28L
dfcd3bfb 192#define ARMErrorV 32L /* This is an offset, not an address ! */
c906108c
SS		 193
194#define ARMul_ResetV ARMResetV
195#define ARMul_UndefinedInstrV ARMUndefinedInstrV
196#define ARMul_SWIV ARMSWIV
197#define ARMul_PrefetchAbortV ARMPrefetchAbortV
198#define ARMul_DataAbortV ARMDataAbortV
199#define ARMul_AddrExceptnV ARMAddrExceptnV
200#define ARMul_IRQV ARMIRQV
201#define ARMul_FIQV ARMFIQV
202
203/***************************************************************************\
204* Mode and Bank Constants *
205\***************************************************************************/
206
c1a72ffd
NC		 207#define USER26MODE 0L
208#define FIQ26MODE 1L
209#define IRQ26MODE 2L
210#define SVC26MODE 3L
211#define USER32MODE 16L
212#define FIQ32MODE 17L
213#define IRQ32MODE 18L
214#define SVC32MODE 19L
c906108c
SS		 215#define ABORT32MODE 23L
216#define UNDEF32MODE 27L
c1a72ffd 217#define SYSTEMMODE 31L
c906108c
SS		 218
219#define ARM32BITMODE (state->Mode > 3)
220#define ARM26BITMODE (state->Mode <= 3)
221#define ARMMODE (state->Mode)
222#define ARMul_MODEBITS 0x1fL
223#define ARMul_MODE32BIT ARM32BITMODE
224#define ARMul_MODE26BIT ARM26BITMODE
225
226#define USERBANK 0
227#define FIQBANK 1
228#define IRQBANK 2
229#define SVCBANK 3
230#define ABORTBANK 4
231#define UNDEFBANK 5
232#define DUMMYBANK 6
b0eae074 233#define SYSTEMBANK USERBANK
c1a72ffd
NC		 234
235#define BANK_CAN_ACCESS_SPSR(bank) \
236 ((bank) != USERBANK && (bank) != SYSTEMBANK && (bank) != DUMMYBANK)
c906108c
SS		 237
238/***************************************************************************\
239* Definitons of things in the emulator *
240\***************************************************************************/
241
dfcd3bfb
JM		 242extern void ARMul_EmulateInit (void);
243extern ARMul_State *ARMul_NewState (void);
244extern void ARMul_Reset (ARMul_State * state);
245extern ARMword ARMul_DoProg (ARMul_State * state);
246extern ARMword ARMul_DoInstr (ARMul_State * state);
c906108c
SS		 247
248/***************************************************************************\
249* Definitons of things for event handling *
250\***************************************************************************/
251
dfcd3bfb
JM		 252extern void ARMul_ScheduleEvent (ARMul_State * state, unsigned long delay,
253 unsigned (*func) ());
254extern void ARMul_EnvokeEvent (ARMul_State * state);
255extern unsigned long ARMul_Time (ARMul_State * state);
c906108c
SS		 256
257/***************************************************************************\
258* Useful support routines *
259\***************************************************************************/
260
dfcd3bfb
JM		 261extern ARMword ARMul_GetReg (ARMul_State * state, unsigned mode,
262 unsigned reg);
263extern void ARMul_SetReg (ARMul_State * state, unsigned mode, unsigned reg,
264 ARMword value);
265extern ARMword ARMul_GetPC (ARMul_State * state);
266extern ARMword ARMul_GetNextPC (ARMul_State * state);
267extern void ARMul_SetPC (ARMul_State * state, ARMword value);
268extern ARMword ARMul_GetR15 (ARMul_State * state);
269extern void ARMul_SetR15 (ARMul_State * state, ARMword value);
270
271extern ARMword ARMul_GetCPSR (ARMul_State * state);
272extern void ARMul_SetCPSR (ARMul_State * state, ARMword value);
273extern ARMword ARMul_GetSPSR (ARMul_State * state, ARMword mode);
274extern void ARMul_SetSPSR (ARMul_State * state, ARMword mode, ARMword value);
c906108c
SS		 275
276/***************************************************************************\
277* Definitons of things to handle aborts *
278\***************************************************************************/
279
dfcd3bfb
JM		 280extern void ARMul_Abort (ARMul_State * state, ARMword address);
281#define ARMul_ABORTWORD 0xefffffff /* SWI -1 */
c906108c
SS		 282#define ARMul_PREFETCHABORT(address) if (state->AbortAddr == 1) \
283 state->AbortAddr = (address & ~3L)
284#define ARMul_DATAABORT(address) state->abortSig = HIGH ; \
285 state->Aborted = ARMul_DataAbortV ;
286#define ARMul_CLEARABORT state->abortSig = LOW
287
288/***************************************************************************\
289* Definitons of things in the memory interface *
290\***************************************************************************/
291
dfcd3bfb
JM		 292extern unsigned ARMul_MemoryInit (ARMul_State * state,
293 unsigned long initmemsize);
294extern void ARMul_MemoryExit (ARMul_State * state);
295
296extern ARMword ARMul_LoadInstrS (ARMul_State * state, ARMword address,
297 ARMword isize);
298extern ARMword ARMul_LoadInstrN (ARMul_State * state, ARMword address,
299 ARMword isize);
300extern ARMword ARMul_ReLoadInstr (ARMul_State * state, ARMword address,
301 ARMword isize);
302
303extern ARMword ARMul_LoadWordS (ARMul_State * state, ARMword address);
304extern ARMword ARMul_LoadWordN (ARMul_State * state, ARMword address);
305extern ARMword ARMul_LoadHalfWord (ARMul_State * state, ARMword address);
306extern ARMword ARMul_LoadByte (ARMul_State * state, ARMword address);
307
308extern void ARMul_StoreWordS (ARMul_State * state, ARMword address,
309 ARMword data);
310extern void ARMul_StoreWordN (ARMul_State * state, ARMword address,
311 ARMword data);
312extern void ARMul_StoreHalfWord (ARMul_State * state, ARMword address,
313 ARMword data);
314extern void ARMul_StoreByte (ARMul_State * state, ARMword address,
315 ARMword data);
316
317extern ARMword ARMul_SwapWord (ARMul_State * state, ARMword address,
318 ARMword data);
319extern ARMword ARMul_SwapByte (ARMul_State * state, ARMword address,
320 ARMword data);
321
322extern void ARMul_Icycles (ARMul_State * state, unsigned number,
323 ARMword address);
324extern void ARMul_Ccycles (ARMul_State * state, unsigned number,
325 ARMword address);
326
327extern ARMword ARMul_ReadWord (ARMul_State * state, ARMword address);
328extern ARMword ARMul_ReadByte (ARMul_State * state, ARMword address);
329extern void ARMul_WriteWord (ARMul_State * state, ARMword address,
330 ARMword data);
331extern void ARMul_WriteByte (ARMul_State * state, ARMword address,
332 ARMword data);
333
334extern ARMword ARMul_MemAccess (ARMul_State * state, ARMword, ARMword,
335 ARMword, ARMword, ARMword, ARMword, ARMword,
336 ARMword, ARMword, ARMword);
c906108c
SS		 337
338/***************************************************************************\
339* Definitons of things in the co-processor interface *
340\***************************************************************************/
341
342#define ARMul_FIRST 0
343#define ARMul_TRANSFER 1
344#define ARMul_BUSY 2
345#define ARMul_DATA 3
346#define ARMul_INTERRUPT 4
347#define ARMul_DONE 0
348#define ARMul_CANT 1
349#define ARMul_INC 3
350
dfcd3bfb
JM		 351extern unsigned ARMul_CoProInit (ARMul_State * state);
352extern void ARMul_CoProExit (ARMul_State * state);
353extern void ARMul_CoProAttach (ARMul_State * state, unsigned number,
354 ARMul_CPInits * init, ARMul_CPExits * exit,
355 ARMul_LDCs * ldc, ARMul_STCs * stc,
356 ARMul_MRCs * mrc, ARMul_MCRs * mcr,
357 ARMul_CDPs * cdp,
358 ARMul_CPReads * read, ARMul_CPWrites * write);
359extern void ARMul_CoProDetach (ARMul_State * state, unsigned number);
c906108c
SS		 360
361/***************************************************************************\
362* Definitons of things in the host environment *
363\***************************************************************************/
364
dfcd3bfb
JM		 365extern unsigned ARMul_OSInit (ARMul_State * state);
366extern void ARMul_OSExit (ARMul_State * state);
367extern unsigned ARMul_OSHandleSWI (ARMul_State * state, ARMword number);
368extern ARMword ARMul_OSLastErrorP (ARMul_State * state);
c906108c 369
dfcd3bfb
JM		 370extern ARMword ARMul_Debug (ARMul_State * state, ARMword pc, ARMword instr);
371extern unsigned ARMul_OSException (ARMul_State * state, ARMword vector,
372 ARMword pc);
373extern int rdi_log;
c906108c
SS		 374
375/***************************************************************************\
376* Host-dependent stuff *
377\***************************************************************************/
378
379#ifdef macintosh
dfcd3bfb 380pascal void SpinCursor (short increment); /* copied from CursorCtl.h */
c906108c 381# define HOURGLASS SpinCursor( 1 )
dfcd3bfb 382# define HOURGLASS_RATE 1023 /* 2^n - 1 */
c906108c 383#endif
6d358e86
NC		 384
385extern void ARMul_UndefInstr (ARMul_State *, ARMword);
386extern void ARMul_FixCPSR (ARMul_State *, ARMword, ARMword);
387extern void ARMul_FixSPSR (ARMul_State *, ARMword, ARMword);
388extern void ARMul_ConsolePrint (ARMul_State *, const char *, ...);
389extern void ARMul_SelectProcessor (ARMul_State *, unsigned);
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