[deliverable/binutils-gdb.git] / sim / arm / armvirt.c

/*  armvirt.c -- ARMulator virtual memory interace:  ARM6 Instruction Emulator.
    Copyright (C) 1994 Advanced RISC Machines Ltd.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.
 
    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.
 
    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */

/* This file contains a complete ARMulator memory model, modelling a
"virtual memory" system. A much simpler model can be found in armfast.c,
and that model goes faster too, but has a fixed amount of memory. This
model's memory has 64K pages, allocated on demand from a 64K entry page
table. The routines PutWord and GetWord implement this. Pages are never
freed as they might be needed again. A single area of memory may be
defined to generate aborts. */

#include "armopts.h"
#include "armos.h"
#include "armdefs.h"
#include "ansidecl.h"

#ifdef VALIDATE			/* for running the validate suite */
#define TUBE 48 * 1024 * 1024	/* write a char on the screen */
#define ABORTS 1
#endif

/* #define ABORTS */

#ifdef ABORTS			/* the memory system will abort */
/* For the old test suite Abort between 32 Kbytes and 32 Mbytes
   For the new test suite Abort between 8 Mbytes and 26 Mbytes */
/* #define LOWABORT 32 * 1024
#define HIGHABORT 32 * 1024 * 1024 */
#define LOWABORT 8 * 1024 * 1024
#define HIGHABORT 26 * 1024 * 1024

#endif

#define NUMPAGES 64 * 1024
#define PAGESIZE 64 * 1024
#define PAGEBITS 16
#define OFFSETBITS 0xffff

int SWI_vector_installed = FALSE;

/***************************************************************************\
*        Get a Word from Virtual Memory, maybe allocating the page          *
\***************************************************************************/

static ARMword
GetWord (ARMul_State * state, ARMword address, int check)
{
  ARMword page;
  ARMword offset;
  ARMword **pagetable;
  ARMword *pageptr;

  page = address >> PAGEBITS;
  offset = (address & OFFSETBITS) >> 2;
  pagetable = (ARMword **) state->MemDataPtr;
  pageptr = *(pagetable + page);

  if (pageptr == NULL)
    {
      pageptr = (ARMword *) malloc (PAGESIZE);

      if (pageptr == NULL)
	{
	  perror ("ARMulator can't allocate VM page");
	  exit (12);
	}

      *(pagetable + page) = pageptr;
    }

  return *(pageptr + offset);
}

/***************************************************************************\
*        Put a Word into Virtual Memory, maybe allocating the page          *
\***************************************************************************/

static void
PutWord (ARMul_State * state, ARMword address, ARMword data, int check)
{
  ARMword page;
  ARMword offset;
  ARMword **pagetable;
  ARMword *pageptr;

  page = address >> PAGEBITS;
  offset = (address & OFFSETBITS) >> 2;
  pagetable = (ARMword **) state->MemDataPtr;
  pageptr = *(pagetable + page);

  if (pageptr == NULL)
    {
      pageptr = (ARMword *) malloc (PAGESIZE);
      if (pageptr == NULL)
	{
	  perror ("ARMulator can't allocate VM page");
	  exit (13);
	}

      *(pagetable + page) = pageptr;
    }

  if (address == 0x8)
    SWI_vector_installed = TRUE;

  *(pageptr + offset) = data;
}

/***************************************************************************\
*                      Initialise the memory interface                      *
\***************************************************************************/

unsigned
ARMul_MemoryInit (ARMul_State * state, unsigned long initmemsize)
{
  ARMword **pagetable;
  unsigned page;

  if (initmemsize)
    state->MemSize = initmemsize;

  pagetable = (ARMword **) malloc (sizeof (ARMword) * NUMPAGES);

  if (pagetable == NULL)
    return FALSE;

  for (page = 0; page < NUMPAGES; page++)
    *(pagetable + page) = NULL;

  state->MemDataPtr = (unsigned char *) pagetable;

  ARMul_ConsolePrint (state, ", 4 Gb memory");

  return TRUE;
}

/***************************************************************************\
*                         Remove the memory interface                       *
\***************************************************************************/

void
ARMul_MemoryExit (ARMul_State * state)
{
  ARMword page;
  ARMword **pagetable;
  ARMword *pageptr;

  pagetable = (ARMword **) state->MemDataPtr;
  for (page = 0; page < NUMPAGES; page++)
    {
      pageptr = *(pagetable + page);
      if (pageptr != NULL)
	free ((char *) pageptr);
    }
  free ((char *) pagetable);
  return;
}

/***************************************************************************\
*                   ReLoad Instruction                                     *
\***************************************************************************/

ARMword
ARMul_ReLoadInstr (ARMul_State * state, ARMword address, ARMword isize)
{
#ifdef ABORTS
  if (address >= LOWABORT && address < HIGHABORT)
    {
      ARMul_PREFETCHABORT (address);
      return ARMul_ABORTWORD;
    }
  else
    {
      ARMul_CLEARABORT;
    }
#endif

  if ((isize == 2) && (address & 0x2))
    {
      /* We return the next two halfwords: */
      ARMword lo = GetWord (state, address, TRUE);
      ARMword hi = GetWord (state, address + 4, TRUE);

      if (state->bigendSig == HIGH)
	return (lo << 16) | (hi >> 16);
      else
	return ((hi & 0xFFFF) << 16) | (lo >> 16);
    }

  return GetWord (state, address, TRUE);
}

/***************************************************************************\
*                   Load Instruction, Sequential Cycle                      *
\***************************************************************************/

ARMword ARMul_LoadInstrS (ARMul_State * state, ARMword address, ARMword isize)
{
  state->NumScycles++;

#ifdef HOURGLASS
  if ((state->NumScycles & HOURGLASS_RATE) == 0)
    {
      HOURGLASS;
    }
#endif

  return ARMul_ReLoadInstr (state, address, isize);
}

/***************************************************************************\
*                 Load Instruction, Non Sequential Cycle                    *
\***************************************************************************/

ARMword ARMul_LoadInstrN (ARMul_State * state, ARMword address, ARMword isize)
{
  state->NumNcycles++;

  return ARMul_ReLoadInstr (state, address, isize);
}

/***************************************************************************\
*                      Read Word (but don't tell anyone!)                   *
\***************************************************************************/

ARMword ARMul_ReadWord (ARMul_State * state, ARMword address)
{
#ifdef ABORTS
  if (address >= LOWABORT && address < HIGHABORT)
    {
      ARMul_DATAABORT (address);
      return ARMul_ABORTWORD;
    }
  else
    {
      ARMul_CLEARABORT;
    }
#endif

  return GetWord (state, address, TRUE);
}

/***************************************************************************\
*                        Load Word, Sequential Cycle                        *
\***************************************************************************/

ARMword ARMul_LoadWordS (ARMul_State * state, ARMword address)
{
  state->NumScycles++;

  return ARMul_ReadWord (state, address);
}

/***************************************************************************\
*                      Load Word, Non Sequential Cycle                      *
\***************************************************************************/

ARMword ARMul_LoadWordN (ARMul_State * state, ARMword address)
{
  state->NumNcycles++;

  return ARMul_ReadWord (state, address);
}

/***************************************************************************\
*                     Load Halfword, (Non Sequential Cycle)                 *
\***************************************************************************/

ARMword ARMul_LoadHalfWord (ARMul_State * state, ARMword address)
{
  ARMword temp, offset;

  state->NumNcycles++;

  temp = ARMul_ReadWord (state, address);
  offset = (((ARMword) state->bigendSig * 2) ^ (address & 2)) << 3;	/* bit offset into the word */

  return (temp >> offset) & 0xffff;
}

/***************************************************************************\
*                      Read Byte (but don't tell anyone!)                   *
\***************************************************************************/

ARMword ARMul_ReadByte (ARMul_State * state, ARMword address)
{
  ARMword temp, offset;

  temp = ARMul_ReadWord (state, address);
  offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3;	/* bit offset into the word */

  return (temp >> offset & 0xffL);
}

/***************************************************************************\
*                     Load Byte, (Non Sequential Cycle)                     *
\***************************************************************************/

ARMword ARMul_LoadByte (ARMul_State * state, ARMword address)
{
  state->NumNcycles++;

  return ARMul_ReadByte (state, address);
}

/***************************************************************************\
*                     Write Word (but don't tell anyone!)                   *
\***************************************************************************/

void
ARMul_WriteWord (ARMul_State * state, ARMword address, ARMword data)
{
#ifdef ABORTS
  if (address >= LOWABORT && address < HIGHABORT)
    {
      ARMul_DATAABORT (address);
      return;
    }
  else
    {
      ARMul_CLEARABORT;
    }
#endif

  PutWord (state, address, data, TRUE);
}

/***************************************************************************\
*                       Store Word, Sequential Cycle                        *
\***************************************************************************/

void
ARMul_StoreWordS (ARMul_State * state, ARMword address, ARMword data)
{
  state->NumScycles++;

  ARMul_WriteWord (state, address, data);
}

/***************************************************************************\
*                       Store Word, Non Sequential Cycle                        *
\***************************************************************************/

void
ARMul_StoreWordN (ARMul_State * state, ARMword address, ARMword data)
{
  state->NumNcycles++;

  ARMul_WriteWord (state, address, data);
}

/***************************************************************************\
*                    Store HalfWord, (Non Sequential Cycle)                 *
\***************************************************************************/

void
ARMul_StoreHalfWord (ARMul_State * state, ARMword address, ARMword data)
{
  ARMword temp, offset;

  state->NumNcycles++;

#ifdef VALIDATE
  if (address == TUBE)
    {
      if (data == 4)
	state->Emulate = FALSE;
      else
	(void) putc ((char) data, stderr);	/* Write Char */
      return;
    }
#endif

  temp = ARMul_ReadWord (state, address);
  offset = (((ARMword) state->bigendSig * 2) ^ (address & 2)) << 3;	/* bit offset into the word */

  PutWord (state, address,
	   (temp & ~(0xffffL << offset)) | ((data & 0xffffL) << offset),
	   TRUE);
}

/***************************************************************************\
*                     Write Byte (but don't tell anyone!)                   *
\***************************************************************************/

void
ARMul_WriteByte (ARMul_State * state, ARMword address, ARMword data)
{
  ARMword temp, offset;

  temp = ARMul_ReadWord (state, address);
  offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3;	/* bit offset into the word */

  PutWord (state, address,
	   (temp & ~(0xffL << offset)) | ((data & 0xffL) << offset),
	   TRUE);
}

/***************************************************************************\
*                    Store Byte, (Non Sequential Cycle)                     *
\***************************************************************************/

void
ARMul_StoreByte (ARMul_State * state, ARMword address, ARMword data)
{
  state->NumNcycles++;

#ifdef VALIDATE
  if (address == TUBE)
    {
      if (data == 4)
	state->Emulate = FALSE;
      else
	(void) putc ((char) data, stderr);	/* Write Char */
      return;
    }
#endif

  ARMul_WriteByte (state, address, data);
}

/***************************************************************************\
*                   Swap Word, (Two Non Sequential Cycles)                  *
\***************************************************************************/

ARMword ARMul_SwapWord (ARMul_State * state, ARMword address, ARMword data)
{
  ARMword temp;

  state->NumNcycles++;

  temp = ARMul_ReadWord (state, address);

  state->NumNcycles++;

  PutWord (state, address, data, TRUE);

  return temp;
}

/***************************************************************************\
*                   Swap Byte, (Two Non Sequential Cycles)                  *
\***************************************************************************/

ARMword ARMul_SwapByte (ARMul_State * state, ARMword address, ARMword data)
{
  ARMword temp;

  temp = ARMul_LoadByte (state, address);
  ARMul_StoreByte (state, address, data);

  return temp;
}

/***************************************************************************\
*                             Count I Cycles                                *
\***************************************************************************/

void
ARMul_Icycles (ARMul_State * state, unsigned number, ARMword address ATTRIBUTE_UNUSED)
{
  state->NumIcycles += number;
  ARMul_CLEARABORT;
}

/***************************************************************************\
*                             Count C Cycles                                *
\***************************************************************************/

void
ARMul_Ccycles (ARMul_State * state, unsigned number, ARMword address ATTRIBUTE_UNUSED)
{
  state->NumCcycles += number;
  ARMul_CLEARABORT;
}


/* Read a byte.  Do not check for alignment or access errors.  */

ARMword
ARMul_SafeReadByte (ARMul_State * state, ARMword address)
{
  ARMword temp, offset;

  temp = GetWord (state, address, FALSE);
  offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3;

  return (temp >> offset & 0xffL);
}

void
ARMul_SafeWriteByte (ARMul_State * state, ARMword address, ARMword data)
{
  ARMword temp, offset;

  temp = GetWord (state, address, FALSE);
  offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3;

  PutWord (state, address,
	   (temp & ~(0xffL << offset)) | ((data & 0xffL) << offset),
	   FALSE);
}
Commit	Line	Data
c906108c SS	1	/* armvirt.c -- ARMulator virtual memory interace: ARM6 Instruction Emulator.
	2	Copyright (C) 1994 Advanced RISC Machines Ltd.
	3
	4	This program is free software; you can redistribute it and/or modify
	5	it under the terms of the GNU General Public License as published by
	6	the Free Software Foundation; either version 2 of the License, or
	7	(at your option) any later version.
	8
	9	This program is distributed in the hope that it will be useful,
	10	but WITHOUT ANY WARRANTY; without even the implied warranty of
	11	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	12	GNU General Public License for more details.
	13
	14	You should have received a copy of the GNU General Public License
	15	along with this program; if not, write to the Free Software
	16	Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
	17
	18	/* This file contains a complete ARMulator memory model, modelling a
	19	"virtual memory" system. A much simpler model can be found in armfast.c,
	20	and that model goes faster too, but has a fixed amount of memory. This
	21	model's memory has 64K pages, allocated on demand from a 64K entry page
	22	table. The routines PutWord and GetWord implement this. Pages are never
	23	freed as they might be needed again. A single area of memory may be
	24	defined to generate aborts. */
	25
	26	#include "armopts.h"
917bca4f	27	#include "armos.h"
c906108c	28	#include "armdefs.h"
6d358e86	29	#include "ansidecl.h"
c906108c	30
dfcd3bfb JM	31	#ifdef VALIDATE /* for running the validate suite */
dfcd3bfb JM	32	#define TUBE 48 * 1024 * 1024 /* write a char on the screen */
c906108c SS	33	#define ABORTS 1
	34	#endif
	35
ae3c7619	36	/* #define ABORTS */
c906108c	37
dfcd3bfb	38	#ifdef ABORTS /* the memory system will abort */
c906108c SS	39	/* For the old test suite Abort between 32 Kbytes and 32 Mbytes
	40	For the new test suite Abort between 8 Mbytes and 26 Mbytes */
	41	/* #define LOWABORT 32 * 1024
	42	#define HIGHABORT 32 * 1024 * 1024 */
	43	#define LOWABORT 8 * 1024 * 1024
	44	#define HIGHABORT 26 * 1024 * 1024
	45
	46	#endif
	47
	48	#define NUMPAGES 64 * 1024
	49	#define PAGESIZE 64 * 1024
	50	#define PAGEBITS 16
	51	#define OFFSETBITS 0xffff
	52
88694af3 NC	53	int SWI_vector_installed = FALSE;
88694af3 NC	54
c906108c SS	55	/***************************************************************************\
	56	* Get a Word from Virtual Memory, maybe allocating the page *
	57	\***************************************************************************/
	58
	59	static ARMword
917bca4f	60	GetWord (ARMul_State * state, ARMword address, int check)
c906108c	61	{
dfcd3bfb JM	62	ARMword page;
	63	ARMword offset;
	64	ARMword **pagetable;
	65	ARMword *pageptr;
c906108c	66
dfcd3bfb JM	67	page = address >> PAGEBITS;
dfcd3bfb JM	68	offset = (address & OFFSETBITS) >> 2;
c906108c	69	pagetable = (ARMword **) state->MemDataPtr;
dfcd3bfb JM	70	pageptr = *(pagetable + page);
dfcd3bfb JM	71
c906108c SS	72	if (pageptr == NULL)
	73	{
	74	pageptr = (ARMword *) malloc (PAGESIZE);
dfcd3bfb	75
c906108c SS	76	if (pageptr == NULL)
	77	{
	78	perror ("ARMulator can't allocate VM page");
	79	exit (12);
	80	}
dfcd3bfb	81
c906108c SS	82	*(pagetable + page) = pageptr;
c906108c SS	83	}
dfcd3bfb	84
c906108c SS	85	return *(pageptr + offset);
	86	}
	87
	88	/***************************************************************************\
	89	* Put a Word into Virtual Memory, maybe allocating the page *
	90	\***************************************************************************/
	91
	92	static void
917bca4f	93	PutWord (ARMul_State * state, ARMword address, ARMword data, int check)
c906108c	94	{
dfcd3bfb JM	95	ARMword page;
	96	ARMword offset;
	97	ARMword **pagetable;
	98	ARMword *pageptr;
	99
	100	page = address >> PAGEBITS;
	101	offset = (address & OFFSETBITS) >> 2;
	102	pagetable = (ARMword **) state->MemDataPtr;
	103	pageptr = *(pagetable + page);
	104
c906108c SS	105	if (pageptr == NULL)
	106	{
	107	pageptr = (ARMword *) malloc (PAGESIZE);
	108	if (pageptr == NULL)
	109	{
	110	perror ("ARMulator can't allocate VM page");
dfcd3bfb	111	exit (13);
c906108c	112	}
dfcd3bfb	113
c906108c SS	114	*(pagetable + page) = pageptr;
c906108c SS	115	}
dfcd3bfb	116
88694af3 NC	117	if (address == 0x8)
	118	SWI_vector_installed = TRUE;
	119
c906108c SS	120	*(pageptr + offset) = data;
	121	}
	122
	123	/***************************************************************************\
	124	* Initialise the memory interface *
	125	\***************************************************************************/
	126
	127	unsigned
	128	ARMul_MemoryInit (ARMul_State * state, unsigned long initmemsize)
	129	{
dfcd3bfb JM	130	ARMword **pagetable;
dfcd3bfb JM	131	unsigned page;
c906108c SS	132
	133	if (initmemsize)
	134	state->MemSize = initmemsize;
dfcd3bfb	135
c906108c	136	pagetable = (ARMword *) malloc (sizeof (ARMword) NUMPAGES);
dfcd3bfb	137
c906108c SS	138	if (pagetable == NULL)
c906108c SS	139	return FALSE;
dfcd3bfb JM	140
dfcd3bfb JM	141	for (page = 0; page < NUMPAGES; page++)
c906108c	142	*(pagetable + page) = NULL;
dfcd3bfb JM	143
dfcd3bfb JM	144	state->MemDataPtr = (unsigned char *) pagetable;
c906108c SS	145
c906108c SS	146	ARMul_ConsolePrint (state, ", 4 Gb memory");
dfcd3bfb JM	147
dfcd3bfb JM	148	return TRUE;
c906108c SS	149	}
	150
	151	/***************************************************************************\
	152	* Remove the memory interface *
	153	\***************************************************************************/
	154
	155	void
	156	ARMul_MemoryExit (ARMul_State * state)
	157	{
dfcd3bfb JM	158	ARMword page;
	159	ARMword **pagetable;
	160	ARMword *pageptr;
c906108c	161
dfcd3bfb JM	162	pagetable = (ARMword **) state->MemDataPtr;
dfcd3bfb JM	163	for (page = 0; page < NUMPAGES; page++)
c906108c SS	164	{
	165	pageptr = *(pagetable + page);
	166	if (pageptr != NULL)
dfcd3bfb	167	free ((char *) pageptr);
c906108c	168	}
dfcd3bfb	169	free ((char *) pagetable);
c906108c SS	170	return;
	171	}
	172
	173	/***************************************************************************\
	174	* ReLoad Instruction *
	175	\***************************************************************************/
	176
	177	ARMword
	178	ARMul_ReLoadInstr (ARMul_State * state, ARMword address, ARMword isize)
	179	{
	180	#ifdef ABORTS
dfcd3bfb	181	if (address >= LOWABORT && address < HIGHABORT)
c906108c SS	182	{
	183	ARMul_PREFETCHABORT (address);
	184	return ARMul_ABORTWORD;
	185	}
dfcd3bfb JM	186	else
	187	{
	188	ARMul_CLEARABORT;
	189	}
c906108c SS	190	#endif
c906108c SS	191
dfcd3bfb JM	192	if ((isize == 2) && (address & 0x2))
	193	{
	194	/* We return the next two halfwords: */
917bca4f NC	195	ARMword lo = GetWord (state, address, TRUE);
917bca4f NC	196	ARMword hi = GetWord (state, address + 4, TRUE);
c906108c	197
dfcd3bfb JM	198	if (state->bigendSig == HIGH)
	199	return (lo << 16) \| (hi >> 16);
	200	else
	201	return ((hi & 0xFFFF) << 16) \| (lo >> 16);
	202	}
c906108c	203
917bca4f	204	return GetWord (state, address, TRUE);
c906108c SS	205	}
	206
	207	/***************************************************************************\
	208	* Load Instruction, Sequential Cycle *
	209	\***************************************************************************/
	210
dfcd3bfb	211	ARMword ARMul_LoadInstrS (ARMul_State * state, ARMword address, ARMword isize)
c906108c	212	{
dfcd3bfb	213	state->NumScycles++;
c906108c SS	214
c906108c SS	215	#ifdef HOURGLASS
dfcd3bfb	216	if ((state->NumScycles & HOURGLASS_RATE) == 0)
c906108c SS	217	{
	218	HOURGLASS;
	219	}
	220	#endif
	221
	222	return ARMul_ReLoadInstr (state, address, isize);
	223	}
	224
	225	/***************************************************************************\
	226	* Load Instruction, Non Sequential Cycle *
	227	\***************************************************************************/
	228
dfcd3bfb	229	ARMword ARMul_LoadInstrN (ARMul_State * state, ARMword address, ARMword isize)
c906108c	230	{
dfcd3bfb	231	state->NumNcycles++;
c906108c SS	232
	233	return ARMul_ReLoadInstr (state, address, isize);
	234	}
	235
	236	/***************************************************************************\
	237	* Read Word (but don't tell anyone!) *
	238	\***************************************************************************/
	239
dfcd3bfb	240	ARMword ARMul_ReadWord (ARMul_State * state, ARMword address)
c906108c SS	241	{
	242	#ifdef ABORTS
	243	if (address >= LOWABORT && address < HIGHABORT)
	244	{
	245	ARMul_DATAABORT (address);
	246	return ARMul_ABORTWORD;
	247	}
	248	else
	249	{
	250	ARMul_CLEARABORT;
	251	}
	252	#endif
	253
917bca4f	254	return GetWord (state, address, TRUE);
c906108c SS	255	}
	256
	257	/***************************************************************************\
	258	* Load Word, Sequential Cycle *
	259	\***************************************************************************/
	260
dfcd3bfb	261	ARMword ARMul_LoadWordS (ARMul_State * state, ARMword address)
c906108c	262	{
dfcd3bfb	263	state->NumScycles++;
c906108c SS	264
	265	return ARMul_ReadWord (state, address);
	266	}
	267
	268	/***************************************************************************\
	269	* Load Word, Non Sequential Cycle *
	270	\***************************************************************************/
	271
dfcd3bfb	272	ARMword ARMul_LoadWordN (ARMul_State * state, ARMword address)
c906108c	273	{
dfcd3bfb JM	274	state->NumNcycles++;
dfcd3bfb JM	275
c906108c SS	276	return ARMul_ReadWord (state, address);
	277	}
	278
	279	/***************************************************************************\
	280	* Load Halfword, (Non Sequential Cycle) *
	281	\***************************************************************************/
	282
dfcd3bfb	283	ARMword ARMul_LoadHalfWord (ARMul_State * state, ARMword address)
c906108c SS	284	{
	285	ARMword temp, offset;
	286
dfcd3bfb	287	state->NumNcycles++;
c906108c	288
dfcd3bfb JM	289	temp = ARMul_ReadWord (state, address);
dfcd3bfb JM	290	offset = (((ARMword) state->bigendSig * 2) ^ (address & 2)) << 3; /* bit offset into the word */
c906108c SS	291
	292	return (temp >> offset) & 0xffff;
	293	}
	294
	295	/***************************************************************************\
	296	* Read Byte (but don't tell anyone!) *
	297	\***************************************************************************/
	298
dfcd3bfb	299	ARMword ARMul_ReadByte (ARMul_State * state, ARMword address)
c906108c SS	300	{
	301	ARMword temp, offset;
	302
dfcd3bfb JM	303	temp = ARMul_ReadWord (state, address);
dfcd3bfb JM	304	offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3; /* bit offset into the word */
c906108c	305
dfcd3bfb	306	return (temp >> offset & 0xffL);
c906108c SS	307	}
	308
	309	/***************************************************************************\
	310	* Load Byte, (Non Sequential Cycle) *
	311	\***************************************************************************/
	312
dfcd3bfb	313	ARMword ARMul_LoadByte (ARMul_State * state, ARMword address)
c906108c	314	{
dfcd3bfb	315	state->NumNcycles++;
c906108c SS	316
	317	return ARMul_ReadByte (state, address);
	318	}
	319
	320	/***************************************************************************\
	321	* Write Word (but don't tell anyone!) *
	322	\***************************************************************************/
	323
	324	void
	325	ARMul_WriteWord (ARMul_State * state, ARMword address, ARMword data)
	326	{
	327	#ifdef ABORTS
	328	if (address >= LOWABORT && address < HIGHABORT)
	329	{
	330	ARMul_DATAABORT (address);
	331	return;
	332	}
	333	else
	334	{
	335	ARMul_CLEARABORT;
	336	}
	337	#endif
	338
917bca4f	339	PutWord (state, address, data, TRUE);
c906108c SS	340	}
	341
	342	/***************************************************************************\
	343	* Store Word, Sequential Cycle *
	344	\***************************************************************************/
	345
	346	void
	347	ARMul_StoreWordS (ARMul_State * state, ARMword address, ARMword data)
	348	{
dfcd3bfb	349	state->NumScycles++;
c906108c SS	350
	351	ARMul_WriteWord (state, address, data);
	352	}
	353
	354	/***************************************************************************\
	355	* Store Word, Non Sequential Cycle *
	356	\***************************************************************************/
	357
	358	void
	359	ARMul_StoreWordN (ARMul_State * state, ARMword address, ARMword data)
	360	{
dfcd3bfb	361	state->NumNcycles++;
c906108c SS	362
	363	ARMul_WriteWord (state, address, data);
	364	}
	365
	366	/***************************************************************************\
	367	* Store HalfWord, (Non Sequential Cycle) *
	368	\***************************************************************************/
	369
	370	void
	371	ARMul_StoreHalfWord (ARMul_State * state, ARMword address, ARMword data)
	372	{
	373	ARMword temp, offset;
	374
dfcd3bfb JM	375	state->NumNcycles++;
dfcd3bfb JM	376
c906108c SS	377	#ifdef VALIDATE
	378	if (address == TUBE)
	379	{
	380	if (data == 4)
	381	state->Emulate = FALSE;
	382	else
dfcd3bfb	383	(void) putc ((char) data, stderr); /* Write Char */
c906108c SS	384	return;
	385	}
	386	#endif
	387
dfcd3bfb JM	388	temp = ARMul_ReadWord (state, address);
	389	offset = (((ARMword) state->bigendSig * 2) ^ (address & 2)) << 3; /* bit offset into the word */
	390
	391	PutWord (state, address,
917bca4f NC	392	(temp & ~(0xffffL << offset)) \| ((data & 0xffffL) << offset),
917bca4f NC	393	TRUE);
c906108c SS	394	}
	395
	396	/***************************************************************************\
	397	* Write Byte (but don't tell anyone!) *
	398	\***************************************************************************/
	399
	400	void
	401	ARMul_WriteByte (ARMul_State * state, ARMword address, ARMword data)
	402	{
	403	ARMword temp, offset;
	404
dfcd3bfb JM	405	temp = ARMul_ReadWord (state, address);
	406	offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3; /* bit offset into the word */
	407
	408	PutWord (state, address,
917bca4f NC	409	(temp & ~(0xffL << offset)) \| ((data & 0xffL) << offset),
917bca4f NC	410	TRUE);
c906108c SS	411	}
	412
	413	/***************************************************************************\
	414	* Store Byte, (Non Sequential Cycle) *
	415	\***************************************************************************/
	416
	417	void
	418	ARMul_StoreByte (ARMul_State * state, ARMword address, ARMword data)
	419	{
dfcd3bfb	420	state->NumNcycles++;
c906108c SS	421
	422	#ifdef VALIDATE
	423	if (address == TUBE)
	424	{
	425	if (data == 4)
	426	state->Emulate = FALSE;
	427	else
dfcd3bfb	428	(void) putc ((char) data, stderr); /* Write Char */
c906108c SS	429	return;
	430	}
	431	#endif
	432
	433	ARMul_WriteByte (state, address, data);
	434	}
	435
	436	/***************************************************************************\
	437	* Swap Word, (Two Non Sequential Cycles) *
	438	\***************************************************************************/
	439
dfcd3bfb	440	ARMword ARMul_SwapWord (ARMul_State * state, ARMword address, ARMword data)
c906108c SS	441	{
	442	ARMword temp;
	443
dfcd3bfb	444	state->NumNcycles++;
c906108c SS	445
c906108c SS	446	temp = ARMul_ReadWord (state, address);
dfcd3bfb JM	447
	448	state->NumNcycles++;
	449
917bca4f	450	PutWord (state, address, data, TRUE);
dfcd3bfb	451
c906108c SS	452	return temp;
	453	}
	454
	455	/***************************************************************************\
	456	* Swap Byte, (Two Non Sequential Cycles) *
	457	\***************************************************************************/
	458
dfcd3bfb	459	ARMword ARMul_SwapByte (ARMul_State * state, ARMword address, ARMword data)
c906108c SS	460	{
	461	ARMword temp;
	462
	463	temp = ARMul_LoadByte (state, address);
	464	ARMul_StoreByte (state, address, data);
dfcd3bfb	465
c906108c SS	466	return temp;
	467	}
	468
	469	/***************************************************************************\
	470	* Count I Cycles *
	471	\***************************************************************************/
	472
	473	void
6d358e86	474	ARMul_Icycles (ARMul_State * state, unsigned number, ARMword address ATTRIBUTE_UNUSED)
c906108c SS	475	{
	476	state->NumIcycles += number;
	477	ARMul_CLEARABORT;
	478	}
	479
	480	/***************************************************************************\
	481	* Count C Cycles *
	482	\***************************************************************************/
	483
	484	void
6d358e86	485	ARMul_Ccycles (ARMul_State * state, unsigned number, ARMword address ATTRIBUTE_UNUSED)
c906108c SS	486	{
	487	state->NumCcycles += number;
	488	ARMul_CLEARABORT;
	489	}
917bca4f NC	490
	491
	492	/* Read a byte. Do not check for alignment or access errors. */
	493
	494	ARMword
	495	ARMul_SafeReadByte (ARMul_State * state, ARMword address)
	496	{
	497	ARMword temp, offset;
	498
	499	temp = GetWord (state, address, FALSE);
	500	offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3;
	501
	502	return (temp >> offset & 0xffL);
	503	}
	504
	505	void
	506	ARMul_SafeWriteByte (ARMul_State * state, ARMword address, ARMword data)
	507	{
	508	ARMword temp, offset;
	509
	510	temp = GetWord (state, address, FALSE);
	511	offset = (((ARMword) state->bigendSig * 3) ^ (address & 3)) << 3;
	512
	513	PutWord (state, address,
	514	(temp & ~(0xffL << offset)) \| ((data & 0xffL) << offset),
	515	FALSE);
	516	}