sim: unify sim-cpu usage
[deliverable/binutils-gdb.git] / sim / bfin / sim-main.h
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1/* Simulator for Analog Devices Blackfin processors.
2
32d0add0 3 Copyright (C) 2005-2015 Free Software Foundation, Inc.
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4 Contributed by Analog Devices, Inc.
5
6 This file is part of simulators.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21#ifndef _BFIN_MAIN_SIM_H_
22#define _BFIN_MAIN_SIM_H_
23
24#include "sim-basics.h"
25#include "sim-signal.h"
26
27typedef unsigned32 sim_cia;
28
29#define CIA_GET(cpu) CPU_PC_GET (cpu)
30#define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
31
32typedef struct _sim_cpu SIM_CPU;
33
34#include "bfin-sim.h"
35
36#include "machs.h"
37
38#include "sim-base.h"
39
40struct _sim_cpu {
41 /* ... simulator specific members ... */
42 struct bfin_cpu_state state;
43 sim_cpu_base base;
44};
45#define BFIN_CPU_STATE ((cpu)->state)
46
47struct sim_state {
48 sim_cpu *cpu[MAX_NR_PROCESSORS];
78e9aa70 49
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50 /* ... simulator specific members ... */
51 struct bfin_board_data board;
52#define STATE_BOARD_DATA(sd) (&(sd)->board)
53 sim_state_base base;
54};
55
56#include "sim-config.h"
57#include "sim-types.h"
58#include "sim-engine.h"
59#include "sim-options.h"
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60#include "dv-bfin_trace.h"
61
62#undef MAX
63#undef MIN
64#undef CLAMP
65#undef ALIGN
66#define MAX(a, b) ((a) > (b) ? (a) : (b))
67#define MIN(a, b) ((a) < (b) ? (a) : (b))
68#define CLAMP(a, b, c) MIN (MAX (a, b), c)
69#define ALIGN(addr, size) (((addr) + ((size)-1)) & ~((size)-1))
70
71#define MAYBE_TRACE(type, cpu, fmt, ...) \
72 do { \
73 if (TRACE_##type##_P (cpu)) \
74 trace_generic (CPU_STATE (cpu), cpu, TRACE_##type##_IDX, \
75 fmt, ## __VA_ARGS__); \
76 } while (0)
77#define TRACE_INSN(cpu, fmt, ...) MAYBE_TRACE (INSN, cpu, fmt, ## __VA_ARGS__)
78#define TRACE_DECODE(cpu, fmt, ...) MAYBE_TRACE (DECODE, cpu, fmt, ## __VA_ARGS__)
79#define TRACE_EXTRACT(cpu, fmt, ...) MAYBE_TRACE (EXTRACT, cpu, fmt, ## __VA_ARGS__)
ea1f7d4c 80#define TRACE_SYSCALL(cpu, fmt, ...) MAYBE_TRACE (SYSCALL, cpu, fmt, ## __VA_ARGS__)
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81#define TRACE_CORE(cpu, addr, size, map, val) \
82 do { \
83 MAYBE_TRACE (CORE, cpu, "%cBUS %s %i bytes @ 0x%08x: 0x%0*x", \
84 map == exec_map ? 'I' : 'D', \
85 map == write_map ? "STORE" : "FETCH", \
86 size, addr, size * 2, val); \
87 PROFILE_COUNT_CORE (cpu, addr, size, map); \
88 } while (0)
89#define TRACE_EVENTS(cpu, fmt, ...) MAYBE_TRACE (EVENTS, cpu, fmt, ## __VA_ARGS__)
90#define TRACE_BRANCH(cpu, oldpc, newpc, hwloop, fmt, ...) \
91 do { \
92 MAYBE_TRACE (BRANCH, cpu, fmt " to %#x", ## __VA_ARGS__, newpc); \
93 if (STATE_ENVIRONMENT (CPU_STATE (cpu)) == OPERATING_ENVIRONMENT) \
94 bfin_trace_queue (cpu, oldpc, newpc, hwloop); \
95 } while (0)
96
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97extern void trace_register (SIM_DESC sd,
98 sim_cpu *cpu,
99 const char *fmt,
100 ...)
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101 __attribute__((format (printf, 3, 4)));
102#define TRACE_REGISTER(cpu, fmt, ...) \
103 do { \
104 if (TRACE_CORE_P (cpu)) \
105 trace_register (CPU_STATE (cpu), cpu, fmt, ## __VA_ARGS__); \
106 } while (0)
107#define TRACE_REG(cpu, reg, val) TRACE_REGISTER (cpu, "wrote "#reg" = %#x", val)
108
109/* Default memory size. */
110#define BFIN_DEFAULT_MEM_SIZE (128 * 1024 * 1024)
111
112#endif
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